Skip to content
[Jenkins]Jenkins
log in

Workspace

/ F03x /
.git
.Xil
klessydra-f0-3th
build_digilent_arty_a7_100t.tclSep 6, 2026, 2:04:10 AM3.07 KiB
clockInfo.txtSep 6, 2026, 2:06:39 AM375 B
digilent_arty_a7_100t.bitSep 6, 2026, 2:08:22 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptSep 6, 2026, 2:07:00 AM58.83 KiB
digilent_arty_a7_control_sets.rptSep 6, 2026, 2:06:58 AM70.99 KiB
digilent_arty_a7_drc.rptSep 6, 2026, 2:07:54 AM8.55 KiB
digilent_arty_a7_io.rptSep 6, 2026, 2:06:58 AM96.81 KiB
digilent_arty_a7_power.rptSep 6, 2026, 2:07:59 AM8.84 KiB
digilent_arty_a7_route_status.rptSep 6, 2026, 2:07:51 AM651 B
digilent_arty_a7_timing.rptSep 6, 2026, 2:07:55 AM47.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptSep 6, 2026, 2:06:58 AM25.25 KiB
digilent_arty_a7_utilization_place.rptSep 6, 2026, 2:06:58 AM10.77 KiB
processor_ci_defines.vhSep 6, 2026, 2:04:10 AM300 B
README.mdSep 6, 2026, 2:04:04 AM421 B
src_files.ymlSep 6, 2026, 2:04:04 AM522 B