//
// Generated by Bluespec Compiler, version 2019.05.beta2 (build a88bf40db, 2019-05-24)
//
//
//
//
// Ports:
// Name                         I/O  size props
// mav_request_pa                 O   130
// RDY_mav_request_pa             O     1
// mv_is_idle                     O     1
// mv_refill_ok                   O     1
// RDY_mv_refill_ok               O     1
// RDY_flush_server_request_put   O     1 reg
// RDY_flush_server_response_get  O     1 reg
// l1_to_l2_client_request_first  O    69 reg
// RDY_l1_to_l2_client_request_first  O     1 reg
// RDY_l1_to_l2_client_request_deq  O     1 reg
// l1_to_l2_client_request_notEmpty  O     1 reg
// RDY_l1_to_l2_client_request_notEmpty  O     1 const
// RDY_l1_to_l2_client_response_enq  O     1 reg
// l1_to_l2_client_response_notFull  O     1 reg
// RDY_l1_to_l2_client_response_notFull  O     1 const
// RDY_l2_to_l1_server_request_enq  O     1 reg
// l2_to_l1_server_request_notFull  O     1 reg
// RDY_l2_to_l1_server_request_notFull  O     1 const
// l2_to_l1_server_response_first  O   579 reg
// RDY_l2_to_l1_server_response_first  O     1 reg
// RDY_l2_to_l1_server_response_deq  O     1 reg
// l2_to_l1_server_response_notEmpty  O     1 reg
// RDY_l2_to_l1_server_response_notEmpty  O     1 const
// CLK                            I     1 clock
// RST_N                          I     1 reset
// ma_request_va_va               I    64
// mav_request_pa_req             I   208
// mav_request_pa_pa              I    64
// flush_server_request_put       I     1 reg
// l1_to_l2_client_response_enq_x  I   579 reg
// l2_to_l1_server_request_enq_x  I    66 reg
// EN_ma_request_va               I     1
// EN_flush_server_request_put    I     1
// EN_flush_server_response_get   I     1
// EN_l1_to_l2_client_request_deq  I     1
// EN_l1_to_l2_client_response_enq  I     1
// EN_l2_to_l1_server_request_enq  I     1
// EN_l2_to_l1_server_response_deq  I     1
// EN_mav_request_pa              I     1
//
// Combinational paths from inputs to outputs:
//   (mav_request_pa_req, mav_request_pa_pa) -> mav_request_pa
//
//

`ifdef BSV_ASSIGNMENT_DELAY
`else
  `define BSV_ASSIGNMENT_DELAY
`endif

`ifdef BSV_POSITIVE_RESET
  `define BSV_RESET_VALUE 1'b1
  `define BSV_RESET_EDGE posedge
`else
  `define BSV_RESET_VALUE 1'b0
  `define BSV_RESET_EDGE negedge
`endif

module mkCache(CLK,
	       RST_N,

	       ma_request_va_va,
	       EN_ma_request_va,

	       mav_request_pa_req,
	       mav_request_pa_pa,
	       EN_mav_request_pa,
	       mav_request_pa,
	       RDY_mav_request_pa,

	       mv_is_idle,

	       mv_refill_ok,
	       RDY_mv_refill_ok,

	       flush_server_request_put,
	       EN_flush_server_request_put,
	       RDY_flush_server_request_put,

	       EN_flush_server_response_get,
	       RDY_flush_server_response_get,

	       l1_to_l2_client_request_first,
	       RDY_l1_to_l2_client_request_first,

	       EN_l1_to_l2_client_request_deq,
	       RDY_l1_to_l2_client_request_deq,

	       l1_to_l2_client_request_notEmpty,
	       RDY_l1_to_l2_client_request_notEmpty,

	       l1_to_l2_client_response_enq_x,
	       EN_l1_to_l2_client_response_enq,
	       RDY_l1_to_l2_client_response_enq,

	       l1_to_l2_client_response_notFull,
	       RDY_l1_to_l2_client_response_notFull,

	       l2_to_l1_server_request_enq_x,
	       EN_l2_to_l1_server_request_enq,
	       RDY_l2_to_l1_server_request_enq,

	       l2_to_l1_server_request_notFull,
	       RDY_l2_to_l1_server_request_notFull,

	       l2_to_l1_server_response_first,
	       RDY_l2_to_l1_server_response_first,

	       EN_l2_to_l1_server_response_deq,
	       RDY_l2_to_l1_server_response_deq,

	       l2_to_l1_server_response_notEmpty,
	       RDY_l2_to_l1_server_response_notEmpty);
  parameter [0 : 0] dcache_not_icache = 1'b0;
  parameter [2 : 0] verbosity = 3'b0;
  input  CLK;
  input  RST_N;

  // action method ma_request_va
  input  [63 : 0] ma_request_va_va;
  input  EN_ma_request_va;

  // actionvalue method mav_request_pa
  input  [207 : 0] mav_request_pa_req;
  input  [63 : 0] mav_request_pa_pa;
  input  EN_mav_request_pa;
  output [129 : 0] mav_request_pa;
  output RDY_mav_request_pa;

  // value method mv_is_idle
  output mv_is_idle;

  // value method mv_refill_ok
  output mv_refill_ok;
  output RDY_mv_refill_ok;

  // action method flush_server_request_put
  input  flush_server_request_put;
  input  EN_flush_server_request_put;
  output RDY_flush_server_request_put;

  // action method flush_server_response_get
  input  EN_flush_server_response_get;
  output RDY_flush_server_response_get;

  // value method l1_to_l2_client_request_first
  output [68 : 0] l1_to_l2_client_request_first;
  output RDY_l1_to_l2_client_request_first;

  // action method l1_to_l2_client_request_deq
  input  EN_l1_to_l2_client_request_deq;
  output RDY_l1_to_l2_client_request_deq;

  // value method l1_to_l2_client_request_notEmpty
  output l1_to_l2_client_request_notEmpty;
  output RDY_l1_to_l2_client_request_notEmpty;

  // action method l1_to_l2_client_response_enq
  input  [578 : 0] l1_to_l2_client_response_enq_x;
  input  EN_l1_to_l2_client_response_enq;
  output RDY_l1_to_l2_client_response_enq;

  // value method l1_to_l2_client_response_notFull
  output l1_to_l2_client_response_notFull;
  output RDY_l1_to_l2_client_response_notFull;

  // action method l2_to_l1_server_request_enq
  input  [65 : 0] l2_to_l1_server_request_enq_x;
  input  EN_l2_to_l1_server_request_enq;
  output RDY_l2_to_l1_server_request_enq;

  // value method l2_to_l1_server_request_notFull
  output l2_to_l1_server_request_notFull;
  output RDY_l2_to_l1_server_request_notFull;

  // value method l2_to_l1_server_response_first
  output [578 : 0] l2_to_l1_server_response_first;
  output RDY_l2_to_l1_server_response_first;

  // action method l2_to_l1_server_response_deq
  input  EN_l2_to_l1_server_response_deq;
  output RDY_l2_to_l1_server_response_deq;

  // value method l2_to_l1_server_response_notEmpty
  output l2_to_l1_server_response_notEmpty;
  output RDY_l2_to_l1_server_response_notEmpty;

  // signals for module outputs
  wire [578 : 0] l2_to_l1_server_response_first;
  wire [129 : 0] mav_request_pa;
  wire [68 : 0] l1_to_l2_client_request_first;
  wire RDY_flush_server_request_put,
       RDY_flush_server_response_get,
       RDY_l1_to_l2_client_request_deq,
       RDY_l1_to_l2_client_request_first,
       RDY_l1_to_l2_client_request_notEmpty,
       RDY_l1_to_l2_client_response_enq,
       RDY_l1_to_l2_client_response_notFull,
       RDY_l2_to_l1_server_request_enq,
       RDY_l2_to_l1_server_request_notFull,
       RDY_l2_to_l1_server_response_deq,
       RDY_l2_to_l1_server_response_first,
       RDY_l2_to_l1_server_response_notEmpty,
       RDY_mav_request_pa,
       RDY_mv_refill_ok,
       l1_to_l2_client_request_notEmpty,
       l1_to_l2_client_response_notFull,
       l2_to_l1_server_request_notFull,
       l2_to_l1_server_response_notEmpty,
       mv_is_idle,
       mv_refill_ok;

  // register rg_amo_funct7
  reg [6 : 0] rg_amo_funct7;
  wire [6 : 0] rg_amo_funct7$D_IN;
  wire rg_amo_funct7$EN;

  // register rg_cache_op
  reg [1 : 0] rg_cache_op;
  wire [1 : 0] rg_cache_op$D_IN;
  wire rg_cache_op$EN;

  // register rg_cset_in_cache
  reg [5 : 0] rg_cset_in_cache;
  reg [5 : 0] rg_cset_in_cache$D_IN;
  wire rg_cset_in_cache$EN;

  // register rg_cword_in_cline
  reg [2 : 0] rg_cword_in_cline;
  reg [2 : 0] rg_cword_in_cline$D_IN;
  wire rg_cword_in_cline$EN;

  // register rg_error_during_refill
  reg rg_error_during_refill;
  wire rg_error_during_refill$D_IN, rg_error_during_refill$EN;

  // register rg_f3
  reg [2 : 0] rg_f3;
  wire [2 : 0] rg_f3$D_IN;
  wire rg_f3$EN;

  // register rg_fsm_state
  reg [3 : 0] rg_fsm_state;
  reg [3 : 0] rg_fsm_state$D_IN;
  wire rg_fsm_state$EN;

  // register rg_lrsc_pa
  reg [63 : 0] rg_lrsc_pa;
  wire [63 : 0] rg_lrsc_pa$D_IN;
  wire rg_lrsc_pa$EN;

  // register rg_lrsc_size
  reg [1 : 0] rg_lrsc_size;
  wire [1 : 0] rg_lrsc_size$D_IN;
  wire rg_lrsc_size$EN;

  // register rg_lrsc_valid
  reg rg_lrsc_valid;
  wire rg_lrsc_valid$D_IN, rg_lrsc_valid$EN;

  // register rg_new_cset_meta
  reg [107 : 0] rg_new_cset_meta;
  wire [107 : 0] rg_new_cset_meta$D_IN;
  wire rg_new_cset_meta$EN;

  // register rg_new_meta_state
  reg [1 : 0] rg_new_meta_state;
  wire [1 : 0] rg_new_meta_state$D_IN;
  wire rg_new_meta_state$EN;

  // register rg_pa
  reg [63 : 0] rg_pa;
  reg [63 : 0] rg_pa$D_IN;
  wire rg_pa$EN;

  // register rg_post_wb_fsm_state
  reg [3 : 0] rg_post_wb_fsm_state;
  reg [3 : 0] rg_post_wb_fsm_state$D_IN;
  wire rg_post_wb_fsm_state$EN;

  // register rg_post_wb_meta_state
  reg [1 : 0] rg_post_wb_meta_state;
  reg [1 : 0] rg_post_wb_meta_state$D_IN;
  wire rg_post_wb_meta_state$EN;

  // register rg_read_cline_buf
  reg [511 : 0] rg_read_cline_buf;
  wire [511 : 0] rg_read_cline_buf$D_IN;
  wire rg_read_cline_buf$EN;

  // register rg_save_cset_in_cache
  reg [5 : 0] rg_save_cset_in_cache;
  wire [5 : 0] rg_save_cset_in_cache$D_IN;
  wire rg_save_cset_in_cache$EN;

  // register rg_save_cword_in_cline
  reg [2 : 0] rg_save_cword_in_cline;
  wire [2 : 0] rg_save_cword_in_cline$D_IN;
  wire rg_save_cword_in_cline$EN;

  // register rg_save_fsm_state
  reg [3 : 0] rg_save_fsm_state;
  wire [3 : 0] rg_save_fsm_state$D_IN;
  wire rg_save_fsm_state$EN;

  // register rg_save_pa
  reg [63 : 0] rg_save_pa;
  wire [63 : 0] rg_save_pa$D_IN;
  wire rg_save_pa$EN;

  // register rg_save_va
  reg [63 : 0] rg_save_va;
  wire [63 : 0] rg_save_va$D_IN;
  wire rg_save_va$EN;

  // register rg_save_way_in_cset
  reg rg_save_way_in_cset;
  wire rg_save_way_in_cset$D_IN, rg_save_way_in_cset$EN;

  // register rg_va
  reg [63 : 0] rg_va;
  reg [63 : 0] rg_va$D_IN;
  wire rg_va$EN;

  // register rg_victim_way
  reg rg_victim_way;
  wire rg_victim_way$D_IN, rg_victim_way$EN;

  // register rg_way_in_cset
  reg rg_way_in_cset;
  reg rg_way_in_cset$D_IN;
  wire rg_way_in_cset$EN;

  // register rg_write_cline_buf
  reg [511 : 0] rg_write_cline_buf;
  wire [511 : 0] rg_write_cline_buf$D_IN;
  wire rg_write_cline_buf$EN;

  // ports of submodule f_L1_to_L2_reqs
  wire [68 : 0] f_L1_to_L2_reqs$D_IN, f_L1_to_L2_reqs$D_OUT;
  wire f_L1_to_L2_reqs$CLR,
       f_L1_to_L2_reqs$DEQ,
       f_L1_to_L2_reqs$EMPTY_N,
       f_L1_to_L2_reqs$ENQ,
       f_L1_to_L2_reqs$FULL_N;

  // ports of submodule f_L1_to_L2_rsps
  reg [578 : 0] f_L1_to_L2_rsps$D_IN;
  wire [578 : 0] f_L1_to_L2_rsps$D_OUT;
  wire f_L1_to_L2_rsps$CLR,
       f_L1_to_L2_rsps$DEQ,
       f_L1_to_L2_rsps$EMPTY_N,
       f_L1_to_L2_rsps$ENQ,
       f_L1_to_L2_rsps$FULL_N;

  // ports of submodule f_L2_to_L1_reqs
  wire [65 : 0] f_L2_to_L1_reqs$D_IN, f_L2_to_L1_reqs$D_OUT;
  wire f_L2_to_L1_reqs$CLR,
       f_L2_to_L1_reqs$DEQ,
       f_L2_to_L1_reqs$EMPTY_N,
       f_L2_to_L1_reqs$ENQ,
       f_L2_to_L1_reqs$FULL_N;

  // ports of submodule f_L2_to_L1_rsps
  wire [578 : 0] f_L2_to_L1_rsps$D_IN, f_L2_to_L1_rsps$D_OUT;
  wire f_L2_to_L1_rsps$CLR,
       f_L2_to_L1_rsps$DEQ,
       f_L2_to_L1_rsps$EMPTY_N,
       f_L2_to_L1_rsps$ENQ,
       f_L2_to_L1_rsps$FULL_N;

  // ports of submodule f_flush_reqs
  wire f_flush_reqs$CLR,
       f_flush_reqs$DEQ,
       f_flush_reqs$D_IN,
       f_flush_reqs$D_OUT,
       f_flush_reqs$EMPTY_N,
       f_flush_reqs$ENQ,
       f_flush_reqs$FULL_N;

  // ports of submodule f_flush_rsps
  wire f_flush_rsps$CLR,
       f_flush_rsps$DEQ,
       f_flush_rsps$EMPTY_N,
       f_flush_rsps$ENQ,
       f_flush_rsps$FULL_N;

  // ports of submodule ram_cset_cword
  reg [127 : 0] ram_cset_cword$DIA;
  reg [8 : 0] ram_cset_cword$ADDRA;
  wire [127 : 0] ram_cset_cword$DIB, ram_cset_cword$DOA;
  wire [8 : 0] ram_cset_cword$ADDRB;
  wire ram_cset_cword$ENA,
       ram_cset_cword$ENB,
       ram_cset_cword$WEA,
       ram_cset_cword$WEB;

  // ports of submodule ram_cset_meta
  reg [107 : 0] ram_cset_meta$DIA, ram_cset_meta$DIB;
  reg [5 : 0] ram_cset_meta$ADDRA;
  wire [107 : 0] ram_cset_meta$DOA;
  wire [5 : 0] ram_cset_meta$ADDRB;
  wire ram_cset_meta$ENA,
       ram_cset_meta$ENB,
       ram_cset_meta$WEA,
       ram_cset_meta$WEB;

  // rule scheduling signals
  wire CAN_FIRE_RL_rl_downgrade_req_from_L2_A,
       CAN_FIRE_RL_rl_downgrade_req_from_L2_B,
       CAN_FIRE_RL_rl_downgrade_req_from_L2_C,
       CAN_FIRE_RL_rl_flush_loop,
       CAN_FIRE_RL_rl_flush_loop_writeback_sequel,
       CAN_FIRE_RL_rl_flush_start,
       CAN_FIRE_RL_rl_initialize,
       CAN_FIRE_RL_rl_refill_loop,
       CAN_FIRE_RL_rl_refill_loop_final,
       CAN_FIRE_RL_rl_refill_start,
       CAN_FIRE_RL_rl_replace,
       CAN_FIRE_RL_rl_writeback_loop,
       CAN_FIRE_flush_server_request_put,
       CAN_FIRE_flush_server_response_get,
       CAN_FIRE_l1_to_l2_client_request_deq,
       CAN_FIRE_l1_to_l2_client_response_enq,
       CAN_FIRE_l2_to_l1_server_request_enq,
       CAN_FIRE_l2_to_l1_server_response_deq,
       CAN_FIRE_ma_request_va,
       CAN_FIRE_mav_request_pa,
       WILL_FIRE_RL_rl_downgrade_req_from_L2_A,
       WILL_FIRE_RL_rl_downgrade_req_from_L2_B,
       WILL_FIRE_RL_rl_downgrade_req_from_L2_C,
       WILL_FIRE_RL_rl_flush_loop,
       WILL_FIRE_RL_rl_flush_loop_writeback_sequel,
       WILL_FIRE_RL_rl_flush_start,
       WILL_FIRE_RL_rl_initialize,
       WILL_FIRE_RL_rl_refill_loop,
       WILL_FIRE_RL_rl_refill_loop_final,
       WILL_FIRE_RL_rl_refill_start,
       WILL_FIRE_RL_rl_replace,
       WILL_FIRE_RL_rl_writeback_loop,
       WILL_FIRE_flush_server_request_put,
       WILL_FIRE_flush_server_response_get,
       WILL_FIRE_l1_to_l2_client_request_deq,
       WILL_FIRE_l1_to_l2_client_response_enq,
       WILL_FIRE_l2_to_l1_server_request_enq,
       WILL_FIRE_l2_to_l1_server_response_deq,
       WILL_FIRE_ma_request_va,
       WILL_FIRE_mav_request_pa;

  // inputs to muxes for submodule ports
  wire [578 : 0] MUX_f_L1_to_L2_rsps$enq_1__VAL_1,
		 MUX_f_L1_to_L2_rsps$enq_1__VAL_2,
		 MUX_f_L1_to_L2_rsps$enq_1__VAL_3,
		 MUX_f_L1_to_L2_rsps$enq_1__VAL_4;
  wire [127 : 0] MUX_ram_cset_cword$b_put_3__VAL_1,
		 MUX_ram_cset_cword$b_put_3__VAL_2;
  wire [107 : 0] MUX_ram_cset_meta$b_put_3__VAL_2,
		 MUX_ram_cset_meta$b_put_3__VAL_3,
		 MUX_ram_cset_meta$b_put_3__VAL_4,
		 MUX_ram_cset_meta$b_put_3__VAL_5,
		 MUX_ram_cset_meta$b_put_3__VAL_6;
  wire [68 : 0] MUX_f_L1_to_L2_reqs$enq_1__VAL_1,
		MUX_f_L1_to_L2_reqs$enq_1__VAL_2;
  wire [8 : 0] MUX_ram_cset_cword$a_put_2__VAL_1,
	       MUX_ram_cset_cword$a_put_2__VAL_2,
	       MUX_ram_cset_cword$a_put_2__VAL_4,
	       MUX_ram_cset_cword$a_put_2__VAL_5,
	       MUX_ram_cset_cword$a_put_2__VAL_9,
	       MUX_ram_cset_cword$b_put_2__VAL_1;
  wire [5 : 0] MUX_ram_cset_meta$a_put_2__VAL_1;
  wire [3 : 0] MUX_rg_fsm_state$write_1__VAL_2,
	       MUX_rg_fsm_state$write_1__VAL_4,
	       MUX_rg_fsm_state$write_1__VAL_5,
	       MUX_rg_fsm_state$write_1__VAL_7,
	       MUX_rg_fsm_state$write_1__VAL_8,
	       MUX_rg_fsm_state$write_1__VAL_9;
  wire MUX_f_L1_to_L2_reqs$enq_1__SEL_1,
       MUX_f_L1_to_L2_rsps$enq_1__SEL_2,
       MUX_f_L1_to_L2_rsps$enq_1__SEL_3,
       MUX_f_L1_to_L2_rsps$enq_1__SEL_4,
       MUX_ram_cset_cword$a_put_1__SEL_1,
       MUX_ram_cset_cword$a_put_1__SEL_2,
       MUX_ram_cset_cword$a_put_1__SEL_3,
       MUX_ram_cset_cword$a_put_1__SEL_4,
       MUX_ram_cset_cword$a_put_1__SEL_6,
       MUX_ram_cset_cword$b_put_1__SEL_1,
       MUX_ram_cset_cword$b_put_1__SEL_2,
       MUX_ram_cset_meta$a_put_1__SEL_1,
       MUX_ram_cset_meta$a_put_1__SEL_2,
       MUX_ram_cset_meta$a_put_1__SEL_3,
       MUX_ram_cset_meta$b_put_1__SEL_2,
       MUX_ram_cset_meta$b_put_1__SEL_3,
       MUX_rg_cset_in_cache$write_1__SEL_4,
       MUX_rg_cset_in_cache$write_1__SEL_5,
       MUX_rg_cword_in_cline$write_1__SEL_3,
       MUX_rg_cword_in_cline$write_1__SEL_4,
       MUX_rg_fsm_state$write_1__SEL_1,
       MUX_rg_fsm_state$write_1__SEL_2,
       MUX_rg_fsm_state$write_1__SEL_3,
       MUX_rg_fsm_state$write_1__SEL_4,
       MUX_rg_fsm_state$write_1__SEL_5,
       MUX_rg_way_in_cset$write_1__SEL_1,
       MUX_rg_way_in_cset$write_1__SEL_3,
       MUX_rg_way_in_cset$write_1__VAL_1,
       MUX_rg_way_in_cset$write_1__VAL_2,
       MUX_rg_way_in_cset$write_1__VAL_4;

  // declarations used by system tasks
  // synopsys translate_off
  reg [31 : 0] v__h35463;
  reg [31 : 0] v__h50323;
  reg [31 : 0] v__h52949;
  reg [31 : 0] v__h55907;
  reg [31 : 0] v__h35357;
  reg [31 : 0] v__h2923;
  reg [31 : 0] v__h4325;
  reg [31 : 0] v__h4798;
  reg [31 : 0] v__h6040;
  reg [31 : 0] v__h6961;
  reg [31 : 0] v__h10317;
  reg [31 : 0] v__h11382;
  reg [31 : 0] v__h12363;
  reg [31 : 0] v__h12897;
  reg [31 : 0] v__h15517;
  reg [31 : 0] v__h16816;
  reg [31 : 0] v__h16886;
  reg [31 : 0] v__h17190;
  reg [31 : 0] v__h18345;
  reg [31 : 0] v__h33137;
  reg [31 : 0] v__h34418;
  reg [31 : 0] v__h34518;
  reg [31 : 0] v__h2917;
  reg [31 : 0] v__h4319;
  reg [31 : 0] v__h4792;
  reg [31 : 0] v__h6034;
  reg [31 : 0] v__h6955;
  reg [31 : 0] v__h10311;
  reg [31 : 0] v__h11376;
  reg [31 : 0] v__h12357;
  reg [31 : 0] v__h12891;
  reg [31 : 0] v__h15511;
  reg [31 : 0] v__h16810;
  reg [31 : 0] v__h16880;
  reg [31 : 0] v__h17184;
  reg [31 : 0] v__h18339;
  reg [31 : 0] v__h33131;
  reg [31 : 0] v__h34412;
  reg [31 : 0] v__h34512;
  reg [31 : 0] v__h35351;
  reg [31 : 0] v__h35457;
  reg [31 : 0] v__h50317;
  reg [31 : 0] v__h52943;
  reg [31 : 0] v__h55901;
  // synopsys translate_on

  // remaining internal signals
  reg [63 : 0] CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2,
	       CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5,
	       IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054,
	       IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063,
	       IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977,
	       IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987,
	       SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14,
	       _theResult_____2__h55392,
	       mask__h55322,
	       n__h50650,
	       n__h56213,
	       old_cword__h50639,
	       y__h49889;
  reg [51 : 0] CASE_NOT_ram_cset_metaDOA_BITS_107_TO_106_EQ__ETC__q6,
	       ctag__h3208,
	       new_meta_ctag__h13322,
	       tag__h5196;
  reg [1 : 0] SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303,
	      SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125;
  reg CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1;
  wire [383 : 0] DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d250;
  wire [255 : 0] DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d243;
  wire [129 : 0] IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1186,
		 IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1187,
		 IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1188,
		 IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1189;
  wire [127 : 0] IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1183;
  wire [63 : 0] IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1073,
		IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d999,
		IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1008,
		IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1010,
		IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1002,
		IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1074,
		SEXT_ram_cset_cword_a_read_BITS_63_TO_0_0_AND__ETC___d1007,
		cline_pa__h14161,
		cline_pa__h32506,
		cword__h9986,
		data1__h49613,
		data__h49100,
		data__h49101,
		final_st_val__h55396,
		final_st_val__h55486,
		final_st_val__h55564,
		final_st_val__h55568,
		final_st_val__h55572,
		final_st_val__h55576,
		final_st_val__h55581,
		final_st_val__h55587,
		final_st_val__h55592,
		l1_to_l2_req_addr__h6372,
		new_st_val__h55233,
		pa__h13491,
		pa__h13512,
		pa__h13726,
		pa__h13750,
		pa__h18473,
		pa__h18494,
		pa__h35937,
		pa__h35958,
		result__h49877,
		result__h49949,
		valid_info_data__h18716,
		valid_info_data__h36174,
		victim_cline_pa__h4977,
		w1___1__h55455,
		w1__h55385,
		w2___1__h55456,
		w2__h55387,
		x__h18968,
		x__h36425,
		x_addr__h3203,
		x_addr__h57985,
		y__h18969,
		y__h18986,
		y__h25301,
		y__h36426,
		y__h36443,
		y__h42758;
  wire [53 : 0] IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d598,
		IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d601;
  wire [51 : 0] IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d386,
		IF_rg_way_in_cset_3_THEN_SEL_ARR_IF_rg_way_in__ETC___d402,
		ctag__h13025,
		ctag__h13030;
  wire [31 : 0] data9100_BITS_31_TO_0__q3,
		mav_request_pa_req_BITS_106_TO_75__q4;
  wire [8 : 0] cset_cword_in_cache___1__h33828,
	       cset_cword_in_cache__h32631,
	       next_cset_cword_in_cache__h10277;
  wire [5 : 0] next_cset_in_cache__h14806, shamt__h55276;
  wire [2 : 0] IF_rg_cache_op_68_EQ_1_69_OR_rg_cache_op_68_EQ_ETC___d178,
	       cword_in_cline__h3170;
  wire [1 : 0] IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469,
	       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786,
	       IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d464,
	       IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d782,
	       IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372,
	       IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299,
	       IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301,
	       IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388,
	       num_valids__h18871,
	       num_valids__h36328,
	       tmp__h4960,
	       tmp__h4961,
	       valid_info_num_valids__h18714,
	       valid_info_num_valids__h36172;
  wire IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1097,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1122,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1124,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1126,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1128,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1130,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1132,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1134,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1136,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1138,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d473,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d929,
       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d931,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1087,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1094,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1099,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1145,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1146,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1172,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1175,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582,
       NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867,
       NOT_SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cs_ETC___d420,
       NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158,
       NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1167,
       NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_2_ETC___d1165,
       NOT_verbosity_ULT_2_2___d23,
       SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d306,
       SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d314,
       _theResult___snd__h4875,
       ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
       ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460,
       rg_cword_in_cline_EQ_7_AND_NOT_verbosity_EQ_0__ETC___d92,
       rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923,
       victim_way__h4850,
       x__h14811;

  // action method ma_request_va
  assign CAN_FIRE_ma_request_va = 1'd1 ;
  assign WILL_FIRE_ma_request_va = EN_ma_request_va ;

  // actionvalue method mav_request_pa
  assign mav_request_pa =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd0) ?
	       { 2'd1, data__h49101, 64'hAAAAAAAAAAAAAAAA } :
	       IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1189 ;
  assign RDY_mav_request_pa =
	     rg_fsm_state == 4'd1 && !f_L2_to_L1_reqs$EMPTY_N &&
	     !f_flush_reqs$EMPTY_N &&
	     f_L1_to_L2_reqs$FULL_N ;
  assign CAN_FIRE_mav_request_pa =
	     rg_fsm_state == 4'd1 && !f_L2_to_L1_reqs$EMPTY_N &&
	     !f_flush_reqs$EMPTY_N &&
	     f_L1_to_L2_reqs$FULL_N ;
  assign WILL_FIRE_mav_request_pa = EN_mav_request_pa ;

  // value method mv_is_idle
  assign mv_is_idle = rg_fsm_state == 4'd1 ;

  // value method mv_refill_ok
  assign mv_refill_ok = !rg_error_during_refill ;
  assign RDY_mv_refill_ok = rg_fsm_state == 4'd1 ;

  // action method flush_server_request_put
  assign RDY_flush_server_request_put = f_flush_reqs$FULL_N ;
  assign CAN_FIRE_flush_server_request_put = f_flush_reqs$FULL_N ;
  assign WILL_FIRE_flush_server_request_put = EN_flush_server_request_put ;

  // action method flush_server_response_get
  assign RDY_flush_server_response_get = f_flush_rsps$EMPTY_N ;
  assign CAN_FIRE_flush_server_response_get = f_flush_rsps$EMPTY_N ;
  assign WILL_FIRE_flush_server_response_get = EN_flush_server_response_get ;

  // value method l1_to_l2_client_request_first
  assign l1_to_l2_client_request_first = f_L1_to_L2_reqs$D_OUT ;
  assign RDY_l1_to_l2_client_request_first = f_L1_to_L2_reqs$EMPTY_N ;

  // action method l1_to_l2_client_request_deq
  assign RDY_l1_to_l2_client_request_deq = f_L1_to_L2_reqs$EMPTY_N ;
  assign CAN_FIRE_l1_to_l2_client_request_deq = f_L1_to_L2_reqs$EMPTY_N ;
  assign WILL_FIRE_l1_to_l2_client_request_deq =
	     EN_l1_to_l2_client_request_deq ;

  // value method l1_to_l2_client_request_notEmpty
  assign l1_to_l2_client_request_notEmpty = f_L1_to_L2_reqs$EMPTY_N ;
  assign RDY_l1_to_l2_client_request_notEmpty = 1'd1 ;

  // action method l1_to_l2_client_response_enq
  assign RDY_l1_to_l2_client_response_enq = f_L2_to_L1_rsps$FULL_N ;
  assign CAN_FIRE_l1_to_l2_client_response_enq = f_L2_to_L1_rsps$FULL_N ;
  assign WILL_FIRE_l1_to_l2_client_response_enq =
	     EN_l1_to_l2_client_response_enq ;

  // value method l1_to_l2_client_response_notFull
  assign l1_to_l2_client_response_notFull = f_L2_to_L1_rsps$FULL_N ;
  assign RDY_l1_to_l2_client_response_notFull = 1'd1 ;

  // action method l2_to_l1_server_request_enq
  assign RDY_l2_to_l1_server_request_enq = f_L2_to_L1_reqs$FULL_N ;
  assign CAN_FIRE_l2_to_l1_server_request_enq = f_L2_to_L1_reqs$FULL_N ;
  assign WILL_FIRE_l2_to_l1_server_request_enq =
	     EN_l2_to_l1_server_request_enq ;

  // value method l2_to_l1_server_request_notFull
  assign l2_to_l1_server_request_notFull = f_L2_to_L1_reqs$FULL_N ;
  assign RDY_l2_to_l1_server_request_notFull = 1'd1 ;

  // value method l2_to_l1_server_response_first
  assign l2_to_l1_server_response_first = f_L1_to_L2_rsps$D_OUT ;
  assign RDY_l2_to_l1_server_response_first = f_L1_to_L2_rsps$EMPTY_N ;

  // action method l2_to_l1_server_response_deq
  assign RDY_l2_to_l1_server_response_deq = f_L1_to_L2_rsps$EMPTY_N ;
  assign CAN_FIRE_l2_to_l1_server_response_deq = f_L1_to_L2_rsps$EMPTY_N ;
  assign WILL_FIRE_l2_to_l1_server_response_deq =
	     EN_l2_to_l1_server_response_deq ;

  // value method l2_to_l1_server_response_notEmpty
  assign l2_to_l1_server_response_notEmpty = f_L1_to_L2_rsps$EMPTY_N ;
  assign RDY_l2_to_l1_server_response_notEmpty = 1'd1 ;

  // submodule f_L1_to_L2_reqs
  FIFO2 #(.width(32'd69), .guarded(32'd1)) f_L1_to_L2_reqs(.RST(RST_N),
							   .CLK(CLK),
							   .D_IN(f_L1_to_L2_reqs$D_IN),
							   .ENQ(f_L1_to_L2_reqs$ENQ),
							   .DEQ(f_L1_to_L2_reqs$DEQ),
							   .CLR(f_L1_to_L2_reqs$CLR),
							   .D_OUT(f_L1_to_L2_reqs$D_OUT),
							   .FULL_N(f_L1_to_L2_reqs$FULL_N),
							   .EMPTY_N(f_L1_to_L2_reqs$EMPTY_N));

  // submodule f_L1_to_L2_rsps
  FIFO2 #(.width(32'd579), .guarded(32'd1)) f_L1_to_L2_rsps(.RST(RST_N),
							    .CLK(CLK),
							    .D_IN(f_L1_to_L2_rsps$D_IN),
							    .ENQ(f_L1_to_L2_rsps$ENQ),
							    .DEQ(f_L1_to_L2_rsps$DEQ),
							    .CLR(f_L1_to_L2_rsps$CLR),
							    .D_OUT(f_L1_to_L2_rsps$D_OUT),
							    .FULL_N(f_L1_to_L2_rsps$FULL_N),
							    .EMPTY_N(f_L1_to_L2_rsps$EMPTY_N));

  // submodule f_L2_to_L1_reqs
  FIFO2 #(.width(32'd66), .guarded(32'd1)) f_L2_to_L1_reqs(.RST(RST_N),
							   .CLK(CLK),
							   .D_IN(f_L2_to_L1_reqs$D_IN),
							   .ENQ(f_L2_to_L1_reqs$ENQ),
							   .DEQ(f_L2_to_L1_reqs$DEQ),
							   .CLR(f_L2_to_L1_reqs$CLR),
							   .D_OUT(f_L2_to_L1_reqs$D_OUT),
							   .FULL_N(f_L2_to_L1_reqs$FULL_N),
							   .EMPTY_N(f_L2_to_L1_reqs$EMPTY_N));

  // submodule f_L2_to_L1_rsps
  FIFO2 #(.width(32'd579), .guarded(32'd1)) f_L2_to_L1_rsps(.RST(RST_N),
							    .CLK(CLK),
							    .D_IN(f_L2_to_L1_rsps$D_IN),
							    .ENQ(f_L2_to_L1_rsps$ENQ),
							    .DEQ(f_L2_to_L1_rsps$DEQ),
							    .CLR(f_L2_to_L1_rsps$CLR),
							    .D_OUT(f_L2_to_L1_rsps$D_OUT),
							    .FULL_N(f_L2_to_L1_rsps$FULL_N),
							    .EMPTY_N(f_L2_to_L1_rsps$EMPTY_N));

  // submodule f_flush_reqs
  FIFO2 #(.width(32'd1), .guarded(32'd1)) f_flush_reqs(.RST(RST_N),
						       .CLK(CLK),
						       .D_IN(f_flush_reqs$D_IN),
						       .ENQ(f_flush_reqs$ENQ),
						       .DEQ(f_flush_reqs$DEQ),
						       .CLR(f_flush_reqs$CLR),
						       .D_OUT(f_flush_reqs$D_OUT),
						       .FULL_N(f_flush_reqs$FULL_N),
						       .EMPTY_N(f_flush_reqs$EMPTY_N));

  // submodule f_flush_rsps
  FIFO20 #(.guarded(32'd1)) f_flush_rsps(.RST(RST_N),
					 .CLK(CLK),
					 .ENQ(f_flush_rsps$ENQ),
					 .DEQ(f_flush_rsps$DEQ),
					 .CLR(f_flush_rsps$CLR),
					 .FULL_N(f_flush_rsps$FULL_N),
					 .EMPTY_N(f_flush_rsps$EMPTY_N));

  // submodule ram_cset_cword
  BRAM2 #(.PIPELINED(1'd0),
	  .ADDR_WIDTH(32'd9),
	  .DATA_WIDTH(32'd128),
	  .MEMSIZE(10'd512)) ram_cset_cword(.CLKA(CLK),
					    .CLKB(CLK),
					    .ADDRA(ram_cset_cword$ADDRA),
					    .ADDRB(ram_cset_cword$ADDRB),
					    .DIA(ram_cset_cword$DIA),
					    .DIB(ram_cset_cword$DIB),
					    .WEA(ram_cset_cword$WEA),
					    .WEB(ram_cset_cword$WEB),
					    .ENA(ram_cset_cword$ENA),
					    .ENB(ram_cset_cword$ENB),
					    .DOA(ram_cset_cword$DOA),
					    .DOB());

  // submodule ram_cset_meta
  BRAM2 #(.PIPELINED(1'd0),
	  .ADDR_WIDTH(32'd6),
	  .DATA_WIDTH(32'd108),
	  .MEMSIZE(7'd64)) ram_cset_meta(.CLKA(CLK),
					 .CLKB(CLK),
					 .ADDRA(ram_cset_meta$ADDRA),
					 .ADDRB(ram_cset_meta$ADDRB),
					 .DIA(ram_cset_meta$DIA),
					 .DIB(ram_cset_meta$DIB),
					 .WEA(ram_cset_meta$WEA),
					 .WEB(ram_cset_meta$WEB),
					 .ENA(ram_cset_meta$ENA),
					 .ENB(ram_cset_meta$ENB),
					 .DOA(ram_cset_meta$DOA),
					 .DOB());

  // rule RL_rl_writeback_loop
  assign CAN_FIRE_RL_rl_writeback_loop =
	     (rg_cword_in_cline != 3'd7 || f_L1_to_L2_rsps$FULL_N) &&
	     rg_fsm_state == 4'd3 ;
  assign WILL_FIRE_RL_rl_writeback_loop =
	     CAN_FIRE_RL_rl_writeback_loop && !EN_ma_request_va ;

  // rule RL_rl_replace
  assign CAN_FIRE_RL_rl_replace =
	     (SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	      2'd3 ||
	      SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	      2'd0 ||
	      f_L1_to_L2_rsps$FULL_N) &&
	     rg_fsm_state == 4'd2 ;
  assign WILL_FIRE_RL_rl_replace =
	     CAN_FIRE_RL_rl_replace && !EN_ma_request_va ;

  // rule RL_rl_refill_start
  assign CAN_FIRE_RL_rl_refill_start =
	     f_L1_to_L2_reqs$FULL_N && rg_fsm_state == 4'd4 ;
  assign WILL_FIRE_RL_rl_refill_start =
	     CAN_FIRE_RL_rl_refill_start && !EN_ma_request_va ;

  // rule RL_rl_refill_loop
  assign CAN_FIRE_RL_rl_refill_loop =
	     (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$EMPTY_N) &&
	     rg_fsm_state == 4'd5 ;
  assign WILL_FIRE_RL_rl_refill_loop =
	     CAN_FIRE_RL_rl_refill_loop && !EN_ma_request_va ;

  // rule RL_rl_refill_loop_final
  assign CAN_FIRE_RL_rl_refill_loop_final = rg_fsm_state == 4'd6 ;
  assign WILL_FIRE_RL_rl_refill_loop_final =
	     CAN_FIRE_RL_rl_refill_loop_final && !EN_ma_request_va ;

  // rule RL_rl_flush_start
  assign CAN_FIRE_RL_rl_flush_start =
	     f_flush_reqs$EMPTY_N && rg_fsm_state == 4'd1 ;
  assign WILL_FIRE_RL_rl_flush_start =
	     CAN_FIRE_RL_rl_flush_start && !EN_ma_request_va ;

  // rule RL_rl_flush_loop
  assign CAN_FIRE_RL_rl_flush_loop =
	     (SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	      2'd3 ||
	      SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d314) &&
	     rg_fsm_state == 4'd9 ;
  assign WILL_FIRE_RL_rl_flush_loop =
	     CAN_FIRE_RL_rl_flush_loop && !EN_ma_request_va ;

  // rule RL_rl_flush_loop_writeback_sequel
  assign CAN_FIRE_RL_rl_flush_loop_writeback_sequel =
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset ||
	      f_flush_rsps$FULL_N) &&
	     rg_fsm_state == 4'd10 ;
  assign WILL_FIRE_RL_rl_flush_loop_writeback_sequel =
	     CAN_FIRE_RL_rl_flush_loop_writeback_sequel && !EN_ma_request_va ;

  // rule RL_rl_downgrade_req_from_L2_A
  assign CAN_FIRE_RL_rl_downgrade_req_from_L2_A =
	     f_L2_to_L1_reqs$EMPTY_N &&
	     (rg_fsm_state == 4'd1 ||
	      rg_fsm_state == 4'd5 && rg_cword_in_cline == 3'd0) ;
  assign WILL_FIRE_RL_rl_downgrade_req_from_L2_A =
	     CAN_FIRE_RL_rl_downgrade_req_from_L2_A &&
	     !WILL_FIRE_RL_rl_flush_start &&
	     !WILL_FIRE_RL_rl_refill_loop &&
	     !EN_ma_request_va ;

  // rule RL_rl_downgrade_req_from_L2_B
  assign CAN_FIRE_RL_rl_downgrade_req_from_L2_B =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d473 &&
	     rg_fsm_state == 4'd7 ;
  assign WILL_FIRE_RL_rl_downgrade_req_from_L2_B =
	     CAN_FIRE_RL_rl_downgrade_req_from_L2_B && !EN_ma_request_va ;

  // rule RL_rl_downgrade_req_from_L2_C
  assign CAN_FIRE_RL_rl_downgrade_req_from_L2_C =
	     f_L2_to_L1_reqs$EMPTY_N && rg_fsm_state == 4'd8 ;
  assign WILL_FIRE_RL_rl_downgrade_req_from_L2_C =
	     CAN_FIRE_RL_rl_downgrade_req_from_L2_C && !EN_ma_request_va ;

  // rule RL_rl_initialize
  assign CAN_FIRE_RL_rl_initialize = rg_fsm_state == 4'd0 ;
  assign WILL_FIRE_RL_rl_initialize =
	     CAN_FIRE_RL_rl_initialize && !EN_ma_request_va ;

  // inputs to muxes for submodule ports
  assign MUX_f_L1_to_L2_reqs$enq_1__SEL_1 =
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ;
  assign MUX_f_L1_to_L2_rsps$enq_1__SEL_2 =
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 !=
	     2'd3 &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 !=
	     2'd0 ;
  assign MUX_f_L1_to_L2_rsps$enq_1__SEL_3 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     !SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d306 ;
  assign MUX_f_L1_to_L2_rsps$enq_1__SEL_4 =
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 !=
	     2'd3 ;
  assign MUX_ram_cset_cword$a_put_1__SEL_1 =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline != 3'd7 ;
  assign MUX_ram_cset_cword$a_put_1__SEL_2 =
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	     2'd3 ;
  assign MUX_ram_cset_cword$a_put_1__SEL_3 =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     rg_cset_in_cache == 6'd63 &&
	     rg_way_in_cset ;
  assign MUX_ram_cset_cword$a_put_1__SEL_4 =
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_va[5:3] != 3'd7 &&
	      (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) ||
	      (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) &&
	      rg_cword_in_cline != 3'd7) ;
  assign MUX_ram_cset_cword$a_put_1__SEL_6 =
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	     2'd3 ;
  assign MUX_ram_cset_cword$b_put_1__SEL_1 =
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) ;
  assign MUX_ram_cset_cword$b_put_1__SEL_2 =
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d931 ;
  assign MUX_ram_cset_meta$a_put_1__SEL_1 =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel && rg_way_in_cset ;
  assign MUX_ram_cset_meta$a_put_1__SEL_2 =
	     WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd7 &&
	     rg_va[5:3] != 3'd7 ;
  assign MUX_ram_cset_meta$a_put_1__SEL_3 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_way_in_cset ;
  assign MUX_ram_cset_meta$b_put_1__SEL_2 =
	     WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 ;
  assign MUX_ram_cset_meta$b_put_1__SEL_3 =
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 ;
  assign MUX_rg_cset_in_cache$write_1__SEL_4 =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     rg_cset_in_cache != 6'd63 &&
	     rg_way_in_cset ;
  assign MUX_rg_cset_in_cache$write_1__SEL_5 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_cset_in_cache != 6'd63 &&
	     rg_way_in_cset ;
  assign MUX_rg_cword_in_cline$write_1__SEL_3 =
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) &&
	     rg_cword_in_cline != 3'd7 ;
  assign MUX_rg_cword_in_cline$write_1__SEL_4 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	     2'd3 ;
  assign MUX_rg_fsm_state$write_1__SEL_1 =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 ;
  assign MUX_rg_fsm_state$write_1__SEL_2 =
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512] ||
	      rg_cword_in_cline == 3'd7) ;
  assign MUX_rg_fsm_state$write_1__SEL_3 =
	     WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63 ;
  assign MUX_rg_fsm_state$write_1__SEL_4 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     (SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	      2'd3 ||
	      rg_cset_in_cache == 6'd63 && rg_way_in_cset) ;
  assign MUX_rg_fsm_state$write_1__SEL_5 =
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1146 ;
  assign MUX_rg_way_in_cset$write_1__SEL_1 =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) ;
  assign MUX_rg_way_in_cset$write_1__SEL_3 =
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) ;
  assign MUX_f_L1_to_L2_reqs$enq_1__VAL_1 =
	     { x_addr__h57985, 4'd6, dcache_not_icache } ;
  assign MUX_f_L1_to_L2_reqs$enq_1__VAL_2 =
	     { l1_to_l2_req_addr__h6372,
	       2'd0,
	       IF_rg_cache_op_68_EQ_1_69_OR_rg_cache_op_68_EQ_ETC___d178 } ;
  assign MUX_f_L1_to_L2_rsps$enq_1__VAL_1 =
	     { x_addr__h3203,
	       rg_post_wb_meta_state,
	       1'd1,
	       SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14,
	       rg_write_cline_buf[511:64] } ;
  assign MUX_f_L1_to_L2_rsps$enq_1__VAL_2 =
	     { victim_cline_pa__h4977,
	       515'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ;
  assign MUX_f_L1_to_L2_rsps$enq_1__VAL_3 =
	     { cline_pa__h14161,
	       rg_new_meta_state,
	       513'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ;
  assign MUX_f_L1_to_L2_rsps$enq_1__VAL_4 =
	     { rg_pa,
	       f_L2_to_L1_reqs$D_OUT[1:0],
	       513'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA } ;
  assign MUX_ram_cset_cword$a_put_2__VAL_1 =
	     { rg_cset_in_cache, cword_in_cline__h3170 } ;
  assign MUX_ram_cset_cword$a_put_2__VAL_2 = { rg_va[11:6], 3'd0 } ;
  assign MUX_ram_cset_cword$a_put_2__VAL_4 =
	     (rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512] ||
	      rg_cword_in_cline == 3'd7) ?
	       rg_va[11:3] :
	       next_cset_cword_in_cache__h10277 ;
  assign MUX_ram_cset_cword$a_put_2__VAL_5 =
	     (SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	      2'd3) ?
	       cset_cword_in_cache__h32631 :
	       rg_va[11:3] ;
  assign MUX_ram_cset_cword$a_put_2__VAL_9 =
	     (rg_save_fsm_state == 4'd5) ?
	       cset_cword_in_cache___1__h33828 :
	       rg_save_va[11:3] ;
  assign MUX_ram_cset_cword$b_put_2__VAL_1 =
	     { rg_va[11:6], rg_cword_in_cline } ;
  assign MUX_ram_cset_cword$b_put_3__VAL_1 =
	     rg_way_in_cset ?
	       { cword__h9986, ram_cset_cword$DOA[63:0] } :
	       { ram_cset_cword$DOA[127:64], cword__h9986 } ;
  assign MUX_ram_cset_cword$b_put_3__VAL_2 =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      (mav_request_pa_req[207:206] == 2'd1 ||
	       mav_request_pa_req[207:206] == 2'd2 &&
	       mav_request_pa_req[74:70] == 5'b00011) &&
	      !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) ?
	       { IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d999,
		 IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1002 } :
	       { IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1073,
		 IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1074 } ;
  assign MUX_ram_cset_meta$a_put_2__VAL_1 =
	     (rg_cset_in_cache == 6'd63) ?
	       rg_va[11:6] :
	       next_cset_in_cache__h14806 ;
  assign MUX_ram_cset_meta$b_put_3__VAL_2 =
	     rg_way_in_cset ?
	       { f_L2_to_L1_rsps$D_OUT[514:513],
		 rg_pa[63:12],
		 ram_cset_meta$DOA[53:0] } :
	       { ram_cset_meta$DOA[107:54],
		 f_L2_to_L1_rsps$D_OUT[514:513],
		 rg_pa[63:12] } ;
  assign MUX_ram_cset_meta$b_put_3__VAL_3 =
	     { IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d598,
	       IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d601 } ;
  assign MUX_ram_cset_meta$b_put_3__VAL_4 =
	     rg_way_in_cset ?
	       { rg_new_meta_state,
		 new_meta_ctag__h13322,
		 rg_new_cset_meta[53:0] } :
	       { ram_cset_meta$DOA[107:54],
		 rg_new_meta_state,
		 new_meta_ctag__h13322 } ;
  assign MUX_ram_cset_meta$b_put_3__VAL_5 =
	     { (ram_cset_meta$DOA[107:106] != 2'd0 &&
		ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
		 { 2'd3, mav_request_pa_pa[63:12] } :
		 ram_cset_meta$DOA[107:54],
	       (ram_cset_meta$DOA[107:106] == 2'd0 ||
		!ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
		 { 2'd3, mav_request_pa_pa[63:12] } :
		 ram_cset_meta$DOA[53:0] } ;
  assign MUX_ram_cset_meta$b_put_3__VAL_6 =
	     rg_way_in_cset ?
	       { 2'd1, rg_pa[63:12], ram_cset_meta$DOA[53:0] } :
	       { ram_cset_meta$DOA[107:54], 2'd1, rg_pa[63:12] } ;
  assign MUX_rg_fsm_state$write_1__VAL_2 =
	     (rg_va[5:3] == 3'd7 ||
	      rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512]) ?
	       4'd6 :
	       4'd1 ;
  assign MUX_rg_fsm_state$write_1__VAL_4 =
	     (SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	      2'd3) ?
	       4'd3 :
	       4'd1 ;
  assign MUX_rg_fsm_state$write_1__VAL_5 =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	      2'd1 &&
	      (mav_request_pa_req[207:206] == 2'd1 ||
	       mav_request_pa_req[207:206] == 2'd2)) ?
	       4'd5 :
	       4'd2 ;
  assign MUX_rg_fsm_state$write_1__VAL_7 =
	     (SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	      2'd3) ?
	       4'd3 :
	       4'd4 ;
  assign MUX_rg_fsm_state$write_1__VAL_8 =
	     (rg_cset_in_cache == 6'd63 && rg_way_in_cset) ? 4'd1 : 4'd9 ;
  assign MUX_rg_fsm_state$write_1__VAL_9 =
	     (valid_info_num_valids__h18714 == 2'd0) ?
	       4'd8 :
	       ((IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
		 2'd3) ?
		  4'd3 :
		  4'd8) ;
  assign MUX_rg_way_in_cset$write_1__VAL_1 = !rg_way_in_cset && x__h14811 ;
  assign MUX_rg_way_in_cset$write_1__VAL_2 =
	     ram_cset_meta$DOA[107:106] != 2'd0 &&
	     ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460 ;
  assign MUX_rg_way_in_cset$write_1__VAL_4 =
	     ram_cset_meta$DOA[107:106] != 2'd0 &&
	     ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778 ;

  // register rg_amo_funct7
  assign rg_amo_funct7$D_IN = mav_request_pa_req[74:68] ;
  assign rg_amo_funct7$EN = EN_mav_request_pa ;

  // register rg_cache_op
  assign rg_cache_op$D_IN = mav_request_pa_req[207:206] ;
  assign rg_cache_op$EN = EN_mav_request_pa ;

  // register rg_cset_in_cache
  always@(WILL_FIRE_RL_rl_initialize or
	  next_cset_in_cache__h14806 or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_cset_in_cache or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  f_L2_to_L1_reqs$D_OUT or
	  MUX_rg_cset_in_cache$write_1__SEL_4 or
	  MUX_rg_cset_in_cache$write_1__SEL_5 or
	  WILL_FIRE_RL_rl_flush_start or
	  WILL_FIRE_RL_rl_replace or
	  rg_va or
	  EN_ma_request_va or
	  ma_request_va_va or MUX_f_L1_to_L2_reqs$enq_1__SEL_1)
  case (1'b1)
    WILL_FIRE_RL_rl_initialize:
	rg_cset_in_cache$D_IN = next_cset_in_cache__h14806;
    WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	rg_cset_in_cache$D_IN = rg_save_cset_in_cache;
    WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	rg_cset_in_cache$D_IN = f_L2_to_L1_reqs$D_OUT[13:8];
    MUX_rg_cset_in_cache$write_1__SEL_4:
	rg_cset_in_cache$D_IN = next_cset_in_cache__h14806;
    MUX_rg_cset_in_cache$write_1__SEL_5:
	rg_cset_in_cache$D_IN = next_cset_in_cache__h14806;
    WILL_FIRE_RL_rl_flush_start: rg_cset_in_cache$D_IN = 6'd0;
    WILL_FIRE_RL_rl_replace: rg_cset_in_cache$D_IN = rg_va[11:6];
    EN_ma_request_va: rg_cset_in_cache$D_IN = ma_request_va_va[11:6];
    MUX_f_L1_to_L2_reqs$enq_1__SEL_1: rg_cset_in_cache$D_IN = rg_va[11:6];
    default: rg_cset_in_cache$D_IN = 6'b101010 /* unspecified value */ ;
  endcase
  assign rg_cset_in_cache$EN =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     rg_cset_in_cache != 6'd63 &&
	     rg_way_in_cset ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_cset_in_cache != 6'd63 &&
	     rg_way_in_cset ||
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ||
	     WILL_FIRE_RL_rl_replace ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ||
	     EN_ma_request_va ||
	     WILL_FIRE_RL_rl_initialize ||
	     WILL_FIRE_RL_rl_flush_start ;

  // register rg_cword_in_cline
  always@(WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_cword_in_cline or
	  MUX_ram_cset_cword$a_put_1__SEL_1 or
	  cword_in_cline__h3170 or
	  MUX_rg_cword_in_cline$write_1__SEL_3 or
	  MUX_ram_cset_cword$a_put_1__SEL_2 or
	  MUX_rg_cword_in_cline$write_1__SEL_4 or
	  MUX_ram_cset_cword$a_put_1__SEL_6 or
	  MUX_f_L1_to_L2_reqs$enq_1__SEL_1 or WILL_FIRE_RL_rl_refill_start)
  begin
    case (1'b1) // synopsys parallel_case
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  rg_cword_in_cline$D_IN = rg_save_cword_in_cline;
      MUX_ram_cset_cword$a_put_1__SEL_1:
	  rg_cword_in_cline$D_IN = cword_in_cline__h3170;
      MUX_rg_cword_in_cline$write_1__SEL_3:
	  rg_cword_in_cline$D_IN = cword_in_cline__h3170;
      MUX_ram_cset_cword$a_put_1__SEL_2 ||
      MUX_rg_cword_in_cline$write_1__SEL_4 ||
      MUX_ram_cset_cword$a_put_1__SEL_6 ||
      MUX_f_L1_to_L2_reqs$enq_1__SEL_1 ||
      WILL_FIRE_RL_rl_refill_start:
	  rg_cword_in_cline$D_IN = 3'd0;
      default: rg_cword_in_cline$D_IN = 3'b010 /* unspecified value */ ;
    endcase
  end
  assign rg_cword_in_cline$EN =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline != 3'd7 ||
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) &&
	     rg_cword_in_cline != 3'd7 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	     2'd3 ||
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_refill_start ;

  // register rg_error_during_refill
  assign rg_error_during_refill$D_IN = 1'd0 ;
  assign rg_error_during_refill$EN =
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ||
	     WILL_FIRE_RL_rl_refill_start ;

  // register rg_f3
  assign rg_f3$D_IN = mav_request_pa_req[205:203] ;
  assign rg_f3$EN = EN_mav_request_pa ;

  // register rg_fsm_state
  always@(MUX_rg_fsm_state$write_1__SEL_1 or
	  rg_post_wb_fsm_state or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_fsm_state or
	  MUX_rg_fsm_state$write_1__SEL_2 or
	  MUX_rg_fsm_state$write_1__VAL_2 or
	  MUX_rg_fsm_state$write_1__SEL_4 or
	  MUX_rg_fsm_state$write_1__VAL_4 or
	  MUX_rg_fsm_state$write_1__SEL_5 or
	  MUX_rg_fsm_state$write_1__VAL_5 or
	  WILL_FIRE_RL_rl_replace or
	  MUX_rg_fsm_state$write_1__VAL_7 or
	  WILL_FIRE_RL_rl_flush_loop_writeback_sequel or
	  MUX_rg_fsm_state$write_1__VAL_8 or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_B or
	  MUX_rg_fsm_state$write_1__VAL_9 or
	  MUX_rg_fsm_state$write_1__SEL_3 or
	  WILL_FIRE_RL_rl_refill_loop_final or
	  WILL_FIRE_RL_rl_refill_start or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  WILL_FIRE_RL_rl_flush_start)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_rg_fsm_state$write_1__SEL_1:
	  rg_fsm_state$D_IN = rg_post_wb_fsm_state;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  rg_fsm_state$D_IN = rg_save_fsm_state;
      MUX_rg_fsm_state$write_1__SEL_2:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_2;
      MUX_rg_fsm_state$write_1__SEL_4:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_4;
      MUX_rg_fsm_state$write_1__SEL_5:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_5;
      WILL_FIRE_RL_rl_replace:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_7;
      WILL_FIRE_RL_rl_flush_loop_writeback_sequel:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_8;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_B:
	  rg_fsm_state$D_IN = MUX_rg_fsm_state$write_1__VAL_9;
      MUX_rg_fsm_state$write_1__SEL_3 || WILL_FIRE_RL_rl_refill_loop_final:
	  rg_fsm_state$D_IN = 4'd1;
      WILL_FIRE_RL_rl_refill_start: rg_fsm_state$D_IN = 4'd5;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A: rg_fsm_state$D_IN = 4'd7;
      WILL_FIRE_RL_rl_flush_start: rg_fsm_state$D_IN = 4'd9;
      default: rg_fsm_state$D_IN = 4'b1010 /* unspecified value */ ;
    endcase
  end
  assign rg_fsm_state$EN =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 ||
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512] ||
	      rg_cword_in_cline == 3'd7) ||
	     WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63 ||
	     MUX_rg_fsm_state$write_1__SEL_4 ||
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1146 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_replace ||
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B ||
	     WILL_FIRE_RL_rl_refill_loop_final ||
	     WILL_FIRE_RL_rl_refill_start ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ||
	     WILL_FIRE_RL_rl_flush_start ;

  // register rg_lrsc_pa
  assign rg_lrsc_pa$D_IN = mav_request_pa_pa ;
  assign rg_lrsc_pa$EN =
	     EN_mav_request_pa && valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     mav_request_pa_req[74:70] == 5'b00010 ;

  // register rg_lrsc_size
  assign rg_lrsc_size$D_IN = mav_request_pa_req[204:203] ;
  assign rg_lrsc_size$EN =
	     EN_mav_request_pa && valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     mav_request_pa_req[74:70] == 5'b00010 ;

  // register rg_lrsc_valid
  assign rg_lrsc_valid$D_IN =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     mav_request_pa_req[74:70] == 5'b00010 ;
  assign rg_lrsc_valid$EN =
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd1 &&
	      !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	      rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 ||
	      NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1099) ;

  // register rg_new_cset_meta
  assign rg_new_cset_meta$D_IN = MUX_ram_cset_meta$b_put_3__VAL_4 ;
  assign rg_new_cset_meta$EN = WILL_FIRE_RL_rl_flush_loop ;

  // register rg_new_meta_state
  assign rg_new_meta_state$D_IN = f_flush_reqs$D_OUT ? 2'd1 : 2'd0 ;
  assign rg_new_meta_state$EN = WILL_FIRE_RL_rl_flush_start ;

  // register rg_pa
  always@(EN_mav_request_pa or
	  mav_request_pa_pa or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_pa or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or f_L2_to_L1_reqs$D_OUT)
  begin
    case (1'b1) // synopsys parallel_case
      EN_mav_request_pa: rg_pa$D_IN = mav_request_pa_pa;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C: rg_pa$D_IN = rg_save_pa;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  rg_pa$D_IN = f_L2_to_L1_reqs$D_OUT[65:2];
      default: rg_pa$D_IN = 64'hAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  assign rg_pa$EN =
	     EN_mav_request_pa || WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_post_wb_fsm_state
  always@(MUX_ram_cset_cword$a_put_1__SEL_2 or
	  MUX_rg_cword_in_cline$write_1__SEL_4 or
	  MUX_ram_cset_cword$a_put_1__SEL_6)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_cword$a_put_1__SEL_2: rg_post_wb_fsm_state$D_IN = 4'd4;
      MUX_rg_cword_in_cline$write_1__SEL_4: rg_post_wb_fsm_state$D_IN = 4'd10;
      MUX_ram_cset_cword$a_put_1__SEL_6: rg_post_wb_fsm_state$D_IN = 4'd8;
      default: rg_post_wb_fsm_state$D_IN = 4'b1010 /* unspecified value */ ;
    endcase
  end
  assign rg_post_wb_fsm_state$EN =
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	     2'd3 ;

  // register rg_post_wb_meta_state
  always@(MUX_ram_cset_cword$a_put_1__SEL_2 or
	  MUX_rg_cword_in_cline$write_1__SEL_4 or
	  rg_new_meta_state or
	  MUX_ram_cset_cword$a_put_1__SEL_6 or f_L2_to_L1_reqs$D_OUT)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_cword$a_put_1__SEL_2: rg_post_wb_meta_state$D_IN = 2'd0;
      MUX_rg_cword_in_cline$write_1__SEL_4:
	  rg_post_wb_meta_state$D_IN = rg_new_meta_state;
      MUX_ram_cset_cword$a_put_1__SEL_6:
	  rg_post_wb_meta_state$D_IN = f_L2_to_L1_reqs$D_OUT[1:0];
      default: rg_post_wb_meta_state$D_IN = 2'b10 /* unspecified value */ ;
    endcase
  end
  assign rg_post_wb_meta_state$EN =
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	     2'd3 ;

  // register rg_read_cline_buf
  assign rg_read_cline_buf$D_IN =
	     { DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d250,
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[191:128] :
		 rg_read_cline_buf[191:128],
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[127:64] :
		 rg_read_cline_buf[127:64] } ;
  assign rg_read_cline_buf$EN = WILL_FIRE_RL_rl_refill_loop ;

  // register rg_save_cset_in_cache
  assign rg_save_cset_in_cache$D_IN = rg_cset_in_cache ;
  assign rg_save_cset_in_cache$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_save_cword_in_cline
  assign rg_save_cword_in_cline$D_IN = rg_cword_in_cline ;
  assign rg_save_cword_in_cline$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_save_fsm_state
  assign rg_save_fsm_state$D_IN = rg_fsm_state ;
  assign rg_save_fsm_state$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_save_pa
  assign rg_save_pa$D_IN = rg_pa ;
  assign rg_save_pa$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_save_va
  assign rg_save_va$D_IN = rg_va ;
  assign rg_save_va$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_save_way_in_cset
  assign rg_save_way_in_cset$D_IN = rg_way_in_cset ;
  assign rg_save_way_in_cset$EN = WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_va
  always@(EN_ma_request_va or
	  ma_request_va_va or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_va or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or f_L2_to_L1_reqs$D_OUT)
  begin
    case (1'b1) // synopsys parallel_case
      EN_ma_request_va: rg_va$D_IN = ma_request_va_va;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C: rg_va$D_IN = rg_save_va;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  rg_va$D_IN = f_L2_to_L1_reqs$D_OUT[65:2];
      default: rg_va$D_IN = 64'hAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  assign rg_va$EN =
	     EN_ma_request_va || WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ;

  // register rg_victim_way
  assign rg_victim_way$D_IN = victim_way__h4850 ;
  assign rg_victim_way$EN = WILL_FIRE_RL_rl_replace ;

  // register rg_way_in_cset
  always@(MUX_rg_way_in_cset$write_1__SEL_1 or
	  MUX_rg_way_in_cset$write_1__VAL_1 or
	  MUX_ram_cset_meta$b_put_1__SEL_3 or
	  MUX_rg_way_in_cset$write_1__VAL_2 or
	  MUX_rg_way_in_cset$write_1__SEL_3 or
	  MUX_f_L1_to_L2_reqs$enq_1__SEL_1 or
	  MUX_rg_way_in_cset$write_1__VAL_4 or
	  WILL_FIRE_RL_rl_replace or
	  victim_way__h4850 or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_way_in_cset or WILL_FIRE_RL_rl_flush_start)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_rg_way_in_cset$write_1__SEL_1:
	  rg_way_in_cset$D_IN = MUX_rg_way_in_cset$write_1__VAL_1;
      MUX_ram_cset_meta$b_put_1__SEL_3:
	  rg_way_in_cset$D_IN = MUX_rg_way_in_cset$write_1__VAL_2;
      MUX_rg_way_in_cset$write_1__SEL_3:
	  rg_way_in_cset$D_IN = MUX_rg_way_in_cset$write_1__VAL_1;
      MUX_f_L1_to_L2_reqs$enq_1__SEL_1:
	  rg_way_in_cset$D_IN = MUX_rg_way_in_cset$write_1__VAL_4;
      WILL_FIRE_RL_rl_replace: rg_way_in_cset$D_IN = victim_way__h4850;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  rg_way_in_cset$D_IN = rg_save_way_in_cset;
      WILL_FIRE_RL_rl_flush_start: rg_way_in_cset$D_IN = 1'd0;
      default: rg_way_in_cset$D_IN = 1'b0 /* unspecified value */ ;
    endcase
  end
  assign rg_way_in_cset$EN =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) ||
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ||
	     WILL_FIRE_RL_rl_replace ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_flush_start ;

  // register rg_write_cline_buf
  assign rg_write_cline_buf$D_IN =
	     { SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14,
	       rg_write_cline_buf[511:64] } ;
  assign rg_write_cline_buf$EN = WILL_FIRE_RL_rl_writeback_loop ;

  // submodule f_L1_to_L2_reqs
  assign f_L1_to_L2_reqs$D_IN =
	     MUX_f_L1_to_L2_reqs$enq_1__SEL_1 ?
	       MUX_f_L1_to_L2_reqs$enq_1__VAL_1 :
	       MUX_f_L1_to_L2_reqs$enq_1__VAL_2 ;
  assign f_L1_to_L2_reqs$ENQ =
	     EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 ||
	     WILL_FIRE_RL_rl_refill_start ;
  assign f_L1_to_L2_reqs$DEQ = EN_l1_to_l2_client_request_deq ;
  assign f_L1_to_L2_reqs$CLR = 1'b0 ;

  // submodule f_L1_to_L2_rsps
  always@(MUX_rg_fsm_state$write_1__SEL_1 or
	  MUX_f_L1_to_L2_rsps$enq_1__VAL_1 or
	  MUX_f_L1_to_L2_rsps$enq_1__SEL_2 or
	  MUX_f_L1_to_L2_rsps$enq_1__VAL_2 or
	  MUX_f_L1_to_L2_rsps$enq_1__SEL_3 or
	  MUX_f_L1_to_L2_rsps$enq_1__VAL_3 or
	  MUX_f_L1_to_L2_rsps$enq_1__SEL_4 or
	  MUX_f_L1_to_L2_rsps$enq_1__VAL_4)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_rg_fsm_state$write_1__SEL_1:
	  f_L1_to_L2_rsps$D_IN = MUX_f_L1_to_L2_rsps$enq_1__VAL_1;
      MUX_f_L1_to_L2_rsps$enq_1__SEL_2:
	  f_L1_to_L2_rsps$D_IN = MUX_f_L1_to_L2_rsps$enq_1__VAL_2;
      MUX_f_L1_to_L2_rsps$enq_1__SEL_3:
	  f_L1_to_L2_rsps$D_IN = MUX_f_L1_to_L2_rsps$enq_1__VAL_3;
      MUX_f_L1_to_L2_rsps$enq_1__SEL_4:
	  f_L1_to_L2_rsps$D_IN = MUX_f_L1_to_L2_rsps$enq_1__VAL_4;
      default: f_L1_to_L2_rsps$D_IN =
		   579'h2AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  assign f_L1_to_L2_rsps$ENQ =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 ||
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 !=
	     2'd3 &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 !=
	     2'd0 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     !SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d306 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 !=
	     2'd3 ;
  assign f_L1_to_L2_rsps$DEQ = EN_l2_to_l1_server_response_deq ;
  assign f_L1_to_L2_rsps$CLR = 1'b0 ;

  // submodule f_L2_to_L1_reqs
  assign f_L2_to_L1_reqs$D_IN = l2_to_l1_server_request_enq_x ;
  assign f_L2_to_L1_reqs$ENQ = EN_l2_to_l1_server_request_enq ;
  assign f_L2_to_L1_reqs$DEQ = WILL_FIRE_RL_rl_downgrade_req_from_L2_C ;
  assign f_L2_to_L1_reqs$CLR = 1'b0 ;

  // submodule f_L2_to_L1_rsps
  assign f_L2_to_L1_rsps$D_IN = l1_to_l2_client_response_enq_x ;
  assign f_L2_to_L1_rsps$ENQ = EN_l1_to_l2_client_response_enq ;
  assign f_L2_to_L1_rsps$DEQ = MUX_ram_cset_meta$b_put_1__SEL_2 ;
  assign f_L2_to_L1_rsps$CLR = 1'b0 ;

  // submodule f_flush_reqs
  assign f_flush_reqs$D_IN = flush_server_request_put ;
  assign f_flush_reqs$ENQ = EN_flush_server_request_put ;
  assign f_flush_reqs$DEQ = WILL_FIRE_RL_rl_flush_start ;
  assign f_flush_reqs$CLR = 1'b0 ;

  // submodule f_flush_rsps
  assign f_flush_rsps$ENQ =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     rg_cset_in_cache == 6'd63 &&
	     rg_way_in_cset ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_cset_in_cache == 6'd63 &&
	     rg_way_in_cset ;
  assign f_flush_rsps$DEQ = EN_flush_server_response_get ;
  assign f_flush_rsps$CLR = 1'b0 ;

  // submodule ram_cset_cword
  always@(MUX_ram_cset_cword$a_put_1__SEL_3 or
	  WILL_FIRE_RL_rl_refill_loop_final or
	  rg_va or
	  EN_ma_request_va or
	  ma_request_va_va or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  f_L2_to_L1_reqs$D_OUT or
	  MUX_ram_cset_cword$a_put_1__SEL_1 or
	  MUX_ram_cset_cword$a_put_2__VAL_1 or
	  MUX_ram_cset_cword$a_put_1__SEL_2 or
	  MUX_ram_cset_cword$a_put_2__VAL_2 or
	  MUX_ram_cset_cword$a_put_1__SEL_4 or
	  MUX_ram_cset_cword$a_put_2__VAL_4 or
	  MUX_rg_fsm_state$write_1__SEL_4 or
	  MUX_ram_cset_cword$a_put_2__VAL_5 or
	  MUX_ram_cset_cword$a_put_1__SEL_6 or
	  cset_cword_in_cache__h32631 or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  MUX_ram_cset_cword$a_put_2__VAL_9 or WILL_FIRE_RL_rl_refill_start)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_cword$a_put_1__SEL_3 || WILL_FIRE_RL_rl_refill_loop_final:
	  ram_cset_cword$ADDRA = rg_va[11:3];
      EN_ma_request_va: ram_cset_cword$ADDRA = ma_request_va_va[11:3];
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  ram_cset_cword$ADDRA = f_L2_to_L1_reqs$D_OUT[13:5];
      MUX_ram_cset_cword$a_put_1__SEL_1:
	  ram_cset_cword$ADDRA = MUX_ram_cset_cword$a_put_2__VAL_1;
      MUX_ram_cset_cword$a_put_1__SEL_2:
	  ram_cset_cword$ADDRA = MUX_ram_cset_cword$a_put_2__VAL_2;
      MUX_ram_cset_cword$a_put_1__SEL_4:
	  ram_cset_cword$ADDRA = MUX_ram_cset_cword$a_put_2__VAL_4;
      MUX_rg_fsm_state$write_1__SEL_4:
	  ram_cset_cword$ADDRA = MUX_ram_cset_cword$a_put_2__VAL_5;
      MUX_ram_cset_cword$a_put_1__SEL_6:
	  ram_cset_cword$ADDRA = cset_cword_in_cache__h32631;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  ram_cset_cword$ADDRA = MUX_ram_cset_cword$a_put_2__VAL_9;
      WILL_FIRE_RL_rl_refill_start:
	  ram_cset_cword$ADDRA = cset_cword_in_cache__h32631;
      default: ram_cset_cword$ADDRA = 9'b010101010 /* unspecified value */ ;
    endcase
  end
  assign ram_cset_cword$ADDRB =
	     MUX_ram_cset_cword$b_put_1__SEL_1 ?
	       MUX_ram_cset_cword$b_put_2__VAL_1 :
	       rg_va[11:3] ;
  always@(MUX_ram_cset_cword$a_put_1__SEL_1 or
	  MUX_ram_cset_cword$a_put_1__SEL_2 or
	  MUX_ram_cset_cword$a_put_1__SEL_3 or
	  MUX_ram_cset_cword$a_put_1__SEL_4 or
	  MUX_rg_fsm_state$write_1__SEL_4 or
	  MUX_ram_cset_cword$a_put_1__SEL_6 or
	  WILL_FIRE_RL_rl_refill_loop_final or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  EN_ma_request_va or WILL_FIRE_RL_rl_refill_start)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_cword$a_put_1__SEL_1:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_cword$a_put_1__SEL_2:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_cword$a_put_1__SEL_3:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_cword$a_put_1__SEL_4:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_rg_fsm_state$write_1__SEL_4:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_cword$a_put_1__SEL_6:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_refill_loop_final:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      EN_ma_request_va:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_refill_start:
	  ram_cset_cword$DIA =
	      128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      default: ram_cset_cword$DIA =
		   128'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  assign ram_cset_cword$DIB =
	     MUX_ram_cset_cword$b_put_1__SEL_1 ?
	       MUX_ram_cset_cword$b_put_3__VAL_1 :
	       MUX_ram_cset_cword$b_put_3__VAL_2 ;
  assign ram_cset_cword$WEA = 1'd0 ;
  assign ram_cset_cword$WEB = 1'd1 ;
  assign ram_cset_cword$ENA =
	     WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline != 3'd7 ||
	     WILL_FIRE_RL_rl_replace &&
	     SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	     rg_cset_in_cache == 6'd63 &&
	     rg_way_in_cset ||
	     MUX_ram_cset_cword$a_put_1__SEL_4 ||
	     MUX_rg_fsm_state$write_1__SEL_4 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	     2'd3 ||
	     WILL_FIRE_RL_rl_refill_loop_final ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     EN_ma_request_va ||
	     WILL_FIRE_RL_rl_refill_start ;
  assign ram_cset_cword$ENB =
	     WILL_FIRE_RL_rl_refill_loop &&
	     (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) ||
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d931 ;

  // submodule ram_cset_meta
  always@(MUX_ram_cset_meta$a_put_1__SEL_2 or
	  WILL_FIRE_RL_rl_refill_loop_final or
	  rg_va or
	  EN_ma_request_va or
	  ma_request_va_va or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  f_L2_to_L1_reqs$D_OUT or
	  WILL_FIRE_RL_rl_initialize or
	  rg_cset_in_cache or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  rg_save_cset_in_cache or
	  MUX_ram_cset_meta$a_put_1__SEL_1 or
	  MUX_ram_cset_meta$a_put_2__VAL_1 or
	  MUX_ram_cset_meta$a_put_1__SEL_3 or WILL_FIRE_RL_rl_flush_start)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_meta$a_put_1__SEL_2 || WILL_FIRE_RL_rl_refill_loop_final:
	  ram_cset_meta$ADDRA = rg_va[11:6];
      EN_ma_request_va: ram_cset_meta$ADDRA = ma_request_va_va[11:6];
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  ram_cset_meta$ADDRA = f_L2_to_L1_reqs$D_OUT[13:8];
      WILL_FIRE_RL_rl_initialize: ram_cset_meta$ADDRA = rg_cset_in_cache;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  ram_cset_meta$ADDRA = rg_save_cset_in_cache;
      MUX_ram_cset_meta$a_put_1__SEL_1:
	  ram_cset_meta$ADDRA = MUX_ram_cset_meta$a_put_2__VAL_1;
      MUX_ram_cset_meta$a_put_1__SEL_3:
	  ram_cset_meta$ADDRA = MUX_ram_cset_meta$a_put_2__VAL_1;
      WILL_FIRE_RL_rl_flush_start: ram_cset_meta$ADDRA = 6'd0;
      default: ram_cset_meta$ADDRA = 6'b101010 /* unspecified value */ ;
    endcase
  end
  assign ram_cset_meta$ADDRB =
	     (MUX_ram_cset_meta$b_put_1__SEL_2 ||
	      MUX_ram_cset_cword$b_put_1__SEL_2 ||
	      WILL_FIRE_RL_rl_refill_start) ?
	       rg_va[11:6] :
	       rg_cset_in_cache ;
  always@(MUX_ram_cset_meta$a_put_1__SEL_1 or
	  MUX_ram_cset_meta$a_put_1__SEL_2 or
	  MUX_ram_cset_meta$a_put_1__SEL_3 or
	  WILL_FIRE_RL_rl_refill_loop_final or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_C or
	  WILL_FIRE_RL_rl_downgrade_req_from_L2_A or
	  EN_ma_request_va or
	  WILL_FIRE_RL_rl_flush_start or WILL_FIRE_RL_rl_initialize)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_meta$a_put_1__SEL_1:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_meta$a_put_1__SEL_2:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      MUX_ram_cset_meta$a_put_1__SEL_3:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_refill_loop_final:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_C:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_downgrade_req_from_L2_A:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      EN_ma_request_va:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_flush_start:
	  ram_cset_meta$DIA =
	      108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
      WILL_FIRE_RL_rl_initialize:
	  ram_cset_meta$DIA = 108'h2AAAAAAAAAAAA8AAAAAAAAAAAAA;
      default: ram_cset_meta$DIA =
		   108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  always@(MUX_ram_cset_meta$a_put_1__SEL_1 or
	  rg_new_cset_meta or
	  MUX_ram_cset_meta$b_put_1__SEL_2 or
	  MUX_ram_cset_meta$b_put_3__VAL_2 or
	  MUX_ram_cset_meta$b_put_1__SEL_3 or
	  MUX_ram_cset_meta$b_put_3__VAL_3 or
	  MUX_ram_cset_meta$a_put_1__SEL_3 or
	  MUX_ram_cset_meta$b_put_3__VAL_4 or
	  MUX_ram_cset_cword$b_put_1__SEL_2 or
	  MUX_ram_cset_meta$b_put_3__VAL_5 or
	  WILL_FIRE_RL_rl_refill_start or MUX_ram_cset_meta$b_put_3__VAL_6)
  begin
    case (1'b1) // synopsys parallel_case
      MUX_ram_cset_meta$a_put_1__SEL_1: ram_cset_meta$DIB = rg_new_cset_meta;
      MUX_ram_cset_meta$b_put_1__SEL_2:
	  ram_cset_meta$DIB = MUX_ram_cset_meta$b_put_3__VAL_2;
      MUX_ram_cset_meta$b_put_1__SEL_3:
	  ram_cset_meta$DIB = MUX_ram_cset_meta$b_put_3__VAL_3;
      MUX_ram_cset_meta$a_put_1__SEL_3:
	  ram_cset_meta$DIB = MUX_ram_cset_meta$b_put_3__VAL_4;
      MUX_ram_cset_cword$b_put_1__SEL_2:
	  ram_cset_meta$DIB = MUX_ram_cset_meta$b_put_3__VAL_5;
      WILL_FIRE_RL_rl_refill_start:
	  ram_cset_meta$DIB = MUX_ram_cset_meta$b_put_3__VAL_6;
      default: ram_cset_meta$DIB =
		   108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA /* unspecified value */ ;
    endcase
  end
  assign ram_cset_meta$WEA =
	     !MUX_ram_cset_meta$a_put_1__SEL_1 &&
	     !MUX_ram_cset_meta$a_put_1__SEL_2 &&
	     !MUX_ram_cset_meta$a_put_1__SEL_3 &&
	     !WILL_FIRE_RL_rl_refill_loop_final &&
	     !WILL_FIRE_RL_rl_downgrade_req_from_L2_C &&
	     !WILL_FIRE_RL_rl_downgrade_req_from_L2_A &&
	     !EN_ma_request_va &&
	     !WILL_FIRE_RL_rl_flush_start ;
  assign ram_cset_meta$WEB = 1'd1 ;
  assign ram_cset_meta$ENA =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel && rg_way_in_cset ||
	     WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd7 &&
	     rg_va[5:3] != 3'd7 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_way_in_cset ||
	     WILL_FIRE_RL_rl_refill_loop_final ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_C ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_A ||
	     EN_ma_request_va ||
	     WILL_FIRE_RL_rl_flush_start ||
	     WILL_FIRE_RL_rl_initialize ;
  assign ram_cset_meta$ENB =
	     WILL_FIRE_RL_rl_flush_loop_writeback_sequel && rg_way_in_cset ||
	     WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 ||
	     WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	     valid_info_num_valids__h18714 != 2'd0 ||
	     WILL_FIRE_RL_rl_flush_loop &&
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_way_in_cset ||
	     EN_mav_request_pa &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd0) &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d931 ||
	     WILL_FIRE_RL_rl_refill_start ;

  // remaining internal signals
  assign DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d243 =
	     { 64'hAAAAAAAAAAAAAAAA,
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[511:448] :
		 rg_read_cline_buf[511:448],
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[447:384] :
		 rg_read_cline_buf[447:384],
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[383:320] :
		 rg_read_cline_buf[383:320] } ;
  assign DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d250 =
	     { DONTCARE_CONCAT_IF_rg_cword_in_cline_EQ_0_0_TH_ETC___d243,
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[319:256] :
		 rg_read_cline_buf[319:256],
	       (rg_cword_in_cline == 3'd0) ?
		 f_L2_to_L1_rsps$D_OUT[255:192] :
		 rg_read_cline_buf[255:192] } ;
  assign IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1186 =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd2 &&
	      !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) ?
	       { 2'd2,
		 IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1183 } :
	       130'h0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA ;
  assign IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1187 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 ?
	       ((rg_lrsc_valid && rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923) ?
		  { 66'h20000000000000000, mav_request_pa_req[138:75] } :
		  130'h100000000000000010000000000000000) :
	       IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1186 ;
  assign IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1188 =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd2 &&
	      mav_request_pa_req[74:70] == 5'b00010) ?
	       { 2'd1, data__h49101, 64'hAAAAAAAAAAAAAAAA } :
	       IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1187 ;
  assign IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1189 =
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd1 &&
	      !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) ?
	       { 66'h20000000000000000, mav_request_pa_req[138:75] } :
	       IF_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO__ETC___d1188 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1073 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       n__h56213 :
	       ram_cset_cword$DOA[127:64] ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1097 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 &&
	     rg_lrsc_valid &&
	     rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 ||
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1087 &&
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd2 &&
	      !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	      rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 ||
	      NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1094) ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd1 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd1 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	     2'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 &&
	     rg_lrsc_valid &&
	     rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 &&
	     verbosity != 3'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 &&
	     rg_lrsc_valid &&
	     rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	     2'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1122 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1124 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b00001 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1126 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b00100 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1128 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b01100 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1130 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b01000 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1132 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b10000 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1134 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b10100 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1136 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] == 5'b11000 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1138 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     verbosity != 3'd0 &&
	     mav_request_pa_req[74:70] != 5'b00010 &&
	     mav_request_pa_req[74:70] != 5'b00011 &&
	     mav_request_pa_req[74:70] != 5'b0 &&
	     mav_request_pa_req[74:70] != 5'b00001 &&
	     mav_request_pa_req[74:70] != 5'b00100 &&
	     mav_request_pa_req[74:70] != 5'b01100 &&
	     mav_request_pa_req[74:70] != 5'b01000 &&
	     mav_request_pa_req[74:70] != 5'b10000 &&
	     mav_request_pa_req[74:70] != 5'b10100 &&
	     mav_request_pa_req[74:70] != 5'b11000 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	     2'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460) ?
	       ram_cset_meta$DOA[107:106] :
	       ((ram_cset_meta$DOA[53:52] != 2'd0 &&
		 ram_cset_meta$DOA[51:0] == rg_pa[63:12]) ?
		  ram_cset_meta$DOA[53:52] :
		  2'd0) ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d473 =
	     valid_info_num_valids__h18714 == 2'd0 ||
	     f_L2_to_L1_reqs$EMPTY_N &&
	     (IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 ==
	      2'd3 ||
	      f_L1_to_L2_rsps$FULL_N) ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d598 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460) ?
	       { f_L2_to_L1_reqs$D_OUT[1:0], rg_pa[63:12] } :
	       ram_cset_meta$DOA[107:54] ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       ram_cset_meta$DOA[107:106] :
	       ((ram_cset_meta$DOA[53:52] != 2'd0 &&
		 ram_cset_meta$DOA[51:0] == mav_request_pa_pa[63:12]) ?
		  ram_cset_meta$DOA[53:52] :
		  2'd0) ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 <=
	     2'd1 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     mav_request_pa_req[74:70] == 5'b00011 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d929 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 &&
	     rg_lrsc_valid &&
	     rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 ||
	     mav_request_pa_req[74:70] != 5'b00011 &&
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd2 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d931 =
	     valid_info_num_valids__h36172 == 2'd1 &&
	     mav_request_pa_req[207:206] == 2'd1 &&
	     !IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 ||
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      mav_request_pa_req[74:70] != 5'b00010) &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d929 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d999 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       n__h50650 :
	       ram_cset_cword$DOA[127:64] ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d464 =
	     (ram_cset_meta$DOA[53:52] != 2'd0 &&
	      ram_cset_meta$DOA[51:0] == rg_pa[63:12]) ?
	       2'd1 :
	       2'd0 ;
  assign IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d782 =
	     (ram_cset_meta$DOA[53:52] != 2'd0 &&
	      ram_cset_meta$DOA[51:0] == mav_request_pa_pa[63:12]) ?
	       2'd1 :
	       2'd0 ;
  assign IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1008 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       SEXT_ram_cset_cword_a_read_BITS_63_TO_0_0_AND__ETC___d1007 :
	       data__h49100 ;
  assign IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1010 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       { {32{mav_request_pa_req_BITS_106_TO_75__q4[31]}},
		 mav_request_pa_req_BITS_106_TO_75__q4 } :
	       mav_request_pa_req[138:75] ;
  assign IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1183 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       { SEXT_ram_cset_cword_a_read_BITS_63_TO_0_0_AND__ETC___d1007,
		 final_st_val__h55396 } :
	       { data__h49100, _theResult_____2__h55392 } ;
  assign IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1002 =
	     (ram_cset_meta$DOA[107:106] == 2'd0 ||
	      !ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       n__h50650 :
	       ram_cset_cword$DOA[63:0] ;
  assign IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1074 =
	     (ram_cset_meta$DOA[107:106] == 2'd0 ||
	      !ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       n__h56213 :
	       ram_cset_cword$DOA[63:0] ;
  assign IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d601 =
	     (ram_cset_meta$DOA[107:106] == 2'd0 ||
	      !ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460) ?
	       { f_L2_to_L1_reqs$D_OUT[1:0], rg_pa[63:12] } :
	       ram_cset_meta$DOA[53:0] ;
  assign IF_rg_cache_op_68_EQ_1_69_OR_rg_cache_op_68_EQ_ETC___d178 =
	     { (rg_cache_op == 2'd1 ||
		rg_cache_op == 2'd2 && rg_amo_funct7[6:2] != 5'b00010) ?
		 2'd2 :
		 2'd1,
	       dcache_not_icache } ;
  assign IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 =
	     rg_way_in_cset ?
	       IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 :
	       rg_new_meta_state ;
  assign IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d386 =
	     rg_way_in_cset ? ctag__h13025 : new_meta_ctag__h13322 ;
  assign IF_rg_way_in_cset_3_THEN_SEL_ARR_IF_rg_way_in__ETC___d402 =
	     rg_way_in_cset ? new_meta_ctag__h13322 : ctag__h13030 ;
  assign IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 =
	     rg_way_in_cset ?
	       rg_new_cset_meta[53:52] :
	       ram_cset_meta$DOA[53:52] ;
  assign IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 =
	     rg_way_in_cset ?
	       rg_new_cset_meta[107:106] :
	       ram_cset_meta$DOA[107:106] ;
  assign IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 =
	     rg_way_in_cset ?
	       rg_new_meta_state :
	       IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1087 =
	     valid_info_num_valids__h36172 != 2'd1 ||
	     mav_request_pa_req[207:206] != 2'd2 ||
	     mav_request_pa_req[74:70] != 5'b00011 ||
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1094 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     CASE_NOT_ram_cset_metaDOA_BITS_107_TO_106_EQ__ETC__q6 ==
	     rg_lrsc_pa[63:12] ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1099 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd1 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     (valid_info_num_valids__h36172 == 2'd1 &&
	      mav_request_pa_req[207:206] == 2'd2 &&
	      mav_request_pa_req[74:70] == 5'b00010 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1097) ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1145 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      mav_request_pa_req[74:70] != 5'b00010) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1087 &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1146 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd1 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1145 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1172 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 !=
	      2'd1 ||
	      mav_request_pa_req[207:206] != 2'd1 &&
	      mav_request_pa_req[207:206] != 2'd2) &&
	     verbosity != 3'd0 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1175 =
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      mav_request_pa_req[74:70] != 5'b00010) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1087 &&
	     (valid_info_num_valids__h36172 != 2'd1 ||
	      mav_request_pa_req[207:206] != 2'd2 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1172 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 =
	     valid_info_num_valids__h18714 > 2'd1 ;
  assign NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 =
	     valid_info_num_valids__h36172 > 2'd1 ;
  assign NOT_SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cs_ETC___d420 =
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 !=
	     2'd3 &&
	     rg_cset_in_cache == 6'd63 &&
	     rg_way_in_cset &&
	     NOT_verbosity_ULT_2_2___d23 ;
  assign NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1158 =
	     (mav_request_pa_req[207:206] != 2'd1 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     (mav_request_pa_req[207:206] != 2'd2 ||
	      mav_request_pa_req[74:70] != 5'b00010) &&
	     (mav_request_pa_req[207:206] != 2'd2 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     valid_info_num_valids__h36172 == 2'd1 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	     2'd1 &&
	     (mav_request_pa_req[207:206] == 2'd1 ||
	      mav_request_pa_req[207:206] == 2'd2) ;
  assign NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1167 =
	     (mav_request_pa_req[207:206] != 2'd1 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     (mav_request_pa_req[207:206] != 2'd2 ||
	      mav_request_pa_req[74:70] != 5'b00010) &&
	     NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_2_ETC___d1165 ;
  assign NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_2_ETC___d1165 =
	     (mav_request_pa_req[207:206] != 2'd2 ||
	      IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	     valid_info_num_valids__h36172 == 2'd1 &&
	     IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 ==
	     2'd1 &&
	     (mav_request_pa_req[207:206] == 2'd1 ||
	      mav_request_pa_req[207:206] == 2'd2) &&
	     verbosity != 3'd0 ;
  assign NOT_verbosity_ULT_2_2___d23 = verbosity >= 3'd2 ;
  assign SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d306 =
	     SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 <=
	     rg_new_meta_state ;
  assign SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d314 =
	     (SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d306 ||
	      f_L1_to_L2_rsps$FULL_N) &&
	     (rg_cset_in_cache != 6'd63 || !rg_way_in_cset ||
	      f_flush_rsps$FULL_N) ;
  assign SEXT_ram_cset_cword_a_read_BITS_63_TO_0_0_AND__ETC___d1007 =
	     { {32{data9100_BITS_31_TO_0__q3[31]}},
	       data9100_BITS_31_TO_0__q3 } ;
  assign _theResult___snd__h4875 =
	     ram_cset_meta$DOA[53:52] != 2'd0 &&
	     ram_cset_meta$DOA[107:106] == 2'd0 ;
  assign cline_pa__h14161 =
	     { new_meta_ctag__h13322, rg_cset_in_cache, 6'd0 } ;
  assign cline_pa__h32506 = { rg_pa[63:12], rg_cset_in_cache, 6'd0 } ;
  assign cset_cword_in_cache___1__h33828 =
	     { rg_save_cset_in_cache, rg_save_cword_in_cline } ;
  assign cset_cword_in_cache__h32631 = { rg_cset_in_cache, 3'd0 } ;
  assign ctag__h13025 =
	     rg_way_in_cset ?
	       rg_new_cset_meta[51:0] :
	       ram_cset_meta$DOA[51:0] ;
  assign ctag__h13030 =
	     rg_way_in_cset ?
	       rg_new_cset_meta[105:54] :
	       ram_cset_meta$DOA[105:54] ;
  assign cword__h9986 =
	     (rg_cword_in_cline == 3'd0) ?
	       f_L2_to_L1_rsps$D_OUT[63:0] :
	       rg_read_cline_buf[63:0] ;
  assign cword_in_cline__h3170 = rg_cword_in_cline + 3'd1 ;
  assign data1__h49613 = valid_info_data__h36174 >> shamt__h55276 ;
  assign data9100_BITS_31_TO_0__q3 = data__h49100[31:0] ;
  assign data__h49100 = data1__h49613 & mask__h55322 ;
  assign data__h49101 =
	     (!mav_request_pa_req[205] &&
	      CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1) ?
	       result__h49877 :
	       result__h49949 ;
  assign final_st_val__h55396 = { 32'd0, _theResult_____2__h55392[31:0] } ;
  assign final_st_val__h55486 =
	     IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1008 +
	     IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1010 ;
  assign final_st_val__h55564 = w1__h55385 ^ w2__h55387 ;
  assign final_st_val__h55568 = w1__h55385 & w2__h55387 ;
  assign final_st_val__h55572 = w1__h55385 | w2__h55387 ;
  assign final_st_val__h55576 =
	     (w1__h55385 < w2__h55387) ? w1__h55385 : w2__h55387 ;
  assign final_st_val__h55581 =
	     (w1__h55385 <= w2__h55387) ? w2__h55387 : w1__h55385 ;
  assign final_st_val__h55587 =
	     ((IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1008 ^
	       64'h8000000000000000) <
	      (IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1010 ^
	       64'h8000000000000000)) ?
	       w1__h55385 :
	       w2__h55387 ;
  assign final_st_val__h55592 =
	     ((IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1008 ^
	       64'h8000000000000000) <=
	      (IF_mav_request_pa_req_BITS_204_TO_203_86_EQ_0b_ETC___d1010 ^
	       64'h8000000000000000)) ?
	       w2__h55387 :
	       w1__h55385 ;
  assign l1_to_l2_req_addr__h6372 = { rg_pa[63:6], 6'd0 } ;
  assign mav_request_pa_req_BITS_106_TO_75__q4 = mav_request_pa_req[106:75] ;
  assign new_st_val__h55233 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       final_st_val__h55396 :
	       _theResult_____2__h55392 ;
  assign next_cset_cword_in_cache__h10277 =
	     { rg_va[11:6], cword_in_cline__h3170 } ;
  assign next_cset_in_cache__h14806 = rg_cset_in_cache + 6'd1 ;
  assign num_valids__h18871 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d464 +
	     2'd1 ;
  assign num_valids__h36328 =
	     IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d782 +
	     2'd1 ;
  assign pa__h13491 = { ctag__h13030, rg_cset_in_cache, 6'd0 } ;
  assign pa__h13512 = { ctag__h13025, rg_cset_in_cache, 6'd0 } ;
  assign pa__h13726 =
	     { IF_rg_way_in_cset_3_THEN_SEL_ARR_IF_rg_way_in__ETC___d402,
	       rg_cset_in_cache,
	       6'd0 } ;
  assign pa__h13750 =
	     { IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d386,
	       rg_cset_in_cache,
	       6'd0 } ;
  assign pa__h18473 = { ram_cset_meta$DOA[105:54], rg_cset_in_cache, 6'd0 } ;
  assign pa__h18494 = { ram_cset_meta$DOA[51:0], rg_cset_in_cache, 6'd0 } ;
  assign pa__h35937 = { ram_cset_meta$DOA[105:54], rg_va[11:6], 6'd0 } ;
  assign pa__h35958 = { ram_cset_meta$DOA[51:0], rg_va[11:6], 6'd0 } ;
  assign ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778 =
	     ram_cset_meta$DOA[105:54] == mav_request_pa_pa[63:12] ;
  assign ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460 =
	     ram_cset_meta$DOA[105:54] == rg_pa[63:12] ;
  assign result__h49877 = data__h49100 | y__h49889 ;
  assign result__h49949 = data__h49100 & mask__h55322 ;
  assign rg_cword_in_cline_EQ_7_AND_NOT_verbosity_EQ_0__ETC___d92 =
	     rg_cword_in_cline == 3'd7 && verbosity != 3'd0 &&
	     rg_post_wb_fsm_state != 4'd0 &&
	     rg_post_wb_fsm_state != 4'd1 &&
	     rg_post_wb_fsm_state != 4'd2 &&
	     rg_post_wb_fsm_state != 4'd3 &&
	     rg_post_wb_fsm_state != 4'd4 &&
	     rg_post_wb_fsm_state != 4'd5 &&
	     rg_post_wb_fsm_state != 4'd6 &&
	     rg_post_wb_fsm_state != 4'd7 &&
	     rg_post_wb_fsm_state != 4'd8 &&
	     rg_post_wb_fsm_state != 4'd9 ;
  assign rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923 =
	     rg_lrsc_pa == mav_request_pa_pa ;
  assign shamt__h55276 = { mav_request_pa_req[141:139], 3'b0 } ;
  assign tmp__h4960 = { 1'd0, rg_victim_way } ;
  assign tmp__h4961 = tmp__h4960 + 2'd1 ;
  assign valid_info_data__h18716 = x__h18968 | y__h18969 ;
  assign valid_info_data__h36174 = x__h36425 | y__h36426 ;
  assign valid_info_num_valids__h18714 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460) ?
	       num_valids__h18871 :
	       IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d464 ;
  assign valid_info_num_valids__h36172 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778) ?
	       num_valids__h36328 :
	       IF_NOT_ram_cset_meta_a_read__8_BITS_53_TO_52_1_ETC___d782 ;
  assign victim_cline_pa__h4977 = { tag__h5196, rg_va[11:6], 6'd0 } ;
  assign victim_way__h4850 =
	     (ram_cset_meta$DOA[107:106] != 2'd0 &&
	      ram_cset_meta$DOA[53:52] != 2'd0) ?
	       tmp__h4961[0] :
	       _theResult___snd__h4875 ;
  assign w1___1__h55455 = { 32'd0, data__h49100[31:0] } ;
  assign w1__h55385 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       w1___1__h55455 :
	       data__h49100 ;
  assign w2___1__h55456 = { 32'd0, mav_request_pa_req[106:75] } ;
  assign w2__h55387 =
	     (mav_request_pa_req[204:203] == 2'b10) ?
	       w2___1__h55456 :
	       mav_request_pa_req[138:75] ;
  assign x__h14811 = rg_way_in_cset + 1'd1 ;
  assign x__h18968 = ram_cset_cword$DOA[63:0] & y__h18986 ;
  assign x__h36425 = ram_cset_cword$DOA[63:0] & y__h36443 ;
  assign x_addr__h3203 = { ctag__h3208, rg_cset_in_cache, 6'd0 } ;
  assign x_addr__h57985 = { mav_request_pa_pa[63:6], 6'd0 } ;
  assign y__h18969 = ram_cset_cword$DOA[127:64] & y__h25301 ;
  assign y__h18986 =
	     {64{ram_cset_meta$DOA[53:52] != 2'd0 &&
		 ram_cset_meta$DOA[51:0] == rg_pa[63:12]}} ;
  assign y__h25301 =
	     {64{ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460}} ;
  assign y__h36426 = ram_cset_cword$DOA[127:64] & y__h42758 ;
  assign y__h36443 =
	     {64{ram_cset_meta$DOA[53:52] != 2'd0 &&
		 ram_cset_meta$DOA[51:0] == mav_request_pa_pa[63:12]}} ;
  assign y__h42758 =
	     {64{ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778}} ;
  always@(rg_way_in_cset or ram_cset_meta$DOA)
  begin
    case (rg_way_in_cset)
      1'd0: ctag__h3208 = ram_cset_meta$DOA[51:0];
      1'd1: ctag__h3208 = ram_cset_meta$DOA[105:54];
    endcase
  end
  always@(rg_way_in_cset or ctag__h13025 or ctag__h13030)
  begin
    case (rg_way_in_cset)
      1'd0: new_meta_ctag__h13322 = ctag__h13025;
      1'd1: new_meta_ctag__h13322 = ctag__h13030;
    endcase
  end
  always@(mav_request_pa_req)
  begin
    case (mav_request_pa_req[204:203])
      2'b0: mask__h55322 = 64'h00000000000000FF;
      2'b01: mask__h55322 = 64'h000000000000FFFF;
      2'b10: mask__h55322 = 64'h00000000FFFFFFFF;
      2'd3: mask__h55322 = 64'hFFFFFFFFFFFFFFFF;
    endcase
  end
  always@(mav_request_pa_req)
  begin
    case (mav_request_pa_req[204:203])
      2'b0: y__h49889 = 64'hFFFFFFFFFFFFFF00;
      2'b01: y__h49889 = 64'hFFFFFFFFFFFF0000;
      2'b10: y__h49889 = 64'hFFFFFFFF00000000;
      2'd3: y__h49889 = 64'd0;
    endcase
  end
  always@(victim_way__h4850 or ram_cset_meta$DOA)
  begin
    case (victim_way__h4850)
      1'd0: tag__h5196 = ram_cset_meta$DOA[51:0];
      1'd1: tag__h5196 = ram_cset_meta$DOA[105:54];
    endcase
  end
  always@(victim_way__h4850 or ram_cset_meta$DOA)
  begin
    case (victim_way__h4850)
      1'd0:
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 =
	      ram_cset_meta$DOA[53:52];
      1'd1:
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 =
	      ram_cset_meta$DOA[107:106];
    endcase
  end
  always@(rg_way_in_cset or
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 or
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301)
  begin
    case (rg_way_in_cset)
      1'd0:
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 =
	      IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299;
      1'd1:
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 =
	      IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301;
    endcase
  end
  always@(ram_cset_meta$DOA or
	  ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778 or
	  ram_cset_cword$DOA)
  begin
    case (ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778)
      1'd0: old_cword__h50639 = ram_cset_cword$DOA[63:0];
      1'd1: old_cword__h50639 = ram_cset_cword$DOA[127:64];
    endcase
  end
  always@(mav_request_pa_req or data__h49100)
  begin
    case (mav_request_pa_req[204:203])
      2'b0:
	  CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1 =
	      data__h49100[7];
      2'b01:
	  CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1 =
	      data__h49100[15];
      2'b10:
	  CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1 =
	      data__h49100[31];
      2'd3:
	  CASE_mav_request_pa_req_BITS_204_TO_203_0b0_da_ETC__q1 =
	      data__h49100[63];
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or mav_request_pa_req)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:8], mav_request_pa_req[82:75] };
      3'h1:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:16],
		mav_request_pa_req[82:75],
		old_cword__h50639[7:0] };
      3'h2:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:24],
		mav_request_pa_req[82:75],
		old_cword__h50639[15:0] };
      3'h3:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:32],
		mav_request_pa_req[82:75],
		old_cword__h50639[23:0] };
      3'h4:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:40],
		mav_request_pa_req[82:75],
		old_cword__h50639[31:0] };
      3'h5:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:48],
		mav_request_pa_req[82:75],
		old_cword__h50639[39:0] };
      3'h6:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { old_cword__h50639[63:56],
		mav_request_pa_req[82:75],
		old_cword__h50639[47:0] };
      3'h7:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 =
	      { mav_request_pa_req[82:75], old_cword__h50639[55:0] };
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or mav_request_pa_req)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 =
	      { old_cword__h50639[63:16], mav_request_pa_req[90:75] };
      3'h2:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 =
	      { old_cword__h50639[63:32],
		mav_request_pa_req[90:75],
		old_cword__h50639[15:0] };
      3'h4:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 =
	      { old_cword__h50639[63:48],
		mav_request_pa_req[90:75],
		old_cword__h50639[31:0] };
      3'h6:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 =
	      { mav_request_pa_req[90:75], old_cword__h50639[47:0] };
      default: IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 =
		   old_cword__h50639;
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or mav_request_pa_req)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2 =
	      { old_cword__h50639[63:32], mav_request_pa_req[106:75] };
      3'h4:
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2 =
	      { mav_request_pa_req[106:75], old_cword__h50639[31:0] };
      default: CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2 =
		   old_cword__h50639;
    endcase
  end
  always@(mav_request_pa_req or
	  old_cword__h50639 or
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977 or
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987 or
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2)
  begin
    case (mav_request_pa_req[205:203])
      3'b0:
	  n__h50650 =
	      IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d977;
      3'b001:
	  n__h50650 =
	      IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d987;
      3'b010:
	  n__h50650 = CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q2;
      3'b011: n__h50650 = mav_request_pa_req[138:75];
      default: n__h50650 = old_cword__h50639;
    endcase
  end
  always@(mav_request_pa_req or
	  final_st_val__h55592 or
	  final_st_val__h55486 or
	  w2__h55387 or
	  final_st_val__h55564 or
	  final_st_val__h55572 or
	  final_st_val__h55568 or
	  final_st_val__h55587 or
	  final_st_val__h55576 or final_st_val__h55581)
  begin
    case (mav_request_pa_req[74:70])
      5'b0: _theResult_____2__h55392 = final_st_val__h55486;
      5'b00001: _theResult_____2__h55392 = w2__h55387;
      5'b00100: _theResult_____2__h55392 = final_st_val__h55564;
      5'b01000: _theResult_____2__h55392 = final_st_val__h55572;
      5'b01100: _theResult_____2__h55392 = final_st_val__h55568;
      5'b10000: _theResult_____2__h55392 = final_st_val__h55587;
      5'b11000: _theResult_____2__h55392 = final_st_val__h55576;
      5'b11100: _theResult_____2__h55392 = final_st_val__h55581;
      default: _theResult_____2__h55392 = final_st_val__h55592;
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or new_st_val__h55233)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 =
	      { old_cword__h50639[63:16], new_st_val__h55233[15:0] };
      3'h2:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 =
	      { old_cword__h50639[63:32],
		new_st_val__h55233[15:0],
		old_cword__h50639[15:0] };
      3'h4:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 =
	      { old_cword__h50639[63:48],
		new_st_val__h55233[15:0],
		old_cword__h50639[31:0] };
      3'h6:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 =
	      { new_st_val__h55233[15:0], old_cword__h50639[47:0] };
      default: IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 =
		   old_cword__h50639;
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or new_st_val__h55233)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:8], new_st_val__h55233[7:0] };
      3'h1:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:16],
		new_st_val__h55233[7:0],
		old_cword__h50639[7:0] };
      3'h2:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:24],
		new_st_val__h55233[7:0],
		old_cword__h50639[15:0] };
      3'h3:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:32],
		new_st_val__h55233[7:0],
		old_cword__h50639[23:0] };
      3'h4:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:40],
		new_st_val__h55233[7:0],
		old_cword__h50639[31:0] };
      3'h5:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:48],
		new_st_val__h55233[7:0],
		old_cword__h50639[39:0] };
      3'h6:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { old_cword__h50639[63:56],
		new_st_val__h55233[7:0],
		old_cword__h50639[47:0] };
      3'h7:
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 =
	      { new_st_val__h55233[7:0], old_cword__h50639[55:0] };
    endcase
  end
  always@(mav_request_pa_pa or old_cword__h50639 or new_st_val__h55233)
  begin
    case (mav_request_pa_pa[2:0])
      3'h0:
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5 =
	      { old_cword__h50639[63:32], new_st_val__h55233[31:0] };
      3'h4:
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5 =
	      { new_st_val__h55233[31:0], old_cword__h50639[31:0] };
      default: CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5 =
		   old_cword__h50639;
    endcase
  end
  always@(mav_request_pa_req or
	  old_cword__h50639 or
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054 or
	  IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063 or
	  CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5 or
	  new_st_val__h55233)
  begin
    case (mav_request_pa_req[205:203])
      3'b0:
	  n__h56213 =
	      IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1054;
      3'b001:
	  n__h56213 =
	      IF_mav_request_pa_pa_BITS_2_TO_0_37_EQ_0x0_38__ETC___d1063;
      3'b010:
	  n__h56213 = CASE_mav_request_pa_pa_BITS_2_TO_0_0x0_old_cwo_ETC__q5;
      3'b011: n__h56213 = new_st_val__h55233;
      default: n__h56213 = old_cword__h50639;
    endcase
  end
  always@(ram_cset_meta$DOA or
	  ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778)
  begin
    case (ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778)
      1'd0:
	  CASE_NOT_ram_cset_metaDOA_BITS_107_TO_106_EQ__ETC__q6 =
	      ram_cset_meta$DOA[51:0];
      1'd1:
	  CASE_NOT_ram_cset_metaDOA_BITS_107_TO_106_EQ__ETC__q6 =
	      ram_cset_meta$DOA[105:54];
    endcase
  end
  always@(rg_way_in_cset or ram_cset_cword$DOA)
  begin
    case (rg_way_in_cset)
      1'd0:
	  SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14 =
	      ram_cset_cword$DOA[63:0];
      1'd1:
	  SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14 =
	      ram_cset_cword$DOA[127:64];
    endcase
  end

  // handling of inlined registers

  always@(posedge CLK)
  begin
    if (RST_N == `BSV_RESET_VALUE)
      begin
        rg_cset_in_cache <= `BSV_ASSIGNMENT_DELAY 6'd0;
	rg_fsm_state <= `BSV_ASSIGNMENT_DELAY 4'd0;
	rg_lrsc_valid <= `BSV_ASSIGNMENT_DELAY 1'd0;
	rg_victim_way <= `BSV_ASSIGNMENT_DELAY 1'd0;
      end
    else
      begin
        if (rg_cset_in_cache$EN)
	  rg_cset_in_cache <= `BSV_ASSIGNMENT_DELAY rg_cset_in_cache$D_IN;
	if (rg_fsm_state$EN)
	  rg_fsm_state <= `BSV_ASSIGNMENT_DELAY rg_fsm_state$D_IN;
	if (rg_lrsc_valid$EN)
	  rg_lrsc_valid <= `BSV_ASSIGNMENT_DELAY rg_lrsc_valid$D_IN;
	if (rg_victim_way$EN)
	  rg_victim_way <= `BSV_ASSIGNMENT_DELAY rg_victim_way$D_IN;
      end
    if (rg_amo_funct7$EN)
      rg_amo_funct7 <= `BSV_ASSIGNMENT_DELAY rg_amo_funct7$D_IN;
    if (rg_cache_op$EN) rg_cache_op <= `BSV_ASSIGNMENT_DELAY rg_cache_op$D_IN;
    if (rg_cword_in_cline$EN)
      rg_cword_in_cline <= `BSV_ASSIGNMENT_DELAY rg_cword_in_cline$D_IN;
    if (rg_error_during_refill$EN)
      rg_error_during_refill <= `BSV_ASSIGNMENT_DELAY
	  rg_error_during_refill$D_IN;
    if (rg_f3$EN) rg_f3 <= `BSV_ASSIGNMENT_DELAY rg_f3$D_IN;
    if (rg_lrsc_pa$EN) rg_lrsc_pa <= `BSV_ASSIGNMENT_DELAY rg_lrsc_pa$D_IN;
    if (rg_lrsc_size$EN)
      rg_lrsc_size <= `BSV_ASSIGNMENT_DELAY rg_lrsc_size$D_IN;
    if (rg_new_cset_meta$EN)
      rg_new_cset_meta <= `BSV_ASSIGNMENT_DELAY rg_new_cset_meta$D_IN;
    if (rg_new_meta_state$EN)
      rg_new_meta_state <= `BSV_ASSIGNMENT_DELAY rg_new_meta_state$D_IN;
    if (rg_pa$EN) rg_pa <= `BSV_ASSIGNMENT_DELAY rg_pa$D_IN;
    if (rg_post_wb_fsm_state$EN)
      rg_post_wb_fsm_state <= `BSV_ASSIGNMENT_DELAY rg_post_wb_fsm_state$D_IN;
    if (rg_post_wb_meta_state$EN)
      rg_post_wb_meta_state <= `BSV_ASSIGNMENT_DELAY
	  rg_post_wb_meta_state$D_IN;
    if (rg_read_cline_buf$EN)
      rg_read_cline_buf <= `BSV_ASSIGNMENT_DELAY rg_read_cline_buf$D_IN;
    if (rg_save_cset_in_cache$EN)
      rg_save_cset_in_cache <= `BSV_ASSIGNMENT_DELAY
	  rg_save_cset_in_cache$D_IN;
    if (rg_save_cword_in_cline$EN)
      rg_save_cword_in_cline <= `BSV_ASSIGNMENT_DELAY
	  rg_save_cword_in_cline$D_IN;
    if (rg_save_fsm_state$EN)
      rg_save_fsm_state <= `BSV_ASSIGNMENT_DELAY rg_save_fsm_state$D_IN;
    if (rg_save_pa$EN) rg_save_pa <= `BSV_ASSIGNMENT_DELAY rg_save_pa$D_IN;
    if (rg_save_va$EN) rg_save_va <= `BSV_ASSIGNMENT_DELAY rg_save_va$D_IN;
    if (rg_save_way_in_cset$EN)
      rg_save_way_in_cset <= `BSV_ASSIGNMENT_DELAY rg_save_way_in_cset$D_IN;
    if (rg_va$EN) rg_va <= `BSV_ASSIGNMENT_DELAY rg_va$D_IN;
    if (rg_way_in_cset$EN)
      rg_way_in_cset <= `BSV_ASSIGNMENT_DELAY rg_way_in_cset$D_IN;
    if (rg_write_cline_buf$EN)
      rg_write_cline_buf <= `BSV_ASSIGNMENT_DELAY rg_write_cline_buf$D_IN;
  end

  // synopsys translate_off
  `ifdef BSV_NO_INITIAL_BLOCKS
  `else // not BSV_NO_INITIAL_BLOCKS
  initial
  begin
    rg_amo_funct7 = 7'h2A;
    rg_cache_op = 2'h2;
    rg_cset_in_cache = 6'h2A;
    rg_cword_in_cline = 3'h2;
    rg_error_during_refill = 1'h0;
    rg_f3 = 3'h2;
    rg_fsm_state = 4'hA;
    rg_lrsc_pa = 64'hAAAAAAAAAAAAAAAA;
    rg_lrsc_size = 2'h2;
    rg_lrsc_valid = 1'h0;
    rg_new_cset_meta = 108'hAAAAAAAAAAAAAAAAAAAAAAAAAAA;
    rg_new_meta_state = 2'h2;
    rg_pa = 64'hAAAAAAAAAAAAAAAA;
    rg_post_wb_fsm_state = 4'hA;
    rg_post_wb_meta_state = 2'h2;
    rg_read_cline_buf =
	512'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA;
    rg_save_cset_in_cache = 6'h2A;
    rg_save_cword_in_cline = 3'h2;
    rg_save_fsm_state = 4'hA;
    rg_save_pa = 64'hAAAAAAAAAAAAAAAA;
    rg_save_va = 64'hAAAAAAAAAAAAAAAA;
    rg_save_way_in_cset = 1'h0;
    rg_va = 64'hAAAAAAAAAAAAAAAA;
    rg_victim_way = 1'h0;
    rg_way_in_cset = 1'h0;
    rg_write_cline_buf =
	512'hAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA;
  end
  `endif // BSV_NO_INITIAL_BLOCKS
  // synopsys translate_on

  // handling of system tasks

  // synopsys translate_off
  always@(negedge CLK)
  begin
    #0;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	begin
	  v__h35463 = $stime;
	  #0;
	end
    v__h35457 = v__h35463 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$display("%0d: %m.mav_request_pa: pa %0h",
		 v__h35457,
		 mav_request_pa_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write("MMU_Cache_Req{");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("MMU_Cache_Req{");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd0)
	$write("CACHE_LD");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd1)
	$write("CACHE_ST");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2 &&
	  mav_request_pa_req[207:206] != 2'd0 &&
	  mav_request_pa_req[207:206] != 2'd1)
	$write("CACHE_AMO");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write(" f3 %3b", mav_request_pa_req[205:203]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write("CACHE_AMO");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write(" f3 %3b", mav_request_pa_req[205:203]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write(" ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b00010)
	$write("LR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b00011)
	$write("SC");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b0)
	$write("ADD");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b00001)
	$write("SWAP");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b00100)
	$write("XOR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b01100)
	$write("AND");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b01000)
	$write("OR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b10000)
	$write("MIN");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b10100)
	$write("MAX");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b11000)
	$write("MINU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  mav_request_pa_req[74:70] != 5'b0 &&
	  mav_request_pa_req[74:70] != 5'b00001 &&
	  mav_request_pa_req[74:70] != 5'b00100 &&
	  mav_request_pa_req[74:70] != 5'b01100 &&
	  mav_request_pa_req[74:70] != 5'b01000 &&
	  mav_request_pa_req[74:70] != 5'b10000 &&
	  mav_request_pa_req[74:70] != 5'b10100 &&
	  mav_request_pa_req[74:70] != 5'b11000)
	$write("MAXU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] == 2'd2)
	$write(" aqrl %2b", mav_request_pa_req[69:68]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  mav_request_pa_req[207:206] != 2'd2)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write(" va %0h", mav_request_pa_req[202:139]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  (mav_request_pa_req[207:206] == 2'd2 &&
	   mav_request_pa_req[74:70] != 5'b00010 ||
	   mav_request_pa_req[207:206] == 2'd1))
	$write(" st_val %0h", mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  (mav_request_pa_req[207:206] != 2'd2 ||
	   mav_request_pa_req[74:70] == 5'b00010) &&
	  mav_request_pa_req[207:206] != 2'd1)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write(" priv %0d sstatus_SUM %0d mstatus_MXR %0d satp %0h",
	       mav_request_pa_req[67:66],
	       mav_request_pa_req[65],
	       mav_request_pa_req[64],
	       mav_request_pa_req[63:0]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("CSet [%0h] (state, tag)\n", rg_va[11:6]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd1 &&
	  ram_cset_meta$DOA[53:52] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd0)
	$write(", ctag %0h (= pa %0h)", ram_cset_meta$DOA[51:0], pa__h35958);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd1 &&
	  ram_cset_meta$DOA[107:106] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       ram_cset_meta$DOA[105:54],
	       pa__h35937);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("    valid_info = ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("Valid_Info { ", "num_valids: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("'h%h", valid_info_num_valids__h36172);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write(", ", "valid_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 != 2'd1 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d786 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write(", ", "data: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("'h%h", valid_info_data__h36174);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write(", ", "way: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0)
	$write("'h%h",
	       ram_cset_meta$DOA[107:106] != 2'd0 &&
	       ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
	       " }");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && verbosity != 3'd0) $write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("    INTERNAL ERROR ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  mav_request_pa_req[207:206] == 2'd0)
	$write("CACHE_LD");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  mav_request_pa_req[207:206] == 2'd1)
	$write("CACHE_ST");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  mav_request_pa_req[207:206] != 2'd0 &&
	  mav_request_pa_req[207:206] != 2'd1)
	$write("CACHE_AMO");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write(" va %0h pa %0h",
	       mav_request_pa_req[202:139],
	       mav_request_pa_pa,
	       "\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$display("    # of valids in set: %0d    (should be 0 or 1)",
		 valid_info_num_valids__h36172);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("CSet [%0h] (state, tag)\n", rg_va[11:6]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] != 2'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd1 &&
	  ram_cset_meta$DOA[53:52] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[53:52] != 2'd0)
	$write(", ctag %0h (= pa %0h)", ram_cset_meta$DOA[51:0], pa__h35958);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd1 &&
	  ram_cset_meta$DOA[107:106] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867 &&
	  ram_cset_meta$DOA[107:106] != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       ram_cset_meta$DOA[105:54],
	       pa__h35937);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d867)
	$finish(32'd1);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && valid_info_num_valids__h36172 == 2'd1 &&
	  mav_request_pa_req[207:206] == 2'd0 &&
	  verbosity != 3'd0)
	$display("    LOAD-HIT: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 data__h49101);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$display("    STORE-HIT: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103)
	begin
	  v__h50323 = $stime;
	  #0;
	end
    v__h50317 = v__h50323 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103)
	$display("%0d: %m.fa_write: INTERNAL ERROR", v__h50317);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103)
	$display("    va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103)
	$display("    Cache write on a miss (need EXCLUSIVE)");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1103)
	$finish(32'd1);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$display("      cache.fa_write: va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("      from: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("CSet_Cword {", "%0h", ram_cset_cword$DOA[63:0]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("%0h", ram_cset_cword$DOA[127:64]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("      to:   ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("CSet_Cword {",
	       "%0h",
	       IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1002);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("%0h",
	       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d999);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1102)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && valid_info_num_valids__h36172 == 2'd1 &&
	  mav_request_pa_req[207:206] == 2'd2 &&
	  mav_request_pa_req[74:70] == 5'b00010 &&
	  verbosity != 3'd0)
	$display("    LR-HIT: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 data__h49101);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$display("    SC-HIT and success: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110)
	begin
	  v__h52949 = $stime;
	  #0;
	end
    v__h52943 = v__h52949 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110)
	$display("%0d: %m.fa_write: INTERNAL ERROR", v__h52943);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110)
	$display("    va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110)
	$display("    Cache write on a miss (need EXCLUSIVE)");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1110)
	$finish(32'd1);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$display("      cache.fa_write: va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("      from: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("CSet_Cword {", "%0h", ram_cset_cword$DOA[63:0]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("%0h", ram_cset_cword$DOA[127:64]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("      to:   ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("CSet_Cword {",
	       "%0h",
	       IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1002);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("%0h",
	       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d999);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1108)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d920 &&
	  (!rg_lrsc_valid || !rg_lrsc_pa_22_EQ_mav_request_pa_pa___d923) &&
	  verbosity != 3'd0)
	$display("    SC-HIT and fail: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$display("    AMO-HIT: va %0h pa %0h data %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("    f3 %3b AMO ", mav_request_pa_req[205:203]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1122)
	$write("ADD");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1124)
	$write("SWAP");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1126)
	$write("XOR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1128)
	$write("AND");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1130)
	$write("OR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1132)
	$write("MIN");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1134)
	$write("MAX");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1136)
	$write("MINU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1138)
	$write("MAXU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$display("    va %0h  pa %0h  st_value %0h",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$display("    Cache cword %0h, load-result %0h",
		 valid_info_data__h36174,
		 valid_info_data__h36174);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1122)
	$write("ADD");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1124)
	$write("SWAP");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1126)
	$write("XOR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1128)
	$write("AND");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1130)
	$write("OR");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1132)
	$write("MIN");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1134)
	$write("MAX");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1136)
	$write("MINU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1138)
	$write("MAXU");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write(" (%0h, %0h) -> %0h",
	       data__h49100,
	       mav_request_pa_req[138:75],
	       new_st_val__h55233,
	       "\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139)
	begin
	  v__h55907 = $stime;
	  #0;
	end
    v__h55901 = v__h55907 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139)
	$display("%0d: %m.fa_write: INTERNAL ERROR", v__h55901);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139)
	$display("    va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 new_st_val__h55233);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139)
	$display("    Cache write on a miss (need EXCLUSIVE)");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1139)
	$finish(32'd1);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$display("      cache.fa_write: va_cset_cword_in_cache %0h way %0d pa %0h f3 %0d st_value %0h",
		 rg_va[11:3],
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_ma_ETC___d778,
		 mav_request_pa_pa,
		 mav_request_pa_req[205:203],
		 new_st_val__h55233);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("      from: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("CSet_Cword {", "%0h", ram_cset_cword$DOA[63:0]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("%0h", ram_cset_cword$DOA[127:64]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("      to:   ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("CSet_Cword {",
	       "%0h",
	       IF_ram_cset_meta_a_read__8_BITS_107_TO_106_12__ETC___d1074);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write(", ");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("%0h",
	       IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1073);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("}");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[74:70] != 5'b00010 &&
	  mav_request_pa_req[74:70] != 5'b00011 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d1118)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	  NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1167)
	$display("    Store-hit, but need S->E upgrade");
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa && mav_request_pa_req[207:206] != 2'd0 &&
	  NOT_mav_request_pa_req_BITS_207_TO_206_94_EQ_1_ETC___d1167)
	$display("    va %0h pa %0h data %0h -> FSM_UPGRADE_REFILL",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa,
		 mav_request_pa_req[138:75]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_mav_request_pa &&
	  (valid_info_num_valids__h36172 != 2'd1 ||
	   mav_request_pa_req[207:206] != 2'd0) &&
	  (valid_info_num_valids__h36172 != 2'd1 ||
	   mav_request_pa_req[207:206] != 2'd1 ||
	   IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d914) &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d1175)
	$display("    MISS: va %0h pa %0h; -> REPLACE_START",
		 mav_request_pa_req[202:139],
		 mav_request_pa_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_ma_request_va && NOT_verbosity_ULT_2_2___d23)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 ma_request_va_va,
		 ma_request_va_va[11:6],
		 ma_request_va_va[11:3]);
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_ma_request_va && verbosity != 3'd0)
	begin
	  v__h35357 = $stime;
	  #0;
	end
    v__h35351 = v__h35357 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (EN_ma_request_va && verbosity != 3'd0)
	$display("%0d: %m.ma_request_va: %0h", v__h35351, ma_request_va_va);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	begin
	  v__h2923 = $stime;
	  #0;
	end
    v__h2917 = v__h2923 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$display("%0d: %m.rl_writeback_loop", v__h2917);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$display("    cset %0h way %0h cword %0h data %0h",
		 rg_cset_in_cache,
		 rg_way_in_cset,
		 rg_cword_in_cline,
		 SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("    cset_cword: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("<V ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("'h%h", ram_cset_cword$DOA[63:0], " ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("'h%h", ram_cset_cword$DOA[127:64], " ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write(" >");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  (verbosity != 3'd0 && rg_cword_in_cline == 3'd0 ||
	   NOT_verbosity_ULT_2_2___d23))
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	begin
	  v__h4325 = $stime;
	  #0;
	end
    v__h4319 = v__h4325 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("%0d: %m.rl_writeback_loop", v__h4319);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$write("    Done; writeback cline @ %0h", x_addr__h3203, " -> ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd0)
	$write("FSM_INITIALIZE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd1)
	$write("FSM_IDLE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd2)
	$write("FSM_REPLACE_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd3)
	$write("FSM_WRITEBACK_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd4)
	$write("FSM_REFILL_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd5)
	$write("FSM_UPGRADE_REFILL");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd6)
	$write("FSM_REFILL_FINAL_DELAY");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd7)
	$write("FSM_DOWNGRADE_B");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd8)
	$write("FSM_DOWNGRADE_C");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0 &&
	  rg_post_wb_fsm_state == 4'd9)
	$write("FSM_FLUSH_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop &&
	  rg_cword_in_cline_EQ_7_AND_NOT_verbosity_EQ_0__ETC___d92)
	$write("FSM_FLUSH_LOOP_WRITEBACK_SEQUEL");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd0),
		 rg_write_cline_buf[127:64]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd1),
		 rg_write_cline_buf[191:128]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd2),
		 rg_write_cline_buf[255:192]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd3),
		 rg_write_cline_buf[319:256]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd4),
		 rg_write_cline_buf[383:320]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd5),
		 rg_write_cline_buf[447:384]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd6),
		 rg_write_cline_buf[511:448]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline == 3'd7 &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd7),
		 SEL_ARR_ram_cset_cword_a_read_BITS_63_TO_0_0_r_ETC___d14);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_writeback_loop && rg_cword_in_cline != 3'd7 &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    Requested cword_in_cline %0d", cword_in_cline__h3170);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace && verbosity != 3'd0)
	begin
	  v__h4798 = $stime;
	  #0;
	end
    v__h4792 = v__h4798 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace && verbosity != 3'd0)
	$display("%0d: %m.rl_replace", v__h4792);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace && verbosity != 3'd0)
	$display("    cset %0h way %0h", rg_va[11:6], victim_way__h4850);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    Victim cline pa %0h: MODIFIED: evict->INVALID (writeback)",
		 victim_cline_pa__h4977);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    writeback loop prequel, then -> WRITEBACK_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    fa_cache_writeback_loop_prequel @ %0h (cset %0h, way %0h)",
		 victim_cline_pa__h4977,
		 rg_va[11:6],
		 victim_way__h4850);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd0 &&
	  verbosity != 3'd0)
	$display("    Victim cline: INVALID; no eviction/notification; -> REFILL_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd3 &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd0 &&
	  verbosity != 3'd0)
	$write("    Victim cline pa %0h: ", victim_cline_pa__h4977);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace && verbosity != 3'd0 &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace && verbosity != 3'd0 &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd3 &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd0 &&
	  verbosity != 3'd0)
	$display(": evict->INVALID (no writeback, notify downgrade to L2)");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_replace &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd3 &&
	  SEL_ARR_ram_cset_meta_a_read__8_BITS_53_TO_52__ETC___d125 != 2'd0 &&
	  verbosity != 3'd0)
	$display("    -> REFILL_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && verbosity != 3'd0)
	begin
	  v__h6040 = $stime;
	  #0;
	end
    v__h6034 = v__h6040 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && verbosity != 3'd0)
	$display("%0d: %m.rl_refill_start @ %0h (cset %0h way %0h)",
		 v__h6034,
		 rg_pa,
		 rg_cset_in_cache,
		 rg_way_in_cset);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$display("    Requesting cline: ram_cset_cword.a: cword-in-cache: 0x%0h",
		 cset_cword_in_cache__h32631);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write("L1_to_L2_Req { ", "addr: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write("'h%h", l1_to_l2_req_addr__h6372);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write(", ", "from_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write(", ", "to_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23 &&
	  rg_cache_op != 2'd1 &&
	  (rg_cache_op != 2'd2 || rg_amo_funct7[6:2] == 5'b00010))
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23 &&
	  (rg_cache_op == 2'd1 ||
	   rg_cache_op == 2'd2 && rg_amo_funct7[6:2] != 5'b00010))
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write(", ", "can_up_to_E: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23 &&
	  dcache_not_icache)
	$write("True");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23 &&
	  !dcache_not_icache)
	$write("False");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write(" }");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_start && NOT_verbosity_ULT_2_2___d23)
	$display("    -> FSM_UPGRADE_REFILL");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (NOT_verbosity_ULT_2_2___d23 ||
	   rg_cword_in_cline == 3'd0 && verbosity != 3'd0))
	begin
	  v__h6961 = $stime;
	  #0;
	end
    v__h6955 = v__h6961 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (NOT_verbosity_ULT_2_2___d23 ||
	   rg_cword_in_cline == 3'd0 && verbosity != 3'd0))
	$display("%0d: %m.rl_refill_loop", v__h6955);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (NOT_verbosity_ULT_2_2___d23 ||
	   rg_cword_in_cline == 3'd0 && verbosity != 3'd0))
	$display("    addr %0h  (cset %0h way %0d word %0d)",
		 rg_pa,
		 rg_cset_in_cache,
		 rg_way_in_cset,
		 rg_cword_in_cline);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0)
	$write("    -> ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] != 2'd0 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] != 2'd1 &&
	  f_L2_to_L1_rsps$D_OUT[514:513] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd0),
		 f_L2_to_L1_rsps$D_OUT[63:0]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd1),
		 f_L2_to_L1_rsps$D_OUT[127:64]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd2),
		 f_L2_to_L1_rsps$D_OUT[191:128]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd3),
		 f_L2_to_L1_rsps$D_OUT[255:192]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd4),
		 f_L2_to_L1_rsps$D_OUT[319:256]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd5),
		 f_L2_to_L1_rsps$D_OUT[383:320]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd6),
		 f_L2_to_L1_rsps$D_OUT[447:384]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd0 &&
	  f_L2_to_L1_rsps$D_OUT[512] &&
	  verbosity != 3'd0)
	$display("        [%0d]  %016h",
		 $signed(32'd7),
		 f_L2_to_L1_rsps$D_OUT[511:448]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512] ||
	   rg_cword_in_cline == 3'd7) &&
	  verbosity != 3'd0)
	begin
	  v__h10317 = $stime;
	  #0;
	end
    v__h10311 = v__h10317 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (rg_cword_in_cline == 3'd0 && !f_L2_to_L1_rsps$D_OUT[512] ||
	   rg_cword_in_cline == 3'd7) &&
	  verbosity != 3'd0)
	$display("%0d: %m.rl_refill_loop: done", v__h10311);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop && rg_cword_in_cline == 3'd7 &&
	  rg_va[5:3] != 3'd7 &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 rg_va,
		 rg_va[11:6],
		 rg_va[11:3]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop &&
	  (rg_cword_in_cline != 3'd0 || f_L2_to_L1_rsps$D_OUT[512]) &&
	  rg_cword_in_cline != 3'd7 &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    Requesting ram_cset_cword.a cword-in-cache: 0x%0h",
		 next_cset_cword_in_cache__h10277);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop_final && verbosity != 3'd0)
	begin
	  v__h11382 = $stime;
	  #0;
	end
    v__h11376 = v__h11382 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop_final && verbosity != 3'd0)
	$display("%0d: %m.rl_refill_loop_final; re-request RAM", v__h11376);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_refill_loop_final && NOT_verbosity_ULT_2_2___d23)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 rg_va,
		 rg_va[11:6],
		 rg_va[11:3]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_start && verbosity != 3'd0)
	begin
	  v__h12363 = $stime;
	  #0;
	end
    v__h12357 = v__h12363 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_start && verbosity != 3'd0)
	$display("%0d: %m.rl_flush_start", v__h12357);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	begin
	  v__h12897 = $stime;
	  #0;
	end
    v__h12891 = v__h12897 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$display("%0d: %m.rl_flush_loop", v__h12891);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("    @ %0h (cset %0h, way %0d) cline state ",
	       cline_pa__h14161,
	       rg_cset_in_cache,
	       rg_way_in_cset);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 != 2'd0 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 != 2'd1 &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$display("    Updating cset_meta:");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("    Old: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("CSet [%0h] (state, tag)\n", rg_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 != 2'd0 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 != 2'd1 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d299 != 2'd0)
	$write(", ctag %0h (= pa %0h)", ctag__h13025, pa__h13512);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 != 2'd0 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 != 2'd1 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_cset_meta_97_B_ETC___d301 != 2'd0)
	$write(", ctag %0h (= pa %0h)", ctag__h13030, pa__h13491);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("    New: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("CSet [%0h] (state, tag)\n", rg_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 != 2'd0 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 != 2'd1 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d372 != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       IF_rg_way_in_cset_3_THEN_IF_rg_way_in_cset_3_T_ETC___d386,
	       pa__h13750);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 != 2'd0 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 != 2'd1 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23 &&
	  IF_rg_way_in_cset_3_THEN_rg_new_meta_state_05__ETC___d388 != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       IF_rg_way_in_cset_3_THEN_SEL_ARR_IF_rg_way_in__ETC___d402,
	       pa__h13726);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop && NOT_verbosity_ULT_2_2___d23)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 == 2'd3 &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    MODIFIED; writeback cline");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop &&
	  SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cset_m_ETC___d303 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    fa_cache_writeback_loop_prequel @ %0h (cset %0h, way %0h)",
		 cline_pa__h14161,
		 rg_cset_in_cache,
		 rg_way_in_cset);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop &&
	  NOT_SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cs_ETC___d420)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 rg_va,
		 rg_va[11:6],
		 rg_va[11:3]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop &&
	  NOT_SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cs_ETC___d420)
	begin
	  v__h15517 = $stime;
	  #0;
	end
    v__h15511 = v__h15517 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop &&
	  NOT_SEL_ARR_IF_rg_way_in_cset_3_THEN_rg_new_cs_ETC___d420)
	$display("%0d: %m.rl_flush_loop: done; -> FSM_IDLE", v__h15511);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	  rg_cset_in_cache == 6'd63 &&
	  rg_way_in_cset &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 rg_va,
		 rg_va[11:6],
		 rg_va[11:3]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	  rg_cset_in_cache == 6'd63 &&
	  rg_way_in_cset &&
	  verbosity != 3'd0)
	begin
	  v__h16816 = $stime;
	  #0;
	end
    v__h16810 = v__h16816 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	  rg_cset_in_cache == 6'd63 &&
	  rg_way_in_cset &&
	  verbosity != 3'd0)
	$display("%0d: %m.rl_flush_writeback_sequel; flush loop done; -> FSM_IDLE",
		 v__h16810);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	  (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) &&
	  verbosity != 3'd0)
	begin
	  v__h16886 = $stime;
	  #0;
	end
    v__h16880 = v__h16886 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_flush_loop_writeback_sequel &&
	  (rg_cset_in_cache != 6'd63 || !rg_way_in_cset) &&
	  verbosity != 3'd0)
	$display("%0d: %m.rl_flush_writeback_sequel; continue", v__h16880);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	begin
	  v__h17190 = $stime;
	  #0;
	end
    v__h17184 = v__h17190 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("%0d: %m.rl_downgrade_req_from_L2_A", v__h17184);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    Save rg_va             = %0h", rg_va);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    Save rg_pa             = %0h", rg_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    Save rg_cset_in_cache  = %0h", rg_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    Save rg_cword_in_cline = %0h", rg_cword_in_cline);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    Save rg_way_in_cset    = %0h", rg_way_in_cset);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write("    Probe RAMs for: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write("L2_to_L1_Req { ", "addr: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write("'h%h", f_L2_to_L1_reqs$D_OUT[65:2]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write(", ", "to_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd1 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write(" }");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A && verbosity != 3'd0)
	$display("    -> FSM_DOWNGRADE_B");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_A &&
	  NOT_verbosity_ULT_2_2___d23)
	$display("    fa_req_rams_A %0h cset_in_cache %0h, cset_cword_in_cache %0h",
		 f_L2_to_L1_reqs$D_OUT[65:2],
		 f_L2_to_L1_reqs$D_OUT[13:8],
		 f_L2_to_L1_reqs$D_OUT[13:5]);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	begin
	  v__h18345 = $stime;
	  #0;
	end
    v__h18339 = v__h18345 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$display("%0d: %m.rl_downgrade_req_from_L2_B", v__h18339);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("    ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("CSet [%0h] (state, tag)\n", rg_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd1 &&
	  ram_cset_meta$DOA[53:52] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd0)
	$write(", ctag %0h (= pa %0h)", ram_cset_meta$DOA[51:0], pa__h18494);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd1 &&
	  ram_cset_meta$DOA[107:106] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       ram_cset_meta$DOA[105:54],
	       pa__h18473);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("    valid_info = ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("Valid_Info { ", "num_valids: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("'h%h", valid_info_num_valids__h18714);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write(", ", "valid_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd1 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write(", ", "data: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("'h%h", valid_info_data__h18716);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write(", ", "way: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("'h%h",
	       ram_cset_meta$DOA[107:106] != 2'd0 &&
	       ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460,
	       " }");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B && verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$display("    INTERNAL ERROR pa %0h", rg_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$display("    # of valids in set: %0d    (should be 0 or 1)",
		 valid_info_num_valids__h18714);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$write("CSet [%0h] (state, tag)\n", rg_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$write("        way %0d: ", $signed(32'd0));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] != 2'd0 &&
	  ram_cset_meta$DOA[53:52] != 2'd1 &&
	  ram_cset_meta$DOA[53:52] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[53:52] != 2'd0)
	$write(", ctag %0h (= pa %0h)", ram_cset_meta$DOA[51:0], pa__h18494);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$write("        way %0d: ", $signed(32'd1));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] != 2'd0 &&
	  ram_cset_meta$DOA[107:106] != 2'd1 &&
	  ram_cset_meta$DOA[107:106] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] == 2'd0)
	$write("");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582 &&
	  ram_cset_meta$DOA[107:106] != 2'd0)
	$write(", ctag %0h (= pa %0h)",
	       ram_cset_meta$DOA[105:54],
	       pa__h18473);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  NOT_IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_ETC___d582)
	$finish(32'd1);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 == 2'd0 &&
	  verbosity != 3'd0)
	$display("    MISS (= INVALID already); ignoring; -> FSM_DOWNGRADE_C");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0)
	$write("    Update meta state to ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd1 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    fa_cache_writeback_loop_prequel @ %0h (cset %0h, way %0h)",
		 cline_pa__h32506,
		 rg_cset_in_cache,
		 ram_cset_meta$DOA[107:106] != 2'd0 &&
		 ram_cset_meta_a_read__8_BITS_105_TO_54_0_EQ_rg_ETC___d460);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 == 2'd3 &&
	  verbosity != 3'd0)
	$display("    -> FSM_WRITEBACK_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write("    Send ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write("L1_to_L2_Rsp { ", "addr: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write("'h%h", rg_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write(", ", "to_state: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd0)
	$write("INVALID");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd1)
	$write("SHARED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] == 2'd2)
	$write("EXCLUSIVE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd0 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd1 &&
	  f_L2_to_L1_reqs$D_OUT[1:0] != 2'd2)
	$write("MODIFIED");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write(", ", "m_cline: ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write("tagged Invalid ", "");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write(" }");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_B &&
	  valid_info_num_valids__h18714 != 2'd0 &&
	  IF_NOT_ram_cset_meta_a_read__8_BITS_107_TO_106_ETC___d469 != 2'd3 &&
	  verbosity != 3'd0)
	$write(" -> FSM_DOWNGRADE_C", "\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	begin
	  v__h33137 = $stime;
	  #0;
	end
    v__h33131 = v__h33137 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("%0d: %m.rl_downgrade_req_from_L2_C", v__h33131);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    writeback done; restore and reprobe RAMs");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$write("    rg_fsm_state      <= ");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd0)
	$write("FSM_INITIALIZE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd1)
	$write("FSM_IDLE");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd2)
	$write("FSM_REPLACE_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd3)
	$write("FSM_WRITEBACK_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd4)
	$write("FSM_REFILL_START");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd5)
	$write("FSM_UPGRADE_REFILL");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd6)
	$write("FSM_REFILL_FINAL_DELAY");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd7)
	$write("FSM_DOWNGRADE_B");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd8)
	$write("FSM_DOWNGRADE_C");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state == 4'd9)
	$write("FSM_FLUSH_LOOP");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0 &&
	  rg_save_fsm_state != 4'd0 &&
	  rg_save_fsm_state != 4'd1 &&
	  rg_save_fsm_state != 4'd2 &&
	  rg_save_fsm_state != 4'd3 &&
	  rg_save_fsm_state != 4'd4 &&
	  rg_save_fsm_state != 4'd5 &&
	  rg_save_fsm_state != 4'd6 &&
	  rg_save_fsm_state != 4'd7 &&
	  rg_save_fsm_state != 4'd8 &&
	  rg_save_fsm_state != 4'd9)
	$write("FSM_FLUSH_LOOP_WRITEBACK_SEQUEL");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$write("\n");
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    rg_va             <= %0h", rg_save_va);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    rg_pa             <= %0h", rg_save_pa);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    rg_cset_in_cache  <= %0h", rg_save_cset_in_cache);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    rg_cword_in_cline <= %0h", rg_save_cword_in_cline);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_downgrade_req_from_L2_C && verbosity != 3'd0)
	$display("    rg_way_in_cset    <= %0h", rg_save_way_in_cset);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63)
	begin
	  v__h34418 = $stime;
	  #0;
	end
    v__h34412 = v__h34418 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63)
	$display("%0d: INFO: %m.rl_initialize", v__h34412);
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63)
	$display("    Size %0d KB, Associativity %0d, CLine size %0d bytes (= %0d XLEN words)",
		 $signed(32'd8),
		 $signed(32'd2),
		 $signed(32'd64),
		 $signed(32'd8));
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63 &&
	  verbosity != 3'd0)
	begin
	  v__h34518 = $stime;
	  #0;
	end
    v__h34512 = v__h34518 / 32'd10;
    if (RST_N != `BSV_RESET_VALUE)
      if (WILL_FIRE_RL_rl_initialize && rg_cset_in_cache == 6'd63 &&
	  verbosity != 3'd0)
	$display("    All clines (%0d sets %0d ways) initialized to INVALID",
		 v__h34512,
		 $signed(32'd64),
		 $signed(32'd2));
  end
  // synopsys translate_on
endmodule  // mkCache

