
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_22272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:66816*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66816*0 + 3*0*FLEN/8, x4, x1, x2)

inst_22273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:66819*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66819*0 + 3*1*FLEN/8, x4, x1, x2)

inst_22274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:66822*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66822*0 + 3*2*FLEN/8, x4, x1, x2)

inst_22275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:66825*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66825*0 + 3*3*FLEN/8, x4, x1, x2)

inst_22276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:66828*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66828*0 + 3*4*FLEN/8, x4, x1, x2)

inst_22277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:66831*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66831*0 + 3*5*FLEN/8, x4, x1, x2)

inst_22278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:66834*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66834*0 + 3*6*FLEN/8, x4, x1, x2)

inst_22279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:66837*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66837*0 + 3*7*FLEN/8, x4, x1, x2)

inst_22280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:66840*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66840*0 + 3*8*FLEN/8, x4, x1, x2)

inst_22281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d000000; valaddr_reg:x3; val_offset:66843*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66843*0 + 3*9*FLEN/8, x4, x1, x2)

inst_22282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d000001; valaddr_reg:x3; val_offset:66846*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66846*0 + 3*10*FLEN/8, x4, x1, x2)

inst_22283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d000003; valaddr_reg:x3; val_offset:66849*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66849*0 + 3*11*FLEN/8, x4, x1, x2)

inst_22284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d000007; valaddr_reg:x3; val_offset:66852*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66852*0 + 3*12*FLEN/8, x4, x1, x2)

inst_22285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d00000f; valaddr_reg:x3; val_offset:66855*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66855*0 + 3*13*FLEN/8, x4, x1, x2)

inst_22286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d00001f; valaddr_reg:x3; val_offset:66858*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66858*0 + 3*14*FLEN/8, x4, x1, x2)

inst_22287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d00003f; valaddr_reg:x3; val_offset:66861*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66861*0 + 3*15*FLEN/8, x4, x1, x2)

inst_22288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d00007f; valaddr_reg:x3; val_offset:66864*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66864*0 + 3*16*FLEN/8, x4, x1, x2)

inst_22289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d0000ff; valaddr_reg:x3; val_offset:66867*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66867*0 + 3*17*FLEN/8, x4, x1, x2)

inst_22290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d0001ff; valaddr_reg:x3; val_offset:66870*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66870*0 + 3*18*FLEN/8, x4, x1, x2)

inst_22291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d0003ff; valaddr_reg:x3; val_offset:66873*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66873*0 + 3*19*FLEN/8, x4, x1, x2)

inst_22292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d0007ff; valaddr_reg:x3; val_offset:66876*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66876*0 + 3*20*FLEN/8, x4, x1, x2)

inst_22293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d000fff; valaddr_reg:x3; val_offset:66879*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66879*0 + 3*21*FLEN/8, x4, x1, x2)

inst_22294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d001fff; valaddr_reg:x3; val_offset:66882*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66882*0 + 3*22*FLEN/8, x4, x1, x2)

inst_22295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d003fff; valaddr_reg:x3; val_offset:66885*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66885*0 + 3*23*FLEN/8, x4, x1, x2)

inst_22296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d007fff; valaddr_reg:x3; val_offset:66888*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66888*0 + 3*24*FLEN/8, x4, x1, x2)

inst_22297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d00ffff; valaddr_reg:x3; val_offset:66891*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66891*0 + 3*25*FLEN/8, x4, x1, x2)

inst_22298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d01ffff; valaddr_reg:x3; val_offset:66894*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66894*0 + 3*26*FLEN/8, x4, x1, x2)

inst_22299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d03ffff; valaddr_reg:x3; val_offset:66897*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66897*0 + 3*27*FLEN/8, x4, x1, x2)

inst_22300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d07ffff; valaddr_reg:x3; val_offset:66900*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66900*0 + 3*28*FLEN/8, x4, x1, x2)

inst_22301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d0fffff; valaddr_reg:x3; val_offset:66903*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66903*0 + 3*29*FLEN/8, x4, x1, x2)

inst_22302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d1fffff; valaddr_reg:x3; val_offset:66906*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66906*0 + 3*30*FLEN/8, x4, x1, x2)

inst_22303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d3fffff; valaddr_reg:x3; val_offset:66909*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66909*0 + 3*31*FLEN/8, x4, x1, x2)

inst_22304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d400000; valaddr_reg:x3; val_offset:66912*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66912*0 + 3*32*FLEN/8, x4, x1, x2)

inst_22305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d600000; valaddr_reg:x3; val_offset:66915*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66915*0 + 3*33*FLEN/8, x4, x1, x2)

inst_22306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d700000; valaddr_reg:x3; val_offset:66918*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66918*0 + 3*34*FLEN/8, x4, x1, x2)

inst_22307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d780000; valaddr_reg:x3; val_offset:66921*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66921*0 + 3*35*FLEN/8, x4, x1, x2)

inst_22308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7c0000; valaddr_reg:x3; val_offset:66924*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66924*0 + 3*36*FLEN/8, x4, x1, x2)

inst_22309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7e0000; valaddr_reg:x3; val_offset:66927*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66927*0 + 3*37*FLEN/8, x4, x1, x2)

inst_22310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7f0000; valaddr_reg:x3; val_offset:66930*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66930*0 + 3*38*FLEN/8, x4, x1, x2)

inst_22311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7f8000; valaddr_reg:x3; val_offset:66933*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66933*0 + 3*39*FLEN/8, x4, x1, x2)

inst_22312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fc000; valaddr_reg:x3; val_offset:66936*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66936*0 + 3*40*FLEN/8, x4, x1, x2)

inst_22313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fe000; valaddr_reg:x3; val_offset:66939*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66939*0 + 3*41*FLEN/8, x4, x1, x2)

inst_22314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ff000; valaddr_reg:x3; val_offset:66942*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66942*0 + 3*42*FLEN/8, x4, x1, x2)

inst_22315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ff800; valaddr_reg:x3; val_offset:66945*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66945*0 + 3*43*FLEN/8, x4, x1, x2)

inst_22316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:66948*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66948*0 + 3*44*FLEN/8, x4, x1, x2)

inst_22317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:66951*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66951*0 + 3*45*FLEN/8, x4, x1, x2)

inst_22318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fff00; valaddr_reg:x3; val_offset:66954*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66954*0 + 3*46*FLEN/8, x4, x1, x2)

inst_22319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fff80; valaddr_reg:x3; val_offset:66957*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66957*0 + 3*47*FLEN/8, x4, x1, x2)

inst_22320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:66960*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66960*0 + 3*48*FLEN/8, x4, x1, x2)

inst_22321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:66963*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66963*0 + 3*49*FLEN/8, x4, x1, x2)

inst_22322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:66966*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66966*0 + 3*50*FLEN/8, x4, x1, x2)

inst_22323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:66969*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66969*0 + 3*51*FLEN/8, x4, x1, x2)

inst_22324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:66972*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66972*0 + 3*52*FLEN/8, x4, x1, x2)

inst_22325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:66975*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66975*0 + 3*53*FLEN/8, x4, x1, x2)

inst_22326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000;
op3val:0x8d7fffff; valaddr_reg:x3; val_offset:66978*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66978*0 + 3*54*FLEN/8, x4, x1, x2)

inst_22327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0800000; valaddr_reg:x3; val_offset:66981*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66981*0 + 3*55*FLEN/8, x4, x1, x2)

inst_22328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0800001; valaddr_reg:x3; val_offset:66984*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66984*0 + 3*56*FLEN/8, x4, x1, x2)

inst_22329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0800003; valaddr_reg:x3; val_offset:66987*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66987*0 + 3*57*FLEN/8, x4, x1, x2)

inst_22330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0800007; valaddr_reg:x3; val_offset:66990*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66990*0 + 3*58*FLEN/8, x4, x1, x2)

inst_22331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa080000f; valaddr_reg:x3; val_offset:66993*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66993*0 + 3*59*FLEN/8, x4, x1, x2)

inst_22332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa080001f; valaddr_reg:x3; val_offset:66996*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66996*0 + 3*60*FLEN/8, x4, x1, x2)

inst_22333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa080003f; valaddr_reg:x3; val_offset:66999*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66999*0 + 3*61*FLEN/8, x4, x1, x2)

inst_22334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa080007f; valaddr_reg:x3; val_offset:67002*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67002*0 + 3*62*FLEN/8, x4, x1, x2)

inst_22335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa08000ff; valaddr_reg:x3; val_offset:67005*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67005*0 + 3*63*FLEN/8, x4, x1, x2)

inst_22336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa08001ff; valaddr_reg:x3; val_offset:67008*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67008*0 + 3*64*FLEN/8, x4, x1, x2)

inst_22337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa08003ff; valaddr_reg:x3; val_offset:67011*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67011*0 + 3*65*FLEN/8, x4, x1, x2)

inst_22338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa08007ff; valaddr_reg:x3; val_offset:67014*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67014*0 + 3*66*FLEN/8, x4, x1, x2)

inst_22339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0800fff; valaddr_reg:x3; val_offset:67017*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67017*0 + 3*67*FLEN/8, x4, x1, x2)

inst_22340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0801fff; valaddr_reg:x3; val_offset:67020*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67020*0 + 3*68*FLEN/8, x4, x1, x2)

inst_22341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0803fff; valaddr_reg:x3; val_offset:67023*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67023*0 + 3*69*FLEN/8, x4, x1, x2)

inst_22342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0807fff; valaddr_reg:x3; val_offset:67026*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67026*0 + 3*70*FLEN/8, x4, x1, x2)

inst_22343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa080ffff; valaddr_reg:x3; val_offset:67029*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67029*0 + 3*71*FLEN/8, x4, x1, x2)

inst_22344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa081ffff; valaddr_reg:x3; val_offset:67032*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67032*0 + 3*72*FLEN/8, x4, x1, x2)

inst_22345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa083ffff; valaddr_reg:x3; val_offset:67035*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67035*0 + 3*73*FLEN/8, x4, x1, x2)

inst_22346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa087ffff; valaddr_reg:x3; val_offset:67038*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67038*0 + 3*74*FLEN/8, x4, x1, x2)

inst_22347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa08fffff; valaddr_reg:x3; val_offset:67041*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67041*0 + 3*75*FLEN/8, x4, x1, x2)

inst_22348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa09fffff; valaddr_reg:x3; val_offset:67044*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67044*0 + 3*76*FLEN/8, x4, x1, x2)

inst_22349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0bfffff; valaddr_reg:x3; val_offset:67047*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67047*0 + 3*77*FLEN/8, x4, x1, x2)

inst_22350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0c00000; valaddr_reg:x3; val_offset:67050*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67050*0 + 3*78*FLEN/8, x4, x1, x2)

inst_22351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0e00000; valaddr_reg:x3; val_offset:67053*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67053*0 + 3*79*FLEN/8, x4, x1, x2)

inst_22352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0f00000; valaddr_reg:x3; val_offset:67056*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67056*0 + 3*80*FLEN/8, x4, x1, x2)

inst_22353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0f80000; valaddr_reg:x3; val_offset:67059*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67059*0 + 3*81*FLEN/8, x4, x1, x2)

inst_22354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fc0000; valaddr_reg:x3; val_offset:67062*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67062*0 + 3*82*FLEN/8, x4, x1, x2)

inst_22355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fe0000; valaddr_reg:x3; val_offset:67065*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67065*0 + 3*83*FLEN/8, x4, x1, x2)

inst_22356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ff0000; valaddr_reg:x3; val_offset:67068*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67068*0 + 3*84*FLEN/8, x4, x1, x2)

inst_22357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ff8000; valaddr_reg:x3; val_offset:67071*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67071*0 + 3*85*FLEN/8, x4, x1, x2)

inst_22358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffc000; valaddr_reg:x3; val_offset:67074*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67074*0 + 3*86*FLEN/8, x4, x1, x2)

inst_22359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffe000; valaddr_reg:x3; val_offset:67077*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67077*0 + 3*87*FLEN/8, x4, x1, x2)

inst_22360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fff000; valaddr_reg:x3; val_offset:67080*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67080*0 + 3*88*FLEN/8, x4, x1, x2)

inst_22361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fff800; valaddr_reg:x3; val_offset:67083*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67083*0 + 3*89*FLEN/8, x4, x1, x2)

inst_22362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffc00; valaddr_reg:x3; val_offset:67086*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67086*0 + 3*90*FLEN/8, x4, x1, x2)

inst_22363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffe00; valaddr_reg:x3; val_offset:67089*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67089*0 + 3*91*FLEN/8, x4, x1, x2)

inst_22364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffff00; valaddr_reg:x3; val_offset:67092*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67092*0 + 3*92*FLEN/8, x4, x1, x2)

inst_22365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffff80; valaddr_reg:x3; val_offset:67095*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67095*0 + 3*93*FLEN/8, x4, x1, x2)

inst_22366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffffc0; valaddr_reg:x3; val_offset:67098*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67098*0 + 3*94*FLEN/8, x4, x1, x2)

inst_22367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffffe0; valaddr_reg:x3; val_offset:67101*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67101*0 + 3*95*FLEN/8, x4, x1, x2)

inst_22368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffff0; valaddr_reg:x3; val_offset:67104*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67104*0 + 3*96*FLEN/8, x4, x1, x2)

inst_22369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffff8; valaddr_reg:x3; val_offset:67107*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67107*0 + 3*97*FLEN/8, x4, x1, x2)

inst_22370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffffc; valaddr_reg:x3; val_offset:67110*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67110*0 + 3*98*FLEN/8, x4, x1, x2)

inst_22371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0fffffe; valaddr_reg:x3; val_offset:67113*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67113*0 + 3*99*FLEN/8, x4, x1, x2)

inst_22372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xa0ffffff; valaddr_reg:x3; val_offset:67116*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67116*0 + 3*100*FLEN/8, x4, x1, x2)

inst_22373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbf800001; valaddr_reg:x3; val_offset:67119*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67119*0 + 3*101*FLEN/8, x4, x1, x2)

inst_22374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbf800003; valaddr_reg:x3; val_offset:67122*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67122*0 + 3*102*FLEN/8, x4, x1, x2)

inst_22375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbf800007; valaddr_reg:x3; val_offset:67125*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67125*0 + 3*103*FLEN/8, x4, x1, x2)

inst_22376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbf999999; valaddr_reg:x3; val_offset:67128*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67128*0 + 3*104*FLEN/8, x4, x1, x2)

inst_22377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:67131*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67131*0 + 3*105*FLEN/8, x4, x1, x2)

inst_22378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:67134*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67134*0 + 3*106*FLEN/8, x4, x1, x2)

inst_22379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67137*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67137*0 + 3*107*FLEN/8, x4, x1, x2)

inst_22380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67140*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67140*0 + 3*108*FLEN/8, x4, x1, x2)

inst_22381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:67143*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67143*0 + 3*109*FLEN/8, x4, x1, x2)

inst_22382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67146*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67146*0 + 3*110*FLEN/8, x4, x1, x2)

inst_22383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67149*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67149*0 + 3*111*FLEN/8, x4, x1, x2)

inst_22384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:67152*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67152*0 + 3*112*FLEN/8, x4, x1, x2)

inst_22385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67155*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67155*0 + 3*113*FLEN/8, x4, x1, x2)

inst_22386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:67158*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67158*0 + 3*114*FLEN/8, x4, x1, x2)

inst_22387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:67161*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67161*0 + 3*115*FLEN/8, x4, x1, x2)

inst_22388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:67164*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67164*0 + 3*116*FLEN/8, x4, x1, x2)

inst_22389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c000000; valaddr_reg:x3; val_offset:67167*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67167*0 + 3*117*FLEN/8, x4, x1, x2)

inst_22390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c000001; valaddr_reg:x3; val_offset:67170*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67170*0 + 3*118*FLEN/8, x4, x1, x2)

inst_22391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c000003; valaddr_reg:x3; val_offset:67173*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67173*0 + 3*119*FLEN/8, x4, x1, x2)

inst_22392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c000007; valaddr_reg:x3; val_offset:67176*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67176*0 + 3*120*FLEN/8, x4, x1, x2)

inst_22393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c00000f; valaddr_reg:x3; val_offset:67179*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67179*0 + 3*121*FLEN/8, x4, x1, x2)

inst_22394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c00001f; valaddr_reg:x3; val_offset:67182*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67182*0 + 3*122*FLEN/8, x4, x1, x2)

inst_22395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c00003f; valaddr_reg:x3; val_offset:67185*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67185*0 + 3*123*FLEN/8, x4, x1, x2)

inst_22396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c00007f; valaddr_reg:x3; val_offset:67188*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67188*0 + 3*124*FLEN/8, x4, x1, x2)

inst_22397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c0000ff; valaddr_reg:x3; val_offset:67191*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67191*0 + 3*125*FLEN/8, x4, x1, x2)

inst_22398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c0001ff; valaddr_reg:x3; val_offset:67194*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67194*0 + 3*126*FLEN/8, x4, x1, x2)

inst_22399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c0003ff; valaddr_reg:x3; val_offset:67197*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67197*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_22400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c0007ff; valaddr_reg:x3; val_offset:67200*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67200*0 + 3*128*FLEN/8, x4, x1, x2)

inst_22401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c000fff; valaddr_reg:x3; val_offset:67203*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67203*0 + 3*129*FLEN/8, x4, x1, x2)

inst_22402:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c001fff; valaddr_reg:x3; val_offset:67206*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67206*0 + 3*130*FLEN/8, x4, x1, x2)

inst_22403:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c003fff; valaddr_reg:x3; val_offset:67209*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67209*0 + 3*131*FLEN/8, x4, x1, x2)

inst_22404:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c007fff; valaddr_reg:x3; val_offset:67212*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67212*0 + 3*132*FLEN/8, x4, x1, x2)

inst_22405:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c00ffff; valaddr_reg:x3; val_offset:67215*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67215*0 + 3*133*FLEN/8, x4, x1, x2)

inst_22406:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c01ffff; valaddr_reg:x3; val_offset:67218*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67218*0 + 3*134*FLEN/8, x4, x1, x2)

inst_22407:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c03ffff; valaddr_reg:x3; val_offset:67221*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67221*0 + 3*135*FLEN/8, x4, x1, x2)

inst_22408:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c07ffff; valaddr_reg:x3; val_offset:67224*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67224*0 + 3*136*FLEN/8, x4, x1, x2)

inst_22409:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c0fffff; valaddr_reg:x3; val_offset:67227*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67227*0 + 3*137*FLEN/8, x4, x1, x2)

inst_22410:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c1fffff; valaddr_reg:x3; val_offset:67230*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67230*0 + 3*138*FLEN/8, x4, x1, x2)

inst_22411:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c3fffff; valaddr_reg:x3; val_offset:67233*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67233*0 + 3*139*FLEN/8, x4, x1, x2)

inst_22412:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c400000; valaddr_reg:x3; val_offset:67236*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67236*0 + 3*140*FLEN/8, x4, x1, x2)

inst_22413:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c600000; valaddr_reg:x3; val_offset:67239*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67239*0 + 3*141*FLEN/8, x4, x1, x2)

inst_22414:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c700000; valaddr_reg:x3; val_offset:67242*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67242*0 + 3*142*FLEN/8, x4, x1, x2)

inst_22415:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c780000; valaddr_reg:x3; val_offset:67245*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67245*0 + 3*143*FLEN/8, x4, x1, x2)

inst_22416:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7c0000; valaddr_reg:x3; val_offset:67248*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67248*0 + 3*144*FLEN/8, x4, x1, x2)

inst_22417:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7e0000; valaddr_reg:x3; val_offset:67251*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67251*0 + 3*145*FLEN/8, x4, x1, x2)

inst_22418:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7f0000; valaddr_reg:x3; val_offset:67254*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67254*0 + 3*146*FLEN/8, x4, x1, x2)

inst_22419:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7f8000; valaddr_reg:x3; val_offset:67257*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67257*0 + 3*147*FLEN/8, x4, x1, x2)

inst_22420:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fc000; valaddr_reg:x3; val_offset:67260*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67260*0 + 3*148*FLEN/8, x4, x1, x2)

inst_22421:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fe000; valaddr_reg:x3; val_offset:67263*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67263*0 + 3*149*FLEN/8, x4, x1, x2)

inst_22422:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ff000; valaddr_reg:x3; val_offset:67266*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67266*0 + 3*150*FLEN/8, x4, x1, x2)

inst_22423:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ff800; valaddr_reg:x3; val_offset:67269*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67269*0 + 3*151*FLEN/8, x4, x1, x2)

inst_22424:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffc00; valaddr_reg:x3; val_offset:67272*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67272*0 + 3*152*FLEN/8, x4, x1, x2)

inst_22425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffe00; valaddr_reg:x3; val_offset:67275*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67275*0 + 3*153*FLEN/8, x4, x1, x2)

inst_22426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fff00; valaddr_reg:x3; val_offset:67278*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67278*0 + 3*154*FLEN/8, x4, x1, x2)

inst_22427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fff80; valaddr_reg:x3; val_offset:67281*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67281*0 + 3*155*FLEN/8, x4, x1, x2)

inst_22428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fffc0; valaddr_reg:x3; val_offset:67284*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67284*0 + 3*156*FLEN/8, x4, x1, x2)

inst_22429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fffe0; valaddr_reg:x3; val_offset:67287*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67287*0 + 3*157*FLEN/8, x4, x1, x2)

inst_22430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffff0; valaddr_reg:x3; val_offset:67290*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67290*0 + 3*158*FLEN/8, x4, x1, x2)

inst_22431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffff8; valaddr_reg:x3; val_offset:67293*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67293*0 + 3*159*FLEN/8, x4, x1, x2)

inst_22432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffffc; valaddr_reg:x3; val_offset:67296*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67296*0 + 3*160*FLEN/8, x4, x1, x2)

inst_22433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7ffffe; valaddr_reg:x3; val_offset:67299*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67299*0 + 3*161*FLEN/8, x4, x1, x2)

inst_22434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7c7fffff; valaddr_reg:x3; val_offset:67302*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67302*0 + 3*162*FLEN/8, x4, x1, x2)

inst_22435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f000001; valaddr_reg:x3; val_offset:67305*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67305*0 + 3*163*FLEN/8, x4, x1, x2)

inst_22436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f000003; valaddr_reg:x3; val_offset:67308*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67308*0 + 3*164*FLEN/8, x4, x1, x2)

inst_22437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f000007; valaddr_reg:x3; val_offset:67311*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67311*0 + 3*165*FLEN/8, x4, x1, x2)

inst_22438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f199999; valaddr_reg:x3; val_offset:67314*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67314*0 + 3*166*FLEN/8, x4, x1, x2)

inst_22439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f249249; valaddr_reg:x3; val_offset:67317*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67317*0 + 3*167*FLEN/8, x4, x1, x2)

inst_22440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f333333; valaddr_reg:x3; val_offset:67320*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67320*0 + 3*168*FLEN/8, x4, x1, x2)

inst_22441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67323*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67323*0 + 3*169*FLEN/8, x4, x1, x2)

inst_22442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67326*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67326*0 + 3*170*FLEN/8, x4, x1, x2)

inst_22443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f444444; valaddr_reg:x3; val_offset:67329*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67329*0 + 3*171*FLEN/8, x4, x1, x2)

inst_22444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67332*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67332*0 + 3*172*FLEN/8, x4, x1, x2)

inst_22445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67335*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67335*0 + 3*173*FLEN/8, x4, x1, x2)

inst_22446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f666666; valaddr_reg:x3; val_offset:67338*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67338*0 + 3*174*FLEN/8, x4, x1, x2)

inst_22447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67341*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67341*0 + 3*175*FLEN/8, x4, x1, x2)

inst_22448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67344*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67344*0 + 3*176*FLEN/8, x4, x1, x2)

inst_22449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67347*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67347*0 + 3*177*FLEN/8, x4, x1, x2)

inst_22450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67350*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67350*0 + 3*178*FLEN/8, x4, x1, x2)

inst_22451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71800000; valaddr_reg:x3; val_offset:67353*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67353*0 + 3*179*FLEN/8, x4, x1, x2)

inst_22452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71800001; valaddr_reg:x3; val_offset:67356*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67356*0 + 3*180*FLEN/8, x4, x1, x2)

inst_22453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71800003; valaddr_reg:x3; val_offset:67359*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67359*0 + 3*181*FLEN/8, x4, x1, x2)

inst_22454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71800007; valaddr_reg:x3; val_offset:67362*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67362*0 + 3*182*FLEN/8, x4, x1, x2)

inst_22455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7180000f; valaddr_reg:x3; val_offset:67365*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67365*0 + 3*183*FLEN/8, x4, x1, x2)

inst_22456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7180001f; valaddr_reg:x3; val_offset:67368*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67368*0 + 3*184*FLEN/8, x4, x1, x2)

inst_22457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7180003f; valaddr_reg:x3; val_offset:67371*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67371*0 + 3*185*FLEN/8, x4, x1, x2)

inst_22458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7180007f; valaddr_reg:x3; val_offset:67374*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67374*0 + 3*186*FLEN/8, x4, x1, x2)

inst_22459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x718000ff; valaddr_reg:x3; val_offset:67377*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67377*0 + 3*187*FLEN/8, x4, x1, x2)

inst_22460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x718001ff; valaddr_reg:x3; val_offset:67380*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67380*0 + 3*188*FLEN/8, x4, x1, x2)

inst_22461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x718003ff; valaddr_reg:x3; val_offset:67383*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67383*0 + 3*189*FLEN/8, x4, x1, x2)

inst_22462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x718007ff; valaddr_reg:x3; val_offset:67386*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67386*0 + 3*190*FLEN/8, x4, x1, x2)

inst_22463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71800fff; valaddr_reg:x3; val_offset:67389*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67389*0 + 3*191*FLEN/8, x4, x1, x2)

inst_22464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71801fff; valaddr_reg:x3; val_offset:67392*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67392*0 + 3*192*FLEN/8, x4, x1, x2)

inst_22465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71803fff; valaddr_reg:x3; val_offset:67395*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67395*0 + 3*193*FLEN/8, x4, x1, x2)

inst_22466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71807fff; valaddr_reg:x3; val_offset:67398*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67398*0 + 3*194*FLEN/8, x4, x1, x2)

inst_22467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7180ffff; valaddr_reg:x3; val_offset:67401*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67401*0 + 3*195*FLEN/8, x4, x1, x2)

inst_22468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7181ffff; valaddr_reg:x3; val_offset:67404*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67404*0 + 3*196*FLEN/8, x4, x1, x2)

inst_22469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7183ffff; valaddr_reg:x3; val_offset:67407*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67407*0 + 3*197*FLEN/8, x4, x1, x2)

inst_22470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7187ffff; valaddr_reg:x3; val_offset:67410*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67410*0 + 3*198*FLEN/8, x4, x1, x2)

inst_22471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x718fffff; valaddr_reg:x3; val_offset:67413*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67413*0 + 3*199*FLEN/8, x4, x1, x2)

inst_22472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x719fffff; valaddr_reg:x3; val_offset:67416*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67416*0 + 3*200*FLEN/8, x4, x1, x2)

inst_22473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71bfffff; valaddr_reg:x3; val_offset:67419*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67419*0 + 3*201*FLEN/8, x4, x1, x2)

inst_22474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71c00000; valaddr_reg:x3; val_offset:67422*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67422*0 + 3*202*FLEN/8, x4, x1, x2)

inst_22475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71e00000; valaddr_reg:x3; val_offset:67425*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67425*0 + 3*203*FLEN/8, x4, x1, x2)

inst_22476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71f00000; valaddr_reg:x3; val_offset:67428*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67428*0 + 3*204*FLEN/8, x4, x1, x2)

inst_22477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71f80000; valaddr_reg:x3; val_offset:67431*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67431*0 + 3*205*FLEN/8, x4, x1, x2)

inst_22478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fc0000; valaddr_reg:x3; val_offset:67434*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67434*0 + 3*206*FLEN/8, x4, x1, x2)

inst_22479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fe0000; valaddr_reg:x3; val_offset:67437*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67437*0 + 3*207*FLEN/8, x4, x1, x2)

inst_22480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ff0000; valaddr_reg:x3; val_offset:67440*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67440*0 + 3*208*FLEN/8, x4, x1, x2)

inst_22481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ff8000; valaddr_reg:x3; val_offset:67443*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67443*0 + 3*209*FLEN/8, x4, x1, x2)

inst_22482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffc000; valaddr_reg:x3; val_offset:67446*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67446*0 + 3*210*FLEN/8, x4, x1, x2)

inst_22483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffe000; valaddr_reg:x3; val_offset:67449*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67449*0 + 3*211*FLEN/8, x4, x1, x2)

inst_22484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fff000; valaddr_reg:x3; val_offset:67452*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67452*0 + 3*212*FLEN/8, x4, x1, x2)

inst_22485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fff800; valaddr_reg:x3; val_offset:67455*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67455*0 + 3*213*FLEN/8, x4, x1, x2)

inst_22486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffc00; valaddr_reg:x3; val_offset:67458*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67458*0 + 3*214*FLEN/8, x4, x1, x2)

inst_22487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffe00; valaddr_reg:x3; val_offset:67461*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67461*0 + 3*215*FLEN/8, x4, x1, x2)

inst_22488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffff00; valaddr_reg:x3; val_offset:67464*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67464*0 + 3*216*FLEN/8, x4, x1, x2)

inst_22489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffff80; valaddr_reg:x3; val_offset:67467*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67467*0 + 3*217*FLEN/8, x4, x1, x2)

inst_22490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffffc0; valaddr_reg:x3; val_offset:67470*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67470*0 + 3*218*FLEN/8, x4, x1, x2)

inst_22491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffffe0; valaddr_reg:x3; val_offset:67473*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67473*0 + 3*219*FLEN/8, x4, x1, x2)

inst_22492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffff0; valaddr_reg:x3; val_offset:67476*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67476*0 + 3*220*FLEN/8, x4, x1, x2)

inst_22493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffff8; valaddr_reg:x3; val_offset:67479*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67479*0 + 3*221*FLEN/8, x4, x1, x2)

inst_22494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffffc; valaddr_reg:x3; val_offset:67482*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67482*0 + 3*222*FLEN/8, x4, x1, x2)

inst_22495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71fffffe; valaddr_reg:x3; val_offset:67485*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67485*0 + 3*223*FLEN/8, x4, x1, x2)

inst_22496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x71ffffff; valaddr_reg:x3; val_offset:67488*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67488*0 + 3*224*FLEN/8, x4, x1, x2)

inst_22497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f000001; valaddr_reg:x3; val_offset:67491*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67491*0 + 3*225*FLEN/8, x4, x1, x2)

inst_22498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f000003; valaddr_reg:x3; val_offset:67494*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67494*0 + 3*226*FLEN/8, x4, x1, x2)

inst_22499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f000007; valaddr_reg:x3; val_offset:67497*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67497*0 + 3*227*FLEN/8, x4, x1, x2)

inst_22500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f199999; valaddr_reg:x3; val_offset:67500*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67500*0 + 3*228*FLEN/8, x4, x1, x2)

inst_22501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f249249; valaddr_reg:x3; val_offset:67503*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67503*0 + 3*229*FLEN/8, x4, x1, x2)

inst_22502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f333333; valaddr_reg:x3; val_offset:67506*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67506*0 + 3*230*FLEN/8, x4, x1, x2)

inst_22503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67509*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67509*0 + 3*231*FLEN/8, x4, x1, x2)

inst_22504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67512*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67512*0 + 3*232*FLEN/8, x4, x1, x2)

inst_22505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f444444; valaddr_reg:x3; val_offset:67515*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67515*0 + 3*233*FLEN/8, x4, x1, x2)

inst_22506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67518*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67518*0 + 3*234*FLEN/8, x4, x1, x2)

inst_22507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67521*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67521*0 + 3*235*FLEN/8, x4, x1, x2)

inst_22508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f666666; valaddr_reg:x3; val_offset:67524*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67524*0 + 3*236*FLEN/8, x4, x1, x2)

inst_22509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67527*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67527*0 + 3*237*FLEN/8, x4, x1, x2)

inst_22510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67530*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67530*0 + 3*238*FLEN/8, x4, x1, x2)

inst_22511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67533*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67533*0 + 3*239*FLEN/8, x4, x1, x2)

inst_22512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67536*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67536*0 + 3*240*FLEN/8, x4, x1, x2)

inst_22513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4800000; valaddr_reg:x3; val_offset:67539*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67539*0 + 3*241*FLEN/8, x4, x1, x2)

inst_22514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4800001; valaddr_reg:x3; val_offset:67542*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67542*0 + 3*242*FLEN/8, x4, x1, x2)

inst_22515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4800003; valaddr_reg:x3; val_offset:67545*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67545*0 + 3*243*FLEN/8, x4, x1, x2)

inst_22516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4800007; valaddr_reg:x3; val_offset:67548*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67548*0 + 3*244*FLEN/8, x4, x1, x2)

inst_22517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa480000f; valaddr_reg:x3; val_offset:67551*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67551*0 + 3*245*FLEN/8, x4, x1, x2)

inst_22518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa480001f; valaddr_reg:x3; val_offset:67554*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67554*0 + 3*246*FLEN/8, x4, x1, x2)

inst_22519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa480003f; valaddr_reg:x3; val_offset:67557*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67557*0 + 3*247*FLEN/8, x4, x1, x2)

inst_22520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa480007f; valaddr_reg:x3; val_offset:67560*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67560*0 + 3*248*FLEN/8, x4, x1, x2)

inst_22521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa48000ff; valaddr_reg:x3; val_offset:67563*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67563*0 + 3*249*FLEN/8, x4, x1, x2)

inst_22522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa48001ff; valaddr_reg:x3; val_offset:67566*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67566*0 + 3*250*FLEN/8, x4, x1, x2)

inst_22523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa48003ff; valaddr_reg:x3; val_offset:67569*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67569*0 + 3*251*FLEN/8, x4, x1, x2)

inst_22524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa48007ff; valaddr_reg:x3; val_offset:67572*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67572*0 + 3*252*FLEN/8, x4, x1, x2)

inst_22525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4800fff; valaddr_reg:x3; val_offset:67575*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67575*0 + 3*253*FLEN/8, x4, x1, x2)

inst_22526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4801fff; valaddr_reg:x3; val_offset:67578*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67578*0 + 3*254*FLEN/8, x4, x1, x2)

inst_22527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4803fff; valaddr_reg:x3; val_offset:67581*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67581*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_22528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4807fff; valaddr_reg:x3; val_offset:67584*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67584*0 + 3*256*FLEN/8, x4, x1, x2)

inst_22529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa480ffff; valaddr_reg:x3; val_offset:67587*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67587*0 + 3*257*FLEN/8, x4, x1, x2)

inst_22530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa481ffff; valaddr_reg:x3; val_offset:67590*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67590*0 + 3*258*FLEN/8, x4, x1, x2)

inst_22531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa483ffff; valaddr_reg:x3; val_offset:67593*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67593*0 + 3*259*FLEN/8, x4, x1, x2)

inst_22532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa487ffff; valaddr_reg:x3; val_offset:67596*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67596*0 + 3*260*FLEN/8, x4, x1, x2)

inst_22533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa48fffff; valaddr_reg:x3; val_offset:67599*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67599*0 + 3*261*FLEN/8, x4, x1, x2)

inst_22534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa49fffff; valaddr_reg:x3; val_offset:67602*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67602*0 + 3*262*FLEN/8, x4, x1, x2)

inst_22535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4bfffff; valaddr_reg:x3; val_offset:67605*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67605*0 + 3*263*FLEN/8, x4, x1, x2)

inst_22536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4c00000; valaddr_reg:x3; val_offset:67608*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67608*0 + 3*264*FLEN/8, x4, x1, x2)

inst_22537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4e00000; valaddr_reg:x3; val_offset:67611*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67611*0 + 3*265*FLEN/8, x4, x1, x2)

inst_22538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4f00000; valaddr_reg:x3; val_offset:67614*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67614*0 + 3*266*FLEN/8, x4, x1, x2)

inst_22539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4f80000; valaddr_reg:x3; val_offset:67617*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67617*0 + 3*267*FLEN/8, x4, x1, x2)

inst_22540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fc0000; valaddr_reg:x3; val_offset:67620*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67620*0 + 3*268*FLEN/8, x4, x1, x2)

inst_22541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fe0000; valaddr_reg:x3; val_offset:67623*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67623*0 + 3*269*FLEN/8, x4, x1, x2)

inst_22542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ff0000; valaddr_reg:x3; val_offset:67626*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67626*0 + 3*270*FLEN/8, x4, x1, x2)

inst_22543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ff8000; valaddr_reg:x3; val_offset:67629*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67629*0 + 3*271*FLEN/8, x4, x1, x2)

inst_22544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffc000; valaddr_reg:x3; val_offset:67632*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67632*0 + 3*272*FLEN/8, x4, x1, x2)

inst_22545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffe000; valaddr_reg:x3; val_offset:67635*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67635*0 + 3*273*FLEN/8, x4, x1, x2)

inst_22546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fff000; valaddr_reg:x3; val_offset:67638*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67638*0 + 3*274*FLEN/8, x4, x1, x2)

inst_22547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fff800; valaddr_reg:x3; val_offset:67641*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67641*0 + 3*275*FLEN/8, x4, x1, x2)

inst_22548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffc00; valaddr_reg:x3; val_offset:67644*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67644*0 + 3*276*FLEN/8, x4, x1, x2)

inst_22549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffe00; valaddr_reg:x3; val_offset:67647*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67647*0 + 3*277*FLEN/8, x4, x1, x2)

inst_22550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffff00; valaddr_reg:x3; val_offset:67650*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67650*0 + 3*278*FLEN/8, x4, x1, x2)

inst_22551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffff80; valaddr_reg:x3; val_offset:67653*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67653*0 + 3*279*FLEN/8, x4, x1, x2)

inst_22552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffffc0; valaddr_reg:x3; val_offset:67656*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67656*0 + 3*280*FLEN/8, x4, x1, x2)

inst_22553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffffe0; valaddr_reg:x3; val_offset:67659*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67659*0 + 3*281*FLEN/8, x4, x1, x2)

inst_22554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffff0; valaddr_reg:x3; val_offset:67662*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67662*0 + 3*282*FLEN/8, x4, x1, x2)

inst_22555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffff8; valaddr_reg:x3; val_offset:67665*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67665*0 + 3*283*FLEN/8, x4, x1, x2)

inst_22556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffffc; valaddr_reg:x3; val_offset:67668*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67668*0 + 3*284*FLEN/8, x4, x1, x2)

inst_22557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4fffffe; valaddr_reg:x3; val_offset:67671*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67671*0 + 3*285*FLEN/8, x4, x1, x2)

inst_22558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xa4ffffff; valaddr_reg:x3; val_offset:67674*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67674*0 + 3*286*FLEN/8, x4, x1, x2)

inst_22559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbf800001; valaddr_reg:x3; val_offset:67677*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67677*0 + 3*287*FLEN/8, x4, x1, x2)

inst_22560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbf800003; valaddr_reg:x3; val_offset:67680*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67680*0 + 3*288*FLEN/8, x4, x1, x2)

inst_22561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbf800007; valaddr_reg:x3; val_offset:67683*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67683*0 + 3*289*FLEN/8, x4, x1, x2)

inst_22562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbf999999; valaddr_reg:x3; val_offset:67686*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67686*0 + 3*290*FLEN/8, x4, x1, x2)

inst_22563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:67689*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67689*0 + 3*291*FLEN/8, x4, x1, x2)

inst_22564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:67692*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67692*0 + 3*292*FLEN/8, x4, x1, x2)

inst_22565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67695*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67695*0 + 3*293*FLEN/8, x4, x1, x2)

inst_22566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67698*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67698*0 + 3*294*FLEN/8, x4, x1, x2)

inst_22567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:67701*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67701*0 + 3*295*FLEN/8, x4, x1, x2)

inst_22568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67704*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67704*0 + 3*296*FLEN/8, x4, x1, x2)

inst_22569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67707*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67707*0 + 3*297*FLEN/8, x4, x1, x2)

inst_22570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:67710*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67710*0 + 3*298*FLEN/8, x4, x1, x2)

inst_22571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67713*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67713*0 + 3*299*FLEN/8, x4, x1, x2)

inst_22572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:67716*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67716*0 + 3*300*FLEN/8, x4, x1, x2)

inst_22573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:67719*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67719*0 + 3*301*FLEN/8, x4, x1, x2)

inst_22574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:67722*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67722*0 + 3*302*FLEN/8, x4, x1, x2)

inst_22575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800000; valaddr_reg:x3; val_offset:67725*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67725*0 + 3*303*FLEN/8, x4, x1, x2)

inst_22576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800001; valaddr_reg:x3; val_offset:67728*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67728*0 + 3*304*FLEN/8, x4, x1, x2)

inst_22577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800003; valaddr_reg:x3; val_offset:67731*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67731*0 + 3*305*FLEN/8, x4, x1, x2)

inst_22578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800007; valaddr_reg:x3; val_offset:67734*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67734*0 + 3*306*FLEN/8, x4, x1, x2)

inst_22579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880000f; valaddr_reg:x3; val_offset:67737*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67737*0 + 3*307*FLEN/8, x4, x1, x2)

inst_22580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880001f; valaddr_reg:x3; val_offset:67740*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67740*0 + 3*308*FLEN/8, x4, x1, x2)

inst_22581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880003f; valaddr_reg:x3; val_offset:67743*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67743*0 + 3*309*FLEN/8, x4, x1, x2)

inst_22582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880007f; valaddr_reg:x3; val_offset:67746*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67746*0 + 3*310*FLEN/8, x4, x1, x2)

inst_22583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88000ff; valaddr_reg:x3; val_offset:67749*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67749*0 + 3*311*FLEN/8, x4, x1, x2)

inst_22584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88001ff; valaddr_reg:x3; val_offset:67752*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67752*0 + 3*312*FLEN/8, x4, x1, x2)

inst_22585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88003ff; valaddr_reg:x3; val_offset:67755*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67755*0 + 3*313*FLEN/8, x4, x1, x2)

inst_22586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88007ff; valaddr_reg:x3; val_offset:67758*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67758*0 + 3*314*FLEN/8, x4, x1, x2)

inst_22587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8800fff; valaddr_reg:x3; val_offset:67761*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67761*0 + 3*315*FLEN/8, x4, x1, x2)

inst_22588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8801fff; valaddr_reg:x3; val_offset:67764*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67764*0 + 3*316*FLEN/8, x4, x1, x2)

inst_22589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8803fff; valaddr_reg:x3; val_offset:67767*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67767*0 + 3*317*FLEN/8, x4, x1, x2)

inst_22590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8807fff; valaddr_reg:x3; val_offset:67770*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67770*0 + 3*318*FLEN/8, x4, x1, x2)

inst_22591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf880ffff; valaddr_reg:x3; val_offset:67773*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67773*0 + 3*319*FLEN/8, x4, x1, x2)

inst_22592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf881ffff; valaddr_reg:x3; val_offset:67776*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67776*0 + 3*320*FLEN/8, x4, x1, x2)

inst_22593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf883ffff; valaddr_reg:x3; val_offset:67779*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67779*0 + 3*321*FLEN/8, x4, x1, x2)

inst_22594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf887ffff; valaddr_reg:x3; val_offset:67782*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67782*0 + 3*322*FLEN/8, x4, x1, x2)

inst_22595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf88fffff; valaddr_reg:x3; val_offset:67785*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67785*0 + 3*323*FLEN/8, x4, x1, x2)

inst_22596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf89fffff; valaddr_reg:x3; val_offset:67788*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67788*0 + 3*324*FLEN/8, x4, x1, x2)

inst_22597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8bfffff; valaddr_reg:x3; val_offset:67791*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67791*0 + 3*325*FLEN/8, x4, x1, x2)

inst_22598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8c00000; valaddr_reg:x3; val_offset:67794*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67794*0 + 3*326*FLEN/8, x4, x1, x2)

inst_22599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8e00000; valaddr_reg:x3; val_offset:67797*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67797*0 + 3*327*FLEN/8, x4, x1, x2)

inst_22600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8f00000; valaddr_reg:x3; val_offset:67800*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67800*0 + 3*328*FLEN/8, x4, x1, x2)

inst_22601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8f80000; valaddr_reg:x3; val_offset:67803*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67803*0 + 3*329*FLEN/8, x4, x1, x2)

inst_22602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fc0000; valaddr_reg:x3; val_offset:67806*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67806*0 + 3*330*FLEN/8, x4, x1, x2)

inst_22603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fe0000; valaddr_reg:x3; val_offset:67809*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67809*0 + 3*331*FLEN/8, x4, x1, x2)

inst_22604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ff0000; valaddr_reg:x3; val_offset:67812*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67812*0 + 3*332*FLEN/8, x4, x1, x2)

inst_22605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ff8000; valaddr_reg:x3; val_offset:67815*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67815*0 + 3*333*FLEN/8, x4, x1, x2)

inst_22606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffc000; valaddr_reg:x3; val_offset:67818*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67818*0 + 3*334*FLEN/8, x4, x1, x2)

inst_22607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffe000; valaddr_reg:x3; val_offset:67821*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67821*0 + 3*335*FLEN/8, x4, x1, x2)

inst_22608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fff000; valaddr_reg:x3; val_offset:67824*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67824*0 + 3*336*FLEN/8, x4, x1, x2)

inst_22609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fff800; valaddr_reg:x3; val_offset:67827*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67827*0 + 3*337*FLEN/8, x4, x1, x2)

inst_22610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffc00; valaddr_reg:x3; val_offset:67830*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67830*0 + 3*338*FLEN/8, x4, x1, x2)

inst_22611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffe00; valaddr_reg:x3; val_offset:67833*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67833*0 + 3*339*FLEN/8, x4, x1, x2)

inst_22612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffff00; valaddr_reg:x3; val_offset:67836*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67836*0 + 3*340*FLEN/8, x4, x1, x2)

inst_22613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffff80; valaddr_reg:x3; val_offset:67839*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67839*0 + 3*341*FLEN/8, x4, x1, x2)

inst_22614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffc0; valaddr_reg:x3; val_offset:67842*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67842*0 + 3*342*FLEN/8, x4, x1, x2)

inst_22615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffe0; valaddr_reg:x3; val_offset:67845*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67845*0 + 3*343*FLEN/8, x4, x1, x2)

inst_22616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffff0; valaddr_reg:x3; val_offset:67848*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67848*0 + 3*344*FLEN/8, x4, x1, x2)

inst_22617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffff8; valaddr_reg:x3; val_offset:67851*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67851*0 + 3*345*FLEN/8, x4, x1, x2)

inst_22618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffffc; valaddr_reg:x3; val_offset:67854*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67854*0 + 3*346*FLEN/8, x4, x1, x2)

inst_22619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8fffffe; valaddr_reg:x3; val_offset:67857*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67857*0 + 3*347*FLEN/8, x4, x1, x2)

inst_22620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xf8ffffff; valaddr_reg:x3; val_offset:67860*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67860*0 + 3*348*FLEN/8, x4, x1, x2)

inst_22621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000001; valaddr_reg:x3; val_offset:67863*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67863*0 + 3*349*FLEN/8, x4, x1, x2)

inst_22622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000003; valaddr_reg:x3; val_offset:67866*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67866*0 + 3*350*FLEN/8, x4, x1, x2)

inst_22623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff000007; valaddr_reg:x3; val_offset:67869*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67869*0 + 3*351*FLEN/8, x4, x1, x2)

inst_22624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff199999; valaddr_reg:x3; val_offset:67872*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67872*0 + 3*352*FLEN/8, x4, x1, x2)

inst_22625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff249249; valaddr_reg:x3; val_offset:67875*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67875*0 + 3*353*FLEN/8, x4, x1, x2)

inst_22626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff333333; valaddr_reg:x3; val_offset:67878*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67878*0 + 3*354*FLEN/8, x4, x1, x2)

inst_22627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:67881*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67881*0 + 3*355*FLEN/8, x4, x1, x2)

inst_22628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:67884*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67884*0 + 3*356*FLEN/8, x4, x1, x2)

inst_22629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff444444; valaddr_reg:x3; val_offset:67887*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67887*0 + 3*357*FLEN/8, x4, x1, x2)

inst_22630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:67890*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67890*0 + 3*358*FLEN/8, x4, x1, x2)

inst_22631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:67893*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67893*0 + 3*359*FLEN/8, x4, x1, x2)

inst_22632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff666666; valaddr_reg:x3; val_offset:67896*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67896*0 + 3*360*FLEN/8, x4, x1, x2)

inst_22633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:67899*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67899*0 + 3*361*FLEN/8, x4, x1, x2)

inst_22634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:67902*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67902*0 + 3*362*FLEN/8, x4, x1, x2)

inst_22635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:67905*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67905*0 + 3*363*FLEN/8, x4, x1, x2)

inst_22636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:67908*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67908*0 + 3*364*FLEN/8, x4, x1, x2)

inst_22637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:67911*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67911*0 + 3*365*FLEN/8, x4, x1, x2)

inst_22638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:67914*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67914*0 + 3*366*FLEN/8, x4, x1, x2)

inst_22639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:67917*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67917*0 + 3*367*FLEN/8, x4, x1, x2)

inst_22640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:67920*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67920*0 + 3*368*FLEN/8, x4, x1, x2)

inst_22641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:67923*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67923*0 + 3*369*FLEN/8, x4, x1, x2)

inst_22642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:67926*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67926*0 + 3*370*FLEN/8, x4, x1, x2)

inst_22643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:67929*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67929*0 + 3*371*FLEN/8, x4, x1, x2)

inst_22644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:67932*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67932*0 + 3*372*FLEN/8, x4, x1, x2)

inst_22645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:67935*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67935*0 + 3*373*FLEN/8, x4, x1, x2)

inst_22646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:67938*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67938*0 + 3*374*FLEN/8, x4, x1, x2)

inst_22647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:67941*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67941*0 + 3*375*FLEN/8, x4, x1, x2)

inst_22648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:67944*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67944*0 + 3*376*FLEN/8, x4, x1, x2)

inst_22649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:67947*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67947*0 + 3*377*FLEN/8, x4, x1, x2)

inst_22650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:67950*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67950*0 + 3*378*FLEN/8, x4, x1, x2)

inst_22651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:67953*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67953*0 + 3*379*FLEN/8, x4, x1, x2)

inst_22652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:67956*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67956*0 + 3*380*FLEN/8, x4, x1, x2)

inst_22653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f000000; valaddr_reg:x3; val_offset:67959*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67959*0 + 3*381*FLEN/8, x4, x1, x2)

inst_22654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f000001; valaddr_reg:x3; val_offset:67962*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67962*0 + 3*382*FLEN/8, x4, x1, x2)

inst_22655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f000003; valaddr_reg:x3; val_offset:67965*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67965*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_22656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f000007; valaddr_reg:x3; val_offset:67968*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67968*0 + 3*384*FLEN/8, x4, x1, x2)

inst_22657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f00000f; valaddr_reg:x3; val_offset:67971*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67971*0 + 3*385*FLEN/8, x4, x1, x2)

inst_22658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f00001f; valaddr_reg:x3; val_offset:67974*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67974*0 + 3*386*FLEN/8, x4, x1, x2)

inst_22659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f00003f; valaddr_reg:x3; val_offset:67977*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67977*0 + 3*387*FLEN/8, x4, x1, x2)

inst_22660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f00007f; valaddr_reg:x3; val_offset:67980*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67980*0 + 3*388*FLEN/8, x4, x1, x2)

inst_22661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f0000ff; valaddr_reg:x3; val_offset:67983*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67983*0 + 3*389*FLEN/8, x4, x1, x2)

inst_22662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f0001ff; valaddr_reg:x3; val_offset:67986*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67986*0 + 3*390*FLEN/8, x4, x1, x2)

inst_22663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f0003ff; valaddr_reg:x3; val_offset:67989*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67989*0 + 3*391*FLEN/8, x4, x1, x2)

inst_22664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f0007ff; valaddr_reg:x3; val_offset:67992*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67992*0 + 3*392*FLEN/8, x4, x1, x2)

inst_22665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f000fff; valaddr_reg:x3; val_offset:67995*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67995*0 + 3*393*FLEN/8, x4, x1, x2)

inst_22666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f001fff; valaddr_reg:x3; val_offset:67998*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67998*0 + 3*394*FLEN/8, x4, x1, x2)

inst_22667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f003fff; valaddr_reg:x3; val_offset:68001*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68001*0 + 3*395*FLEN/8, x4, x1, x2)

inst_22668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f007fff; valaddr_reg:x3; val_offset:68004*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68004*0 + 3*396*FLEN/8, x4, x1, x2)

inst_22669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f00ffff; valaddr_reg:x3; val_offset:68007*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68007*0 + 3*397*FLEN/8, x4, x1, x2)

inst_22670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f01ffff; valaddr_reg:x3; val_offset:68010*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68010*0 + 3*398*FLEN/8, x4, x1, x2)

inst_22671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f03ffff; valaddr_reg:x3; val_offset:68013*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68013*0 + 3*399*FLEN/8, x4, x1, x2)

inst_22672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f07ffff; valaddr_reg:x3; val_offset:68016*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68016*0 + 3*400*FLEN/8, x4, x1, x2)

inst_22673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f0fffff; valaddr_reg:x3; val_offset:68019*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68019*0 + 3*401*FLEN/8, x4, x1, x2)

inst_22674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f1fffff; valaddr_reg:x3; val_offset:68022*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68022*0 + 3*402*FLEN/8, x4, x1, x2)

inst_22675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f3fffff; valaddr_reg:x3; val_offset:68025*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68025*0 + 3*403*FLEN/8, x4, x1, x2)

inst_22676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f400000; valaddr_reg:x3; val_offset:68028*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68028*0 + 3*404*FLEN/8, x4, x1, x2)

inst_22677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f600000; valaddr_reg:x3; val_offset:68031*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68031*0 + 3*405*FLEN/8, x4, x1, x2)

inst_22678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f700000; valaddr_reg:x3; val_offset:68034*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68034*0 + 3*406*FLEN/8, x4, x1, x2)

inst_22679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f780000; valaddr_reg:x3; val_offset:68037*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68037*0 + 3*407*FLEN/8, x4, x1, x2)

inst_22680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7c0000; valaddr_reg:x3; val_offset:68040*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68040*0 + 3*408*FLEN/8, x4, x1, x2)

inst_22681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7e0000; valaddr_reg:x3; val_offset:68043*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68043*0 + 3*409*FLEN/8, x4, x1, x2)

inst_22682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7f0000; valaddr_reg:x3; val_offset:68046*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68046*0 + 3*410*FLEN/8, x4, x1, x2)

inst_22683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7f8000; valaddr_reg:x3; val_offset:68049*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68049*0 + 3*411*FLEN/8, x4, x1, x2)

inst_22684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fc000; valaddr_reg:x3; val_offset:68052*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68052*0 + 3*412*FLEN/8, x4, x1, x2)

inst_22685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fe000; valaddr_reg:x3; val_offset:68055*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68055*0 + 3*413*FLEN/8, x4, x1, x2)

inst_22686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ff000; valaddr_reg:x3; val_offset:68058*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68058*0 + 3*414*FLEN/8, x4, x1, x2)

inst_22687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ff800; valaddr_reg:x3; val_offset:68061*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68061*0 + 3*415*FLEN/8, x4, x1, x2)

inst_22688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:68064*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68064*0 + 3*416*FLEN/8, x4, x1, x2)

inst_22689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:68067*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68067*0 + 3*417*FLEN/8, x4, x1, x2)

inst_22690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fff00; valaddr_reg:x3; val_offset:68070*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68070*0 + 3*418*FLEN/8, x4, x1, x2)

inst_22691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fff80; valaddr_reg:x3; val_offset:68073*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68073*0 + 3*419*FLEN/8, x4, x1, x2)

inst_22692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:68076*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68076*0 + 3*420*FLEN/8, x4, x1, x2)

inst_22693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:68079*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68079*0 + 3*421*FLEN/8, x4, x1, x2)

inst_22694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:68082*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68082*0 + 3*422*FLEN/8, x4, x1, x2)

inst_22695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:68085*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68085*0 + 3*423*FLEN/8, x4, x1, x2)

inst_22696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:68088*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68088*0 + 3*424*FLEN/8, x4, x1, x2)

inst_22697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:68091*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68091*0 + 3*425*FLEN/8, x4, x1, x2)

inst_22698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000;
op3val:0x8f7fffff; valaddr_reg:x3; val_offset:68094*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68094*0 + 3*426*FLEN/8, x4, x1, x2)

inst_22699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:68097*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68097*0 + 3*427*FLEN/8, x4, x1, x2)

inst_22700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:68100*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68100*0 + 3*428*FLEN/8, x4, x1, x2)

inst_22701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:68103*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68103*0 + 3*429*FLEN/8, x4, x1, x2)

inst_22702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:68106*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68106*0 + 3*430*FLEN/8, x4, x1, x2)

inst_22703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:68109*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68109*0 + 3*431*FLEN/8, x4, x1, x2)

inst_22704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:68112*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68112*0 + 3*432*FLEN/8, x4, x1, x2)

inst_22705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:68115*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68115*0 + 3*433*FLEN/8, x4, x1, x2)

inst_22706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68118*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68118*0 + 3*434*FLEN/8, x4, x1, x2)

inst_22707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:68121*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68121*0 + 3*435*FLEN/8, x4, x1, x2)

inst_22708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:68124*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68124*0 + 3*436*FLEN/8, x4, x1, x2)

inst_22709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:68127*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68127*0 + 3*437*FLEN/8, x4, x1, x2)

inst_22710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:68130*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68130*0 + 3*438*FLEN/8, x4, x1, x2)

inst_22711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:68133*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68133*0 + 3*439*FLEN/8, x4, x1, x2)

inst_22712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:68136*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68136*0 + 3*440*FLEN/8, x4, x1, x2)

inst_22713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:68139*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68139*0 + 3*441*FLEN/8, x4, x1, x2)

inst_22714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:68142*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68142*0 + 3*442*FLEN/8, x4, x1, x2)

inst_22715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e000000; valaddr_reg:x3; val_offset:68145*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68145*0 + 3*443*FLEN/8, x4, x1, x2)

inst_22716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e000001; valaddr_reg:x3; val_offset:68148*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68148*0 + 3*444*FLEN/8, x4, x1, x2)

inst_22717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e000003; valaddr_reg:x3; val_offset:68151*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68151*0 + 3*445*FLEN/8, x4, x1, x2)

inst_22718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e000007; valaddr_reg:x3; val_offset:68154*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68154*0 + 3*446*FLEN/8, x4, x1, x2)

inst_22719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e00000f; valaddr_reg:x3; val_offset:68157*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68157*0 + 3*447*FLEN/8, x4, x1, x2)

inst_22720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e00001f; valaddr_reg:x3; val_offset:68160*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68160*0 + 3*448*FLEN/8, x4, x1, x2)

inst_22721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e00003f; valaddr_reg:x3; val_offset:68163*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68163*0 + 3*449*FLEN/8, x4, x1, x2)

inst_22722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e00007f; valaddr_reg:x3; val_offset:68166*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68166*0 + 3*450*FLEN/8, x4, x1, x2)

inst_22723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e0000ff; valaddr_reg:x3; val_offset:68169*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68169*0 + 3*451*FLEN/8, x4, x1, x2)

inst_22724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e0001ff; valaddr_reg:x3; val_offset:68172*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68172*0 + 3*452*FLEN/8, x4, x1, x2)

inst_22725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e0003ff; valaddr_reg:x3; val_offset:68175*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68175*0 + 3*453*FLEN/8, x4, x1, x2)

inst_22726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e0007ff; valaddr_reg:x3; val_offset:68178*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68178*0 + 3*454*FLEN/8, x4, x1, x2)

inst_22727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e000fff; valaddr_reg:x3; val_offset:68181*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68181*0 + 3*455*FLEN/8, x4, x1, x2)

inst_22728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e001fff; valaddr_reg:x3; val_offset:68184*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68184*0 + 3*456*FLEN/8, x4, x1, x2)

inst_22729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e003fff; valaddr_reg:x3; val_offset:68187*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68187*0 + 3*457*FLEN/8, x4, x1, x2)

inst_22730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e007fff; valaddr_reg:x3; val_offset:68190*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68190*0 + 3*458*FLEN/8, x4, x1, x2)

inst_22731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e00ffff; valaddr_reg:x3; val_offset:68193*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68193*0 + 3*459*FLEN/8, x4, x1, x2)

inst_22732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e01ffff; valaddr_reg:x3; val_offset:68196*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68196*0 + 3*460*FLEN/8, x4, x1, x2)

inst_22733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e03ffff; valaddr_reg:x3; val_offset:68199*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68199*0 + 3*461*FLEN/8, x4, x1, x2)

inst_22734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e07ffff; valaddr_reg:x3; val_offset:68202*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68202*0 + 3*462*FLEN/8, x4, x1, x2)

inst_22735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e0fffff; valaddr_reg:x3; val_offset:68205*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68205*0 + 3*463*FLEN/8, x4, x1, x2)

inst_22736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e1fffff; valaddr_reg:x3; val_offset:68208*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68208*0 + 3*464*FLEN/8, x4, x1, x2)

inst_22737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e3fffff; valaddr_reg:x3; val_offset:68211*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68211*0 + 3*465*FLEN/8, x4, x1, x2)

inst_22738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e400000; valaddr_reg:x3; val_offset:68214*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68214*0 + 3*466*FLEN/8, x4, x1, x2)

inst_22739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e600000; valaddr_reg:x3; val_offset:68217*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68217*0 + 3*467*FLEN/8, x4, x1, x2)

inst_22740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e700000; valaddr_reg:x3; val_offset:68220*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68220*0 + 3*468*FLEN/8, x4, x1, x2)

inst_22741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e780000; valaddr_reg:x3; val_offset:68223*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68223*0 + 3*469*FLEN/8, x4, x1, x2)

inst_22742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7c0000; valaddr_reg:x3; val_offset:68226*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68226*0 + 3*470*FLEN/8, x4, x1, x2)

inst_22743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7e0000; valaddr_reg:x3; val_offset:68229*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68229*0 + 3*471*FLEN/8, x4, x1, x2)

inst_22744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7f0000; valaddr_reg:x3; val_offset:68232*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68232*0 + 3*472*FLEN/8, x4, x1, x2)

inst_22745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7f8000; valaddr_reg:x3; val_offset:68235*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68235*0 + 3*473*FLEN/8, x4, x1, x2)

inst_22746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fc000; valaddr_reg:x3; val_offset:68238*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68238*0 + 3*474*FLEN/8, x4, x1, x2)

inst_22747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fe000; valaddr_reg:x3; val_offset:68241*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68241*0 + 3*475*FLEN/8, x4, x1, x2)

inst_22748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ff000; valaddr_reg:x3; val_offset:68244*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68244*0 + 3*476*FLEN/8, x4, x1, x2)

inst_22749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ff800; valaddr_reg:x3; val_offset:68247*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68247*0 + 3*477*FLEN/8, x4, x1, x2)

inst_22750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:68250*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68250*0 + 3*478*FLEN/8, x4, x1, x2)

inst_22751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:68253*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68253*0 + 3*479*FLEN/8, x4, x1, x2)

inst_22752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fff00; valaddr_reg:x3; val_offset:68256*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68256*0 + 3*480*FLEN/8, x4, x1, x2)

inst_22753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fff80; valaddr_reg:x3; val_offset:68259*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68259*0 + 3*481*FLEN/8, x4, x1, x2)

inst_22754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:68262*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68262*0 + 3*482*FLEN/8, x4, x1, x2)

inst_22755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:68265*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68265*0 + 3*483*FLEN/8, x4, x1, x2)

inst_22756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:68268*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68268*0 + 3*484*FLEN/8, x4, x1, x2)

inst_22757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:68271*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68271*0 + 3*485*FLEN/8, x4, x1, x2)

inst_22758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:68274*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68274*0 + 3*486*FLEN/8, x4, x1, x2)

inst_22759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:68277*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68277*0 + 3*487*FLEN/8, x4, x1, x2)

inst_22760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000;
op3val:0x8e7fffff; valaddr_reg:x3; val_offset:68280*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68280*0 + 3*488*FLEN/8, x4, x1, x2)

inst_22761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3f800001; valaddr_reg:x3; val_offset:68283*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68283*0 + 3*489*FLEN/8, x4, x1, x2)

inst_22762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3f800003; valaddr_reg:x3; val_offset:68286*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68286*0 + 3*490*FLEN/8, x4, x1, x2)

inst_22763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3f800007; valaddr_reg:x3; val_offset:68289*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68289*0 + 3*491*FLEN/8, x4, x1, x2)

inst_22764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3f999999; valaddr_reg:x3; val_offset:68292*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68292*0 + 3*492*FLEN/8, x4, x1, x2)

inst_22765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:68295*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68295*0 + 3*493*FLEN/8, x4, x1, x2)

inst_22766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:68298*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68298*0 + 3*494*FLEN/8, x4, x1, x2)

inst_22767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:68301*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68301*0 + 3*495*FLEN/8, x4, x1, x2)

inst_22768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:68304*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68304*0 + 3*496*FLEN/8, x4, x1, x2)

inst_22769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:68307*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68307*0 + 3*497*FLEN/8, x4, x1, x2)

inst_22770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:68310*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68310*0 + 3*498*FLEN/8, x4, x1, x2)

inst_22771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:68313*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68313*0 + 3*499*FLEN/8, x4, x1, x2)

inst_22772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:68316*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68316*0 + 3*500*FLEN/8, x4, x1, x2)

inst_22773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:68319*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68319*0 + 3*501*FLEN/8, x4, x1, x2)

inst_22774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:68322*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68322*0 + 3*502*FLEN/8, x4, x1, x2)

inst_22775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:68325*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68325*0 + 3*503*FLEN/8, x4, x1, x2)

inst_22776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:68328*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68328*0 + 3*504*FLEN/8, x4, x1, x2)

inst_22777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40800000; valaddr_reg:x3; val_offset:68331*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68331*0 + 3*505*FLEN/8, x4, x1, x2)

inst_22778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40800001; valaddr_reg:x3; val_offset:68334*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68334*0 + 3*506*FLEN/8, x4, x1, x2)

inst_22779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40800003; valaddr_reg:x3; val_offset:68337*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68337*0 + 3*507*FLEN/8, x4, x1, x2)

inst_22780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40800007; valaddr_reg:x3; val_offset:68340*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68340*0 + 3*508*FLEN/8, x4, x1, x2)

inst_22781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4080000f; valaddr_reg:x3; val_offset:68343*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68343*0 + 3*509*FLEN/8, x4, x1, x2)

inst_22782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4080001f; valaddr_reg:x3; val_offset:68346*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68346*0 + 3*510*FLEN/8, x4, x1, x2)

inst_22783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4080003f; valaddr_reg:x3; val_offset:68349*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68349*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_22784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4080007f; valaddr_reg:x3; val_offset:68352*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68352*0 + 3*512*FLEN/8, x4, x1, x2)

inst_22785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x408000ff; valaddr_reg:x3; val_offset:68355*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68355*0 + 3*513*FLEN/8, x4, x1, x2)

inst_22786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x408001ff; valaddr_reg:x3; val_offset:68358*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68358*0 + 3*514*FLEN/8, x4, x1, x2)

inst_22787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x408003ff; valaddr_reg:x3; val_offset:68361*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68361*0 + 3*515*FLEN/8, x4, x1, x2)

inst_22788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x408007ff; valaddr_reg:x3; val_offset:68364*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68364*0 + 3*516*FLEN/8, x4, x1, x2)

inst_22789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40800fff; valaddr_reg:x3; val_offset:68367*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68367*0 + 3*517*FLEN/8, x4, x1, x2)

inst_22790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40801fff; valaddr_reg:x3; val_offset:68370*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68370*0 + 3*518*FLEN/8, x4, x1, x2)

inst_22791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40803fff; valaddr_reg:x3; val_offset:68373*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68373*0 + 3*519*FLEN/8, x4, x1, x2)

inst_22792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40807fff; valaddr_reg:x3; val_offset:68376*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68376*0 + 3*520*FLEN/8, x4, x1, x2)

inst_22793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4080ffff; valaddr_reg:x3; val_offset:68379*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68379*0 + 3*521*FLEN/8, x4, x1, x2)

inst_22794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4081ffff; valaddr_reg:x3; val_offset:68382*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68382*0 + 3*522*FLEN/8, x4, x1, x2)

inst_22795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4083ffff; valaddr_reg:x3; val_offset:68385*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68385*0 + 3*523*FLEN/8, x4, x1, x2)

inst_22796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x4087ffff; valaddr_reg:x3; val_offset:68388*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68388*0 + 3*524*FLEN/8, x4, x1, x2)

inst_22797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x408fffff; valaddr_reg:x3; val_offset:68391*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68391*0 + 3*525*FLEN/8, x4, x1, x2)

inst_22798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x409fffff; valaddr_reg:x3; val_offset:68394*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68394*0 + 3*526*FLEN/8, x4, x1, x2)

inst_22799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40bfffff; valaddr_reg:x3; val_offset:68397*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68397*0 + 3*527*FLEN/8, x4, x1, x2)

inst_22800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40c00000; valaddr_reg:x3; val_offset:68400*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68400*0 + 3*528*FLEN/8, x4, x1, x2)

inst_22801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40e00000; valaddr_reg:x3; val_offset:68403*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68403*0 + 3*529*FLEN/8, x4, x1, x2)

inst_22802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40f00000; valaddr_reg:x3; val_offset:68406*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68406*0 + 3*530*FLEN/8, x4, x1, x2)

inst_22803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40f80000; valaddr_reg:x3; val_offset:68409*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68409*0 + 3*531*FLEN/8, x4, x1, x2)

inst_22804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fc0000; valaddr_reg:x3; val_offset:68412*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68412*0 + 3*532*FLEN/8, x4, x1, x2)

inst_22805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fe0000; valaddr_reg:x3; val_offset:68415*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68415*0 + 3*533*FLEN/8, x4, x1, x2)

inst_22806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ff0000; valaddr_reg:x3; val_offset:68418*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68418*0 + 3*534*FLEN/8, x4, x1, x2)

inst_22807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ff8000; valaddr_reg:x3; val_offset:68421*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68421*0 + 3*535*FLEN/8, x4, x1, x2)

inst_22808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffc000; valaddr_reg:x3; val_offset:68424*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68424*0 + 3*536*FLEN/8, x4, x1, x2)

inst_22809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffe000; valaddr_reg:x3; val_offset:68427*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68427*0 + 3*537*FLEN/8, x4, x1, x2)

inst_22810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fff000; valaddr_reg:x3; val_offset:68430*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68430*0 + 3*538*FLEN/8, x4, x1, x2)

inst_22811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fff800; valaddr_reg:x3; val_offset:68433*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68433*0 + 3*539*FLEN/8, x4, x1, x2)

inst_22812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffc00; valaddr_reg:x3; val_offset:68436*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68436*0 + 3*540*FLEN/8, x4, x1, x2)

inst_22813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffe00; valaddr_reg:x3; val_offset:68439*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68439*0 + 3*541*FLEN/8, x4, x1, x2)

inst_22814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffff00; valaddr_reg:x3; val_offset:68442*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68442*0 + 3*542*FLEN/8, x4, x1, x2)

inst_22815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffff80; valaddr_reg:x3; val_offset:68445*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68445*0 + 3*543*FLEN/8, x4, x1, x2)

inst_22816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffffc0; valaddr_reg:x3; val_offset:68448*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68448*0 + 3*544*FLEN/8, x4, x1, x2)

inst_22817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffffe0; valaddr_reg:x3; val_offset:68451*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68451*0 + 3*545*FLEN/8, x4, x1, x2)

inst_22818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffff0; valaddr_reg:x3; val_offset:68454*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68454*0 + 3*546*FLEN/8, x4, x1, x2)

inst_22819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffff8; valaddr_reg:x3; val_offset:68457*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68457*0 + 3*547*FLEN/8, x4, x1, x2)

inst_22820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffffc; valaddr_reg:x3; val_offset:68460*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68460*0 + 3*548*FLEN/8, x4, x1, x2)

inst_22821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40fffffe; valaddr_reg:x3; val_offset:68463*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68463*0 + 3*549*FLEN/8, x4, x1, x2)

inst_22822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9;
op3val:0x40ffffff; valaddr_reg:x3; val_offset:68466*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68466*0 + 3*550*FLEN/8, x4, x1, x2)

inst_22823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65800000; valaddr_reg:x3; val_offset:68469*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68469*0 + 3*551*FLEN/8, x4, x1, x2)

inst_22824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65800001; valaddr_reg:x3; val_offset:68472*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68472*0 + 3*552*FLEN/8, x4, x1, x2)

inst_22825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65800003; valaddr_reg:x3; val_offset:68475*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68475*0 + 3*553*FLEN/8, x4, x1, x2)

inst_22826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65800007; valaddr_reg:x3; val_offset:68478*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68478*0 + 3*554*FLEN/8, x4, x1, x2)

inst_22827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6580000f; valaddr_reg:x3; val_offset:68481*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68481*0 + 3*555*FLEN/8, x4, x1, x2)

inst_22828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6580001f; valaddr_reg:x3; val_offset:68484*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68484*0 + 3*556*FLEN/8, x4, x1, x2)

inst_22829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6580003f; valaddr_reg:x3; val_offset:68487*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68487*0 + 3*557*FLEN/8, x4, x1, x2)

inst_22830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6580007f; valaddr_reg:x3; val_offset:68490*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68490*0 + 3*558*FLEN/8, x4, x1, x2)

inst_22831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x658000ff; valaddr_reg:x3; val_offset:68493*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68493*0 + 3*559*FLEN/8, x4, x1, x2)

inst_22832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x658001ff; valaddr_reg:x3; val_offset:68496*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68496*0 + 3*560*FLEN/8, x4, x1, x2)

inst_22833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x658003ff; valaddr_reg:x3; val_offset:68499*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68499*0 + 3*561*FLEN/8, x4, x1, x2)

inst_22834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x658007ff; valaddr_reg:x3; val_offset:68502*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68502*0 + 3*562*FLEN/8, x4, x1, x2)

inst_22835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65800fff; valaddr_reg:x3; val_offset:68505*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68505*0 + 3*563*FLEN/8, x4, x1, x2)

inst_22836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65801fff; valaddr_reg:x3; val_offset:68508*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68508*0 + 3*564*FLEN/8, x4, x1, x2)

inst_22837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65803fff; valaddr_reg:x3; val_offset:68511*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68511*0 + 3*565*FLEN/8, x4, x1, x2)

inst_22838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65807fff; valaddr_reg:x3; val_offset:68514*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68514*0 + 3*566*FLEN/8, x4, x1, x2)

inst_22839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6580ffff; valaddr_reg:x3; val_offset:68517*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68517*0 + 3*567*FLEN/8, x4, x1, x2)

inst_22840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6581ffff; valaddr_reg:x3; val_offset:68520*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68520*0 + 3*568*FLEN/8, x4, x1, x2)

inst_22841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6583ffff; valaddr_reg:x3; val_offset:68523*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68523*0 + 3*569*FLEN/8, x4, x1, x2)

inst_22842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x6587ffff; valaddr_reg:x3; val_offset:68526*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68526*0 + 3*570*FLEN/8, x4, x1, x2)

inst_22843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x658fffff; valaddr_reg:x3; val_offset:68529*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68529*0 + 3*571*FLEN/8, x4, x1, x2)

inst_22844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x659fffff; valaddr_reg:x3; val_offset:68532*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68532*0 + 3*572*FLEN/8, x4, x1, x2)

inst_22845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65bfffff; valaddr_reg:x3; val_offset:68535*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68535*0 + 3*573*FLEN/8, x4, x1, x2)

inst_22846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65c00000; valaddr_reg:x3; val_offset:68538*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68538*0 + 3*574*FLEN/8, x4, x1, x2)

inst_22847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65e00000; valaddr_reg:x3; val_offset:68541*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68541*0 + 3*575*FLEN/8, x4, x1, x2)

inst_22848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65f00000; valaddr_reg:x3; val_offset:68544*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68544*0 + 3*576*FLEN/8, x4, x1, x2)

inst_22849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65f80000; valaddr_reg:x3; val_offset:68547*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68547*0 + 3*577*FLEN/8, x4, x1, x2)

inst_22850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fc0000; valaddr_reg:x3; val_offset:68550*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68550*0 + 3*578*FLEN/8, x4, x1, x2)

inst_22851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fe0000; valaddr_reg:x3; val_offset:68553*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68553*0 + 3*579*FLEN/8, x4, x1, x2)

inst_22852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ff0000; valaddr_reg:x3; val_offset:68556*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68556*0 + 3*580*FLEN/8, x4, x1, x2)

inst_22853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ff8000; valaddr_reg:x3; val_offset:68559*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68559*0 + 3*581*FLEN/8, x4, x1, x2)

inst_22854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffc000; valaddr_reg:x3; val_offset:68562*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68562*0 + 3*582*FLEN/8, x4, x1, x2)

inst_22855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffe000; valaddr_reg:x3; val_offset:68565*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68565*0 + 3*583*FLEN/8, x4, x1, x2)

inst_22856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fff000; valaddr_reg:x3; val_offset:68568*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68568*0 + 3*584*FLEN/8, x4, x1, x2)

inst_22857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fff800; valaddr_reg:x3; val_offset:68571*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68571*0 + 3*585*FLEN/8, x4, x1, x2)

inst_22858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffc00; valaddr_reg:x3; val_offset:68574*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68574*0 + 3*586*FLEN/8, x4, x1, x2)

inst_22859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffe00; valaddr_reg:x3; val_offset:68577*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68577*0 + 3*587*FLEN/8, x4, x1, x2)

inst_22860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffff00; valaddr_reg:x3; val_offset:68580*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68580*0 + 3*588*FLEN/8, x4, x1, x2)

inst_22861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffff80; valaddr_reg:x3; val_offset:68583*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68583*0 + 3*589*FLEN/8, x4, x1, x2)

inst_22862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffffc0; valaddr_reg:x3; val_offset:68586*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68586*0 + 3*590*FLEN/8, x4, x1, x2)

inst_22863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffffe0; valaddr_reg:x3; val_offset:68589*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68589*0 + 3*591*FLEN/8, x4, x1, x2)

inst_22864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffff0; valaddr_reg:x3; val_offset:68592*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68592*0 + 3*592*FLEN/8, x4, x1, x2)

inst_22865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffff8; valaddr_reg:x3; val_offset:68595*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68595*0 + 3*593*FLEN/8, x4, x1, x2)

inst_22866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffffc; valaddr_reg:x3; val_offset:68598*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68598*0 + 3*594*FLEN/8, x4, x1, x2)

inst_22867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65fffffe; valaddr_reg:x3; val_offset:68601*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68601*0 + 3*595*FLEN/8, x4, x1, x2)

inst_22868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x65ffffff; valaddr_reg:x3; val_offset:68604*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68604*0 + 3*596*FLEN/8, x4, x1, x2)

inst_22869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f000001; valaddr_reg:x3; val_offset:68607*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68607*0 + 3*597*FLEN/8, x4, x1, x2)

inst_22870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f000003; valaddr_reg:x3; val_offset:68610*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68610*0 + 3*598*FLEN/8, x4, x1, x2)

inst_22871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f000007; valaddr_reg:x3; val_offset:68613*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68613*0 + 3*599*FLEN/8, x4, x1, x2)

inst_22872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f199999; valaddr_reg:x3; val_offset:68616*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68616*0 + 3*600*FLEN/8, x4, x1, x2)

inst_22873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f249249; valaddr_reg:x3; val_offset:68619*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68619*0 + 3*601*FLEN/8, x4, x1, x2)

inst_22874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f333333; valaddr_reg:x3; val_offset:68622*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68622*0 + 3*602*FLEN/8, x4, x1, x2)

inst_22875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68625*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68625*0 + 3*603*FLEN/8, x4, x1, x2)

inst_22876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:68628*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68628*0 + 3*604*FLEN/8, x4, x1, x2)

inst_22877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f444444; valaddr_reg:x3; val_offset:68631*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68631*0 + 3*605*FLEN/8, x4, x1, x2)

inst_22878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:68634*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68634*0 + 3*606*FLEN/8, x4, x1, x2)

inst_22879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:68637*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68637*0 + 3*607*FLEN/8, x4, x1, x2)

inst_22880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f666666; valaddr_reg:x3; val_offset:68640*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68640*0 + 3*608*FLEN/8, x4, x1, x2)

inst_22881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:68643*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68643*0 + 3*609*FLEN/8, x4, x1, x2)

inst_22882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:68646*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68646*0 + 3*610*FLEN/8, x4, x1, x2)

inst_22883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:68649*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68649*0 + 3*611*FLEN/8, x4, x1, x2)

inst_22884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:68652*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68652*0 + 3*612*FLEN/8, x4, x1, x2)

inst_22885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:68655*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68655*0 + 3*613*FLEN/8, x4, x1, x2)

inst_22886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:68658*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68658*0 + 3*614*FLEN/8, x4, x1, x2)

inst_22887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:68661*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68661*0 + 3*615*FLEN/8, x4, x1, x2)

inst_22888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:68664*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68664*0 + 3*616*FLEN/8, x4, x1, x2)

inst_22889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:68667*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68667*0 + 3*617*FLEN/8, x4, x1, x2)

inst_22890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:68670*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68670*0 + 3*618*FLEN/8, x4, x1, x2)

inst_22891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:68673*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68673*0 + 3*619*FLEN/8, x4, x1, x2)

inst_22892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68676*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68676*0 + 3*620*FLEN/8, x4, x1, x2)

inst_22893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:68679*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68679*0 + 3*621*FLEN/8, x4, x1, x2)

inst_22894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:68682*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68682*0 + 3*622*FLEN/8, x4, x1, x2)

inst_22895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:68685*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68685*0 + 3*623*FLEN/8, x4, x1, x2)

inst_22896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:68688*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68688*0 + 3*624*FLEN/8, x4, x1, x2)

inst_22897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:68691*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68691*0 + 3*625*FLEN/8, x4, x1, x2)

inst_22898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:68694*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68694*0 + 3*626*FLEN/8, x4, x1, x2)

inst_22899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:68697*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68697*0 + 3*627*FLEN/8, x4, x1, x2)

inst_22900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:68700*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68700*0 + 3*628*FLEN/8, x4, x1, x2)

inst_22901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82800000; valaddr_reg:x3; val_offset:68703*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68703*0 + 3*629*FLEN/8, x4, x1, x2)

inst_22902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82800001; valaddr_reg:x3; val_offset:68706*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68706*0 + 3*630*FLEN/8, x4, x1, x2)

inst_22903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82800003; valaddr_reg:x3; val_offset:68709*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68709*0 + 3*631*FLEN/8, x4, x1, x2)

inst_22904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82800007; valaddr_reg:x3; val_offset:68712*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68712*0 + 3*632*FLEN/8, x4, x1, x2)

inst_22905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8280000f; valaddr_reg:x3; val_offset:68715*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68715*0 + 3*633*FLEN/8, x4, x1, x2)

inst_22906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8280001f; valaddr_reg:x3; val_offset:68718*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68718*0 + 3*634*FLEN/8, x4, x1, x2)

inst_22907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8280003f; valaddr_reg:x3; val_offset:68721*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68721*0 + 3*635*FLEN/8, x4, x1, x2)

inst_22908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8280007f; valaddr_reg:x3; val_offset:68724*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68724*0 + 3*636*FLEN/8, x4, x1, x2)

inst_22909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x828000ff; valaddr_reg:x3; val_offset:68727*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68727*0 + 3*637*FLEN/8, x4, x1, x2)

inst_22910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x828001ff; valaddr_reg:x3; val_offset:68730*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68730*0 + 3*638*FLEN/8, x4, x1, x2)

inst_22911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x828003ff; valaddr_reg:x3; val_offset:68733*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68733*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_22912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x828007ff; valaddr_reg:x3; val_offset:68736*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68736*0 + 3*640*FLEN/8, x4, x1, x2)

inst_22913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82800fff; valaddr_reg:x3; val_offset:68739*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68739*0 + 3*641*FLEN/8, x4, x1, x2)

inst_22914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82801fff; valaddr_reg:x3; val_offset:68742*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68742*0 + 3*642*FLEN/8, x4, x1, x2)

inst_22915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82803fff; valaddr_reg:x3; val_offset:68745*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68745*0 + 3*643*FLEN/8, x4, x1, x2)

inst_22916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82807fff; valaddr_reg:x3; val_offset:68748*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68748*0 + 3*644*FLEN/8, x4, x1, x2)

inst_22917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8280ffff; valaddr_reg:x3; val_offset:68751*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68751*0 + 3*645*FLEN/8, x4, x1, x2)

inst_22918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8281ffff; valaddr_reg:x3; val_offset:68754*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68754*0 + 3*646*FLEN/8, x4, x1, x2)

inst_22919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8283ffff; valaddr_reg:x3; val_offset:68757*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68757*0 + 3*647*FLEN/8, x4, x1, x2)

inst_22920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x8287ffff; valaddr_reg:x3; val_offset:68760*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68760*0 + 3*648*FLEN/8, x4, x1, x2)

inst_22921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x828fffff; valaddr_reg:x3; val_offset:68763*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68763*0 + 3*649*FLEN/8, x4, x1, x2)

inst_22922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x829fffff; valaddr_reg:x3; val_offset:68766*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68766*0 + 3*650*FLEN/8, x4, x1, x2)

inst_22923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82bfffff; valaddr_reg:x3; val_offset:68769*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68769*0 + 3*651*FLEN/8, x4, x1, x2)

inst_22924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82c00000; valaddr_reg:x3; val_offset:68772*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68772*0 + 3*652*FLEN/8, x4, x1, x2)

inst_22925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82e00000; valaddr_reg:x3; val_offset:68775*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68775*0 + 3*653*FLEN/8, x4, x1, x2)

inst_22926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82f00000; valaddr_reg:x3; val_offset:68778*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68778*0 + 3*654*FLEN/8, x4, x1, x2)

inst_22927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82f80000; valaddr_reg:x3; val_offset:68781*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68781*0 + 3*655*FLEN/8, x4, x1, x2)

inst_22928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fc0000; valaddr_reg:x3; val_offset:68784*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68784*0 + 3*656*FLEN/8, x4, x1, x2)

inst_22929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fe0000; valaddr_reg:x3; val_offset:68787*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68787*0 + 3*657*FLEN/8, x4, x1, x2)

inst_22930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ff0000; valaddr_reg:x3; val_offset:68790*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68790*0 + 3*658*FLEN/8, x4, x1, x2)

inst_22931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ff8000; valaddr_reg:x3; val_offset:68793*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68793*0 + 3*659*FLEN/8, x4, x1, x2)

inst_22932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffc000; valaddr_reg:x3; val_offset:68796*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68796*0 + 3*660*FLEN/8, x4, x1, x2)

inst_22933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffe000; valaddr_reg:x3; val_offset:68799*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68799*0 + 3*661*FLEN/8, x4, x1, x2)

inst_22934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fff000; valaddr_reg:x3; val_offset:68802*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68802*0 + 3*662*FLEN/8, x4, x1, x2)

inst_22935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fff800; valaddr_reg:x3; val_offset:68805*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68805*0 + 3*663*FLEN/8, x4, x1, x2)

inst_22936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffc00; valaddr_reg:x3; val_offset:68808*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68808*0 + 3*664*FLEN/8, x4, x1, x2)

inst_22937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffe00; valaddr_reg:x3; val_offset:68811*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68811*0 + 3*665*FLEN/8, x4, x1, x2)

inst_22938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffff00; valaddr_reg:x3; val_offset:68814*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68814*0 + 3*666*FLEN/8, x4, x1, x2)

inst_22939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffff80; valaddr_reg:x3; val_offset:68817*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68817*0 + 3*667*FLEN/8, x4, x1, x2)

inst_22940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffffc0; valaddr_reg:x3; val_offset:68820*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68820*0 + 3*668*FLEN/8, x4, x1, x2)

inst_22941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffffe0; valaddr_reg:x3; val_offset:68823*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68823*0 + 3*669*FLEN/8, x4, x1, x2)

inst_22942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffff0; valaddr_reg:x3; val_offset:68826*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68826*0 + 3*670*FLEN/8, x4, x1, x2)

inst_22943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffff8; valaddr_reg:x3; val_offset:68829*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68829*0 + 3*671*FLEN/8, x4, x1, x2)

inst_22944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffffc; valaddr_reg:x3; val_offset:68832*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68832*0 + 3*672*FLEN/8, x4, x1, x2)

inst_22945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82fffffe; valaddr_reg:x3; val_offset:68835*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68835*0 + 3*673*FLEN/8, x4, x1, x2)

inst_22946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000;
op3val:0x82ffffff; valaddr_reg:x3; val_offset:68838*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68838*0 + 3*674*FLEN/8, x4, x1, x2)

inst_22947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78800000; valaddr_reg:x3; val_offset:68841*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68841*0 + 3*675*FLEN/8, x4, x1, x2)

inst_22948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78800001; valaddr_reg:x3; val_offset:68844*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68844*0 + 3*676*FLEN/8, x4, x1, x2)

inst_22949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78800003; valaddr_reg:x3; val_offset:68847*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68847*0 + 3*677*FLEN/8, x4, x1, x2)

inst_22950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78800007; valaddr_reg:x3; val_offset:68850*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68850*0 + 3*678*FLEN/8, x4, x1, x2)

inst_22951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7880000f; valaddr_reg:x3; val_offset:68853*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68853*0 + 3*679*FLEN/8, x4, x1, x2)

inst_22952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7880001f; valaddr_reg:x3; val_offset:68856*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68856*0 + 3*680*FLEN/8, x4, x1, x2)

inst_22953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7880003f; valaddr_reg:x3; val_offset:68859*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68859*0 + 3*681*FLEN/8, x4, x1, x2)

inst_22954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7880007f; valaddr_reg:x3; val_offset:68862*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68862*0 + 3*682*FLEN/8, x4, x1, x2)

inst_22955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x788000ff; valaddr_reg:x3; val_offset:68865*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68865*0 + 3*683*FLEN/8, x4, x1, x2)

inst_22956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x788001ff; valaddr_reg:x3; val_offset:68868*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68868*0 + 3*684*FLEN/8, x4, x1, x2)

inst_22957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x788003ff; valaddr_reg:x3; val_offset:68871*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68871*0 + 3*685*FLEN/8, x4, x1, x2)

inst_22958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x788007ff; valaddr_reg:x3; val_offset:68874*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68874*0 + 3*686*FLEN/8, x4, x1, x2)

inst_22959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78800fff; valaddr_reg:x3; val_offset:68877*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68877*0 + 3*687*FLEN/8, x4, x1, x2)

inst_22960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78801fff; valaddr_reg:x3; val_offset:68880*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68880*0 + 3*688*FLEN/8, x4, x1, x2)

inst_22961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78803fff; valaddr_reg:x3; val_offset:68883*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68883*0 + 3*689*FLEN/8, x4, x1, x2)

inst_22962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78807fff; valaddr_reg:x3; val_offset:68886*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68886*0 + 3*690*FLEN/8, x4, x1, x2)

inst_22963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7880ffff; valaddr_reg:x3; val_offset:68889*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68889*0 + 3*691*FLEN/8, x4, x1, x2)

inst_22964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7881ffff; valaddr_reg:x3; val_offset:68892*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68892*0 + 3*692*FLEN/8, x4, x1, x2)

inst_22965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7883ffff; valaddr_reg:x3; val_offset:68895*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68895*0 + 3*693*FLEN/8, x4, x1, x2)

inst_22966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7887ffff; valaddr_reg:x3; val_offset:68898*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68898*0 + 3*694*FLEN/8, x4, x1, x2)

inst_22967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x788fffff; valaddr_reg:x3; val_offset:68901*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68901*0 + 3*695*FLEN/8, x4, x1, x2)

inst_22968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x789fffff; valaddr_reg:x3; val_offset:68904*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68904*0 + 3*696*FLEN/8, x4, x1, x2)

inst_22969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78bfffff; valaddr_reg:x3; val_offset:68907*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68907*0 + 3*697*FLEN/8, x4, x1, x2)

inst_22970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78c00000; valaddr_reg:x3; val_offset:68910*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68910*0 + 3*698*FLEN/8, x4, x1, x2)

inst_22971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78e00000; valaddr_reg:x3; val_offset:68913*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68913*0 + 3*699*FLEN/8, x4, x1, x2)

inst_22972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78f00000; valaddr_reg:x3; val_offset:68916*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68916*0 + 3*700*FLEN/8, x4, x1, x2)

inst_22973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78f80000; valaddr_reg:x3; val_offset:68919*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68919*0 + 3*701*FLEN/8, x4, x1, x2)

inst_22974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fc0000; valaddr_reg:x3; val_offset:68922*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68922*0 + 3*702*FLEN/8, x4, x1, x2)

inst_22975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fe0000; valaddr_reg:x3; val_offset:68925*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68925*0 + 3*703*FLEN/8, x4, x1, x2)

inst_22976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ff0000; valaddr_reg:x3; val_offset:68928*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68928*0 + 3*704*FLEN/8, x4, x1, x2)

inst_22977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ff8000; valaddr_reg:x3; val_offset:68931*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68931*0 + 3*705*FLEN/8, x4, x1, x2)

inst_22978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffc000; valaddr_reg:x3; val_offset:68934*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68934*0 + 3*706*FLEN/8, x4, x1, x2)

inst_22979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffe000; valaddr_reg:x3; val_offset:68937*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68937*0 + 3*707*FLEN/8, x4, x1, x2)

inst_22980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fff000; valaddr_reg:x3; val_offset:68940*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68940*0 + 3*708*FLEN/8, x4, x1, x2)

inst_22981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fff800; valaddr_reg:x3; val_offset:68943*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68943*0 + 3*709*FLEN/8, x4, x1, x2)

inst_22982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffc00; valaddr_reg:x3; val_offset:68946*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68946*0 + 3*710*FLEN/8, x4, x1, x2)

inst_22983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffe00; valaddr_reg:x3; val_offset:68949*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68949*0 + 3*711*FLEN/8, x4, x1, x2)

inst_22984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffff00; valaddr_reg:x3; val_offset:68952*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68952*0 + 3*712*FLEN/8, x4, x1, x2)

inst_22985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffff80; valaddr_reg:x3; val_offset:68955*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68955*0 + 3*713*FLEN/8, x4, x1, x2)

inst_22986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffffc0; valaddr_reg:x3; val_offset:68958*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68958*0 + 3*714*FLEN/8, x4, x1, x2)

inst_22987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffffe0; valaddr_reg:x3; val_offset:68961*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68961*0 + 3*715*FLEN/8, x4, x1, x2)

inst_22988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffff0; valaddr_reg:x3; val_offset:68964*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68964*0 + 3*716*FLEN/8, x4, x1, x2)

inst_22989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffff8; valaddr_reg:x3; val_offset:68967*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68967*0 + 3*717*FLEN/8, x4, x1, x2)

inst_22990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffffc; valaddr_reg:x3; val_offset:68970*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68970*0 + 3*718*FLEN/8, x4, x1, x2)

inst_22991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78fffffe; valaddr_reg:x3; val_offset:68973*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68973*0 + 3*719*FLEN/8, x4, x1, x2)

inst_22992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x78ffffff; valaddr_reg:x3; val_offset:68976*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68976*0 + 3*720*FLEN/8, x4, x1, x2)

inst_22993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f000001; valaddr_reg:x3; val_offset:68979*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68979*0 + 3*721*FLEN/8, x4, x1, x2)

inst_22994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f000003; valaddr_reg:x3; val_offset:68982*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68982*0 + 3*722*FLEN/8, x4, x1, x2)

inst_22995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f000007; valaddr_reg:x3; val_offset:68985*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68985*0 + 3*723*FLEN/8, x4, x1, x2)

inst_22996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f199999; valaddr_reg:x3; val_offset:68988*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68988*0 + 3*724*FLEN/8, x4, x1, x2)

inst_22997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f249249; valaddr_reg:x3; val_offset:68991*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68991*0 + 3*725*FLEN/8, x4, x1, x2)

inst_22998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f333333; valaddr_reg:x3; val_offset:68994*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68994*0 + 3*726*FLEN/8, x4, x1, x2)

inst_22999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68997*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68997*0 + 3*727*FLEN/8, x4, x1, x2)

inst_23000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:69000*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69000*0 + 3*728*FLEN/8, x4, x1, x2)

inst_23001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f444444; valaddr_reg:x3; val_offset:69003*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69003*0 + 3*729*FLEN/8, x4, x1, x2)

inst_23002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:69006*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69006*0 + 3*730*FLEN/8, x4, x1, x2)

inst_23003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:69009*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69009*0 + 3*731*FLEN/8, x4, x1, x2)

inst_23004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f666666; valaddr_reg:x3; val_offset:69012*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69012*0 + 3*732*FLEN/8, x4, x1, x2)

inst_23005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:69015*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69015*0 + 3*733*FLEN/8, x4, x1, x2)

inst_23006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:69018*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69018*0 + 3*734*FLEN/8, x4, x1, x2)

inst_23007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:69021*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69021*0 + 3*735*FLEN/8, x4, x1, x2)

inst_23008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:69024*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69024*0 + 3*736*FLEN/8, x4, x1, x2)

inst_23009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:69027*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69027*0 + 3*737*FLEN/8, x4, x1, x2)

inst_23010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:69030*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69030*0 + 3*738*FLEN/8, x4, x1, x2)

inst_23011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:69033*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69033*0 + 3*739*FLEN/8, x4, x1, x2)

inst_23012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:69036*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69036*0 + 3*740*FLEN/8, x4, x1, x2)

inst_23013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:69039*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69039*0 + 3*741*FLEN/8, x4, x1, x2)

inst_23014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:69042*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69042*0 + 3*742*FLEN/8, x4, x1, x2)

inst_23015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:69045*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69045*0 + 3*743*FLEN/8, x4, x1, x2)

inst_23016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:69048*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69048*0 + 3*744*FLEN/8, x4, x1, x2)

inst_23017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:69051*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69051*0 + 3*745*FLEN/8, x4, x1, x2)

inst_23018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:69054*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69054*0 + 3*746*FLEN/8, x4, x1, x2)

inst_23019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:69057*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69057*0 + 3*747*FLEN/8, x4, x1, x2)

inst_23020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:69060*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69060*0 + 3*748*FLEN/8, x4, x1, x2)

inst_23021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:69063*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69063*0 + 3*749*FLEN/8, x4, x1, x2)

inst_23022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:69066*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69066*0 + 3*750*FLEN/8, x4, x1, x2)

inst_23023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:69069*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69069*0 + 3*751*FLEN/8, x4, x1, x2)

inst_23024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:69072*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69072*0 + 3*752*FLEN/8, x4, x1, x2)

inst_23025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8000000; valaddr_reg:x3; val_offset:69075*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69075*0 + 3*753*FLEN/8, x4, x1, x2)

inst_23026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8000001; valaddr_reg:x3; val_offset:69078*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69078*0 + 3*754*FLEN/8, x4, x1, x2)

inst_23027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8000003; valaddr_reg:x3; val_offset:69081*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69081*0 + 3*755*FLEN/8, x4, x1, x2)

inst_23028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8000007; valaddr_reg:x3; val_offset:69084*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69084*0 + 3*756*FLEN/8, x4, x1, x2)

inst_23029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x800000f; valaddr_reg:x3; val_offset:69087*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69087*0 + 3*757*FLEN/8, x4, x1, x2)

inst_23030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x800001f; valaddr_reg:x3; val_offset:69090*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69090*0 + 3*758*FLEN/8, x4, x1, x2)

inst_23031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x800003f; valaddr_reg:x3; val_offset:69093*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69093*0 + 3*759*FLEN/8, x4, x1, x2)

inst_23032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x800007f; valaddr_reg:x3; val_offset:69096*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69096*0 + 3*760*FLEN/8, x4, x1, x2)

inst_23033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x80000ff; valaddr_reg:x3; val_offset:69099*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69099*0 + 3*761*FLEN/8, x4, x1, x2)

inst_23034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x80001ff; valaddr_reg:x3; val_offset:69102*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69102*0 + 3*762*FLEN/8, x4, x1, x2)

inst_23035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x80003ff; valaddr_reg:x3; val_offset:69105*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69105*0 + 3*763*FLEN/8, x4, x1, x2)

inst_23036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x80007ff; valaddr_reg:x3; val_offset:69108*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69108*0 + 3*764*FLEN/8, x4, x1, x2)

inst_23037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8000fff; valaddr_reg:x3; val_offset:69111*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69111*0 + 3*765*FLEN/8, x4, x1, x2)

inst_23038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8001fff; valaddr_reg:x3; val_offset:69114*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69114*0 + 3*766*FLEN/8, x4, x1, x2)

inst_23039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8003fff; valaddr_reg:x3; val_offset:69117*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69117*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d000000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d000001,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d000003,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d000007,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d00000f,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d00001f,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d00003f,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d00007f,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d0000ff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d0001ff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d0003ff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d0007ff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d000fff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d001fff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d003fff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d007fff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d00ffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d01ffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d03ffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d07ffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d0fffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d1fffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d3fffff,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d400000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d600000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d700000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d780000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7c0000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7e0000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7f0000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7f8000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fc000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fe000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ff000,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ff800,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffc00,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffe00,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fff00,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fff80,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffc0,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffe0,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffff0,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffff8,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffffc,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffffe,32,FLEN)
NAN_BOXED(0x7ee1a51b,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0800000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0800001,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0800003,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0800007,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa080000f,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa080001f,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa080003f,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa080007f,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa08000ff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa08001ff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa08003ff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa08007ff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0800fff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0801fff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0803fff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0807fff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa080ffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa081ffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa083ffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa087ffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa08fffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa09fffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0bfffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0c00000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0e00000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0f00000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0f80000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fc0000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fe0000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ff0000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ff8000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffc000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffe000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fff000,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fff800,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffc00,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffe00,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffff00,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffff80,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffffc0,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffffe0,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffff0,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffff8,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffffc,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0fffffe,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xa0ffffff,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee2aaa7,32,FLEN)
NAN_BOXED(0x80484849,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c000000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c000001,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c000003,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c000007,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c00000f,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c00001f,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c00003f,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c00007f,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c0000ff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c0001ff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c0003ff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c0007ff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c000fff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c001fff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c003fff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c007fff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c00ffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c01ffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c03ffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c07ffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c0fffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c1fffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c3fffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c400000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c600000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c700000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c780000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7c0000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7e0000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7f0000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7f8000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fc000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fe000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ff000,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ff800,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffc00,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffe00,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fff00,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fff80,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fffc0,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fffe0,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffff0,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffff8,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffffc,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7ffffe,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7c7fffff,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ee2f92f,32,FLEN)
NAN_BOXED(0x40105e8d,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71800000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71800001,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71800003,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71800007,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7180000f,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7180001f,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7180003f,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7180007f,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x718000ff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x718001ff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x718003ff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x718007ff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71800fff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71801fff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71803fff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71807fff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7180ffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7181ffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7183ffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7187ffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x718fffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x719fffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71bfffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71c00000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71e00000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71f00000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71f80000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fc0000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fe0000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ff0000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ff8000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffc000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffe000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fff000,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fff800,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffc00,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffe00,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffff00,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffff80,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffffc0,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffffe0,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffff0,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffff8,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffffc,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71fffffe,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x71ffffff,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ee3b82d,32,FLEN)
NAN_BOXED(0x400fe577,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4800000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4800001,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4800003,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4800007,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa480000f,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa480001f,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa480003f,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa480007f,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa48000ff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa48001ff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa48003ff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa48007ff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4800fff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4801fff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4803fff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4807fff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa480ffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa481ffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa483ffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa487ffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa48fffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa49fffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4bfffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4c00000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4e00000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4f00000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4f80000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fc0000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fe0000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ff0000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ff8000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffc000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffe000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fff000,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fff800,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffc00,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffe00,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffff00,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffff80,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffffc0,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffffe0,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffff0,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffff8,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffffc,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4fffffe,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xa4ffffff,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee45149,32,FLEN)
NAN_BOXED(0x8047c27c,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8800000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8800001,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8800003,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8800007,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf880000f,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf880001f,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf880003f,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf880007f,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf88000ff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf88001ff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf88003ff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf88007ff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8800fff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8801fff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8803fff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8807fff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf880ffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf881ffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf883ffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf887ffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf88fffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf89fffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8bfffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8c00000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8e00000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8f00000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8f80000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fc0000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fe0000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ff0000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ff8000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffc000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffe000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fff000,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fff800,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffc00,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffe00,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffff00,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffff80,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffffc0,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffffe0,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffff0,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffff8,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffffc,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8fffffe,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xf8ffffff,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7ee4a32c,32,FLEN)
NAN_BOXED(0xc00f5191,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000001,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000003,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000007,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00000f,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00001f,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00003f,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00007f,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0000ff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0001ff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0003ff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0007ff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f000fff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f001fff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f003fff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f007fff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f00ffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f01ffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f03ffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f07ffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f0fffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f1fffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f3fffff,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f400000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f600000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f700000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f780000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7c0000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7e0000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f0000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7f8000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fc000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fe000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff000,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ff800,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffc00,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffe00,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff00,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fff80,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffc0,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffe0,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff0,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffff8,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffc,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7ffffe,32,FLEN)
NAN_BOXED(0x7ee4f4d2,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8f7fffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000001,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000003,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000007,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00000f,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00001f,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00003f,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00007f,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0000ff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0001ff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0003ff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0007ff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000fff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e001fff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e003fff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e007fff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00ffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e01ffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e03ffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e07ffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0fffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e1fffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e3fffff,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e400000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e600000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e700000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e780000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7c0000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7e0000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7f0000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7f8000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fc000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fe000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ff000,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ff800,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffc00,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffe00,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fff00,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fff80,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffc0,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffe0,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffff0,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffff8,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffffc,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffffe,32,FLEN)
NAN_BOXED(0x7ee4f961,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40800000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40800001,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40800003,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40800007,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4080000f,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4080001f,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4080003f,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4080007f,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x408000ff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x408001ff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x408003ff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x408007ff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40800fff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40801fff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40803fff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40807fff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4080ffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4081ffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4083ffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x4087ffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x408fffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x409fffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40bfffff,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40c00000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40e00000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40f00000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40f80000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fc0000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fe0000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ff0000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ff8000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffc000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffe000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fff000,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fff800,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffc00,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffe00,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffff00,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffff80,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffffc0,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffffe0,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffff0,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffff8,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffffc,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40fffffe,32,FLEN)
NAN_BOXED(0x7ee50cd9,32,FLEN)
NAN_BOXED(0x4787b9,32,FLEN)
NAN_BOXED(0x40ffffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65800000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65800001,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65800003,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65800007,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6580000f,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6580001f,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6580003f,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6580007f,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x658000ff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x658001ff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x658003ff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x658007ff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65800fff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65801fff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65803fff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65807fff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6580ffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6581ffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6583ffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x6587ffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x658fffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x659fffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65bfffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65c00000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65e00000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65f00000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65f80000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fc0000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fe0000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ff0000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ff8000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffc000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffe000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fff000,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fff800,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffc00,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffe00,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffff00,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffff80,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffffc0,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffffe0,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffff0,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffff8,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffffc,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65fffffe,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x65ffffff,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ee51716,32,FLEN)
NAN_BOXED(0x400f090d,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800001,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800003,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800007,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280000f,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280001f,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280003f,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280007f,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828000ff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828001ff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828003ff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828007ff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82800fff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82801fff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82803fff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82807fff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8280ffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8281ffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8283ffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8287ffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x828fffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x829fffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82bfffff,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82c00000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82e00000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82f00000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82f80000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fc0000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fe0000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ff0000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ff8000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffc000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffe000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fff000,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fff800,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffc00,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffe00,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffff00,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffff80,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffc0,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffe0,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffff0,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffff8,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffffc,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82fffffe,32,FLEN)
NAN_BOXED(0x7ee67462,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x82ffffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78800000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78800001,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78800003,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78800007,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7880000f,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7880001f,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7880003f,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7880007f,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x788000ff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x788001ff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x788003ff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x788007ff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78800fff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78801fff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78803fff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78807fff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7880ffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7881ffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7883ffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7887ffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x788fffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x789fffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78bfffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78c00000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78e00000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78f00000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78f80000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fc0000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fe0000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ff0000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ff8000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffc000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffe000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fff000,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fff800,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffc00,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffe00,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffff00,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffff80,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffffc0,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffffe0,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffff0,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffff8,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffffc,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78fffffe,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x78ffffff,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ee6dd2b,32,FLEN)
NAN_BOXED(0x400defb8,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000001,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000003,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000007,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800000f,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001f,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003f,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007f,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80000ff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80001ff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80003ff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80007ff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000fff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8001fff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8003fff,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
