
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b16 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b16)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==x30, rs2==x29, rs3==x28, rd==x31,fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1186f9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f222105; op2val:0x7f1186f9;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 == rs3 != rd, rs1==x31, rs2==x31, rs3==x31, rd==x30,fs1 == 0 and fe1 == 0xfc and fm1 == 0x46d91a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x445459 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x31; op2:x31; op3:x31; dest:x30; op1val:0x7e46d91a; op2val:0x7e46d91a;
op3val:0x7e46d91a; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x30, x31, x31, x31, dyn, 0, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==x28, rs2==x30, rs3==x29, rd==x29,fs1 == 0 and fe1 == 0xfe and fm1 == 0x167d44 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x68f1b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x28; op2:x30; op3:x29; dest:x29; op1val:0x7f167d44; op2val:0x7e68f1b4;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x29, x28, x30, x29, dyn, 0, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs1 == rd == rs3 != rs2, rs1==x27, rs2==x28, rs3==x27, rd==x27,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6004c9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2e5b90 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x27; op2:x28; op3:x27; dest:x27; op1val:0x7ee004c9; op2val:0x7f2e5b90;
op3val:0x7ee004c9; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x27, x27, x28, x27, dyn, 0, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==x26, rs2==x27, rs3==x30, rd==x26,fs1 == 0 and fe1 == 0xfc and fm1 == 0x587392 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x111d49 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x26; op2:x27; op3:x30; dest:x26; op1val:0x7e587392; op2val:0x7f111d49;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x26, x26, x27, x30, dyn, 0, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==x29, rs2==x26, rs3==x26, rd==x28,fs1 == 0 and fe1 == 0xfc and fm1 == 0x40638c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2eabd8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x29; op2:x26; op3:x26; dest:x28; op1val:0x7e40638c; op2val:0x7f2eabd8;
op3val:0x7f2eabd8; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x28, x29, x26, x26, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rd == rs2 == rs3 != rs1, rs1==x24, rs2==x25, rs3==x25, rd==x25,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8fcb and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2d3742 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x24; op2:x25; op3:x25; dest:x25; op1val:0x7f1b8fcb; op2val:0x7f2d3742;
op3val:0x7f2d3742; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x25, x24, x25, x25, dyn, 0, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==x25, rs2==x24, rs3==x23, rd==x24,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c20b0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2c93b2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x25; op2:x24; op3:x23; dest:x24; op1val:0x7f0c20b0; op2val:0x7f2c93b2;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x24, x25, x24, x23, dyn, 0, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 == rd != rs3, rs1==x23, rs2==x23, rs3==x24, rd==x23,fs1 == 0 and fe1 == 0xfd and fm1 == 0x354d84 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x1aad53 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x23; op2:x23; op3:x24; dest:x23; op1val:0x7eb54d84; op2val:0x7eb54d84;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x23, x23, x23, x24, dyn, 0, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==x21, rs2==x20, rs3==x21, rd==x22,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a94a1 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2f4c51 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x21; op2:x20; op3:x21; dest:x22; op1val:0x7eea94a1; op2val:0x7f2f4c51;
op3val:0x7eea94a1; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x22, x21, x20, x21, dyn, 0, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rs2 == rs3 == rd, rs1==x19, rs2==x19, rs3==x19, rd==x19,fs1 == 0 and fe1 == 0xfd and fm1 == 0x372bf7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2623b6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x19; op2:x19; op3:x19; dest:x19; op1val:0x7eb72bf7; op2val:0x7eb72bf7;
op3val:0x7eb72bf7; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x19, x19, x19, x19, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==x22, rs2==x22, rs3==x20, rd==x21,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a90b9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x52b355 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x22; op2:x22; op3:x20; dest:x21; op1val:0x7f1a90b9; op2val:0x7f1a90b9;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x21, x22, x22, x20, dyn, 0, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==x18, rs2==x21, rs3==x22, rd==x20,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0a2eec and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1925f2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x18; op2:x21; op3:x22; dest:x20; op1val:0x7f0a2eec; op2val:0x7e9925f2;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x20, x18, x21, x22, dyn, 0, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==x20, rs2==x17, rs3==x16, rd==x18,fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 0 and fe2 == 0xf4 and fm2 == 0x60affa and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x20; op2:x17; op3:x16; dest:x18; op1val:0x7f004910; op2val:0x7a60affa;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x18, x20, x17, x16, dyn, 0, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==x16, rs2==x18, rs3==x15, rd==x17,fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x3b52d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x16; op2:x18; op3:x15; dest:x17; op1val:0x7f269468; op2val:0x7e3b52d3;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x17, x16, x18, x15, dyn, 0, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==x17, rs2==x15, rs3==x18, rd==x16,fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x12bd51 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x17; op2:x15; op3:x18; dest:x16; op1val:0x7f272166; op2val:0x7e12bd51;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x16, x17, x15, x18, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==x14, rs2==x16, rs3==x17, rd==x15,fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 0 and fe2 == 0xfe and fm2 == 0x39c489 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x14; op2:x16; op3:x17; dest:x15; op1val:0x7e3741cc; op2val:0x7f39c489;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x15, x14, x16, x17, dyn, 0, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==x15, rs2==x13, rs3==x12, rd==x14,fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x772129 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x15; op2:x13; op3:x12; dest:x14; op1val:0x7eac0532; op2val:0x7d772129;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x14, x15, x13, x12, dyn, 0, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==x12, rs2==x14, rs3==x11, rd==x13,fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x331aa5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x12; op2:x14; op3:x11; dest:x13; op1val:0x7ec30c98; op2val:0x7f331aa5;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x13, x12, x14, x11, dyn, 0, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==x13, rs2==x11, rs3==x14, rd==x12,fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x07a8e7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x13; op2:x11; op3:x14; dest:x12; op1val:0x7ed3afc5; op2val:0x7f07a8e7;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x12, x13, x11, x14, dyn, 0, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==x10, rs2==x12, rs3==x13, rd==x11,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4f7809 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x10; op2:x12; op3:x13; dest:x11; op1val:0x7f1c60ac; op2val:0x7ecf7809;
op3val:0xff7fffff; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x11, x10, x12, x13, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)
RVTEST_VALBASEUPD(x12,test_dataset_1)

inst_21:
// rs1==x11, rs2==x9, rs3==x8, rd==x10,fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 0 and fe2 == 0xfd and fm2 == 0x61a51b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x11; op2:x9; op3:x8; dest:x10; op1val:0x7ee79f8e; op2val:0x7ee1a51b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x10, x11, x9, x8, dyn, 0, 0, x12, 0*FLEN/8, x13, x1, x2)

inst_22:
// rs1==x8, rs2==x10, rs3==x7, rd==x9,fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x13cd52 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x8; op2:x10; op3:x7; dest:x9; op1val:0x7ee4f961; op2val:0x7e93cd52;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x9, x8, x10, x7, dyn, 0, 0, x12, 3*FLEN/8, x13, x1, x2)

inst_23:
// rs1==x9, rs2==x7, rs3==x10, rd==x8,fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x1173d9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x9; op2:x7; op3:x10; dest:x8; op1val:0x7e5ef919; op2val:0x7e1173d9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:6*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x8, x9, x7, x10, dyn, 0, 0, x12, 6*FLEN/8, x13, x1, x10)
RVTEST_SIGBASE(x9,signature_x9_0)

inst_24:
// rs1==x6, rs2==x8, rs3==x9, rd==x7,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b4e0d and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7c283d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x6; op2:x8; op3:x9; dest:x7; op1val:0x7eeb4e0d; op2val:0x7efc283d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:9*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x7, x6, x8, x9, dyn, 0, 0, x12, 9*FLEN/8, x13, x9, x10)

inst_25:
// rs1==x7, rs2==x5, rs3==x4, rd==x6,fs1 == 0 and fe1 == 0xfb and fm1 == 0x09f85f and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1175bf and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x7; op2:x5; op3:x4; dest:x6; op1val:0x7d89f85f; op2val:0x7f1175bf;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:12*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x6, x7, x5, x4, dyn, 0, 0, x12, 12*FLEN/8, x13, x9, x10)

inst_26:
// rs1==x4, rs2==x6, rs3==x3, rd==x5,fs1 == 0 and fe1 == 0xfe and fm1 == 0x314a05 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x21c09a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x4; op2:x6; op3:x3; dest:x5; op1val:0x7f314a05; op2val:0x7f21c09a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:15*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x5, x4, x6, x3, dyn, 0, 0, x12, 15*FLEN/8, x13, x9, x10)

inst_27:
// rs1==x5, rs2==x3, rs3==x6, rd==x4,fs1 == 0 and fe1 == 0xfe and fm1 == 0x313b58 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4f9722 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x5; op2:x3; op3:x6; dest:x4; op1val:0x7f313b58; op2val:0x7ecf9722;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:18*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x4, x5, x3, x6, dyn, 0, 0, x12, 18*FLEN/8, x13, x9, x10)

inst_28:
// rs1==x2, rs2==x4, rs3==x5, rd==x3,fs1 == 0 and fe1 == 0xfe and fm1 == 0x076a16 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x53afdf and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x2; op2:x4; op3:x5; dest:x3; op1val:0x7f076a16; op2val:0x7e53afdf;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:21*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x3, x2, x4, x5, dyn, 0, 0, x12, 21*FLEN/8, x13, x9, x10)

inst_29:
// rs1==x3, rs2==x1, rs3==x0, rd==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2319ee and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2bd8f4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x3; op2:x1; op3:x0; dest:x2; op1val:0x7f2319ee; op2val:0x7f2bd8f4;
op3val:0x0; valaddr_reg:x12; val_offset:24*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x2, x3, x1, x0, dyn, 0, 0, x12, 24*FLEN/8, x13, x9, x10)

inst_30:
// rs1==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x365ad7 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5e9a56 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x1; op2:x30; op3:x29; dest:x31; op1val:0x7f365ad7; op2val:0x7ede9a56;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:27*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x1, x30, x29, dyn, 0, 0, x12, 27*FLEN/8, x13, x9, x10)

inst_31:
// rs1==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d88c2 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3f4810 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x0; op2:x30; op3:x29; dest:x31; op1val:0x0; op2val:0x7f3f4810;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:30*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x0, x30, x29, dyn, 0, 0, x12, 30*FLEN/8, x13, x9, x10)

inst_32:
// rs2==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x185183 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x7d0cc0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x2; op3:x29; dest:x31; op1val:0x7f185183; op2val:0x7d7d0cc0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:33*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x2, x29, dyn, 0, 0, x12, 33*FLEN/8, x13, x9, x10)

inst_33:
// rs2==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x3acb68 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x71fa00 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x0; op3:x29; dest:x31; op1val:0x7ebacb68; op2val:0x0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:36*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x0, x29, dyn, 0, 0, x12, 36*FLEN/8, x13, x9, x10)

inst_34:
// rs3==x2,fs1 == 0 and fe1 == 0xfc and fm1 == 0x3aa6be and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0c7228 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x2; dest:x31; op1val:0x7e3aa6be; op2val:0x7f0c7228;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:39*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x2, dyn, 0, 0, x12, 39*FLEN/8, x13, x9, x10)

inst_35:
// rs3==x1,fs1 == 0 and fe1 == 0xfc and fm1 == 0x29504d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x188f57 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x1; dest:x31; op1val:0x7e29504d; op2val:0x7f188f57;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:42*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x1, dyn, 0, 0, x12, 42*FLEN/8, x13, x9, x10)

inst_36:
// rd==x1,fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ca7c2 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x1a887c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x1; op1val:0x7f1ca7c2; op2val:0x7d9a887c;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:45*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x1, x31, x30, x29, dyn, 0, 0, x12, 45*FLEN/8, x13, x9, x10)

inst_37:
// rd==x0,fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f3e7 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x0af584 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x0; op1val:0x7f05f3e7; op2val:0x7d0af584;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:48*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x0, x31, x30, x29, dyn, 0, 0, x12, 48*FLEN/8, x13, x9, x10)

inst_38:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2eb91a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4d21cb and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2eb91a; op2val:0x7ecd21cb;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:51*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 51*FLEN/8, x13, x9, x10)

inst_39:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x24066c and fs2 == 0 and fe2 == 0xfd and fm2 == 0x73d707 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca4066c; op2val:0x7ef3d707;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:54*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 54*FLEN/8, x13, x9, x10)

inst_40:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d2a79 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x163972 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edd2a79; op2val:0x7e963972;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:57*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 57*FLEN/8, x13, x9, x10)

inst_41:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c425a and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x5f97b9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c425a; op2val:0x7cdf97b9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:60*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60*FLEN/8, x13, x9, x10)

inst_42:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38849b and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0e0ef6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38849b; op2val:0x7e0e0ef6;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:63*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 63*FLEN/8, x13, x9, x10)

inst_43:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x21b906 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x19be4b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e21b906; op2val:0x7f19be4b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:66*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 66*FLEN/8, x13, x9, x10)

inst_44:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0bf9e4 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x237008 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c8bf9e4; op2val:0x7ea37008;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:69*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 69*FLEN/8, x13, x9, x10)

inst_45:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x479e53 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x2998cc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e479e53; op2val:0x7e2998cc;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:72*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 72*FLEN/8, x13, x9, x10)

inst_46:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x06834b and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0a7bf0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e86834b; op2val:0x7e0a7bf0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:75*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 75*FLEN/8, x13, x9, x10)

inst_47:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x71f159 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x1b03d8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cf1f159; op2val:0x7d9b03d8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:78*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 78*FLEN/8, x13, x9, x10)

inst_48:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x191af1 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x09af6b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e191af1; op2val:0x7e89af6b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:81*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 81*FLEN/8, x13, x9, x10)

inst_49:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20f56c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x30593a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f20f56c; op2val:0x7f30593a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:84*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 84*FLEN/8, x13, x9, x10)

inst_50:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0125a0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3993cf and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0125a0; op2val:0x7f3993cf;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:87*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 87*FLEN/8, x13, x9, x10)

inst_51:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01d4ab and fs2 == 0 and fe2 == 0xfe and fm2 == 0x22524e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f01d4ab; op2val:0x7f22524e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:90*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90*FLEN/8, x13, x9, x10)

inst_52:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x408722 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x652afa and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e408722; op2val:0x7ee52afa;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:93*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 93*FLEN/8, x13, x9, x10)

inst_53:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0642e8 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x351aa9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0642e8; op2val:0x7eb51aa9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:96*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 96*FLEN/8, x13, x9, x10)

inst_54:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5a8a0e and fs2 == 0 and fe2 == 0xfd and fm2 == 0x434d6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eda8a0e; op2val:0x7ec34d6c;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:99*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 99*FLEN/8, x13, x9, x10)

inst_55:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x092570 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x20d4b8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e892570; op2val:0x7f20d4b8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 102*FLEN/8, x13, x9, x10)

inst_56:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x57453d and fs2 == 0 and fe2 == 0xf8 and fm2 == 0x18d146 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed7453d; op2val:0x7c18d146;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105*FLEN/8, x13, x9, x10)

inst_57:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00fdf0 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x0c612e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e80fdf0; op2val:0x7d0c612e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 108*FLEN/8, x13, x9, x10)

inst_58:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x386b8e and fs2 == 0 and fe2 == 0xfe and fm2 == 0x370036 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e386b8e; op2val:0x7f370036;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111*FLEN/8, x13, x9, x10)

inst_59:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5d1719 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x09eee9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5d1719; op2val:0x7e89eee9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114*FLEN/8, x13, x9, x10)

inst_60:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x735bf2 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6e7e55 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef35bf2; op2val:0x7eee7e55;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 117*FLEN/8, x13, x9, x10)

inst_61:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x14ffa5 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1f22f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e94ffa5; op2val:0x7e9f22f1;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 120*FLEN/8, x13, x9, x10)

inst_62:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x15d64c and fs2 == 0 and fe2 == 0xfc and fm2 == 0x13b197 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7a95d64c; op2val:0x7e13b197;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 123*FLEN/8, x13, x9, x10)

inst_63:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x37df17 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x74c2e8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e37df17; op2val:0x7ef4c2e8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 126*FLEN/8, x13, x9, x10)

inst_64:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2814cf and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5a2b8e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2814cf; op2val:0x7eda2b8e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 129*FLEN/8, x13, x9, x10)

inst_65:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1a7876 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x06c054 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9a7876; op2val:0x7f06c054;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 132*FLEN/8, x13, x9, x10)

inst_66:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7e4880 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x0fb50a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efe4880; op2val:0x7d0fb50a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 135*FLEN/8, x13, x9, x10)

inst_67:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x471615 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x7234e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e471615; op2val:0x7df234e1;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 138*FLEN/8, x13, x9, x10)

inst_68:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b1c27 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x579458 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebb1c27; op2val:0x7ed79458;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 141*FLEN/8, x13, x9, x10)

inst_69:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29b43a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x3deb73 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f29b43a; op2val:0x7ebdeb73;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 144*FLEN/8, x13, x9, x10)

inst_70:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33495f and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1b5638 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb3495f; op2val:0x7f1b5638;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 147*FLEN/8, x13, x9, x10)

inst_71:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1bfbd1 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x10628e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1bfbd1; op2val:0x7e10628e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 150*FLEN/8, x13, x9, x10)

inst_72:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x731b27 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x003494 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef31b27; op2val:0x7d803494;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 153*FLEN/8, x13, x9, x10)

inst_73:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d783f and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1a4c33 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3d783f; op2val:0x7e9a4c33;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 156*FLEN/8, x13, x9, x10)

inst_74:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d2f3 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x23fca7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e72d2f3; op2val:0x7e23fca7;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 159*FLEN/8, x13, x9, x10)

inst_75:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x67c20e and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1df6e4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ae7c20e; op2val:0x7f1df6e4;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 162*FLEN/8, x13, x9, x10)

inst_76:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16325d and fs2 == 0 and fe2 == 0xfb and fm2 == 0x36a2e9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d96325d; op2val:0x7db6a2e9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 165*FLEN/8, x13, x9, x10)

inst_77:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27bdd4 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x5706d8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f27bdd4; op2val:0x7e5706d8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 168*FLEN/8, x13, x9, x10)

inst_78:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x19e0a5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x23f4c3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d99e0a5; op2val:0x7f23f4c3;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 171*FLEN/8, x13, x9, x10)

inst_79:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x79e4a2 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x52faef and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d79e4a2; op2val:0x7e52faef;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 174*FLEN/8, x13, x9, x10)

inst_80:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18212b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x25618f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18212b; op2val:0x7f25618f;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 177*FLEN/8, x13, x9, x10)

inst_81:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x480329 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x79e697 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec80329; op2val:0x7ef9e697;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 180*FLEN/8, x13, x9, x10)

inst_82:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2765d9 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x55d198 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2765d9; op2val:0x7e55d198;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 183*FLEN/8, x13, x9, x10)

inst_83:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79d5cb and fs2 == 0 and fe2 == 0xfe and fm2 == 0x02c05a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cf9d5cb; op2val:0x7f02c05a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 186*FLEN/8, x13, x9, x10)

inst_84:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x35ba7d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x342e24 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f35ba7d; op2val:0x7f342e24;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 189*FLEN/8, x13, x9, x10)

inst_85:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0109b4 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0fd579 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0109b4; op2val:0x7f0fd579;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 192*FLEN/8, x13, x9, x10)

inst_86:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ba8b0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x08c5cd and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efba8b0; op2val:0x7f08c5cd;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 195*FLEN/8, x13, x9, x10)

inst_87:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75d070 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x0f0540 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef5d070; op2val:0x7e8f0540;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 198*FLEN/8, x13, x9, x10)

inst_88:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1f9fcf and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6174c8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1f9fcf; op2val:0x7ee174c8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 201*FLEN/8, x13, x9, x10)

inst_89:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x67f8b9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x000760 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de7f8b9; op2val:0x7e800760;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 204*FLEN/8, x13, x9, x10)

inst_90:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f3ae and fs2 == 0 and fe2 == 0xfd and fm2 == 0x01e3e9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f09f3ae; op2val:0x7e81e3e9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 207*FLEN/8, x13, x9, x10)

inst_91:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x7d26a2 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x7bb095 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cfd26a2; op2val:0x7dfbb095;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 210*FLEN/8, x13, x9, x10)

inst_92:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1799a1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e5c14; op2val:0x7e9799a1;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 213*FLEN/8, x13, x9, x10)

inst_93:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x3793aa and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e615629; op2val:0x7eb793aa;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 216*FLEN/8, x13, x9, x10)

inst_94:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x09ec35 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d143e58; op2val:0x7e09ec35;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 219*FLEN/8, x13, x9, x10)

inst_95:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1ad123 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d59b0d6; op2val:0x7e9ad123;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 222*FLEN/8, x13, x9, x10)

inst_96:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0xfb and fm2 == 0x18adcd and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f40ca; op2val:0x7d98adcd;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 225*FLEN/8, x13, x9, x10)

inst_97:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x217160 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb6048d; op2val:0x7f217160;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 228*FLEN/8, x13, x9, x10)

inst_98:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x37f81e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e83f653; op2val:0x7eb7f81e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 231*FLEN/8, x13, x9, x10)

inst_99:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x67dc90 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea3ca20; op2val:0x7e67dc90;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 234*FLEN/8, x13, x9, x10)

inst_100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x30948b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2bb989; op2val:0x7f30948b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 237*FLEN/8, x13, x9, x10)

inst_101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3b1d98 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e90382a; op2val:0x7f3b1d98;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 240*FLEN/8, x13, x9, x10)

inst_102:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0xfb and fm2 == 0x020d6d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d4a3e7e; op2val:0x7d820d6d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 243*FLEN/8, x13, x9, x10)

inst_103:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 0 and fe2 == 0xf7 and fm2 == 0x40f240 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d3bdf28; op2val:0x7bc0f240;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 246*FLEN/8, x13, x9, x10)

inst_104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c23 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2c3db2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec74c23; op2val:0x7eac3db2;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 249*FLEN/8, x13, x9, x10)

inst_105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6098e5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x026d14 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee098e5; op2val:0x7f026d14;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 252*FLEN/8, x13, x9, x10)

inst_106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d7074 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3dc8bc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8d7074; op2val:0x7f3dc8bc;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 255*FLEN/8, x13, x9, x10)

inst_107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x153406 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2596bf and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f153406; op2val:0x7ea596bf;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 258*FLEN/8, x13, x9, x10)

inst_108:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x442bee and fs2 == 0 and fe2 == 0xfe and fm2 == 0x25cea1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d442bee; op2val:0x7f25cea1;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 261*FLEN/8, x13, x9, x10)

inst_109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d60c7 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2d6b3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d60c7; op2val:0x7ead6b3e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 264*FLEN/8, x13, x9, x10)

inst_110:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x36a56c and fs2 == 0 and fe2 == 0xfd and fm2 == 0x18d06d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7db6a56c; op2val:0x7e98d06d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 267*FLEN/8, x13, x9, x10)

inst_111:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x0155e8 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x360231 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d0155e8; op2val:0x7f360231;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 270*FLEN/8, x13, x9, x10)

inst_112:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x60ccec and fs2 == 0 and fe2 == 0xfc and fm2 == 0x180a7e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de0ccec; op2val:0x7e180a7e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 273*FLEN/8, x13, x9, x10)

inst_113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x51d071 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x687317 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed1d071; op2val:0x7de87317;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 276*FLEN/8, x13, x9, x10)

inst_114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cbbe2 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x63f20b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3cbbe2; op2val:0x7de3f20b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 279*FLEN/8, x13, x9, x10)

inst_115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x028be4 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x288293 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f028be4; op2val:0x7f288293;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 282*FLEN/8, x13, x9, x10)

inst_116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0xfc and fm2 == 0x77a646 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3012ad; op2val:0x7e77a646;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 285*FLEN/8, x13, x9, x10)

inst_117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x00a730 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebf7af3; op2val:0x7f00a730;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 288*FLEN/8, x13, x9, x10)

inst_118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x28048a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea26e3; op2val:0x7e28048a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 291*FLEN/8, x13, x9, x10)

inst_119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2c9c0a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38d010; op2val:0x7f2c9c0a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 294*FLEN/8, x13, x9, x10)

inst_120:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x63e43a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cd9eac0; op2val:0x7de3e43a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 297*FLEN/8, x13, x9, x10)

inst_121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0xfe and fm2 == 0x21ba5d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f168f5a; op2val:0x7f21ba5d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 300*FLEN/8, x13, x9, x10)

inst_122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1af462 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f09e19b; op2val:0x7f1af462;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 303*FLEN/8, x13, x9, x10)

inst_123:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x26d3f0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d820308; op2val:0x7f26d3f0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 306*FLEN/8, x13, x9, x10)

inst_124:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x79a4a6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2cde9f; op2val:0x7cf9a4a6;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 309*FLEN/8, x13, x9, x10)

inst_125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0xfc and fm2 == 0x7de57e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f220a0f; op2val:0x7e7de57e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 312*FLEN/8, x13, x9, x10)

inst_126:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7befa5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de49633; op2val:0x7efbefa5;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 315*FLEN/8, x13, x9, x10)

inst_127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x41eb7c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2d0265 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec1eb7c; op2val:0x7f2d0265;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 318*FLEN/8, x13, x9, x10)

inst_128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c5df5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x024923 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7edc5df5; op2val:0x7f024923;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 321*FLEN/8, x13, x9, x10)

inst_129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1181a9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3e2ea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1181a9; op2val:0x7f3e2ea7;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 324*FLEN/8, x13, x9, x10)

inst_130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2de8ee and fs2 == 0 and fe2 == 0xfc and fm2 == 0x1e49db and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2de8ee; op2val:0x7e1e49db;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 327*FLEN/8, x13, x9, x10)

inst_131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65de2c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1e88a3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee5de2c; op2val:0x7f1e88a3;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 330*FLEN/8, x13, x9, x10)

inst_132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17e134 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1535df and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f17e134; op2val:0x7e9535df;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 333*FLEN/8, x13, x9, x10)

inst_133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2373e9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x193a37 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2373e9; op2val:0x7f193a37;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 336*FLEN/8, x13, x9, x10)

inst_134:
// fs1 == 0 and fe1 == 0xf2 and fm1 == 0x3d4a9b and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0bc08b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x793d4a9b; op2val:0x7e0bc08b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 339*FLEN/8, x13, x9, x10)

inst_135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x436cc0 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x499654 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e436cc0; op2val:0x7d499654;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 342*FLEN/8, x13, x9, x10)

inst_136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x350bba and fs2 == 0 and fe2 == 0xfc and fm2 == 0x688ddb and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f350bba; op2val:0x7e688ddb;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 345*FLEN/8, x13, x9, x10)

inst_137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b86f6 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x3f4247 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b86f6; op2val:0x7d3f4247;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 348*FLEN/8, x13, x9, x10)

inst_138:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x439094 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x5c7bdc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dc39094; op2val:0x7e5c7bdc;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 351*FLEN/8, x13, x9, x10)

inst_139:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x5cc707 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d2a943e; op2val:0x7cdcc707;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 354*FLEN/8, x13, x9, x10)

inst_140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x25c228 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebcdcf2; op2val:0x7f25c228;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 357*FLEN/8, x13, x9, x10)

inst_141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x688296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f015206; op2val:0x7de88296;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 360*FLEN/8, x13, x9, x10)

inst_142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6aeb85 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9de0b9; op2val:0x7eeaeb85;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 363*FLEN/8, x13, x9, x10)

inst_143:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x34d24a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d107c30; op2val:0x7eb4d24a;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 366*FLEN/8, x13, x9, x10)

inst_144:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6d14ed and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7cc777c1; op2val:0x7eed14ed;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 369*FLEN/8, x13, x9, x10)

inst_145:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x52df06 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da1bad2; op2val:0x7ed2df06;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 372*FLEN/8, x13, x9, x10)

inst_146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x151296 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e933b22; op2val:0x7f151296;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 375*FLEN/8, x13, x9, x10)

inst_147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6a4935 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f293481; op2val:0x7eea4935;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 378*FLEN/8, x13, x9, x10)

inst_148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0xfd and fm2 == 0x01bd84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef2cedb; op2val:0x7e81bd84;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 381*FLEN/8, x13, x9, x10)

inst_149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6edcc4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f030bb1; op2val:0x7eeedcc4;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 384*FLEN/8, x13, x9, x10)

inst_150:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2f0ff8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dc33d56; op2val:0x7f2f0ff8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 387*FLEN/8, x13, x9, x10)

inst_151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x300ad9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2786d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f300ad9; op2val:0x7f2786d3;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 390*FLEN/8, x13, x9, x10)
RVTEST_SIGBASE(x9,signature_x9_1)

inst_152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x474c7e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b9172; op2val:0x7ec74c7e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 393*FLEN/8, x13, x9, x10)

inst_153:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x162a78 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e113ff8; op2val:0x7f162a78;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 396*FLEN/8, x13, x9, x10)

inst_154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2ee68b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f114532; op2val:0x7eaee68b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 399*FLEN/8, x13, x9, x10)

inst_155:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x092308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d677175; op2val:0x7d092308;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 402*FLEN/8, x13, x9, x10)

inst_156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2d0175 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebaaff8; op2val:0x7f2d0175;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 405*FLEN/8, x13, x9, x10)

inst_157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5b91e9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efff0b5; op2val:0x7edb91e9;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 408*FLEN/8, x13, x9, x10)

inst_158:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1d52dc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8f9457; op2val:0x7f1d52dc;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 411*FLEN/8, x13, x9, x10)

inst_159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 0 and fe2 == 0xfe and fm2 == 0x061cca and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f15a4db; op2val:0x7f061cca;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 414*FLEN/8, x13, x9, x10)

inst_160:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x2e4058 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6a7ab2; op2val:0x7dae4058;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 417*FLEN/8, x13, x9, x10)

inst_161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x31316c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed95956; op2val:0x7f31316c;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 420*FLEN/8, x13, x9, x10)

inst_162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x186358 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f9b30; op2val:0x7d986358;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 423*FLEN/8, x13, x9, x10)

inst_163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0cfb4b and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x3ca040 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0cfb4b; op2val:0x7cbca040;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 426*FLEN/8, x13, x9, x10)

inst_164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03cad2 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x39250d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f03cad2; op2val:0x7cb9250d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 429*FLEN/8, x13, x9, x10)

inst_165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38c024 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0aba6b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38c024; op2val:0x7f0aba6b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 432*FLEN/8, x13, x9, x10)

inst_166:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x580d57 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x09f409 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d580d57; op2val:0x7e89f409;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 435*FLEN/8, x13, x9, x10)

inst_167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0595c5 and fs2 == 0 and fe2 == 0xf7 and fm2 == 0x74e195 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8595c5; op2val:0x7bf4e195;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 438*FLEN/8, x13, x9, x10)

inst_168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d3fd0 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x58a14d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d3fd0; op2val:0x7d58a14d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 441*FLEN/8, x13, x9, x10)

inst_169:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fba25 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x1d4781 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1fba25; op2val:0x7e1d4781;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 444*FLEN/8, x13, x9, x10)

inst_170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x342577 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x3d3789 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f342577; op2val:0x7dbd3789;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 447*FLEN/8, x13, x9, x10)

inst_171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dbef7 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x17731e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8dbef7; op2val:0x7c97731e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 450*FLEN/8, x13, x9, x10)

inst_172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24f632 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0f9c10 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f24f632; op2val:0x7e0f9c10;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 453*FLEN/8, x13, x9, x10)

inst_173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0444c5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x382932 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8444c5; op2val:0x7f382932;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 456*FLEN/8, x13, x9, x10)

inst_174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39925a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x0b19a0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f39925a; op2val:0x7e8b19a0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 459*FLEN/8, x13, x9, x10)

inst_175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x60bdc9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x33eda8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e60bdc9; op2val:0x7f33eda8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 462*FLEN/8, x13, x9, x10)

inst_176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74310e and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0d58d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4310e; op2val:0x7e0d58d3;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 465*FLEN/8, x13, x9, x10)

inst_177:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1d9044 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5f0bd0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9d9044; op2val:0x7edf0bd0;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 468*FLEN/8, x13, x9, x10)

inst_178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c5a89 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3591fb and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c5a89; op2val:0x7f3591fb;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 471*FLEN/8, x13, x9, x10)

inst_179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x729ac7 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x3a8006 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e729ac7; op2val:0x7e3a8006;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 474*FLEN/8, x13, x9, x10)

inst_180:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f88a0 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x213294 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5f88a0; op2val:0x7ea13294;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 477*FLEN/8, x13, x9, x10)

inst_181:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b1c72 and fs2 == 0 and fe2 == 0xf8 and fm2 == 0x7c8383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dcb1c72; op2val:0x7c7c8383;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 480*FLEN/8, x13, x9, x10)

inst_182:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x60e796 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x215e74 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d60e796; op2val:0x7ea15e74;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 483*FLEN/8, x13, x9, x10)

inst_183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e3fac and fs2 == 0 and fe2 == 0xfb and fm2 == 0x5a8c22 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0e3fac; op2val:0x7dda8c22;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 486*FLEN/8, x13, x9, x10)

inst_184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74984e and fs2 == 0 and fe2 == 0xfb and fm2 == 0x01e0a6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef4984e; op2val:0x7d81e0a6;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 489*FLEN/8, x13, x9, x10)

inst_185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0dcb58 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3631e6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8dcb58; op2val:0x7f3631e6;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 492*FLEN/8, x13, x9, x10)

inst_186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2036ee and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ce997; op2val:0x7ea036ee;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 495*FLEN/8, x13, x9, x10)

inst_187:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 0 and fe2 == 0xfc and fm2 == 0x1caa1e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e76467b; op2val:0x7e1caa1e;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 498*FLEN/8, x13, x9, x10)

inst_188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x367396 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb4d220; op2val:0x7f367396;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 501*FLEN/8, x13, x9, x10)

inst_189:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x56577b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e54b690; op2val:0x7ed6577b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 504*FLEN/8, x13, x9, x10)

inst_190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2b53bd and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18c423; op2val:0x7eab53bd;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 507*FLEN/8, x13, x9, x10)

inst_191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x25c774 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f136313; op2val:0x7ea5c774;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 510*FLEN/8, x13, x9, x10)

inst_192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x33ec90 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eae1fa7; op2val:0x7f33ec90;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 513*FLEN/8, x13, x9, x10)

inst_193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 0 and fe2 == 0xfd and fm2 == 0x74b97b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb1933e; op2val:0x7ef4b97b;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 516*FLEN/8, x13, x9, x10)

inst_194:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 0 and fe2 == 0xf5 and fm2 == 0x3530a7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1c653b; op2val:0x7ab530a7;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 519*FLEN/8, x13, x9, x10)

inst_195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 0 and fe2 == 0xf7 and fm2 == 0x3f1e72 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed982c; op2val:0x7bbf1e72;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 522*FLEN/8, x13, x9, x10)

inst_196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x718162 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1393e8; op2val:0x7ef18162;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 525*FLEN/8, x13, x9, x10)

inst_197:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x079bc3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7deff4a3; op2val:0x7f079bc3;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 528*FLEN/8, x13, x9, x10)

inst_198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x11efef and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0235d7; op2val:0x7f11efef;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 531*FLEN/8, x13, x9, x10)

inst_199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x571b9d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f124d93; op2val:0x7e571b9d;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 534*FLEN/8, x13, x9, x10)

inst_200:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x46d91a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x445459 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e46d91a; op2val:0x7ec45459;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 537*FLEN/8, x13, x9, x10)

inst_201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6004c9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2e5b90 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee004c9; op2val:0x7f2e5b90;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 540*FLEN/8, x13, x9, x10)

inst_202:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x40638c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2eabd8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e40638c; op2val:0x7f2eabd8;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 543*FLEN/8, x13, x9, x10)

inst_203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b8fcb and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2d3742 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1b8fcb; op2val:0x7f2d3742;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 546*FLEN/8, x13, x9, x10)

inst_204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x354d84 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x1aad53 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb54d84; op2val:0x7d9aad53;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 549*FLEN/8, x13, x9, x10)

inst_205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a94a1 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2f4c51 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea94a1; op2val:0x7f2f4c51;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 552*FLEN/8, x13, x9, x10)

inst_206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x372bf7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2623b6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb72bf7; op2val:0x7f2623b6;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 555*FLEN/8, x13, x9, x10)

inst_207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a90b9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x52b355 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1a90b9; op2val:0x7ed2b355;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 558*FLEN/8, x13, x9, x10)

inst_208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2319ee and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2bd8f4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2319ee; op2val:0x7f2bd8f4;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 561*FLEN/8, x13, x9, x10)

inst_209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d88c2 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3f4810 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efd88c2; op2val:0x7f3f4810;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 564*FLEN/8, x13, x9, x10)

inst_210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3acb68 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x71fa00 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ebacb68; op2val:0x7ef1fa00;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 567*FLEN/8, x13, x9, x10)

inst_211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f3e7 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x0af584 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0xffffffff  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f05f3e7; op2val:0x7d0af584;
op3val:0xff7fffff; valaddr_reg:x12; val_offset:570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 570*FLEN/8, x13, x9, x10)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2132943109,64,FLEN)
NAN_BOXED(2131855097,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2118572314,64,FLEN)
NAN_BOXED(2118572314,64,FLEN)
NAN_BOXED(2118572314,32,FLEN)
NAN_BOXED(2132180292,64,FLEN)
NAN_BOXED(2120806836,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2128610505,64,FLEN)
NAN_BOXED(2133744528,64,FLEN)
NAN_BOXED(2128610505,32,FLEN)
NAN_BOXED(2119725970,64,FLEN)
NAN_BOXED(2131828041,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2118149004,64,FLEN)
NAN_BOXED(2133765080,64,FLEN)
NAN_BOXED(2133765080,32,FLEN)
NAN_BOXED(2132512715,64,FLEN)
NAN_BOXED(2133669698,64,FLEN)
NAN_BOXED(2133669698,32,FLEN)
NAN_BOXED(2131501232,64,FLEN)
NAN_BOXED(2133627826,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2125811076,64,FLEN)
NAN_BOXED(2125811076,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2129302689,64,FLEN)
NAN_BOXED(2133806161,64,FLEN)
NAN_BOXED(2129302689,32,FLEN)
NAN_BOXED(2125933559,64,FLEN)
NAN_BOXED(2125933559,64,FLEN)
NAN_BOXED(2125933559,32,FLEN)
NAN_BOXED(2132447417,64,FLEN)
NAN_BOXED(2132447417,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131373804,64,FLEN)
NAN_BOXED(2123965938,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2130725136,64,FLEN)
NAN_BOXED(2053156858,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133234792,64,FLEN)
NAN_BOXED(2117817043,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133270886,64,FLEN)
NAN_BOXED(2115157329,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2117550540,64,FLEN)
NAN_BOXED(2134492297,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2125202738,64,FLEN)
NAN_BOXED(2104959273,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2126711960,64,FLEN)
NAN_BOXED(2134055589,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2127802309,64,FLEN)
NAN_BOXED(2131208423,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2132566188,64,FLEN)
NAN_BOXED(2127525897,64,FLEN)
NAN_BOXED(4286578687,32,FLEN)
test_dataset_1:
NAN_BOXED(2129108878,32,FLEN)
NAN_BOXED(2128717083,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2128935265,32,FLEN)
NAN_BOXED(2123615570,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2120153369,32,FLEN)
NAN_BOXED(2115072985,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2129350157,32,FLEN)
NAN_BOXED(2130454589,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2106194015,32,FLEN)
NAN_BOXED(2131850687,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133936645,32,FLEN)
NAN_BOXED(2132918426,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133932888,32,FLEN)
NAN_BOXED(2127533858,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131192342,32,FLEN)
NAN_BOXED(2119413727,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133006830,32,FLEN)
NAN_BOXED(2133580020,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2134268631,32,FLEN)
NAN_BOXED(2128517718,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2134853648,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2132300163,32,FLEN)
NAN_BOXED(2105347264,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2126170984,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2117772990,32,FLEN)
NAN_BOXED(2131522088,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2116636749,32,FLEN)
NAN_BOXED(2132315991,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2132584386,32,FLEN)
NAN_BOXED(2107279484,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131096551,32,FLEN)
NAN_BOXED(2097870212,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133768474,32,FLEN)
NAN_BOXED(2127372747,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2091124332,32,FLEN)
NAN_BOXED(2129909511,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2128423545,32,FLEN)
NAN_BOXED(2123774322,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2134655578,32,FLEN)
NAN_BOXED(2095028153,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2134410395,32,FLEN)
NAN_BOXED(2114850550,32,FLEN)
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NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2125566782,32,FLEN)
NAN_BOXED(2129967483,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2115790139,32,FLEN)
NAN_BOXED(2058694823,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2129500204,32,FLEN)
NAN_BOXED(2076122738,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131989480,32,FLEN)
NAN_BOXED(2129756514,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2112877731,32,FLEN)
NAN_BOXED(2131205059,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2130851287,32,FLEN)
NAN_BOXED(2131881967,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131905939,32,FLEN)
NAN_BOXED(2119637917,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2118572314,32,FLEN)
NAN_BOXED(2126795865,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2128610505,32,FLEN)
NAN_BOXED(2133744528,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2118149004,32,FLEN)
NAN_BOXED(2133765080,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2132512715,32,FLEN)
NAN_BOXED(2133669698,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2125811076,32,FLEN)
NAN_BOXED(2107288915,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2129302689,32,FLEN)
NAN_BOXED(2133806161,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2125933559,32,FLEN)
NAN_BOXED(2133205942,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2132447417,32,FLEN)
NAN_BOXED(2127737685,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2133006830,32,FLEN)
NAN_BOXED(2133580020,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2130544834,32,FLEN)
NAN_BOXED(2134853648,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2126170984,32,FLEN)
NAN_BOXED(2129787392,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
NAN_BOXED(2131096551,32,FLEN)
NAN_BOXED(2097870212,32,FLEN)
NAN_BOXED(4286578687,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 120*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
