
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_33024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7f8000; valaddr_reg:x3; val_offset:99072*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99072*0 + 3*0*FLEN/8, x4, x1, x2)

inst_33025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fc000; valaddr_reg:x3; val_offset:99075*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99075*0 + 3*1*FLEN/8, x4, x1, x2)

inst_33026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fe000; valaddr_reg:x3; val_offset:99078*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99078*0 + 3*2*FLEN/8, x4, x1, x2)

inst_33027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ff000; valaddr_reg:x3; val_offset:99081*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99081*0 + 3*3*FLEN/8, x4, x1, x2)

inst_33028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ff800; valaddr_reg:x3; val_offset:99084*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99084*0 + 3*4*FLEN/8, x4, x1, x2)

inst_33029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:99087*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99087*0 + 3*5*FLEN/8, x4, x1, x2)

inst_33030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:99090*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99090*0 + 3*6*FLEN/8, x4, x1, x2)

inst_33031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fff00; valaddr_reg:x3; val_offset:99093*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99093*0 + 3*7*FLEN/8, x4, x1, x2)

inst_33032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fff80; valaddr_reg:x3; val_offset:99096*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99096*0 + 3*8*FLEN/8, x4, x1, x2)

inst_33033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:99099*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99099*0 + 3*9*FLEN/8, x4, x1, x2)

inst_33034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:99102*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99102*0 + 3*10*FLEN/8, x4, x1, x2)

inst_33035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:99105*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99105*0 + 3*11*FLEN/8, x4, x1, x2)

inst_33036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:99108*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99108*0 + 3*12*FLEN/8, x4, x1, x2)

inst_33037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:99111*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99111*0 + 3*13*FLEN/8, x4, x1, x2)

inst_33038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:99114*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99114*0 + 3*14*FLEN/8, x4, x1, x2)

inst_33039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f24d9b0; op2val:0x80000000;
op3val:0x8d7fffff; valaddr_reg:x3; val_offset:99117*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99117*0 + 3*15*FLEN/8, x4, x1, x2)

inst_33040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67000000; valaddr_reg:x3; val_offset:99120*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99120*0 + 3*16*FLEN/8, x4, x1, x2)

inst_33041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67000001; valaddr_reg:x3; val_offset:99123*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99123*0 + 3*17*FLEN/8, x4, x1, x2)

inst_33042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67000003; valaddr_reg:x3; val_offset:99126*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99126*0 + 3*18*FLEN/8, x4, x1, x2)

inst_33043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67000007; valaddr_reg:x3; val_offset:99129*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99129*0 + 3*19*FLEN/8, x4, x1, x2)

inst_33044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6700000f; valaddr_reg:x3; val_offset:99132*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99132*0 + 3*20*FLEN/8, x4, x1, x2)

inst_33045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6700001f; valaddr_reg:x3; val_offset:99135*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99135*0 + 3*21*FLEN/8, x4, x1, x2)

inst_33046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6700003f; valaddr_reg:x3; val_offset:99138*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99138*0 + 3*22*FLEN/8, x4, x1, x2)

inst_33047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6700007f; valaddr_reg:x3; val_offset:99141*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99141*0 + 3*23*FLEN/8, x4, x1, x2)

inst_33048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x670000ff; valaddr_reg:x3; val_offset:99144*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99144*0 + 3*24*FLEN/8, x4, x1, x2)

inst_33049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x670001ff; valaddr_reg:x3; val_offset:99147*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99147*0 + 3*25*FLEN/8, x4, x1, x2)

inst_33050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x670003ff; valaddr_reg:x3; val_offset:99150*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99150*0 + 3*26*FLEN/8, x4, x1, x2)

inst_33051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x670007ff; valaddr_reg:x3; val_offset:99153*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99153*0 + 3*27*FLEN/8, x4, x1, x2)

inst_33052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67000fff; valaddr_reg:x3; val_offset:99156*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99156*0 + 3*28*FLEN/8, x4, x1, x2)

inst_33053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67001fff; valaddr_reg:x3; val_offset:99159*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99159*0 + 3*29*FLEN/8, x4, x1, x2)

inst_33054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67003fff; valaddr_reg:x3; val_offset:99162*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99162*0 + 3*30*FLEN/8, x4, x1, x2)

inst_33055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67007fff; valaddr_reg:x3; val_offset:99165*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99165*0 + 3*31*FLEN/8, x4, x1, x2)

inst_33056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6700ffff; valaddr_reg:x3; val_offset:99168*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99168*0 + 3*32*FLEN/8, x4, x1, x2)

inst_33057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6701ffff; valaddr_reg:x3; val_offset:99171*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99171*0 + 3*33*FLEN/8, x4, x1, x2)

inst_33058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6703ffff; valaddr_reg:x3; val_offset:99174*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99174*0 + 3*34*FLEN/8, x4, x1, x2)

inst_33059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x6707ffff; valaddr_reg:x3; val_offset:99177*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99177*0 + 3*35*FLEN/8, x4, x1, x2)

inst_33060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x670fffff; valaddr_reg:x3; val_offset:99180*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99180*0 + 3*36*FLEN/8, x4, x1, x2)

inst_33061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x671fffff; valaddr_reg:x3; val_offset:99183*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99183*0 + 3*37*FLEN/8, x4, x1, x2)

inst_33062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x673fffff; valaddr_reg:x3; val_offset:99186*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99186*0 + 3*38*FLEN/8, x4, x1, x2)

inst_33063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67400000; valaddr_reg:x3; val_offset:99189*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99189*0 + 3*39*FLEN/8, x4, x1, x2)

inst_33064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67600000; valaddr_reg:x3; val_offset:99192*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99192*0 + 3*40*FLEN/8, x4, x1, x2)

inst_33065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67700000; valaddr_reg:x3; val_offset:99195*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99195*0 + 3*41*FLEN/8, x4, x1, x2)

inst_33066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x67780000; valaddr_reg:x3; val_offset:99198*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99198*0 + 3*42*FLEN/8, x4, x1, x2)

inst_33067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677c0000; valaddr_reg:x3; val_offset:99201*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99201*0 + 3*43*FLEN/8, x4, x1, x2)

inst_33068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677e0000; valaddr_reg:x3; val_offset:99204*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99204*0 + 3*44*FLEN/8, x4, x1, x2)

inst_33069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677f0000; valaddr_reg:x3; val_offset:99207*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99207*0 + 3*45*FLEN/8, x4, x1, x2)

inst_33070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677f8000; valaddr_reg:x3; val_offset:99210*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99210*0 + 3*46*FLEN/8, x4, x1, x2)

inst_33071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fc000; valaddr_reg:x3; val_offset:99213*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99213*0 + 3*47*FLEN/8, x4, x1, x2)

inst_33072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fe000; valaddr_reg:x3; val_offset:99216*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99216*0 + 3*48*FLEN/8, x4, x1, x2)

inst_33073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ff000; valaddr_reg:x3; val_offset:99219*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99219*0 + 3*49*FLEN/8, x4, x1, x2)

inst_33074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ff800; valaddr_reg:x3; val_offset:99222*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99222*0 + 3*50*FLEN/8, x4, x1, x2)

inst_33075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffc00; valaddr_reg:x3; val_offset:99225*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99225*0 + 3*51*FLEN/8, x4, x1, x2)

inst_33076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffe00; valaddr_reg:x3; val_offset:99228*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99228*0 + 3*52*FLEN/8, x4, x1, x2)

inst_33077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fff00; valaddr_reg:x3; val_offset:99231*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99231*0 + 3*53*FLEN/8, x4, x1, x2)

inst_33078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fff80; valaddr_reg:x3; val_offset:99234*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99234*0 + 3*54*FLEN/8, x4, x1, x2)

inst_33079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fffc0; valaddr_reg:x3; val_offset:99237*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99237*0 + 3*55*FLEN/8, x4, x1, x2)

inst_33080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fffe0; valaddr_reg:x3; val_offset:99240*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99240*0 + 3*56*FLEN/8, x4, x1, x2)

inst_33081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffff0; valaddr_reg:x3; val_offset:99243*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99243*0 + 3*57*FLEN/8, x4, x1, x2)

inst_33082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffff8; valaddr_reg:x3; val_offset:99246*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99246*0 + 3*58*FLEN/8, x4, x1, x2)

inst_33083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffffc; valaddr_reg:x3; val_offset:99249*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99249*0 + 3*59*FLEN/8, x4, x1, x2)

inst_33084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677ffffe; valaddr_reg:x3; val_offset:99252*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99252*0 + 3*60*FLEN/8, x4, x1, x2)

inst_33085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x677fffff; valaddr_reg:x3; val_offset:99255*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99255*0 + 3*61*FLEN/8, x4, x1, x2)

inst_33086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f000001; valaddr_reg:x3; val_offset:99258*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99258*0 + 3*62*FLEN/8, x4, x1, x2)

inst_33087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f000003; valaddr_reg:x3; val_offset:99261*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99261*0 + 3*63*FLEN/8, x4, x1, x2)

inst_33088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f000007; valaddr_reg:x3; val_offset:99264*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99264*0 + 3*64*FLEN/8, x4, x1, x2)

inst_33089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f199999; valaddr_reg:x3; val_offset:99267*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99267*0 + 3*65*FLEN/8, x4, x1, x2)

inst_33090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f249249; valaddr_reg:x3; val_offset:99270*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99270*0 + 3*66*FLEN/8, x4, x1, x2)

inst_33091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f333333; valaddr_reg:x3; val_offset:99273*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99273*0 + 3*67*FLEN/8, x4, x1, x2)

inst_33092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:99276*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99276*0 + 3*68*FLEN/8, x4, x1, x2)

inst_33093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:99279*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99279*0 + 3*69*FLEN/8, x4, x1, x2)

inst_33094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f444444; valaddr_reg:x3; val_offset:99282*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99282*0 + 3*70*FLEN/8, x4, x1, x2)

inst_33095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:99285*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99285*0 + 3*71*FLEN/8, x4, x1, x2)

inst_33096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:99288*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99288*0 + 3*72*FLEN/8, x4, x1, x2)

inst_33097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f666666; valaddr_reg:x3; val_offset:99291*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99291*0 + 3*73*FLEN/8, x4, x1, x2)

inst_33098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:99294*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99294*0 + 3*74*FLEN/8, x4, x1, x2)

inst_33099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:99297*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99297*0 + 3*75*FLEN/8, x4, x1, x2)

inst_33100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:99300*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99300*0 + 3*76*FLEN/8, x4, x1, x2)

inst_33101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25073e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x468f53 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25073e; op2val:0x3fc68f53;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:99303*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99303*0 + 3*77*FLEN/8, x4, x1, x2)

inst_33102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:99306*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99306*0 + 3*78*FLEN/8, x4, x1, x2)

inst_33103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:99309*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99309*0 + 3*79*FLEN/8, x4, x1, x2)

inst_33104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:99312*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99312*0 + 3*80*FLEN/8, x4, x1, x2)

inst_33105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:99315*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99315*0 + 3*81*FLEN/8, x4, x1, x2)

inst_33106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:99318*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99318*0 + 3*82*FLEN/8, x4, x1, x2)

inst_33107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:99321*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99321*0 + 3*83*FLEN/8, x4, x1, x2)

inst_33108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:99324*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99324*0 + 3*84*FLEN/8, x4, x1, x2)

inst_33109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:99327*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99327*0 + 3*85*FLEN/8, x4, x1, x2)

inst_33110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:99330*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99330*0 + 3*86*FLEN/8, x4, x1, x2)

inst_33111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:99333*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99333*0 + 3*87*FLEN/8, x4, x1, x2)

inst_33112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:99336*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99336*0 + 3*88*FLEN/8, x4, x1, x2)

inst_33113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:99339*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99339*0 + 3*89*FLEN/8, x4, x1, x2)

inst_33114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:99342*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99342*0 + 3*90*FLEN/8, x4, x1, x2)

inst_33115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:99345*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99345*0 + 3*91*FLEN/8, x4, x1, x2)

inst_33116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:99348*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99348*0 + 3*92*FLEN/8, x4, x1, x2)

inst_33117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:99351*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99351*0 + 3*93*FLEN/8, x4, x1, x2)

inst_33118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89000000; valaddr_reg:x3; val_offset:99354*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99354*0 + 3*94*FLEN/8, x4, x1, x2)

inst_33119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89000001; valaddr_reg:x3; val_offset:99357*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99357*0 + 3*95*FLEN/8, x4, x1, x2)

inst_33120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89000003; valaddr_reg:x3; val_offset:99360*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99360*0 + 3*96*FLEN/8, x4, x1, x2)

inst_33121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89000007; valaddr_reg:x3; val_offset:99363*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99363*0 + 3*97*FLEN/8, x4, x1, x2)

inst_33122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8900000f; valaddr_reg:x3; val_offset:99366*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99366*0 + 3*98*FLEN/8, x4, x1, x2)

inst_33123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8900001f; valaddr_reg:x3; val_offset:99369*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99369*0 + 3*99*FLEN/8, x4, x1, x2)

inst_33124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8900003f; valaddr_reg:x3; val_offset:99372*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99372*0 + 3*100*FLEN/8, x4, x1, x2)

inst_33125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8900007f; valaddr_reg:x3; val_offset:99375*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99375*0 + 3*101*FLEN/8, x4, x1, x2)

inst_33126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x890000ff; valaddr_reg:x3; val_offset:99378*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99378*0 + 3*102*FLEN/8, x4, x1, x2)

inst_33127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x890001ff; valaddr_reg:x3; val_offset:99381*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99381*0 + 3*103*FLEN/8, x4, x1, x2)

inst_33128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x890003ff; valaddr_reg:x3; val_offset:99384*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99384*0 + 3*104*FLEN/8, x4, x1, x2)

inst_33129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x890007ff; valaddr_reg:x3; val_offset:99387*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99387*0 + 3*105*FLEN/8, x4, x1, x2)

inst_33130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89000fff; valaddr_reg:x3; val_offset:99390*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99390*0 + 3*106*FLEN/8, x4, x1, x2)

inst_33131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89001fff; valaddr_reg:x3; val_offset:99393*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99393*0 + 3*107*FLEN/8, x4, x1, x2)

inst_33132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89003fff; valaddr_reg:x3; val_offset:99396*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99396*0 + 3*108*FLEN/8, x4, x1, x2)

inst_33133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89007fff; valaddr_reg:x3; val_offset:99399*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99399*0 + 3*109*FLEN/8, x4, x1, x2)

inst_33134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8900ffff; valaddr_reg:x3; val_offset:99402*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99402*0 + 3*110*FLEN/8, x4, x1, x2)

inst_33135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8901ffff; valaddr_reg:x3; val_offset:99405*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99405*0 + 3*111*FLEN/8, x4, x1, x2)

inst_33136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8903ffff; valaddr_reg:x3; val_offset:99408*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99408*0 + 3*112*FLEN/8, x4, x1, x2)

inst_33137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x8907ffff; valaddr_reg:x3; val_offset:99411*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99411*0 + 3*113*FLEN/8, x4, x1, x2)

inst_33138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x890fffff; valaddr_reg:x3; val_offset:99414*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99414*0 + 3*114*FLEN/8, x4, x1, x2)

inst_33139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x891fffff; valaddr_reg:x3; val_offset:99417*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99417*0 + 3*115*FLEN/8, x4, x1, x2)

inst_33140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x893fffff; valaddr_reg:x3; val_offset:99420*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99420*0 + 3*116*FLEN/8, x4, x1, x2)

inst_33141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89400000; valaddr_reg:x3; val_offset:99423*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99423*0 + 3*117*FLEN/8, x4, x1, x2)

inst_33142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89600000; valaddr_reg:x3; val_offset:99426*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99426*0 + 3*118*FLEN/8, x4, x1, x2)

inst_33143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89700000; valaddr_reg:x3; val_offset:99429*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99429*0 + 3*119*FLEN/8, x4, x1, x2)

inst_33144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x89780000; valaddr_reg:x3; val_offset:99432*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99432*0 + 3*120*FLEN/8, x4, x1, x2)

inst_33145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897c0000; valaddr_reg:x3; val_offset:99435*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99435*0 + 3*121*FLEN/8, x4, x1, x2)

inst_33146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897e0000; valaddr_reg:x3; val_offset:99438*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99438*0 + 3*122*FLEN/8, x4, x1, x2)

inst_33147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897f0000; valaddr_reg:x3; val_offset:99441*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99441*0 + 3*123*FLEN/8, x4, x1, x2)

inst_33148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897f8000; valaddr_reg:x3; val_offset:99444*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99444*0 + 3*124*FLEN/8, x4, x1, x2)

inst_33149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fc000; valaddr_reg:x3; val_offset:99447*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99447*0 + 3*125*FLEN/8, x4, x1, x2)

inst_33150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fe000; valaddr_reg:x3; val_offset:99450*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99450*0 + 3*126*FLEN/8, x4, x1, x2)

inst_33151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ff000; valaddr_reg:x3; val_offset:99453*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99453*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_33152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ff800; valaddr_reg:x3; val_offset:99456*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99456*0 + 3*128*FLEN/8, x4, x1, x2)

inst_33153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffc00; valaddr_reg:x3; val_offset:99459*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99459*0 + 3*129*FLEN/8, x4, x1, x2)

inst_33154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffe00; valaddr_reg:x3; val_offset:99462*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99462*0 + 3*130*FLEN/8, x4, x1, x2)

inst_33155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fff00; valaddr_reg:x3; val_offset:99465*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99465*0 + 3*131*FLEN/8, x4, x1, x2)

inst_33156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fff80; valaddr_reg:x3; val_offset:99468*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99468*0 + 3*132*FLEN/8, x4, x1, x2)

inst_33157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fffc0; valaddr_reg:x3; val_offset:99471*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99471*0 + 3*133*FLEN/8, x4, x1, x2)

inst_33158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fffe0; valaddr_reg:x3; val_offset:99474*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99474*0 + 3*134*FLEN/8, x4, x1, x2)

inst_33159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffff0; valaddr_reg:x3; val_offset:99477*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99477*0 + 3*135*FLEN/8, x4, x1, x2)

inst_33160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffff8; valaddr_reg:x3; val_offset:99480*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99480*0 + 3*136*FLEN/8, x4, x1, x2)

inst_33161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffffc; valaddr_reg:x3; val_offset:99483*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99483*0 + 3*137*FLEN/8, x4, x1, x2)

inst_33162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897ffffe; valaddr_reg:x3; val_offset:99486*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99486*0 + 3*138*FLEN/8, x4, x1, x2)

inst_33163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x253e0d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f253e0d; op2val:0x80000000;
op3val:0x897fffff; valaddr_reg:x3; val_offset:99489*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99489*0 + 3*139*FLEN/8, x4, x1, x2)

inst_33164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:99492*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99492*0 + 3*140*FLEN/8, x4, x1, x2)

inst_33165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:99495*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99495*0 + 3*141*FLEN/8, x4, x1, x2)

inst_33166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:99498*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99498*0 + 3*142*FLEN/8, x4, x1, x2)

inst_33167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:99501*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99501*0 + 3*143*FLEN/8, x4, x1, x2)

inst_33168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:99504*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99504*0 + 3*144*FLEN/8, x4, x1, x2)

inst_33169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:99507*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99507*0 + 3*145*FLEN/8, x4, x1, x2)

inst_33170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:99510*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99510*0 + 3*146*FLEN/8, x4, x1, x2)

inst_33171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:99513*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99513*0 + 3*147*FLEN/8, x4, x1, x2)

inst_33172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:99516*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99516*0 + 3*148*FLEN/8, x4, x1, x2)

inst_33173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:99519*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99519*0 + 3*149*FLEN/8, x4, x1, x2)

inst_33174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:99522*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99522*0 + 3*150*FLEN/8, x4, x1, x2)

inst_33175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:99525*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99525*0 + 3*151*FLEN/8, x4, x1, x2)

inst_33176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:99528*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99528*0 + 3*152*FLEN/8, x4, x1, x2)

inst_33177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:99531*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99531*0 + 3*153*FLEN/8, x4, x1, x2)

inst_33178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:99534*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99534*0 + 3*154*FLEN/8, x4, x1, x2)

inst_33179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:99537*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99537*0 + 3*155*FLEN/8, x4, x1, x2)

inst_33180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6000000; valaddr_reg:x3; val_offset:99540*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99540*0 + 3*156*FLEN/8, x4, x1, x2)

inst_33181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6000001; valaddr_reg:x3; val_offset:99543*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99543*0 + 3*157*FLEN/8, x4, x1, x2)

inst_33182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6000003; valaddr_reg:x3; val_offset:99546*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99546*0 + 3*158*FLEN/8, x4, x1, x2)

inst_33183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6000007; valaddr_reg:x3; val_offset:99549*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99549*0 + 3*159*FLEN/8, x4, x1, x2)

inst_33184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x600000f; valaddr_reg:x3; val_offset:99552*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99552*0 + 3*160*FLEN/8, x4, x1, x2)

inst_33185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x600001f; valaddr_reg:x3; val_offset:99555*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99555*0 + 3*161*FLEN/8, x4, x1, x2)

inst_33186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x600003f; valaddr_reg:x3; val_offset:99558*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99558*0 + 3*162*FLEN/8, x4, x1, x2)

inst_33187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x600007f; valaddr_reg:x3; val_offset:99561*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99561*0 + 3*163*FLEN/8, x4, x1, x2)

inst_33188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x60000ff; valaddr_reg:x3; val_offset:99564*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99564*0 + 3*164*FLEN/8, x4, x1, x2)

inst_33189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x60001ff; valaddr_reg:x3; val_offset:99567*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99567*0 + 3*165*FLEN/8, x4, x1, x2)

inst_33190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x60003ff; valaddr_reg:x3; val_offset:99570*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99570*0 + 3*166*FLEN/8, x4, x1, x2)

inst_33191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x60007ff; valaddr_reg:x3; val_offset:99573*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99573*0 + 3*167*FLEN/8, x4, x1, x2)

inst_33192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6000fff; valaddr_reg:x3; val_offset:99576*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99576*0 + 3*168*FLEN/8, x4, x1, x2)

inst_33193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6001fff; valaddr_reg:x3; val_offset:99579*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99579*0 + 3*169*FLEN/8, x4, x1, x2)

inst_33194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6003fff; valaddr_reg:x3; val_offset:99582*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99582*0 + 3*170*FLEN/8, x4, x1, x2)

inst_33195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6007fff; valaddr_reg:x3; val_offset:99585*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99585*0 + 3*171*FLEN/8, x4, x1, x2)

inst_33196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x600ffff; valaddr_reg:x3; val_offset:99588*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99588*0 + 3*172*FLEN/8, x4, x1, x2)

inst_33197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x601ffff; valaddr_reg:x3; val_offset:99591*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99591*0 + 3*173*FLEN/8, x4, x1, x2)

inst_33198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x603ffff; valaddr_reg:x3; val_offset:99594*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99594*0 + 3*174*FLEN/8, x4, x1, x2)

inst_33199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x607ffff; valaddr_reg:x3; val_offset:99597*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99597*0 + 3*175*FLEN/8, x4, x1, x2)

inst_33200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x60fffff; valaddr_reg:x3; val_offset:99600*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99600*0 + 3*176*FLEN/8, x4, x1, x2)

inst_33201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x61fffff; valaddr_reg:x3; val_offset:99603*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99603*0 + 3*177*FLEN/8, x4, x1, x2)

inst_33202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x63fffff; valaddr_reg:x3; val_offset:99606*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99606*0 + 3*178*FLEN/8, x4, x1, x2)

inst_33203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6400000; valaddr_reg:x3; val_offset:99609*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99609*0 + 3*179*FLEN/8, x4, x1, x2)

inst_33204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6600000; valaddr_reg:x3; val_offset:99612*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99612*0 + 3*180*FLEN/8, x4, x1, x2)

inst_33205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6700000; valaddr_reg:x3; val_offset:99615*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99615*0 + 3*181*FLEN/8, x4, x1, x2)

inst_33206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x6780000; valaddr_reg:x3; val_offset:99618*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99618*0 + 3*182*FLEN/8, x4, x1, x2)

inst_33207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67c0000; valaddr_reg:x3; val_offset:99621*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99621*0 + 3*183*FLEN/8, x4, x1, x2)

inst_33208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67e0000; valaddr_reg:x3; val_offset:99624*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99624*0 + 3*184*FLEN/8, x4, x1, x2)

inst_33209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67f0000; valaddr_reg:x3; val_offset:99627*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99627*0 + 3*185*FLEN/8, x4, x1, x2)

inst_33210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67f8000; valaddr_reg:x3; val_offset:99630*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99630*0 + 3*186*FLEN/8, x4, x1, x2)

inst_33211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fc000; valaddr_reg:x3; val_offset:99633*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99633*0 + 3*187*FLEN/8, x4, x1, x2)

inst_33212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fe000; valaddr_reg:x3; val_offset:99636*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99636*0 + 3*188*FLEN/8, x4, x1, x2)

inst_33213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ff000; valaddr_reg:x3; val_offset:99639*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99639*0 + 3*189*FLEN/8, x4, x1, x2)

inst_33214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ff800; valaddr_reg:x3; val_offset:99642*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99642*0 + 3*190*FLEN/8, x4, x1, x2)

inst_33215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffc00; valaddr_reg:x3; val_offset:99645*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99645*0 + 3*191*FLEN/8, x4, x1, x2)

inst_33216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffe00; valaddr_reg:x3; val_offset:99648*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99648*0 + 3*192*FLEN/8, x4, x1, x2)

inst_33217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fff00; valaddr_reg:x3; val_offset:99651*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99651*0 + 3*193*FLEN/8, x4, x1, x2)

inst_33218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fff80; valaddr_reg:x3; val_offset:99654*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99654*0 + 3*194*FLEN/8, x4, x1, x2)

inst_33219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fffc0; valaddr_reg:x3; val_offset:99657*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99657*0 + 3*195*FLEN/8, x4, x1, x2)

inst_33220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fffe0; valaddr_reg:x3; val_offset:99660*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99660*0 + 3*196*FLEN/8, x4, x1, x2)

inst_33221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffff0; valaddr_reg:x3; val_offset:99663*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99663*0 + 3*197*FLEN/8, x4, x1, x2)

inst_33222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffff8; valaddr_reg:x3; val_offset:99666*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99666*0 + 3*198*FLEN/8, x4, x1, x2)

inst_33223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffffc; valaddr_reg:x3; val_offset:99669*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99669*0 + 3*199*FLEN/8, x4, x1, x2)

inst_33224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67ffffe; valaddr_reg:x3; val_offset:99672*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99672*0 + 3*200*FLEN/8, x4, x1, x2)

inst_33225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2550f4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2550f4; op2val:0x0;
op3val:0x67fffff; valaddr_reg:x3; val_offset:99675*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99675*0 + 3*201*FLEN/8, x4, x1, x2)

inst_33226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2000000; valaddr_reg:x3; val_offset:99678*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99678*0 + 3*202*FLEN/8, x4, x1, x2)

inst_33227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2000001; valaddr_reg:x3; val_offset:99681*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99681*0 + 3*203*FLEN/8, x4, x1, x2)

inst_33228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2000003; valaddr_reg:x3; val_offset:99684*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99684*0 + 3*204*FLEN/8, x4, x1, x2)

inst_33229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2000007; valaddr_reg:x3; val_offset:99687*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99687*0 + 3*205*FLEN/8, x4, x1, x2)

inst_33230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe200000f; valaddr_reg:x3; val_offset:99690*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99690*0 + 3*206*FLEN/8, x4, x1, x2)

inst_33231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe200001f; valaddr_reg:x3; val_offset:99693*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99693*0 + 3*207*FLEN/8, x4, x1, x2)

inst_33232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe200003f; valaddr_reg:x3; val_offset:99696*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99696*0 + 3*208*FLEN/8, x4, x1, x2)

inst_33233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe200007f; valaddr_reg:x3; val_offset:99699*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99699*0 + 3*209*FLEN/8, x4, x1, x2)

inst_33234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe20000ff; valaddr_reg:x3; val_offset:99702*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99702*0 + 3*210*FLEN/8, x4, x1, x2)

inst_33235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe20001ff; valaddr_reg:x3; val_offset:99705*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99705*0 + 3*211*FLEN/8, x4, x1, x2)

inst_33236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe20003ff; valaddr_reg:x3; val_offset:99708*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99708*0 + 3*212*FLEN/8, x4, x1, x2)

inst_33237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe20007ff; valaddr_reg:x3; val_offset:99711*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99711*0 + 3*213*FLEN/8, x4, x1, x2)

inst_33238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2000fff; valaddr_reg:x3; val_offset:99714*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99714*0 + 3*214*FLEN/8, x4, x1, x2)

inst_33239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2001fff; valaddr_reg:x3; val_offset:99717*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99717*0 + 3*215*FLEN/8, x4, x1, x2)

inst_33240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2003fff; valaddr_reg:x3; val_offset:99720*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99720*0 + 3*216*FLEN/8, x4, x1, x2)

inst_33241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2007fff; valaddr_reg:x3; val_offset:99723*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99723*0 + 3*217*FLEN/8, x4, x1, x2)

inst_33242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe200ffff; valaddr_reg:x3; val_offset:99726*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99726*0 + 3*218*FLEN/8, x4, x1, x2)

inst_33243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe201ffff; valaddr_reg:x3; val_offset:99729*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99729*0 + 3*219*FLEN/8, x4, x1, x2)

inst_33244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe203ffff; valaddr_reg:x3; val_offset:99732*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99732*0 + 3*220*FLEN/8, x4, x1, x2)

inst_33245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe207ffff; valaddr_reg:x3; val_offset:99735*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99735*0 + 3*221*FLEN/8, x4, x1, x2)

inst_33246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe20fffff; valaddr_reg:x3; val_offset:99738*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99738*0 + 3*222*FLEN/8, x4, x1, x2)

inst_33247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe21fffff; valaddr_reg:x3; val_offset:99741*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99741*0 + 3*223*FLEN/8, x4, x1, x2)

inst_33248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe23fffff; valaddr_reg:x3; val_offset:99744*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99744*0 + 3*224*FLEN/8, x4, x1, x2)

inst_33249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2400000; valaddr_reg:x3; val_offset:99747*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99747*0 + 3*225*FLEN/8, x4, x1, x2)

inst_33250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2600000; valaddr_reg:x3; val_offset:99750*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99750*0 + 3*226*FLEN/8, x4, x1, x2)

inst_33251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2700000; valaddr_reg:x3; val_offset:99753*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99753*0 + 3*227*FLEN/8, x4, x1, x2)

inst_33252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe2780000; valaddr_reg:x3; val_offset:99756*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99756*0 + 3*228*FLEN/8, x4, x1, x2)

inst_33253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27c0000; valaddr_reg:x3; val_offset:99759*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99759*0 + 3*229*FLEN/8, x4, x1, x2)

inst_33254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27e0000; valaddr_reg:x3; val_offset:99762*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99762*0 + 3*230*FLEN/8, x4, x1, x2)

inst_33255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27f0000; valaddr_reg:x3; val_offset:99765*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99765*0 + 3*231*FLEN/8, x4, x1, x2)

inst_33256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27f8000; valaddr_reg:x3; val_offset:99768*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99768*0 + 3*232*FLEN/8, x4, x1, x2)

inst_33257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fc000; valaddr_reg:x3; val_offset:99771*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99771*0 + 3*233*FLEN/8, x4, x1, x2)

inst_33258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fe000; valaddr_reg:x3; val_offset:99774*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99774*0 + 3*234*FLEN/8, x4, x1, x2)

inst_33259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ff000; valaddr_reg:x3; val_offset:99777*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99777*0 + 3*235*FLEN/8, x4, x1, x2)

inst_33260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ff800; valaddr_reg:x3; val_offset:99780*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99780*0 + 3*236*FLEN/8, x4, x1, x2)

inst_33261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffc00; valaddr_reg:x3; val_offset:99783*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99783*0 + 3*237*FLEN/8, x4, x1, x2)

inst_33262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffe00; valaddr_reg:x3; val_offset:99786*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99786*0 + 3*238*FLEN/8, x4, x1, x2)

inst_33263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fff00; valaddr_reg:x3; val_offset:99789*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99789*0 + 3*239*FLEN/8, x4, x1, x2)

inst_33264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fff80; valaddr_reg:x3; val_offset:99792*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99792*0 + 3*240*FLEN/8, x4, x1, x2)

inst_33265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fffc0; valaddr_reg:x3; val_offset:99795*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99795*0 + 3*241*FLEN/8, x4, x1, x2)

inst_33266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fffe0; valaddr_reg:x3; val_offset:99798*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99798*0 + 3*242*FLEN/8, x4, x1, x2)

inst_33267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffff0; valaddr_reg:x3; val_offset:99801*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99801*0 + 3*243*FLEN/8, x4, x1, x2)

inst_33268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffff8; valaddr_reg:x3; val_offset:99804*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99804*0 + 3*244*FLEN/8, x4, x1, x2)

inst_33269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffffc; valaddr_reg:x3; val_offset:99807*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99807*0 + 3*245*FLEN/8, x4, x1, x2)

inst_33270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27ffffe; valaddr_reg:x3; val_offset:99810*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99810*0 + 3*246*FLEN/8, x4, x1, x2)

inst_33271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xe27fffff; valaddr_reg:x3; val_offset:99813*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99813*0 + 3*247*FLEN/8, x4, x1, x2)

inst_33272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff000001; valaddr_reg:x3; val_offset:99816*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99816*0 + 3*248*FLEN/8, x4, x1, x2)

inst_33273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff000003; valaddr_reg:x3; val_offset:99819*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99819*0 + 3*249*FLEN/8, x4, x1, x2)

inst_33274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff000007; valaddr_reg:x3; val_offset:99822*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99822*0 + 3*250*FLEN/8, x4, x1, x2)

inst_33275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff199999; valaddr_reg:x3; val_offset:99825*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99825*0 + 3*251*FLEN/8, x4, x1, x2)

inst_33276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff249249; valaddr_reg:x3; val_offset:99828*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99828*0 + 3*252*FLEN/8, x4, x1, x2)

inst_33277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff333333; valaddr_reg:x3; val_offset:99831*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99831*0 + 3*253*FLEN/8, x4, x1, x2)

inst_33278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:99834*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99834*0 + 3*254*FLEN/8, x4, x1, x2)

inst_33279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:99837*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99837*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_33280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff444444; valaddr_reg:x3; val_offset:99840*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99840*0 + 3*256*FLEN/8, x4, x1, x2)

inst_33281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:99843*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99843*0 + 3*257*FLEN/8, x4, x1, x2)

inst_33282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:99846*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99846*0 + 3*258*FLEN/8, x4, x1, x2)

inst_33283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff666666; valaddr_reg:x3; val_offset:99849*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99849*0 + 3*259*FLEN/8, x4, x1, x2)

inst_33284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:99852*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99852*0 + 3*260*FLEN/8, x4, x1, x2)

inst_33285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:99855*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99855*0 + 3*261*FLEN/8, x4, x1, x2)

inst_33286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:99858*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99858*0 + 3*262*FLEN/8, x4, x1, x2)

inst_33287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25667a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x461cff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25667a; op2val:0xbfc61cff;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:99861*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99861*0 + 3*263*FLEN/8, x4, x1, x2)

inst_33288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6000000; valaddr_reg:x3; val_offset:99864*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99864*0 + 3*264*FLEN/8, x4, x1, x2)

inst_33289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6000001; valaddr_reg:x3; val_offset:99867*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99867*0 + 3*265*FLEN/8, x4, x1, x2)

inst_33290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6000003; valaddr_reg:x3; val_offset:99870*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99870*0 + 3*266*FLEN/8, x4, x1, x2)

inst_33291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6000007; valaddr_reg:x3; val_offset:99873*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99873*0 + 3*267*FLEN/8, x4, x1, x2)

inst_33292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb600000f; valaddr_reg:x3; val_offset:99876*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99876*0 + 3*268*FLEN/8, x4, x1, x2)

inst_33293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb600001f; valaddr_reg:x3; val_offset:99879*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99879*0 + 3*269*FLEN/8, x4, x1, x2)

inst_33294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb600003f; valaddr_reg:x3; val_offset:99882*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99882*0 + 3*270*FLEN/8, x4, x1, x2)

inst_33295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb600007f; valaddr_reg:x3; val_offset:99885*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99885*0 + 3*271*FLEN/8, x4, x1, x2)

inst_33296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb60000ff; valaddr_reg:x3; val_offset:99888*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99888*0 + 3*272*FLEN/8, x4, x1, x2)

inst_33297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb60001ff; valaddr_reg:x3; val_offset:99891*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99891*0 + 3*273*FLEN/8, x4, x1, x2)

inst_33298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb60003ff; valaddr_reg:x3; val_offset:99894*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99894*0 + 3*274*FLEN/8, x4, x1, x2)

inst_33299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb60007ff; valaddr_reg:x3; val_offset:99897*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99897*0 + 3*275*FLEN/8, x4, x1, x2)

inst_33300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6000fff; valaddr_reg:x3; val_offset:99900*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99900*0 + 3*276*FLEN/8, x4, x1, x2)

inst_33301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6001fff; valaddr_reg:x3; val_offset:99903*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99903*0 + 3*277*FLEN/8, x4, x1, x2)

inst_33302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6003fff; valaddr_reg:x3; val_offset:99906*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99906*0 + 3*278*FLEN/8, x4, x1, x2)

inst_33303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6007fff; valaddr_reg:x3; val_offset:99909*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99909*0 + 3*279*FLEN/8, x4, x1, x2)

inst_33304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb600ffff; valaddr_reg:x3; val_offset:99912*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99912*0 + 3*280*FLEN/8, x4, x1, x2)

inst_33305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb601ffff; valaddr_reg:x3; val_offset:99915*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99915*0 + 3*281*FLEN/8, x4, x1, x2)

inst_33306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb603ffff; valaddr_reg:x3; val_offset:99918*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99918*0 + 3*282*FLEN/8, x4, x1, x2)

inst_33307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb607ffff; valaddr_reg:x3; val_offset:99921*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99921*0 + 3*283*FLEN/8, x4, x1, x2)

inst_33308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb60fffff; valaddr_reg:x3; val_offset:99924*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99924*0 + 3*284*FLEN/8, x4, x1, x2)

inst_33309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb61fffff; valaddr_reg:x3; val_offset:99927*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99927*0 + 3*285*FLEN/8, x4, x1, x2)

inst_33310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb63fffff; valaddr_reg:x3; val_offset:99930*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99930*0 + 3*286*FLEN/8, x4, x1, x2)

inst_33311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6400000; valaddr_reg:x3; val_offset:99933*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99933*0 + 3*287*FLEN/8, x4, x1, x2)

inst_33312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6600000; valaddr_reg:x3; val_offset:99936*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99936*0 + 3*288*FLEN/8, x4, x1, x2)

inst_33313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6700000; valaddr_reg:x3; val_offset:99939*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99939*0 + 3*289*FLEN/8, x4, x1, x2)

inst_33314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb6780000; valaddr_reg:x3; val_offset:99942*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99942*0 + 3*290*FLEN/8, x4, x1, x2)

inst_33315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67c0000; valaddr_reg:x3; val_offset:99945*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99945*0 + 3*291*FLEN/8, x4, x1, x2)

inst_33316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67e0000; valaddr_reg:x3; val_offset:99948*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99948*0 + 3*292*FLEN/8, x4, x1, x2)

inst_33317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67f0000; valaddr_reg:x3; val_offset:99951*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99951*0 + 3*293*FLEN/8, x4, x1, x2)

inst_33318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67f8000; valaddr_reg:x3; val_offset:99954*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99954*0 + 3*294*FLEN/8, x4, x1, x2)

inst_33319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fc000; valaddr_reg:x3; val_offset:99957*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99957*0 + 3*295*FLEN/8, x4, x1, x2)

inst_33320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fe000; valaddr_reg:x3; val_offset:99960*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99960*0 + 3*296*FLEN/8, x4, x1, x2)

inst_33321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ff000; valaddr_reg:x3; val_offset:99963*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99963*0 + 3*297*FLEN/8, x4, x1, x2)

inst_33322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ff800; valaddr_reg:x3; val_offset:99966*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99966*0 + 3*298*FLEN/8, x4, x1, x2)

inst_33323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffc00; valaddr_reg:x3; val_offset:99969*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99969*0 + 3*299*FLEN/8, x4, x1, x2)

inst_33324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffe00; valaddr_reg:x3; val_offset:99972*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99972*0 + 3*300*FLEN/8, x4, x1, x2)

inst_33325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fff00; valaddr_reg:x3; val_offset:99975*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99975*0 + 3*301*FLEN/8, x4, x1, x2)

inst_33326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fff80; valaddr_reg:x3; val_offset:99978*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99978*0 + 3*302*FLEN/8, x4, x1, x2)

inst_33327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fffc0; valaddr_reg:x3; val_offset:99981*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99981*0 + 3*303*FLEN/8, x4, x1, x2)

inst_33328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fffe0; valaddr_reg:x3; val_offset:99984*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99984*0 + 3*304*FLEN/8, x4, x1, x2)

inst_33329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffff0; valaddr_reg:x3; val_offset:99987*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99987*0 + 3*305*FLEN/8, x4, x1, x2)

inst_33330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffff8; valaddr_reg:x3; val_offset:99990*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99990*0 + 3*306*FLEN/8, x4, x1, x2)

inst_33331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffffc; valaddr_reg:x3; val_offset:99993*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99993*0 + 3*307*FLEN/8, x4, x1, x2)

inst_33332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67ffffe; valaddr_reg:x3; val_offset:99996*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99996*0 + 3*308*FLEN/8, x4, x1, x2)

inst_33333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xb67fffff; valaddr_reg:x3; val_offset:99999*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99999*0 + 3*309*FLEN/8, x4, x1, x2)

inst_33334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbf800001; valaddr_reg:x3; val_offset:100002*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100002*0 + 3*310*FLEN/8, x4, x1, x2)

inst_33335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbf800003; valaddr_reg:x3; val_offset:100005*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100005*0 + 3*311*FLEN/8, x4, x1, x2)

inst_33336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbf800007; valaddr_reg:x3; val_offset:100008*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100008*0 + 3*312*FLEN/8, x4, x1, x2)

inst_33337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbf999999; valaddr_reg:x3; val_offset:100011*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100011*0 + 3*313*FLEN/8, x4, x1, x2)

inst_33338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:100014*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100014*0 + 3*314*FLEN/8, x4, x1, x2)

inst_33339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:100017*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100017*0 + 3*315*FLEN/8, x4, x1, x2)

inst_33340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100020*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100020*0 + 3*316*FLEN/8, x4, x1, x2)

inst_33341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100023*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100023*0 + 3*317*FLEN/8, x4, x1, x2)

inst_33342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:100026*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100026*0 + 3*318*FLEN/8, x4, x1, x2)

inst_33343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100029*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100029*0 + 3*319*FLEN/8, x4, x1, x2)

inst_33344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100032*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100032*0 + 3*320*FLEN/8, x4, x1, x2)

inst_33345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:100035*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100035*0 + 3*321*FLEN/8, x4, x1, x2)

inst_33346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100038*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100038*0 + 3*322*FLEN/8, x4, x1, x2)

inst_33347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:100041*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100041*0 + 3*323*FLEN/8, x4, x1, x2)

inst_33348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:100044*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100044*0 + 3*324*FLEN/8, x4, x1, x2)

inst_33349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25708a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31843c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25708a; op2val:0x8031843c;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:100047*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100047*0 + 3*325*FLEN/8, x4, x1, x2)

inst_33350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000000; valaddr_reg:x3; val_offset:100050*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100050*0 + 3*326*FLEN/8, x4, x1, x2)

inst_33351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000001; valaddr_reg:x3; val_offset:100053*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100053*0 + 3*327*FLEN/8, x4, x1, x2)

inst_33352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000003; valaddr_reg:x3; val_offset:100056*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100056*0 + 3*328*FLEN/8, x4, x1, x2)

inst_33353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000007; valaddr_reg:x3; val_offset:100059*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100059*0 + 3*329*FLEN/8, x4, x1, x2)

inst_33354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00000f; valaddr_reg:x3; val_offset:100062*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100062*0 + 3*330*FLEN/8, x4, x1, x2)

inst_33355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00001f; valaddr_reg:x3; val_offset:100065*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100065*0 + 3*331*FLEN/8, x4, x1, x2)

inst_33356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00003f; valaddr_reg:x3; val_offset:100068*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100068*0 + 3*332*FLEN/8, x4, x1, x2)

inst_33357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00007f; valaddr_reg:x3; val_offset:100071*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100071*0 + 3*333*FLEN/8, x4, x1, x2)

inst_33358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0000ff; valaddr_reg:x3; val_offset:100074*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100074*0 + 3*334*FLEN/8, x4, x1, x2)

inst_33359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0001ff; valaddr_reg:x3; val_offset:100077*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100077*0 + 3*335*FLEN/8, x4, x1, x2)

inst_33360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0003ff; valaddr_reg:x3; val_offset:100080*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100080*0 + 3*336*FLEN/8, x4, x1, x2)

inst_33361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0007ff; valaddr_reg:x3; val_offset:100083*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100083*0 + 3*337*FLEN/8, x4, x1, x2)

inst_33362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd000fff; valaddr_reg:x3; val_offset:100086*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100086*0 + 3*338*FLEN/8, x4, x1, x2)

inst_33363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd001fff; valaddr_reg:x3; val_offset:100089*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100089*0 + 3*339*FLEN/8, x4, x1, x2)

inst_33364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd003fff; valaddr_reg:x3; val_offset:100092*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100092*0 + 3*340*FLEN/8, x4, x1, x2)

inst_33365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd007fff; valaddr_reg:x3; val_offset:100095*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100095*0 + 3*341*FLEN/8, x4, x1, x2)

inst_33366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd00ffff; valaddr_reg:x3; val_offset:100098*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100098*0 + 3*342*FLEN/8, x4, x1, x2)

inst_33367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd01ffff; valaddr_reg:x3; val_offset:100101*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100101*0 + 3*343*FLEN/8, x4, x1, x2)

inst_33368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd03ffff; valaddr_reg:x3; val_offset:100104*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100104*0 + 3*344*FLEN/8, x4, x1, x2)

inst_33369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd07ffff; valaddr_reg:x3; val_offset:100107*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100107*0 + 3*345*FLEN/8, x4, x1, x2)

inst_33370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd0fffff; valaddr_reg:x3; val_offset:100110*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100110*0 + 3*346*FLEN/8, x4, x1, x2)

inst_33371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd1fffff; valaddr_reg:x3; val_offset:100113*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100113*0 + 3*347*FLEN/8, x4, x1, x2)

inst_33372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd3fffff; valaddr_reg:x3; val_offset:100116*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100116*0 + 3*348*FLEN/8, x4, x1, x2)

inst_33373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd400000; valaddr_reg:x3; val_offset:100119*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100119*0 + 3*349*FLEN/8, x4, x1, x2)

inst_33374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd600000; valaddr_reg:x3; val_offset:100122*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100122*0 + 3*350*FLEN/8, x4, x1, x2)

inst_33375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd700000; valaddr_reg:x3; val_offset:100125*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100125*0 + 3*351*FLEN/8, x4, x1, x2)

inst_33376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd780000; valaddr_reg:x3; val_offset:100128*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100128*0 + 3*352*FLEN/8, x4, x1, x2)

inst_33377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7c0000; valaddr_reg:x3; val_offset:100131*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100131*0 + 3*353*FLEN/8, x4, x1, x2)

inst_33378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7e0000; valaddr_reg:x3; val_offset:100134*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100134*0 + 3*354*FLEN/8, x4, x1, x2)

inst_33379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7f0000; valaddr_reg:x3; val_offset:100137*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100137*0 + 3*355*FLEN/8, x4, x1, x2)

inst_33380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7f8000; valaddr_reg:x3; val_offset:100140*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100140*0 + 3*356*FLEN/8, x4, x1, x2)

inst_33381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fc000; valaddr_reg:x3; val_offset:100143*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100143*0 + 3*357*FLEN/8, x4, x1, x2)

inst_33382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fe000; valaddr_reg:x3; val_offset:100146*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100146*0 + 3*358*FLEN/8, x4, x1, x2)

inst_33383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ff000; valaddr_reg:x3; val_offset:100149*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100149*0 + 3*359*FLEN/8, x4, x1, x2)

inst_33384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ff800; valaddr_reg:x3; val_offset:100152*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100152*0 + 3*360*FLEN/8, x4, x1, x2)

inst_33385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffc00; valaddr_reg:x3; val_offset:100155*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100155*0 + 3*361*FLEN/8, x4, x1, x2)

inst_33386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffe00; valaddr_reg:x3; val_offset:100158*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100158*0 + 3*362*FLEN/8, x4, x1, x2)

inst_33387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fff00; valaddr_reg:x3; val_offset:100161*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100161*0 + 3*363*FLEN/8, x4, x1, x2)

inst_33388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fff80; valaddr_reg:x3; val_offset:100164*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100164*0 + 3*364*FLEN/8, x4, x1, x2)

inst_33389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffc0; valaddr_reg:x3; val_offset:100167*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100167*0 + 3*365*FLEN/8, x4, x1, x2)

inst_33390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffe0; valaddr_reg:x3; val_offset:100170*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100170*0 + 3*366*FLEN/8, x4, x1, x2)

inst_33391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffff0; valaddr_reg:x3; val_offset:100173*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100173*0 + 3*367*FLEN/8, x4, x1, x2)

inst_33392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffff8; valaddr_reg:x3; val_offset:100176*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100176*0 + 3*368*FLEN/8, x4, x1, x2)

inst_33393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffffc; valaddr_reg:x3; val_offset:100179*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100179*0 + 3*369*FLEN/8, x4, x1, x2)

inst_33394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7ffffe; valaddr_reg:x3; val_offset:100182*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100182*0 + 3*370*FLEN/8, x4, x1, x2)

inst_33395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbd7fffff; valaddr_reg:x3; val_offset:100185*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100185*0 + 3*371*FLEN/8, x4, x1, x2)

inst_33396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800001; valaddr_reg:x3; val_offset:100188*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100188*0 + 3*372*FLEN/8, x4, x1, x2)

inst_33397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800003; valaddr_reg:x3; val_offset:100191*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100191*0 + 3*373*FLEN/8, x4, x1, x2)

inst_33398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf800007; valaddr_reg:x3; val_offset:100194*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100194*0 + 3*374*FLEN/8, x4, x1, x2)

inst_33399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbf999999; valaddr_reg:x3; val_offset:100197*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100197*0 + 3*375*FLEN/8, x4, x1, x2)

inst_33400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:100200*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100200*0 + 3*376*FLEN/8, x4, x1, x2)

inst_33401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:100203*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100203*0 + 3*377*FLEN/8, x4, x1, x2)

inst_33402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100206*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100206*0 + 3*378*FLEN/8, x4, x1, x2)

inst_33403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100209*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100209*0 + 3*379*FLEN/8, x4, x1, x2)

inst_33404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:100212*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100212*0 + 3*380*FLEN/8, x4, x1, x2)

inst_33405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100215*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100215*0 + 3*381*FLEN/8, x4, x1, x2)

inst_33406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100218*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100218*0 + 3*382*FLEN/8, x4, x1, x2)

inst_33407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:100221*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100221*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_33408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100224*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100224*0 + 3*384*FLEN/8, x4, x1, x2)

inst_33409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:100227*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100227*0 + 3*385*FLEN/8, x4, x1, x2)

inst_33410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:100230*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100230*0 + 3*386*FLEN/8, x4, x1, x2)

inst_33411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x259c47 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x317729 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f259c47; op2val:0x80317729;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:100233*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100233*0 + 3*387*FLEN/8, x4, x1, x2)

inst_33412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:100236*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100236*0 + 3*388*FLEN/8, x4, x1, x2)

inst_33413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:100239*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100239*0 + 3*389*FLEN/8, x4, x1, x2)

inst_33414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:100242*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100242*0 + 3*390*FLEN/8, x4, x1, x2)

inst_33415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:100245*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100245*0 + 3*391*FLEN/8, x4, x1, x2)

inst_33416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:100248*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100248*0 + 3*392*FLEN/8, x4, x1, x2)

inst_33417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:100251*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100251*0 + 3*393*FLEN/8, x4, x1, x2)

inst_33418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:100254*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100254*0 + 3*394*FLEN/8, x4, x1, x2)

inst_33419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:100257*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100257*0 + 3*395*FLEN/8, x4, x1, x2)

inst_33420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:100260*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100260*0 + 3*396*FLEN/8, x4, x1, x2)

inst_33421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:100263*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100263*0 + 3*397*FLEN/8, x4, x1, x2)

inst_33422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:100266*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100266*0 + 3*398*FLEN/8, x4, x1, x2)

inst_33423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:100269*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100269*0 + 3*399*FLEN/8, x4, x1, x2)

inst_33424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:100272*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100272*0 + 3*400*FLEN/8, x4, x1, x2)

inst_33425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:100275*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100275*0 + 3*401*FLEN/8, x4, x1, x2)

inst_33426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:100278*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100278*0 + 3*402*FLEN/8, x4, x1, x2)

inst_33427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:100281*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100281*0 + 3*403*FLEN/8, x4, x1, x2)

inst_33428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e800000; valaddr_reg:x3; val_offset:100284*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100284*0 + 3*404*FLEN/8, x4, x1, x2)

inst_33429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e800001; valaddr_reg:x3; val_offset:100287*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100287*0 + 3*405*FLEN/8, x4, x1, x2)

inst_33430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e800003; valaddr_reg:x3; val_offset:100290*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100290*0 + 3*406*FLEN/8, x4, x1, x2)

inst_33431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e800007; valaddr_reg:x3; val_offset:100293*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100293*0 + 3*407*FLEN/8, x4, x1, x2)

inst_33432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e80000f; valaddr_reg:x3; val_offset:100296*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100296*0 + 3*408*FLEN/8, x4, x1, x2)

inst_33433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e80001f; valaddr_reg:x3; val_offset:100299*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100299*0 + 3*409*FLEN/8, x4, x1, x2)

inst_33434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e80003f; valaddr_reg:x3; val_offset:100302*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100302*0 + 3*410*FLEN/8, x4, x1, x2)

inst_33435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e80007f; valaddr_reg:x3; val_offset:100305*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100305*0 + 3*411*FLEN/8, x4, x1, x2)

inst_33436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e8000ff; valaddr_reg:x3; val_offset:100308*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100308*0 + 3*412*FLEN/8, x4, x1, x2)

inst_33437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e8001ff; valaddr_reg:x3; val_offset:100311*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100311*0 + 3*413*FLEN/8, x4, x1, x2)

inst_33438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e8003ff; valaddr_reg:x3; val_offset:100314*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100314*0 + 3*414*FLEN/8, x4, x1, x2)

inst_33439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e8007ff; valaddr_reg:x3; val_offset:100317*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100317*0 + 3*415*FLEN/8, x4, x1, x2)

inst_33440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e800fff; valaddr_reg:x3; val_offset:100320*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100320*0 + 3*416*FLEN/8, x4, x1, x2)

inst_33441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e801fff; valaddr_reg:x3; val_offset:100323*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100323*0 + 3*417*FLEN/8, x4, x1, x2)

inst_33442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e803fff; valaddr_reg:x3; val_offset:100326*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100326*0 + 3*418*FLEN/8, x4, x1, x2)

inst_33443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e807fff; valaddr_reg:x3; val_offset:100329*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100329*0 + 3*419*FLEN/8, x4, x1, x2)

inst_33444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e80ffff; valaddr_reg:x3; val_offset:100332*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100332*0 + 3*420*FLEN/8, x4, x1, x2)

inst_33445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e81ffff; valaddr_reg:x3; val_offset:100335*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100335*0 + 3*421*FLEN/8, x4, x1, x2)

inst_33446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e83ffff; valaddr_reg:x3; val_offset:100338*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100338*0 + 3*422*FLEN/8, x4, x1, x2)

inst_33447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e87ffff; valaddr_reg:x3; val_offset:100341*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100341*0 + 3*423*FLEN/8, x4, x1, x2)

inst_33448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e8fffff; valaddr_reg:x3; val_offset:100344*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100344*0 + 3*424*FLEN/8, x4, x1, x2)

inst_33449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8e9fffff; valaddr_reg:x3; val_offset:100347*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100347*0 + 3*425*FLEN/8, x4, x1, x2)

inst_33450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8ebfffff; valaddr_reg:x3; val_offset:100350*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100350*0 + 3*426*FLEN/8, x4, x1, x2)

inst_33451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8ec00000; valaddr_reg:x3; val_offset:100353*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100353*0 + 3*427*FLEN/8, x4, x1, x2)

inst_33452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8ee00000; valaddr_reg:x3; val_offset:100356*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100356*0 + 3*428*FLEN/8, x4, x1, x2)

inst_33453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8ef00000; valaddr_reg:x3; val_offset:100359*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100359*0 + 3*429*FLEN/8, x4, x1, x2)

inst_33454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8ef80000; valaddr_reg:x3; val_offset:100362*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100362*0 + 3*430*FLEN/8, x4, x1, x2)

inst_33455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efc0000; valaddr_reg:x3; val_offset:100365*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100365*0 + 3*431*FLEN/8, x4, x1, x2)

inst_33456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efe0000; valaddr_reg:x3; val_offset:100368*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100368*0 + 3*432*FLEN/8, x4, x1, x2)

inst_33457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8eff0000; valaddr_reg:x3; val_offset:100371*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100371*0 + 3*433*FLEN/8, x4, x1, x2)

inst_33458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8eff8000; valaddr_reg:x3; val_offset:100374*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100374*0 + 3*434*FLEN/8, x4, x1, x2)

inst_33459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effc000; valaddr_reg:x3; val_offset:100377*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100377*0 + 3*435*FLEN/8, x4, x1, x2)

inst_33460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effe000; valaddr_reg:x3; val_offset:100380*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100380*0 + 3*436*FLEN/8, x4, x1, x2)

inst_33461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efff000; valaddr_reg:x3; val_offset:100383*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100383*0 + 3*437*FLEN/8, x4, x1, x2)

inst_33462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efff800; valaddr_reg:x3; val_offset:100386*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100386*0 + 3*438*FLEN/8, x4, x1, x2)

inst_33463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffc00; valaddr_reg:x3; val_offset:100389*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100389*0 + 3*439*FLEN/8, x4, x1, x2)

inst_33464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffe00; valaddr_reg:x3; val_offset:100392*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100392*0 + 3*440*FLEN/8, x4, x1, x2)

inst_33465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effff00; valaddr_reg:x3; val_offset:100395*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100395*0 + 3*441*FLEN/8, x4, x1, x2)

inst_33466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effff80; valaddr_reg:x3; val_offset:100398*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100398*0 + 3*442*FLEN/8, x4, x1, x2)

inst_33467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effffc0; valaddr_reg:x3; val_offset:100401*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100401*0 + 3*443*FLEN/8, x4, x1, x2)

inst_33468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effffe0; valaddr_reg:x3; val_offset:100404*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100404*0 + 3*444*FLEN/8, x4, x1, x2)

inst_33469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffff0; valaddr_reg:x3; val_offset:100407*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100407*0 + 3*445*FLEN/8, x4, x1, x2)

inst_33470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffff8; valaddr_reg:x3; val_offset:100410*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100410*0 + 3*446*FLEN/8, x4, x1, x2)

inst_33471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffffc; valaddr_reg:x3; val_offset:100413*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100413*0 + 3*447*FLEN/8, x4, x1, x2)

inst_33472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8efffffe; valaddr_reg:x3; val_offset:100416*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100416*0 + 3*448*FLEN/8, x4, x1, x2)

inst_33473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f261957; op2val:0x80000000;
op3val:0x8effffff; valaddr_reg:x3; val_offset:100419*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100419*0 + 3*449*FLEN/8, x4, x1, x2)

inst_33474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28800000; valaddr_reg:x3; val_offset:100422*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100422*0 + 3*450*FLEN/8, x4, x1, x2)

inst_33475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28800001; valaddr_reg:x3; val_offset:100425*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100425*0 + 3*451*FLEN/8, x4, x1, x2)

inst_33476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28800003; valaddr_reg:x3; val_offset:100428*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100428*0 + 3*452*FLEN/8, x4, x1, x2)

inst_33477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28800007; valaddr_reg:x3; val_offset:100431*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100431*0 + 3*453*FLEN/8, x4, x1, x2)

inst_33478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2880000f; valaddr_reg:x3; val_offset:100434*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100434*0 + 3*454*FLEN/8, x4, x1, x2)

inst_33479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2880001f; valaddr_reg:x3; val_offset:100437*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100437*0 + 3*455*FLEN/8, x4, x1, x2)

inst_33480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2880003f; valaddr_reg:x3; val_offset:100440*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100440*0 + 3*456*FLEN/8, x4, x1, x2)

inst_33481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2880007f; valaddr_reg:x3; val_offset:100443*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100443*0 + 3*457*FLEN/8, x4, x1, x2)

inst_33482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x288000ff; valaddr_reg:x3; val_offset:100446*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100446*0 + 3*458*FLEN/8, x4, x1, x2)

inst_33483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x288001ff; valaddr_reg:x3; val_offset:100449*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100449*0 + 3*459*FLEN/8, x4, x1, x2)

inst_33484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x288003ff; valaddr_reg:x3; val_offset:100452*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100452*0 + 3*460*FLEN/8, x4, x1, x2)

inst_33485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x288007ff; valaddr_reg:x3; val_offset:100455*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100455*0 + 3*461*FLEN/8, x4, x1, x2)

inst_33486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28800fff; valaddr_reg:x3; val_offset:100458*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100458*0 + 3*462*FLEN/8, x4, x1, x2)

inst_33487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28801fff; valaddr_reg:x3; val_offset:100461*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100461*0 + 3*463*FLEN/8, x4, x1, x2)

inst_33488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28803fff; valaddr_reg:x3; val_offset:100464*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100464*0 + 3*464*FLEN/8, x4, x1, x2)

inst_33489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28807fff; valaddr_reg:x3; val_offset:100467*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100467*0 + 3*465*FLEN/8, x4, x1, x2)

inst_33490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2880ffff; valaddr_reg:x3; val_offset:100470*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100470*0 + 3*466*FLEN/8, x4, x1, x2)

inst_33491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2881ffff; valaddr_reg:x3; val_offset:100473*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100473*0 + 3*467*FLEN/8, x4, x1, x2)

inst_33492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2883ffff; valaddr_reg:x3; val_offset:100476*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100476*0 + 3*468*FLEN/8, x4, x1, x2)

inst_33493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x2887ffff; valaddr_reg:x3; val_offset:100479*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100479*0 + 3*469*FLEN/8, x4, x1, x2)

inst_33494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x288fffff; valaddr_reg:x3; val_offset:100482*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100482*0 + 3*470*FLEN/8, x4, x1, x2)

inst_33495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x289fffff; valaddr_reg:x3; val_offset:100485*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100485*0 + 3*471*FLEN/8, x4, x1, x2)

inst_33496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28bfffff; valaddr_reg:x3; val_offset:100488*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100488*0 + 3*472*FLEN/8, x4, x1, x2)

inst_33497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28c00000; valaddr_reg:x3; val_offset:100491*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100491*0 + 3*473*FLEN/8, x4, x1, x2)

inst_33498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28e00000; valaddr_reg:x3; val_offset:100494*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100494*0 + 3*474*FLEN/8, x4, x1, x2)

inst_33499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28f00000; valaddr_reg:x3; val_offset:100497*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100497*0 + 3*475*FLEN/8, x4, x1, x2)

inst_33500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28f80000; valaddr_reg:x3; val_offset:100500*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100500*0 + 3*476*FLEN/8, x4, x1, x2)

inst_33501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fc0000; valaddr_reg:x3; val_offset:100503*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100503*0 + 3*477*FLEN/8, x4, x1, x2)

inst_33502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fe0000; valaddr_reg:x3; val_offset:100506*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100506*0 + 3*478*FLEN/8, x4, x1, x2)

inst_33503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ff0000; valaddr_reg:x3; val_offset:100509*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100509*0 + 3*479*FLEN/8, x4, x1, x2)

inst_33504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ff8000; valaddr_reg:x3; val_offset:100512*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100512*0 + 3*480*FLEN/8, x4, x1, x2)

inst_33505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffc000; valaddr_reg:x3; val_offset:100515*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100515*0 + 3*481*FLEN/8, x4, x1, x2)

inst_33506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffe000; valaddr_reg:x3; val_offset:100518*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100518*0 + 3*482*FLEN/8, x4, x1, x2)

inst_33507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fff000; valaddr_reg:x3; val_offset:100521*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100521*0 + 3*483*FLEN/8, x4, x1, x2)

inst_33508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fff800; valaddr_reg:x3; val_offset:100524*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100524*0 + 3*484*FLEN/8, x4, x1, x2)

inst_33509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffc00; valaddr_reg:x3; val_offset:100527*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100527*0 + 3*485*FLEN/8, x4, x1, x2)

inst_33510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffe00; valaddr_reg:x3; val_offset:100530*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100530*0 + 3*486*FLEN/8, x4, x1, x2)

inst_33511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffff00; valaddr_reg:x3; val_offset:100533*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100533*0 + 3*487*FLEN/8, x4, x1, x2)

inst_33512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffff80; valaddr_reg:x3; val_offset:100536*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100536*0 + 3*488*FLEN/8, x4, x1, x2)

inst_33513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffffc0; valaddr_reg:x3; val_offset:100539*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100539*0 + 3*489*FLEN/8, x4, x1, x2)

inst_33514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffffe0; valaddr_reg:x3; val_offset:100542*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100542*0 + 3*490*FLEN/8, x4, x1, x2)

inst_33515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffff0; valaddr_reg:x3; val_offset:100545*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100545*0 + 3*491*FLEN/8, x4, x1, x2)

inst_33516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffff8; valaddr_reg:x3; val_offset:100548*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100548*0 + 3*492*FLEN/8, x4, x1, x2)

inst_33517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffffc; valaddr_reg:x3; val_offset:100551*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100551*0 + 3*493*FLEN/8, x4, x1, x2)

inst_33518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28fffffe; valaddr_reg:x3; val_offset:100554*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100554*0 + 3*494*FLEN/8, x4, x1, x2)

inst_33519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x28ffffff; valaddr_reg:x3; val_offset:100557*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100557*0 + 3*495*FLEN/8, x4, x1, x2)

inst_33520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3f800001; valaddr_reg:x3; val_offset:100560*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100560*0 + 3*496*FLEN/8, x4, x1, x2)

inst_33521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3f800003; valaddr_reg:x3; val_offset:100563*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100563*0 + 3*497*FLEN/8, x4, x1, x2)

inst_33522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3f800007; valaddr_reg:x3; val_offset:100566*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100566*0 + 3*498*FLEN/8, x4, x1, x2)

inst_33523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3f999999; valaddr_reg:x3; val_offset:100569*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100569*0 + 3*499*FLEN/8, x4, x1, x2)

inst_33524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:100572*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100572*0 + 3*500*FLEN/8, x4, x1, x2)

inst_33525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:100575*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100575*0 + 3*501*FLEN/8, x4, x1, x2)

inst_33526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:100578*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100578*0 + 3*502*FLEN/8, x4, x1, x2)

inst_33527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:100581*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100581*0 + 3*503*FLEN/8, x4, x1, x2)

inst_33528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:100584*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100584*0 + 3*504*FLEN/8, x4, x1, x2)

inst_33529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:100587*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100587*0 + 3*505*FLEN/8, x4, x1, x2)

inst_33530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:100590*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100590*0 + 3*506*FLEN/8, x4, x1, x2)

inst_33531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:100593*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100593*0 + 3*507*FLEN/8, x4, x1, x2)

inst_33532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:100596*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100596*0 + 3*508*FLEN/8, x4, x1, x2)

inst_33533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:100599*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100599*0 + 3*509*FLEN/8, x4, x1, x2)

inst_33534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:100602*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100602*0 + 3*510*FLEN/8, x4, x1, x2)

inst_33535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x312aec and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269d12; op2val:0x312aec;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:100605*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100605*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_33536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69800000; valaddr_reg:x3; val_offset:100608*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100608*0 + 3*512*FLEN/8, x4, x1, x2)

inst_33537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69800001; valaddr_reg:x3; val_offset:100611*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100611*0 + 3*513*FLEN/8, x4, x1, x2)

inst_33538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69800003; valaddr_reg:x3; val_offset:100614*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100614*0 + 3*514*FLEN/8, x4, x1, x2)

inst_33539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69800007; valaddr_reg:x3; val_offset:100617*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100617*0 + 3*515*FLEN/8, x4, x1, x2)

inst_33540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6980000f; valaddr_reg:x3; val_offset:100620*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100620*0 + 3*516*FLEN/8, x4, x1, x2)

inst_33541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6980001f; valaddr_reg:x3; val_offset:100623*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100623*0 + 3*517*FLEN/8, x4, x1, x2)

inst_33542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6980003f; valaddr_reg:x3; val_offset:100626*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100626*0 + 3*518*FLEN/8, x4, x1, x2)

inst_33543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6980007f; valaddr_reg:x3; val_offset:100629*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100629*0 + 3*519*FLEN/8, x4, x1, x2)

inst_33544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x698000ff; valaddr_reg:x3; val_offset:100632*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100632*0 + 3*520*FLEN/8, x4, x1, x2)

inst_33545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x698001ff; valaddr_reg:x3; val_offset:100635*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100635*0 + 3*521*FLEN/8, x4, x1, x2)

inst_33546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x698003ff; valaddr_reg:x3; val_offset:100638*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100638*0 + 3*522*FLEN/8, x4, x1, x2)

inst_33547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x698007ff; valaddr_reg:x3; val_offset:100641*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100641*0 + 3*523*FLEN/8, x4, x1, x2)

inst_33548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69800fff; valaddr_reg:x3; val_offset:100644*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100644*0 + 3*524*FLEN/8, x4, x1, x2)

inst_33549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69801fff; valaddr_reg:x3; val_offset:100647*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100647*0 + 3*525*FLEN/8, x4, x1, x2)

inst_33550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69803fff; valaddr_reg:x3; val_offset:100650*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100650*0 + 3*526*FLEN/8, x4, x1, x2)

inst_33551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69807fff; valaddr_reg:x3; val_offset:100653*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100653*0 + 3*527*FLEN/8, x4, x1, x2)

inst_33552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6980ffff; valaddr_reg:x3; val_offset:100656*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100656*0 + 3*528*FLEN/8, x4, x1, x2)

inst_33553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6981ffff; valaddr_reg:x3; val_offset:100659*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100659*0 + 3*529*FLEN/8, x4, x1, x2)

inst_33554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6983ffff; valaddr_reg:x3; val_offset:100662*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100662*0 + 3*530*FLEN/8, x4, x1, x2)

inst_33555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x6987ffff; valaddr_reg:x3; val_offset:100665*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100665*0 + 3*531*FLEN/8, x4, x1, x2)

inst_33556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x698fffff; valaddr_reg:x3; val_offset:100668*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100668*0 + 3*532*FLEN/8, x4, x1, x2)

inst_33557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x699fffff; valaddr_reg:x3; val_offset:100671*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100671*0 + 3*533*FLEN/8, x4, x1, x2)

inst_33558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69bfffff; valaddr_reg:x3; val_offset:100674*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100674*0 + 3*534*FLEN/8, x4, x1, x2)

inst_33559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69c00000; valaddr_reg:x3; val_offset:100677*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100677*0 + 3*535*FLEN/8, x4, x1, x2)

inst_33560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69e00000; valaddr_reg:x3; val_offset:100680*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100680*0 + 3*536*FLEN/8, x4, x1, x2)

inst_33561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69f00000; valaddr_reg:x3; val_offset:100683*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100683*0 + 3*537*FLEN/8, x4, x1, x2)

inst_33562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69f80000; valaddr_reg:x3; val_offset:100686*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100686*0 + 3*538*FLEN/8, x4, x1, x2)

inst_33563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fc0000; valaddr_reg:x3; val_offset:100689*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100689*0 + 3*539*FLEN/8, x4, x1, x2)

inst_33564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fe0000; valaddr_reg:x3; val_offset:100692*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100692*0 + 3*540*FLEN/8, x4, x1, x2)

inst_33565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ff0000; valaddr_reg:x3; val_offset:100695*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100695*0 + 3*541*FLEN/8, x4, x1, x2)

inst_33566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ff8000; valaddr_reg:x3; val_offset:100698*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100698*0 + 3*542*FLEN/8, x4, x1, x2)

inst_33567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffc000; valaddr_reg:x3; val_offset:100701*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100701*0 + 3*543*FLEN/8, x4, x1, x2)

inst_33568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffe000; valaddr_reg:x3; val_offset:100704*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100704*0 + 3*544*FLEN/8, x4, x1, x2)

inst_33569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fff000; valaddr_reg:x3; val_offset:100707*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100707*0 + 3*545*FLEN/8, x4, x1, x2)

inst_33570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fff800; valaddr_reg:x3; val_offset:100710*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100710*0 + 3*546*FLEN/8, x4, x1, x2)

inst_33571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffc00; valaddr_reg:x3; val_offset:100713*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100713*0 + 3*547*FLEN/8, x4, x1, x2)

inst_33572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffe00; valaddr_reg:x3; val_offset:100716*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100716*0 + 3*548*FLEN/8, x4, x1, x2)

inst_33573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffff00; valaddr_reg:x3; val_offset:100719*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100719*0 + 3*549*FLEN/8, x4, x1, x2)

inst_33574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffff80; valaddr_reg:x3; val_offset:100722*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100722*0 + 3*550*FLEN/8, x4, x1, x2)

inst_33575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffffc0; valaddr_reg:x3; val_offset:100725*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100725*0 + 3*551*FLEN/8, x4, x1, x2)

inst_33576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffffe0; valaddr_reg:x3; val_offset:100728*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100728*0 + 3*552*FLEN/8, x4, x1, x2)

inst_33577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffff0; valaddr_reg:x3; val_offset:100731*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100731*0 + 3*553*FLEN/8, x4, x1, x2)

inst_33578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffff8; valaddr_reg:x3; val_offset:100734*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100734*0 + 3*554*FLEN/8, x4, x1, x2)

inst_33579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffffc; valaddr_reg:x3; val_offset:100737*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100737*0 + 3*555*FLEN/8, x4, x1, x2)

inst_33580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69fffffe; valaddr_reg:x3; val_offset:100740*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100740*0 + 3*556*FLEN/8, x4, x1, x2)

inst_33581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x69ffffff; valaddr_reg:x3; val_offset:100743*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100743*0 + 3*557*FLEN/8, x4, x1, x2)

inst_33582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f000001; valaddr_reg:x3; val_offset:100746*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100746*0 + 3*558*FLEN/8, x4, x1, x2)

inst_33583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f000003; valaddr_reg:x3; val_offset:100749*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100749*0 + 3*559*FLEN/8, x4, x1, x2)

inst_33584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f000007; valaddr_reg:x3; val_offset:100752*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100752*0 + 3*560*FLEN/8, x4, x1, x2)

inst_33585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f199999; valaddr_reg:x3; val_offset:100755*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100755*0 + 3*561*FLEN/8, x4, x1, x2)

inst_33586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f249249; valaddr_reg:x3; val_offset:100758*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100758*0 + 3*562*FLEN/8, x4, x1, x2)

inst_33587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f333333; valaddr_reg:x3; val_offset:100761*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100761*0 + 3*563*FLEN/8, x4, x1, x2)

inst_33588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:100764*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100764*0 + 3*564*FLEN/8, x4, x1, x2)

inst_33589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:100767*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100767*0 + 3*565*FLEN/8, x4, x1, x2)

inst_33590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f444444; valaddr_reg:x3; val_offset:100770*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100770*0 + 3*566*FLEN/8, x4, x1, x2)

inst_33591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:100773*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100773*0 + 3*567*FLEN/8, x4, x1, x2)

inst_33592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:100776*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100776*0 + 3*568*FLEN/8, x4, x1, x2)

inst_33593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f666666; valaddr_reg:x3; val_offset:100779*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100779*0 + 3*569*FLEN/8, x4, x1, x2)

inst_33594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:100782*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100782*0 + 3*570*FLEN/8, x4, x1, x2)

inst_33595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:100785*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100785*0 + 3*571*FLEN/8, x4, x1, x2)

inst_33596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:100788*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100788*0 + 3*572*FLEN/8, x4, x1, x2)

inst_33597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26c3e1 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x447dea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26c3e1; op2val:0x3fc47dea;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:100791*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100791*0 + 3*573*FLEN/8, x4, x1, x2)

inst_33598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:100794*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100794*0 + 3*574*FLEN/8, x4, x1, x2)

inst_33599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:100797*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100797*0 + 3*575*FLEN/8, x4, x1, x2)

inst_33600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:100800*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100800*0 + 3*576*FLEN/8, x4, x1, x2)

inst_33601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:100803*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100803*0 + 3*577*FLEN/8, x4, x1, x2)

inst_33602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:100806*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100806*0 + 3*578*FLEN/8, x4, x1, x2)

inst_33603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:100809*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100809*0 + 3*579*FLEN/8, x4, x1, x2)

inst_33604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:100812*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100812*0 + 3*580*FLEN/8, x4, x1, x2)

inst_33605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:100815*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100815*0 + 3*581*FLEN/8, x4, x1, x2)

inst_33606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:100818*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100818*0 + 3*582*FLEN/8, x4, x1, x2)

inst_33607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:100821*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100821*0 + 3*583*FLEN/8, x4, x1, x2)

inst_33608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:100824*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100824*0 + 3*584*FLEN/8, x4, x1, x2)

inst_33609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:100827*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100827*0 + 3*585*FLEN/8, x4, x1, x2)

inst_33610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:100830*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100830*0 + 3*586*FLEN/8, x4, x1, x2)

inst_33611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:100833*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100833*0 + 3*587*FLEN/8, x4, x1, x2)

inst_33612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:100836*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100836*0 + 3*588*FLEN/8, x4, x1, x2)

inst_33613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:100839*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100839*0 + 3*589*FLEN/8, x4, x1, x2)

inst_33614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7000000; valaddr_reg:x3; val_offset:100842*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100842*0 + 3*590*FLEN/8, x4, x1, x2)

inst_33615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7000001; valaddr_reg:x3; val_offset:100845*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100845*0 + 3*591*FLEN/8, x4, x1, x2)

inst_33616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7000003; valaddr_reg:x3; val_offset:100848*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100848*0 + 3*592*FLEN/8, x4, x1, x2)

inst_33617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7000007; valaddr_reg:x3; val_offset:100851*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100851*0 + 3*593*FLEN/8, x4, x1, x2)

inst_33618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x700000f; valaddr_reg:x3; val_offset:100854*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100854*0 + 3*594*FLEN/8, x4, x1, x2)

inst_33619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x700001f; valaddr_reg:x3; val_offset:100857*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100857*0 + 3*595*FLEN/8, x4, x1, x2)

inst_33620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x700003f; valaddr_reg:x3; val_offset:100860*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100860*0 + 3*596*FLEN/8, x4, x1, x2)

inst_33621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x700007f; valaddr_reg:x3; val_offset:100863*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100863*0 + 3*597*FLEN/8, x4, x1, x2)

inst_33622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x70000ff; valaddr_reg:x3; val_offset:100866*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100866*0 + 3*598*FLEN/8, x4, x1, x2)

inst_33623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x70001ff; valaddr_reg:x3; val_offset:100869*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100869*0 + 3*599*FLEN/8, x4, x1, x2)

inst_33624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x70003ff; valaddr_reg:x3; val_offset:100872*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100872*0 + 3*600*FLEN/8, x4, x1, x2)

inst_33625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x70007ff; valaddr_reg:x3; val_offset:100875*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100875*0 + 3*601*FLEN/8, x4, x1, x2)

inst_33626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7000fff; valaddr_reg:x3; val_offset:100878*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100878*0 + 3*602*FLEN/8, x4, x1, x2)

inst_33627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7001fff; valaddr_reg:x3; val_offset:100881*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100881*0 + 3*603*FLEN/8, x4, x1, x2)

inst_33628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7003fff; valaddr_reg:x3; val_offset:100884*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100884*0 + 3*604*FLEN/8, x4, x1, x2)

inst_33629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7007fff; valaddr_reg:x3; val_offset:100887*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100887*0 + 3*605*FLEN/8, x4, x1, x2)

inst_33630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x700ffff; valaddr_reg:x3; val_offset:100890*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100890*0 + 3*606*FLEN/8, x4, x1, x2)

inst_33631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x701ffff; valaddr_reg:x3; val_offset:100893*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100893*0 + 3*607*FLEN/8, x4, x1, x2)

inst_33632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x703ffff; valaddr_reg:x3; val_offset:100896*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100896*0 + 3*608*FLEN/8, x4, x1, x2)

inst_33633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x707ffff; valaddr_reg:x3; val_offset:100899*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100899*0 + 3*609*FLEN/8, x4, x1, x2)

inst_33634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x70fffff; valaddr_reg:x3; val_offset:100902*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100902*0 + 3*610*FLEN/8, x4, x1, x2)

inst_33635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x71fffff; valaddr_reg:x3; val_offset:100905*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100905*0 + 3*611*FLEN/8, x4, x1, x2)

inst_33636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x73fffff; valaddr_reg:x3; val_offset:100908*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100908*0 + 3*612*FLEN/8, x4, x1, x2)

inst_33637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7400000; valaddr_reg:x3; val_offset:100911*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100911*0 + 3*613*FLEN/8, x4, x1, x2)

inst_33638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7600000; valaddr_reg:x3; val_offset:100914*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100914*0 + 3*614*FLEN/8, x4, x1, x2)

inst_33639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7700000; valaddr_reg:x3; val_offset:100917*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100917*0 + 3*615*FLEN/8, x4, x1, x2)

inst_33640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x7780000; valaddr_reg:x3; val_offset:100920*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100920*0 + 3*616*FLEN/8, x4, x1, x2)

inst_33641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77c0000; valaddr_reg:x3; val_offset:100923*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100923*0 + 3*617*FLEN/8, x4, x1, x2)

inst_33642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77e0000; valaddr_reg:x3; val_offset:100926*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100926*0 + 3*618*FLEN/8, x4, x1, x2)

inst_33643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77f0000; valaddr_reg:x3; val_offset:100929*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100929*0 + 3*619*FLEN/8, x4, x1, x2)

inst_33644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77f8000; valaddr_reg:x3; val_offset:100932*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100932*0 + 3*620*FLEN/8, x4, x1, x2)

inst_33645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fc000; valaddr_reg:x3; val_offset:100935*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100935*0 + 3*621*FLEN/8, x4, x1, x2)

inst_33646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fe000; valaddr_reg:x3; val_offset:100938*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100938*0 + 3*622*FLEN/8, x4, x1, x2)

inst_33647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ff000; valaddr_reg:x3; val_offset:100941*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100941*0 + 3*623*FLEN/8, x4, x1, x2)

inst_33648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ff800; valaddr_reg:x3; val_offset:100944*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100944*0 + 3*624*FLEN/8, x4, x1, x2)

inst_33649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffc00; valaddr_reg:x3; val_offset:100947*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100947*0 + 3*625*FLEN/8, x4, x1, x2)

inst_33650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffe00; valaddr_reg:x3; val_offset:100950*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100950*0 + 3*626*FLEN/8, x4, x1, x2)

inst_33651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fff00; valaddr_reg:x3; val_offset:100953*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100953*0 + 3*627*FLEN/8, x4, x1, x2)

inst_33652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fff80; valaddr_reg:x3; val_offset:100956*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100956*0 + 3*628*FLEN/8, x4, x1, x2)

inst_33653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fffc0; valaddr_reg:x3; val_offset:100959*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100959*0 + 3*629*FLEN/8, x4, x1, x2)

inst_33654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fffe0; valaddr_reg:x3; val_offset:100962*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100962*0 + 3*630*FLEN/8, x4, x1, x2)

inst_33655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffff0; valaddr_reg:x3; val_offset:100965*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100965*0 + 3*631*FLEN/8, x4, x1, x2)

inst_33656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffff8; valaddr_reg:x3; val_offset:100968*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100968*0 + 3*632*FLEN/8, x4, x1, x2)

inst_33657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffffc; valaddr_reg:x3; val_offset:100971*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100971*0 + 3*633*FLEN/8, x4, x1, x2)

inst_33658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77ffffe; valaddr_reg:x3; val_offset:100974*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100974*0 + 3*634*FLEN/8, x4, x1, x2)

inst_33659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x271b7f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f271b7f; op2val:0x0;
op3val:0x77fffff; valaddr_reg:x3; val_offset:100977*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100977*0 + 3*635*FLEN/8, x4, x1, x2)

inst_33660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:100980*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100980*0 + 3*636*FLEN/8, x4, x1, x2)

inst_33661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:100983*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100983*0 + 3*637*FLEN/8, x4, x1, x2)

inst_33662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:100986*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100986*0 + 3*638*FLEN/8, x4, x1, x2)

inst_33663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:100989*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100989*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_33664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:100992*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100992*0 + 3*640*FLEN/8, x4, x1, x2)

inst_33665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:100995*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100995*0 + 3*641*FLEN/8, x4, x1, x2)

inst_33666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:100998*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100998*0 + 3*642*FLEN/8, x4, x1, x2)

inst_33667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:101001*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101001*0 + 3*643*FLEN/8, x4, x1, x2)

inst_33668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:101004*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101004*0 + 3*644*FLEN/8, x4, x1, x2)

inst_33669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:101007*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101007*0 + 3*645*FLEN/8, x4, x1, x2)

inst_33670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:101010*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101010*0 + 3*646*FLEN/8, x4, x1, x2)

inst_33671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:101013*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101013*0 + 3*647*FLEN/8, x4, x1, x2)

inst_33672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:101016*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101016*0 + 3*648*FLEN/8, x4, x1, x2)

inst_33673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:101019*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101019*0 + 3*649*FLEN/8, x4, x1, x2)

inst_33674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:101022*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101022*0 + 3*650*FLEN/8, x4, x1, x2)

inst_33675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:101025*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101025*0 + 3*651*FLEN/8, x4, x1, x2)

inst_33676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e000000; valaddr_reg:x3; val_offset:101028*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101028*0 + 3*652*FLEN/8, x4, x1, x2)

inst_33677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e000001; valaddr_reg:x3; val_offset:101031*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101031*0 + 3*653*FLEN/8, x4, x1, x2)

inst_33678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e000003; valaddr_reg:x3; val_offset:101034*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101034*0 + 3*654*FLEN/8, x4, x1, x2)

inst_33679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e000007; valaddr_reg:x3; val_offset:101037*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101037*0 + 3*655*FLEN/8, x4, x1, x2)

inst_33680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e00000f; valaddr_reg:x3; val_offset:101040*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101040*0 + 3*656*FLEN/8, x4, x1, x2)

inst_33681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e00001f; valaddr_reg:x3; val_offset:101043*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101043*0 + 3*657*FLEN/8, x4, x1, x2)

inst_33682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e00003f; valaddr_reg:x3; val_offset:101046*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101046*0 + 3*658*FLEN/8, x4, x1, x2)

inst_33683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e00007f; valaddr_reg:x3; val_offset:101049*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101049*0 + 3*659*FLEN/8, x4, x1, x2)

inst_33684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e0000ff; valaddr_reg:x3; val_offset:101052*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101052*0 + 3*660*FLEN/8, x4, x1, x2)

inst_33685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e0001ff; valaddr_reg:x3; val_offset:101055*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101055*0 + 3*661*FLEN/8, x4, x1, x2)

inst_33686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e0003ff; valaddr_reg:x3; val_offset:101058*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101058*0 + 3*662*FLEN/8, x4, x1, x2)

inst_33687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e0007ff; valaddr_reg:x3; val_offset:101061*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101061*0 + 3*663*FLEN/8, x4, x1, x2)

inst_33688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e000fff; valaddr_reg:x3; val_offset:101064*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101064*0 + 3*664*FLEN/8, x4, x1, x2)

inst_33689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e001fff; valaddr_reg:x3; val_offset:101067*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101067*0 + 3*665*FLEN/8, x4, x1, x2)

inst_33690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e003fff; valaddr_reg:x3; val_offset:101070*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101070*0 + 3*666*FLEN/8, x4, x1, x2)

inst_33691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e007fff; valaddr_reg:x3; val_offset:101073*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101073*0 + 3*667*FLEN/8, x4, x1, x2)

inst_33692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e00ffff; valaddr_reg:x3; val_offset:101076*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101076*0 + 3*668*FLEN/8, x4, x1, x2)

inst_33693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e01ffff; valaddr_reg:x3; val_offset:101079*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101079*0 + 3*669*FLEN/8, x4, x1, x2)

inst_33694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e03ffff; valaddr_reg:x3; val_offset:101082*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101082*0 + 3*670*FLEN/8, x4, x1, x2)

inst_33695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e07ffff; valaddr_reg:x3; val_offset:101085*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101085*0 + 3*671*FLEN/8, x4, x1, x2)

inst_33696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e0fffff; valaddr_reg:x3; val_offset:101088*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101088*0 + 3*672*FLEN/8, x4, x1, x2)

inst_33697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e1fffff; valaddr_reg:x3; val_offset:101091*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101091*0 + 3*673*FLEN/8, x4, x1, x2)

inst_33698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e3fffff; valaddr_reg:x3; val_offset:101094*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101094*0 + 3*674*FLEN/8, x4, x1, x2)

inst_33699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e400000; valaddr_reg:x3; val_offset:101097*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101097*0 + 3*675*FLEN/8, x4, x1, x2)

inst_33700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e600000; valaddr_reg:x3; val_offset:101100*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101100*0 + 3*676*FLEN/8, x4, x1, x2)

inst_33701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e700000; valaddr_reg:x3; val_offset:101103*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101103*0 + 3*677*FLEN/8, x4, x1, x2)

inst_33702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e780000; valaddr_reg:x3; val_offset:101106*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101106*0 + 3*678*FLEN/8, x4, x1, x2)

inst_33703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7c0000; valaddr_reg:x3; val_offset:101109*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101109*0 + 3*679*FLEN/8, x4, x1, x2)

inst_33704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7e0000; valaddr_reg:x3; val_offset:101112*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101112*0 + 3*680*FLEN/8, x4, x1, x2)

inst_33705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7f0000; valaddr_reg:x3; val_offset:101115*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101115*0 + 3*681*FLEN/8, x4, x1, x2)

inst_33706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7f8000; valaddr_reg:x3; val_offset:101118*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101118*0 + 3*682*FLEN/8, x4, x1, x2)

inst_33707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fc000; valaddr_reg:x3; val_offset:101121*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101121*0 + 3*683*FLEN/8, x4, x1, x2)

inst_33708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fe000; valaddr_reg:x3; val_offset:101124*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101124*0 + 3*684*FLEN/8, x4, x1, x2)

inst_33709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ff000; valaddr_reg:x3; val_offset:101127*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101127*0 + 3*685*FLEN/8, x4, x1, x2)

inst_33710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ff800; valaddr_reg:x3; val_offset:101130*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101130*0 + 3*686*FLEN/8, x4, x1, x2)

inst_33711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:101133*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101133*0 + 3*687*FLEN/8, x4, x1, x2)

inst_33712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:101136*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101136*0 + 3*688*FLEN/8, x4, x1, x2)

inst_33713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fff00; valaddr_reg:x3; val_offset:101139*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101139*0 + 3*689*FLEN/8, x4, x1, x2)

inst_33714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fff80; valaddr_reg:x3; val_offset:101142*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101142*0 + 3*690*FLEN/8, x4, x1, x2)

inst_33715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:101145*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101145*0 + 3*691*FLEN/8, x4, x1, x2)

inst_33716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:101148*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101148*0 + 3*692*FLEN/8, x4, x1, x2)

inst_33717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:101151*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101151*0 + 3*693*FLEN/8, x4, x1, x2)

inst_33718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:101154*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101154*0 + 3*694*FLEN/8, x4, x1, x2)

inst_33719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:101157*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101157*0 + 3*695*FLEN/8, x4, x1, x2)

inst_33720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:101160*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101160*0 + 3*696*FLEN/8, x4, x1, x2)

inst_33721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x278717 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f278717; op2val:0x80000000;
op3val:0x8e7fffff; valaddr_reg:x3; val_offset:101163*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101163*0 + 3*697*FLEN/8, x4, x1, x2)

inst_33722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f000000; valaddr_reg:x3; val_offset:101166*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101166*0 + 3*698*FLEN/8, x4, x1, x2)

inst_33723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f000001; valaddr_reg:x3; val_offset:101169*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101169*0 + 3*699*FLEN/8, x4, x1, x2)

inst_33724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f000003; valaddr_reg:x3; val_offset:101172*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101172*0 + 3*700*FLEN/8, x4, x1, x2)

inst_33725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f000007; valaddr_reg:x3; val_offset:101175*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101175*0 + 3*701*FLEN/8, x4, x1, x2)

inst_33726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f00000f; valaddr_reg:x3; val_offset:101178*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101178*0 + 3*702*FLEN/8, x4, x1, x2)

inst_33727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f00001f; valaddr_reg:x3; val_offset:101181*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101181*0 + 3*703*FLEN/8, x4, x1, x2)

inst_33728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f00003f; valaddr_reg:x3; val_offset:101184*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101184*0 + 3*704*FLEN/8, x4, x1, x2)

inst_33729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f00007f; valaddr_reg:x3; val_offset:101187*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101187*0 + 3*705*FLEN/8, x4, x1, x2)

inst_33730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f0000ff; valaddr_reg:x3; val_offset:101190*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101190*0 + 3*706*FLEN/8, x4, x1, x2)

inst_33731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f0001ff; valaddr_reg:x3; val_offset:101193*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101193*0 + 3*707*FLEN/8, x4, x1, x2)

inst_33732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f0003ff; valaddr_reg:x3; val_offset:101196*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101196*0 + 3*708*FLEN/8, x4, x1, x2)

inst_33733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f0007ff; valaddr_reg:x3; val_offset:101199*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101199*0 + 3*709*FLEN/8, x4, x1, x2)

inst_33734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f000fff; valaddr_reg:x3; val_offset:101202*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101202*0 + 3*710*FLEN/8, x4, x1, x2)

inst_33735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f001fff; valaddr_reg:x3; val_offset:101205*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101205*0 + 3*711*FLEN/8, x4, x1, x2)

inst_33736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f003fff; valaddr_reg:x3; val_offset:101208*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101208*0 + 3*712*FLEN/8, x4, x1, x2)

inst_33737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f007fff; valaddr_reg:x3; val_offset:101211*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101211*0 + 3*713*FLEN/8, x4, x1, x2)

inst_33738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f00ffff; valaddr_reg:x3; val_offset:101214*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101214*0 + 3*714*FLEN/8, x4, x1, x2)

inst_33739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f01ffff; valaddr_reg:x3; val_offset:101217*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101217*0 + 3*715*FLEN/8, x4, x1, x2)

inst_33740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f03ffff; valaddr_reg:x3; val_offset:101220*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101220*0 + 3*716*FLEN/8, x4, x1, x2)

inst_33741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f07ffff; valaddr_reg:x3; val_offset:101223*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101223*0 + 3*717*FLEN/8, x4, x1, x2)

inst_33742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f0fffff; valaddr_reg:x3; val_offset:101226*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101226*0 + 3*718*FLEN/8, x4, x1, x2)

inst_33743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f1fffff; valaddr_reg:x3; val_offset:101229*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101229*0 + 3*719*FLEN/8, x4, x1, x2)

inst_33744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f3fffff; valaddr_reg:x3; val_offset:101232*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101232*0 + 3*720*FLEN/8, x4, x1, x2)

inst_33745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f400000; valaddr_reg:x3; val_offset:101235*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101235*0 + 3*721*FLEN/8, x4, x1, x2)

inst_33746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f600000; valaddr_reg:x3; val_offset:101238*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101238*0 + 3*722*FLEN/8, x4, x1, x2)

inst_33747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f700000; valaddr_reg:x3; val_offset:101241*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101241*0 + 3*723*FLEN/8, x4, x1, x2)

inst_33748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f780000; valaddr_reg:x3; val_offset:101244*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101244*0 + 3*724*FLEN/8, x4, x1, x2)

inst_33749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7c0000; valaddr_reg:x3; val_offset:101247*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101247*0 + 3*725*FLEN/8, x4, x1, x2)

inst_33750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7e0000; valaddr_reg:x3; val_offset:101250*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101250*0 + 3*726*FLEN/8, x4, x1, x2)

inst_33751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7f0000; valaddr_reg:x3; val_offset:101253*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101253*0 + 3*727*FLEN/8, x4, x1, x2)

inst_33752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7f8000; valaddr_reg:x3; val_offset:101256*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101256*0 + 3*728*FLEN/8, x4, x1, x2)

inst_33753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fc000; valaddr_reg:x3; val_offset:101259*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101259*0 + 3*729*FLEN/8, x4, x1, x2)

inst_33754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fe000; valaddr_reg:x3; val_offset:101262*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101262*0 + 3*730*FLEN/8, x4, x1, x2)

inst_33755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ff000; valaddr_reg:x3; val_offset:101265*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101265*0 + 3*731*FLEN/8, x4, x1, x2)

inst_33756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ff800; valaddr_reg:x3; val_offset:101268*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101268*0 + 3*732*FLEN/8, x4, x1, x2)

inst_33757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffc00; valaddr_reg:x3; val_offset:101271*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101271*0 + 3*733*FLEN/8, x4, x1, x2)

inst_33758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffe00; valaddr_reg:x3; val_offset:101274*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101274*0 + 3*734*FLEN/8, x4, x1, x2)

inst_33759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fff00; valaddr_reg:x3; val_offset:101277*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101277*0 + 3*735*FLEN/8, x4, x1, x2)

inst_33760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fff80; valaddr_reg:x3; val_offset:101280*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101280*0 + 3*736*FLEN/8, x4, x1, x2)

inst_33761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fffc0; valaddr_reg:x3; val_offset:101283*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101283*0 + 3*737*FLEN/8, x4, x1, x2)

inst_33762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fffe0; valaddr_reg:x3; val_offset:101286*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101286*0 + 3*738*FLEN/8, x4, x1, x2)

inst_33763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffff0; valaddr_reg:x3; val_offset:101289*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101289*0 + 3*739*FLEN/8, x4, x1, x2)

inst_33764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffff8; valaddr_reg:x3; val_offset:101292*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101292*0 + 3*740*FLEN/8, x4, x1, x2)

inst_33765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffffc; valaddr_reg:x3; val_offset:101295*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101295*0 + 3*741*FLEN/8, x4, x1, x2)

inst_33766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7ffffe; valaddr_reg:x3; val_offset:101298*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101298*0 + 3*742*FLEN/8, x4, x1, x2)

inst_33767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x1f7fffff; valaddr_reg:x3; val_offset:101301*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101301*0 + 3*743*FLEN/8, x4, x1, x2)

inst_33768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3f800001; valaddr_reg:x3; val_offset:101304*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101304*0 + 3*744*FLEN/8, x4, x1, x2)

inst_33769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3f800003; valaddr_reg:x3; val_offset:101307*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101307*0 + 3*745*FLEN/8, x4, x1, x2)

inst_33770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3f800007; valaddr_reg:x3; val_offset:101310*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101310*0 + 3*746*FLEN/8, x4, x1, x2)

inst_33771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3f999999; valaddr_reg:x3; val_offset:101313*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101313*0 + 3*747*FLEN/8, x4, x1, x2)

inst_33772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:101316*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101316*0 + 3*748*FLEN/8, x4, x1, x2)

inst_33773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:101319*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101319*0 + 3*749*FLEN/8, x4, x1, x2)

inst_33774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:101322*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101322*0 + 3*750*FLEN/8, x4, x1, x2)

inst_33775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:101325*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101325*0 + 3*751*FLEN/8, x4, x1, x2)

inst_33776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:101328*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101328*0 + 3*752*FLEN/8, x4, x1, x2)

inst_33777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:101331*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101331*0 + 3*753*FLEN/8, x4, x1, x2)

inst_33778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:101334*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101334*0 + 3*754*FLEN/8, x4, x1, x2)

inst_33779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:101337*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101337*0 + 3*755*FLEN/8, x4, x1, x2)

inst_33780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:101340*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101340*0 + 3*756*FLEN/8, x4, x1, x2)

inst_33781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:101343*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101343*0 + 3*757*FLEN/8, x4, x1, x2)

inst_33782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:101346*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101346*0 + 3*758*FLEN/8, x4, x1, x2)

inst_33783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27923e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30e2fc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27923e; op2val:0x30e2fc;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:101349*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101349*0 + 3*759*FLEN/8, x4, x1, x2)

inst_33784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa4800000; valaddr_reg:x3; val_offset:101352*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101352*0 + 3*760*FLEN/8, x4, x1, x2)

inst_33785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa4800001; valaddr_reg:x3; val_offset:101355*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101355*0 + 3*761*FLEN/8, x4, x1, x2)

inst_33786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa4800003; valaddr_reg:x3; val_offset:101358*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101358*0 + 3*762*FLEN/8, x4, x1, x2)

inst_33787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa4800007; valaddr_reg:x3; val_offset:101361*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101361*0 + 3*763*FLEN/8, x4, x1, x2)

inst_33788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa480000f; valaddr_reg:x3; val_offset:101364*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101364*0 + 3*764*FLEN/8, x4, x1, x2)

inst_33789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa480001f; valaddr_reg:x3; val_offset:101367*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101367*0 + 3*765*FLEN/8, x4, x1, x2)

inst_33790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa480003f; valaddr_reg:x3; val_offset:101370*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101370*0 + 3*766*FLEN/8, x4, x1, x2)

inst_33791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x307c6d and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28f4b0; op2val:0x80307c6d;
op3val:0xa480007f; valaddr_reg:x3; val_offset:101373*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101373*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7f8000,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fc000,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fe000,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ff000,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ff800,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffc00,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffe00,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fff00,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fff80,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffc0,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffe0,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffff0,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffff8,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffffc,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7ffffe,32,FLEN)
NAN_BOXED(0x7f24d9b0,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8d7fffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67000000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67000001,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67000003,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67000007,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6700000f,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6700001f,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6700003f,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6700007f,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x670000ff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x670001ff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x670003ff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x670007ff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67000fff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67001fff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67003fff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67007fff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6700ffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6701ffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6703ffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x6707ffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x670fffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x671fffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x673fffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67400000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67600000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67700000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x67780000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677c0000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677e0000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677f0000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677f8000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fc000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fe000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ff000,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ff800,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffc00,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffe00,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fff00,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fff80,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fffc0,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fffe0,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffff0,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffff8,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffffc,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677ffffe,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x677fffff,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f25073e,32,FLEN)
NAN_BOXED(0x3fc68f53,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000001,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000003,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000007,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900000f,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900001f,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900003f,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900007f,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890000ff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890001ff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890003ff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890007ff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89000fff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89001fff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89003fff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89007fff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8900ffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8901ffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8903ffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8907ffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x890fffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x891fffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x893fffff,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89400000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89600000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89700000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x89780000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897c0000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897e0000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897f0000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897f8000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fc000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fe000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ff000,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ff800,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffc00,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffe00,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fff00,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fff80,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffc0,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffe0,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffff0,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffff8,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffffc,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897ffffe,32,FLEN)
NAN_BOXED(0x7f253e0d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x897fffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6000000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6000001,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6000003,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6000007,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600000f,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600001f,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600003f,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600007f,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x60000ff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x60001ff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x60003ff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x60007ff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6000fff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6001fff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6003fff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6007fff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x600ffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x601ffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x603ffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x607ffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x60fffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x61fffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x63fffff,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6400000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6600000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6700000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6780000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67c0000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67e0000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67f0000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67f8000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fc000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fe000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ff000,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ff800,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffc00,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffe00,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fff00,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fff80,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fffc0,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fffe0,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffff0,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffff8,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffffc,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67ffffe,32,FLEN)
NAN_BOXED(0x7f2550f4,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x67fffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2000000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2000001,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2000003,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2000007,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe200000f,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe200001f,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe200003f,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe200007f,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe20000ff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe20001ff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe20003ff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe20007ff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2000fff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2001fff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2003fff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2007fff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe200ffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe201ffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe203ffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe207ffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe20fffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe21fffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe23fffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2400000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2600000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2700000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe2780000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27c0000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27e0000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27f0000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27f8000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fc000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fe000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ff000,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ff800,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffc00,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffe00,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fff00,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fff80,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fffc0,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fffe0,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffff0,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffff8,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffffc,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27ffffe,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xe27fffff,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f25667a,32,FLEN)
NAN_BOXED(0xbfc61cff,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6000000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6000001,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6000003,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6000007,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb600000f,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb600001f,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb600003f,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb600007f,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb60000ff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb60001ff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb60003ff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb60007ff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6000fff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6001fff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6003fff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6007fff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb600ffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb601ffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb603ffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb607ffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb60fffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb61fffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb63fffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6400000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6600000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6700000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb6780000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67c0000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67e0000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67f0000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67f8000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fc000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fe000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ff000,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ff800,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffc00,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffe00,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fff00,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fff80,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fffc0,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fffe0,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffff0,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffff8,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffffc,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67ffffe,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xb67fffff,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
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NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
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NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f25708a,32,FLEN)
NAN_BOXED(0x8031843c,32,FLEN)
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NAN_BOXED(0x7f25708a,32,FLEN)
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NAN_BOXED(0x80317729,32,FLEN)
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NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
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NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
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NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
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NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
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NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7fff80,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7fffc0,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7fffe0,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7ffff0,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7ffff8,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7ffffc,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7ffffe,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbd7fffff,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f259c47,32,FLEN)
NAN_BOXED(0x80317729,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e800000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e800001,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e800003,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e800007,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e80000f,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e80001f,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e80003f,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e80007f,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e8000ff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e8001ff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e8003ff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e8007ff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e800fff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e801fff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e803fff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e807fff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e80ffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e81ffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e83ffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e87ffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e8fffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e9fffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ebfffff,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ec00000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ee00000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ef00000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ef80000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efc0000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efe0000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8eff0000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8eff8000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effc000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effe000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efff000,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efff800,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffc00,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffe00,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effff00,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effff80,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffc0,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffe0,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffff0,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffff8,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffffc,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8efffffe,32,FLEN)
NAN_BOXED(0x7f261957,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8effffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28800000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28800001,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28800003,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28800007,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2880000f,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2880001f,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2880003f,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2880007f,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x288000ff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x288001ff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x288003ff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x288007ff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28800fff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28801fff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28803fff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28807fff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2880ffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2881ffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2883ffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x2887ffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x288fffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x289fffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28bfffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28c00000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28e00000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28f00000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28f80000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fc0000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fe0000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ff0000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ff8000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffc000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffe000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fff000,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fff800,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffc00,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffe00,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffff00,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffff80,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffffc0,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffffe0,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffff0,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffff8,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffffc,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28fffffe,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x28ffffff,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
NAN_BOXED(0x312aec,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f269d12,32,FLEN)
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NAN_BOXED(0x3fc44444,32,FLEN)
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NAN_BOXED(0x69800001,32,FLEN)
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NAN_BOXED(0x6980ffff,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x6981ffff,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x6983ffff,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x6987ffff,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x698fffff,32,FLEN)
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NAN_BOXED(0x699fffff,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69fff800,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69ffff00,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69ffff80,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69ffffc0,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
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NAN_BOXED(0x69ffffe0,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69fffff0,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69fffff8,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69fffffc,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69fffffe,32,FLEN)
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NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x69ffffff,32,FLEN)
NAN_BOXED(0x7f26c3e1,32,FLEN)
NAN_BOXED(0x3fc47dea,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
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NAN_BOXED(0x7f249249,32,FLEN)
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NAN_BOXED(0x7f271b7f,32,FLEN)
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NAN_BOXED(0x700ffff,32,FLEN)
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NAN_BOXED(0x701ffff,32,FLEN)
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NAN_BOXED(0x7f271b7f,32,FLEN)
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NAN_BOXED(0x7f271b7f,32,FLEN)
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NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000001,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000003,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000007,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00000f,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00001f,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00003f,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00007f,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0000ff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0001ff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0003ff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0007ff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e000fff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e001fff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e003fff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e007fff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e00ffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e01ffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e03ffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e07ffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e0fffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e1fffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e3fffff,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e400000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e600000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e700000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e780000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7c0000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7e0000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7f0000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7f8000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fc000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fe000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ff000,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ff800,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffc00,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffe00,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fff00,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fff80,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffc0,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffe0,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffff0,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffff8,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffffc,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7ffffe,32,FLEN)
NAN_BOXED(0x7f278717,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8e7fffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f000000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f000001,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f000003,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f000007,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f00000f,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f00001f,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f00003f,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f00007f,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f0000ff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f0001ff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f0003ff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f0007ff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f000fff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f001fff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f003fff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f007fff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f00ffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f01ffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f03ffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f07ffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f0fffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f1fffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f3fffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f400000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f600000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f700000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f780000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7c0000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7e0000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7f0000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7f8000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fc000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fe000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ff000,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ff800,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffc00,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffe00,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fff00,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fff80,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fffc0,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fffe0,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffff0,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffff8,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffffc,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7ffffe,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x1f7fffff,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f27923e,32,FLEN)
NAN_BOXED(0x30e2fc,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa4800000,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa4800001,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa4800003,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa4800007,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa480000f,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa480001f,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa480003f,32,FLEN)
NAN_BOXED(0x7f28f4b0,32,FLEN)
NAN_BOXED(0x80307c6d,32,FLEN)
NAN_BOXED(0xa480007f,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
