
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:08 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmsub.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmsub_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_26112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a0001ff; valaddr_reg:x3; val_offset:78336*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78336*0 + 3*0*FLEN/8, x4, x1, x2)

inst_26113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a0003ff; valaddr_reg:x3; val_offset:78339*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78339*0 + 3*1*FLEN/8, x4, x1, x2)

inst_26114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a0007ff; valaddr_reg:x3; val_offset:78342*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78342*0 + 3*2*FLEN/8, x4, x1, x2)

inst_26115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a000fff; valaddr_reg:x3; val_offset:78345*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78345*0 + 3*3*FLEN/8, x4, x1, x2)

inst_26116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a001fff; valaddr_reg:x3; val_offset:78348*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78348*0 + 3*4*FLEN/8, x4, x1, x2)

inst_26117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a003fff; valaddr_reg:x3; val_offset:78351*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78351*0 + 3*5*FLEN/8, x4, x1, x2)

inst_26118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a007fff; valaddr_reg:x3; val_offset:78354*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78354*0 + 3*6*FLEN/8, x4, x1, x2)

inst_26119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a00ffff; valaddr_reg:x3; val_offset:78357*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78357*0 + 3*7*FLEN/8, x4, x1, x2)

inst_26120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a01ffff; valaddr_reg:x3; val_offset:78360*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78360*0 + 3*8*FLEN/8, x4, x1, x2)

inst_26121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a03ffff; valaddr_reg:x3; val_offset:78363*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78363*0 + 3*9*FLEN/8, x4, x1, x2)

inst_26122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a07ffff; valaddr_reg:x3; val_offset:78366*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78366*0 + 3*10*FLEN/8, x4, x1, x2)

inst_26123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a0fffff; valaddr_reg:x3; val_offset:78369*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78369*0 + 3*11*FLEN/8, x4, x1, x2)

inst_26124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a1fffff; valaddr_reg:x3; val_offset:78372*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78372*0 + 3*12*FLEN/8, x4, x1, x2)

inst_26125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a3fffff; valaddr_reg:x3; val_offset:78375*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78375*0 + 3*13*FLEN/8, x4, x1, x2)

inst_26126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a400000; valaddr_reg:x3; val_offset:78378*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78378*0 + 3*14*FLEN/8, x4, x1, x2)

inst_26127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a600000; valaddr_reg:x3; val_offset:78381*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78381*0 + 3*15*FLEN/8, x4, x1, x2)

inst_26128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a700000; valaddr_reg:x3; val_offset:78384*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78384*0 + 3*16*FLEN/8, x4, x1, x2)

inst_26129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a780000; valaddr_reg:x3; val_offset:78387*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78387*0 + 3*17*FLEN/8, x4, x1, x2)

inst_26130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7c0000; valaddr_reg:x3; val_offset:78390*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78390*0 + 3*18*FLEN/8, x4, x1, x2)

inst_26131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7e0000; valaddr_reg:x3; val_offset:78393*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78393*0 + 3*19*FLEN/8, x4, x1, x2)

inst_26132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7f0000; valaddr_reg:x3; val_offset:78396*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78396*0 + 3*20*FLEN/8, x4, x1, x2)

inst_26133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7f8000; valaddr_reg:x3; val_offset:78399*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78399*0 + 3*21*FLEN/8, x4, x1, x2)

inst_26134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fc000; valaddr_reg:x3; val_offset:78402*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78402*0 + 3*22*FLEN/8, x4, x1, x2)

inst_26135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fe000; valaddr_reg:x3; val_offset:78405*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78405*0 + 3*23*FLEN/8, x4, x1, x2)

inst_26136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ff000; valaddr_reg:x3; val_offset:78408*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78408*0 + 3*24*FLEN/8, x4, x1, x2)

inst_26137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ff800; valaddr_reg:x3; val_offset:78411*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78411*0 + 3*25*FLEN/8, x4, x1, x2)

inst_26138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffc00; valaddr_reg:x3; val_offset:78414*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78414*0 + 3*26*FLEN/8, x4, x1, x2)

inst_26139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffe00; valaddr_reg:x3; val_offset:78417*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78417*0 + 3*27*FLEN/8, x4, x1, x2)

inst_26140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fff00; valaddr_reg:x3; val_offset:78420*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78420*0 + 3*28*FLEN/8, x4, x1, x2)

inst_26141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fff80; valaddr_reg:x3; val_offset:78423*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78423*0 + 3*29*FLEN/8, x4, x1, x2)

inst_26142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fffc0; valaddr_reg:x3; val_offset:78426*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78426*0 + 3*30*FLEN/8, x4, x1, x2)

inst_26143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fffe0; valaddr_reg:x3; val_offset:78429*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78429*0 + 3*31*FLEN/8, x4, x1, x2)

inst_26144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffff0; valaddr_reg:x3; val_offset:78432*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78432*0 + 3*32*FLEN/8, x4, x1, x2)

inst_26145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffff8; valaddr_reg:x3; val_offset:78435*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78435*0 + 3*33*FLEN/8, x4, x1, x2)

inst_26146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffffc; valaddr_reg:x3; val_offset:78438*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78438*0 + 3*34*FLEN/8, x4, x1, x2)

inst_26147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7ffffe; valaddr_reg:x3; val_offset:78441*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78441*0 + 3*35*FLEN/8, x4, x1, x2)

inst_26148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3a7fffff; valaddr_reg:x3; val_offset:78444*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78444*0 + 3*36*FLEN/8, x4, x1, x2)

inst_26149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3f800001; valaddr_reg:x3; val_offset:78447*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78447*0 + 3*37*FLEN/8, x4, x1, x2)

inst_26150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3f800003; valaddr_reg:x3; val_offset:78450*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78450*0 + 3*38*FLEN/8, x4, x1, x2)

inst_26151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3f800007; valaddr_reg:x3; val_offset:78453*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78453*0 + 3*39*FLEN/8, x4, x1, x2)

inst_26152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3f999999; valaddr_reg:x3; val_offset:78456*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78456*0 + 3*40*FLEN/8, x4, x1, x2)

inst_26153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:78459*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78459*0 + 3*41*FLEN/8, x4, x1, x2)

inst_26154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:78462*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78462*0 + 3*42*FLEN/8, x4, x1, x2)

inst_26155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78465*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78465*0 + 3*43*FLEN/8, x4, x1, x2)

inst_26156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78468*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78468*0 + 3*44*FLEN/8, x4, x1, x2)

inst_26157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:78471*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78471*0 + 3*45*FLEN/8, x4, x1, x2)

inst_26158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78474*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78474*0 + 3*46*FLEN/8, x4, x1, x2)

inst_26159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78477*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78477*0 + 3*47*FLEN/8, x4, x1, x2)

inst_26160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:78480*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78480*0 + 3*48*FLEN/8, x4, x1, x2)

inst_26161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78483*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78483*0 + 3*49*FLEN/8, x4, x1, x2)

inst_26162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78486*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78486*0 + 3*50*FLEN/8, x4, x1, x2)

inst_26163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78489*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78489*0 + 3*51*FLEN/8, x4, x1, x2)

inst_26164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01cbbf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3f1d4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01cbbf; op2val:0x3f1d4e;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78492*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78492*0 + 3*52*FLEN/8, x4, x1, x2)

inst_26165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:78495*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78495*0 + 3*53*FLEN/8, x4, x1, x2)

inst_26166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:78498*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78498*0 + 3*54*FLEN/8, x4, x1, x2)

inst_26167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:78501*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78501*0 + 3*55*FLEN/8, x4, x1, x2)

inst_26168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:78504*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78504*0 + 3*56*FLEN/8, x4, x1, x2)

inst_26169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:78507*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78507*0 + 3*57*FLEN/8, x4, x1, x2)

inst_26170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:78510*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78510*0 + 3*58*FLEN/8, x4, x1, x2)

inst_26171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:78513*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78513*0 + 3*59*FLEN/8, x4, x1, x2)

inst_26172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:78516*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78516*0 + 3*60*FLEN/8, x4, x1, x2)

inst_26173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:78519*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78519*0 + 3*61*FLEN/8, x4, x1, x2)

inst_26174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:78522*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78522*0 + 3*62*FLEN/8, x4, x1, x2)

inst_26175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:78525*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78525*0 + 3*63*FLEN/8, x4, x1, x2)

inst_26176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:78528*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78528*0 + 3*64*FLEN/8, x4, x1, x2)

inst_26177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:78531*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78531*0 + 3*65*FLEN/8, x4, x1, x2)

inst_26178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:78534*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78534*0 + 3*66*FLEN/8, x4, x1, x2)

inst_26179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:78537*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78537*0 + 3*67*FLEN/8, x4, x1, x2)

inst_26180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:78540*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78540*0 + 3*68*FLEN/8, x4, x1, x2)

inst_26181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb000000; valaddr_reg:x3; val_offset:78543*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78543*0 + 3*69*FLEN/8, x4, x1, x2)

inst_26182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb000001; valaddr_reg:x3; val_offset:78546*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78546*0 + 3*70*FLEN/8, x4, x1, x2)

inst_26183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb000003; valaddr_reg:x3; val_offset:78549*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78549*0 + 3*71*FLEN/8, x4, x1, x2)

inst_26184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb000007; valaddr_reg:x3; val_offset:78552*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78552*0 + 3*72*FLEN/8, x4, x1, x2)

inst_26185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb00000f; valaddr_reg:x3; val_offset:78555*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78555*0 + 3*73*FLEN/8, x4, x1, x2)

inst_26186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb00001f; valaddr_reg:x3; val_offset:78558*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78558*0 + 3*74*FLEN/8, x4, x1, x2)

inst_26187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb00003f; valaddr_reg:x3; val_offset:78561*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78561*0 + 3*75*FLEN/8, x4, x1, x2)

inst_26188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb00007f; valaddr_reg:x3; val_offset:78564*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78564*0 + 3*76*FLEN/8, x4, x1, x2)

inst_26189:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb0000ff; valaddr_reg:x3; val_offset:78567*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78567*0 + 3*77*FLEN/8, x4, x1, x2)

inst_26190:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb0001ff; valaddr_reg:x3; val_offset:78570*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78570*0 + 3*78*FLEN/8, x4, x1, x2)

inst_26191:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb0003ff; valaddr_reg:x3; val_offset:78573*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78573*0 + 3*79*FLEN/8, x4, x1, x2)

inst_26192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb0007ff; valaddr_reg:x3; val_offset:78576*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78576*0 + 3*80*FLEN/8, x4, x1, x2)

inst_26193:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb000fff; valaddr_reg:x3; val_offset:78579*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78579*0 + 3*81*FLEN/8, x4, x1, x2)

inst_26194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb001fff; valaddr_reg:x3; val_offset:78582*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78582*0 + 3*82*FLEN/8, x4, x1, x2)

inst_26195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb003fff; valaddr_reg:x3; val_offset:78585*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78585*0 + 3*83*FLEN/8, x4, x1, x2)

inst_26196:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb007fff; valaddr_reg:x3; val_offset:78588*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78588*0 + 3*84*FLEN/8, x4, x1, x2)

inst_26197:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb00ffff; valaddr_reg:x3; val_offset:78591*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78591*0 + 3*85*FLEN/8, x4, x1, x2)

inst_26198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb01ffff; valaddr_reg:x3; val_offset:78594*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78594*0 + 3*86*FLEN/8, x4, x1, x2)

inst_26199:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb03ffff; valaddr_reg:x3; val_offset:78597*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78597*0 + 3*87*FLEN/8, x4, x1, x2)

inst_26200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb07ffff; valaddr_reg:x3; val_offset:78600*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78600*0 + 3*88*FLEN/8, x4, x1, x2)

inst_26201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb0fffff; valaddr_reg:x3; val_offset:78603*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78603*0 + 3*89*FLEN/8, x4, x1, x2)

inst_26202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb1fffff; valaddr_reg:x3; val_offset:78606*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78606*0 + 3*90*FLEN/8, x4, x1, x2)

inst_26203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb3fffff; valaddr_reg:x3; val_offset:78609*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78609*0 + 3*91*FLEN/8, x4, x1, x2)

inst_26204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb400000; valaddr_reg:x3; val_offset:78612*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78612*0 + 3*92*FLEN/8, x4, x1, x2)

inst_26205:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb600000; valaddr_reg:x3; val_offset:78615*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78615*0 + 3*93*FLEN/8, x4, x1, x2)

inst_26206:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb700000; valaddr_reg:x3; val_offset:78618*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78618*0 + 3*94*FLEN/8, x4, x1, x2)

inst_26207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb780000; valaddr_reg:x3; val_offset:78621*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78621*0 + 3*95*FLEN/8, x4, x1, x2)

inst_26208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7c0000; valaddr_reg:x3; val_offset:78624*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78624*0 + 3*96*FLEN/8, x4, x1, x2)

inst_26209:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7e0000; valaddr_reg:x3; val_offset:78627*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78627*0 + 3*97*FLEN/8, x4, x1, x2)

inst_26210:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7f0000; valaddr_reg:x3; val_offset:78630*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78630*0 + 3*98*FLEN/8, x4, x1, x2)

inst_26211:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7f8000; valaddr_reg:x3; val_offset:78633*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78633*0 + 3*99*FLEN/8, x4, x1, x2)

inst_26212:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fc000; valaddr_reg:x3; val_offset:78636*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78636*0 + 3*100*FLEN/8, x4, x1, x2)

inst_26213:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fe000; valaddr_reg:x3; val_offset:78639*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78639*0 + 3*101*FLEN/8, x4, x1, x2)

inst_26214:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ff000; valaddr_reg:x3; val_offset:78642*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78642*0 + 3*102*FLEN/8, x4, x1, x2)

inst_26215:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ff800; valaddr_reg:x3; val_offset:78645*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78645*0 + 3*103*FLEN/8, x4, x1, x2)

inst_26216:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffc00; valaddr_reg:x3; val_offset:78648*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78648*0 + 3*104*FLEN/8, x4, x1, x2)

inst_26217:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffe00; valaddr_reg:x3; val_offset:78651*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78651*0 + 3*105*FLEN/8, x4, x1, x2)

inst_26218:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fff00; valaddr_reg:x3; val_offset:78654*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78654*0 + 3*106*FLEN/8, x4, x1, x2)

inst_26219:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fff80; valaddr_reg:x3; val_offset:78657*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78657*0 + 3*107*FLEN/8, x4, x1, x2)

inst_26220:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fffc0; valaddr_reg:x3; val_offset:78660*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78660*0 + 3*108*FLEN/8, x4, x1, x2)

inst_26221:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fffe0; valaddr_reg:x3; val_offset:78663*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78663*0 + 3*109*FLEN/8, x4, x1, x2)

inst_26222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffff0; valaddr_reg:x3; val_offset:78666*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78666*0 + 3*110*FLEN/8, x4, x1, x2)

inst_26223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffff8; valaddr_reg:x3; val_offset:78669*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78669*0 + 3*111*FLEN/8, x4, x1, x2)

inst_26224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffffc; valaddr_reg:x3; val_offset:78672*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78672*0 + 3*112*FLEN/8, x4, x1, x2)

inst_26225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7ffffe; valaddr_reg:x3; val_offset:78675*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78675*0 + 3*113*FLEN/8, x4, x1, x2)

inst_26226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02421b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02421b; op2val:0x0;
op3val:0xb7fffff; valaddr_reg:x3; val_offset:78678*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78678*0 + 3*114*FLEN/8, x4, x1, x2)

inst_26227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80800000; valaddr_reg:x3; val_offset:78681*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78681*0 + 3*115*FLEN/8, x4, x1, x2)

inst_26228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:78684*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78684*0 + 3*116*FLEN/8, x4, x1, x2)

inst_26229:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:78687*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78687*0 + 3*117*FLEN/8, x4, x1, x2)

inst_26230:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:78690*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78690*0 + 3*118*FLEN/8, x4, x1, x2)

inst_26231:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8080000f; valaddr_reg:x3; val_offset:78693*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78693*0 + 3*119*FLEN/8, x4, x1, x2)

inst_26232:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8080001f; valaddr_reg:x3; val_offset:78696*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78696*0 + 3*120*FLEN/8, x4, x1, x2)

inst_26233:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8080003f; valaddr_reg:x3; val_offset:78699*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78699*0 + 3*121*FLEN/8, x4, x1, x2)

inst_26234:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8080007f; valaddr_reg:x3; val_offset:78702*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78702*0 + 3*122*FLEN/8, x4, x1, x2)

inst_26235:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x808000ff; valaddr_reg:x3; val_offset:78705*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78705*0 + 3*123*FLEN/8, x4, x1, x2)

inst_26236:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x808001ff; valaddr_reg:x3; val_offset:78708*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78708*0 + 3*124*FLEN/8, x4, x1, x2)

inst_26237:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x808003ff; valaddr_reg:x3; val_offset:78711*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78711*0 + 3*125*FLEN/8, x4, x1, x2)

inst_26238:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x808007ff; valaddr_reg:x3; val_offset:78714*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78714*0 + 3*126*FLEN/8, x4, x1, x2)

inst_26239:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80800fff; valaddr_reg:x3; val_offset:78717*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78717*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_26240:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80801fff; valaddr_reg:x3; val_offset:78720*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78720*0 + 3*128*FLEN/8, x4, x1, x2)

inst_26241:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80803fff; valaddr_reg:x3; val_offset:78723*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78723*0 + 3*129*FLEN/8, x4, x1, x2)

inst_26242:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80807fff; valaddr_reg:x3; val_offset:78726*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78726*0 + 3*130*FLEN/8, x4, x1, x2)

inst_26243:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8080ffff; valaddr_reg:x3; val_offset:78729*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78729*0 + 3*131*FLEN/8, x4, x1, x2)

inst_26244:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8081ffff; valaddr_reg:x3; val_offset:78732*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78732*0 + 3*132*FLEN/8, x4, x1, x2)

inst_26245:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8083ffff; valaddr_reg:x3; val_offset:78735*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78735*0 + 3*133*FLEN/8, x4, x1, x2)

inst_26246:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x8087ffff; valaddr_reg:x3; val_offset:78738*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78738*0 + 3*134*FLEN/8, x4, x1, x2)

inst_26247:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x808fffff; valaddr_reg:x3; val_offset:78741*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78741*0 + 3*135*FLEN/8, x4, x1, x2)

inst_26248:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:78744*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78744*0 + 3*136*FLEN/8, x4, x1, x2)

inst_26249:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x809fffff; valaddr_reg:x3; val_offset:78747*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78747*0 + 3*137*FLEN/8, x4, x1, x2)

inst_26250:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:78750*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78750*0 + 3*138*FLEN/8, x4, x1, x2)

inst_26251:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:78753*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78753*0 + 3*139*FLEN/8, x4, x1, x2)

inst_26252:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:78756*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78756*0 + 3*140*FLEN/8, x4, x1, x2)

inst_26253:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:78759*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78759*0 + 3*141*FLEN/8, x4, x1, x2)

inst_26254:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80bfffff; valaddr_reg:x3; val_offset:78762*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78762*0 + 3*142*FLEN/8, x4, x1, x2)

inst_26255:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80c00000; valaddr_reg:x3; val_offset:78765*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78765*0 + 3*143*FLEN/8, x4, x1, x2)

inst_26256:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:78768*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78768*0 + 3*144*FLEN/8, x4, x1, x2)

inst_26257:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:78771*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78771*0 + 3*145*FLEN/8, x4, x1, x2)

inst_26258:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:78774*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78774*0 + 3*146*FLEN/8, x4, x1, x2)

inst_26259:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80e00000; valaddr_reg:x3; val_offset:78777*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78777*0 + 3*147*FLEN/8, x4, x1, x2)

inst_26260:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:78780*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78780*0 + 3*148*FLEN/8, x4, x1, x2)

inst_26261:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:78783*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78783*0 + 3*149*FLEN/8, x4, x1, x2)

inst_26262:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80f00000; valaddr_reg:x3; val_offset:78786*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78786*0 + 3*150*FLEN/8, x4, x1, x2)

inst_26263:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80f80000; valaddr_reg:x3; val_offset:78789*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78789*0 + 3*151*FLEN/8, x4, x1, x2)

inst_26264:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fc0000; valaddr_reg:x3; val_offset:78792*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78792*0 + 3*152*FLEN/8, x4, x1, x2)

inst_26265:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fe0000; valaddr_reg:x3; val_offset:78795*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78795*0 + 3*153*FLEN/8, x4, x1, x2)

inst_26266:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ff0000; valaddr_reg:x3; val_offset:78798*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78798*0 + 3*154*FLEN/8, x4, x1, x2)

inst_26267:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ff8000; valaddr_reg:x3; val_offset:78801*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78801*0 + 3*155*FLEN/8, x4, x1, x2)

inst_26268:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffc000; valaddr_reg:x3; val_offset:78804*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78804*0 + 3*156*FLEN/8, x4, x1, x2)

inst_26269:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffe000; valaddr_reg:x3; val_offset:78807*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78807*0 + 3*157*FLEN/8, x4, x1, x2)

inst_26270:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fff000; valaddr_reg:x3; val_offset:78810*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78810*0 + 3*158*FLEN/8, x4, x1, x2)

inst_26271:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fff800; valaddr_reg:x3; val_offset:78813*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78813*0 + 3*159*FLEN/8, x4, x1, x2)

inst_26272:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffc00; valaddr_reg:x3; val_offset:78816*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78816*0 + 3*160*FLEN/8, x4, x1, x2)

inst_26273:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffe00; valaddr_reg:x3; val_offset:78819*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78819*0 + 3*161*FLEN/8, x4, x1, x2)

inst_26274:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffff00; valaddr_reg:x3; val_offset:78822*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78822*0 + 3*162*FLEN/8, x4, x1, x2)

inst_26275:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffff80; valaddr_reg:x3; val_offset:78825*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78825*0 + 3*163*FLEN/8, x4, x1, x2)

inst_26276:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffffc0; valaddr_reg:x3; val_offset:78828*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78828*0 + 3*164*FLEN/8, x4, x1, x2)

inst_26277:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffffe0; valaddr_reg:x3; val_offset:78831*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78831*0 + 3*165*FLEN/8, x4, x1, x2)

inst_26278:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffff0; valaddr_reg:x3; val_offset:78834*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78834*0 + 3*166*FLEN/8, x4, x1, x2)

inst_26279:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:78837*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78837*0 + 3*167*FLEN/8, x4, x1, x2)

inst_26280:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:78840*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78840*0 + 3*168*FLEN/8, x4, x1, x2)

inst_26281:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:78843*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78843*0 + 3*169*FLEN/8, x4, x1, x2)

inst_26282:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0247c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0247c9; op2val:0x80000000;
op3val:0x80ffffff; valaddr_reg:x3; val_offset:78846*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78846*0 + 3*170*FLEN/8, x4, x1, x2)

inst_26283:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37000000; valaddr_reg:x3; val_offset:78849*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78849*0 + 3*171*FLEN/8, x4, x1, x2)

inst_26284:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37000001; valaddr_reg:x3; val_offset:78852*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78852*0 + 3*172*FLEN/8, x4, x1, x2)

inst_26285:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37000003; valaddr_reg:x3; val_offset:78855*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78855*0 + 3*173*FLEN/8, x4, x1, x2)

inst_26286:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37000007; valaddr_reg:x3; val_offset:78858*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78858*0 + 3*174*FLEN/8, x4, x1, x2)

inst_26287:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3700000f; valaddr_reg:x3; val_offset:78861*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78861*0 + 3*175*FLEN/8, x4, x1, x2)

inst_26288:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3700001f; valaddr_reg:x3; val_offset:78864*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78864*0 + 3*176*FLEN/8, x4, x1, x2)

inst_26289:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3700003f; valaddr_reg:x3; val_offset:78867*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78867*0 + 3*177*FLEN/8, x4, x1, x2)

inst_26290:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3700007f; valaddr_reg:x3; val_offset:78870*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78870*0 + 3*178*FLEN/8, x4, x1, x2)

inst_26291:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x370000ff; valaddr_reg:x3; val_offset:78873*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78873*0 + 3*179*FLEN/8, x4, x1, x2)

inst_26292:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x370001ff; valaddr_reg:x3; val_offset:78876*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78876*0 + 3*180*FLEN/8, x4, x1, x2)

inst_26293:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x370003ff; valaddr_reg:x3; val_offset:78879*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78879*0 + 3*181*FLEN/8, x4, x1, x2)

inst_26294:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x370007ff; valaddr_reg:x3; val_offset:78882*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78882*0 + 3*182*FLEN/8, x4, x1, x2)

inst_26295:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37000fff; valaddr_reg:x3; val_offset:78885*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78885*0 + 3*183*FLEN/8, x4, x1, x2)

inst_26296:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37001fff; valaddr_reg:x3; val_offset:78888*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78888*0 + 3*184*FLEN/8, x4, x1, x2)

inst_26297:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37003fff; valaddr_reg:x3; val_offset:78891*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78891*0 + 3*185*FLEN/8, x4, x1, x2)

inst_26298:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37007fff; valaddr_reg:x3; val_offset:78894*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78894*0 + 3*186*FLEN/8, x4, x1, x2)

inst_26299:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3700ffff; valaddr_reg:x3; val_offset:78897*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78897*0 + 3*187*FLEN/8, x4, x1, x2)

inst_26300:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3701ffff; valaddr_reg:x3; val_offset:78900*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78900*0 + 3*188*FLEN/8, x4, x1, x2)

inst_26301:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3703ffff; valaddr_reg:x3; val_offset:78903*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78903*0 + 3*189*FLEN/8, x4, x1, x2)

inst_26302:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3707ffff; valaddr_reg:x3; val_offset:78906*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78906*0 + 3*190*FLEN/8, x4, x1, x2)

inst_26303:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x370fffff; valaddr_reg:x3; val_offset:78909*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78909*0 + 3*191*FLEN/8, x4, x1, x2)

inst_26304:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x371fffff; valaddr_reg:x3; val_offset:78912*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78912*0 + 3*192*FLEN/8, x4, x1, x2)

inst_26305:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x373fffff; valaddr_reg:x3; val_offset:78915*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78915*0 + 3*193*FLEN/8, x4, x1, x2)

inst_26306:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37400000; valaddr_reg:x3; val_offset:78918*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78918*0 + 3*194*FLEN/8, x4, x1, x2)

inst_26307:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37600000; valaddr_reg:x3; val_offset:78921*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78921*0 + 3*195*FLEN/8, x4, x1, x2)

inst_26308:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37700000; valaddr_reg:x3; val_offset:78924*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78924*0 + 3*196*FLEN/8, x4, x1, x2)

inst_26309:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x37780000; valaddr_reg:x3; val_offset:78927*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78927*0 + 3*197*FLEN/8, x4, x1, x2)

inst_26310:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377c0000; valaddr_reg:x3; val_offset:78930*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78930*0 + 3*198*FLEN/8, x4, x1, x2)

inst_26311:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377e0000; valaddr_reg:x3; val_offset:78933*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78933*0 + 3*199*FLEN/8, x4, x1, x2)

inst_26312:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377f0000; valaddr_reg:x3; val_offset:78936*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78936*0 + 3*200*FLEN/8, x4, x1, x2)

inst_26313:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377f8000; valaddr_reg:x3; val_offset:78939*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78939*0 + 3*201*FLEN/8, x4, x1, x2)

inst_26314:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fc000; valaddr_reg:x3; val_offset:78942*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78942*0 + 3*202*FLEN/8, x4, x1, x2)

inst_26315:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fe000; valaddr_reg:x3; val_offset:78945*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78945*0 + 3*203*FLEN/8, x4, x1, x2)

inst_26316:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ff000; valaddr_reg:x3; val_offset:78948*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78948*0 + 3*204*FLEN/8, x4, x1, x2)

inst_26317:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ff800; valaddr_reg:x3; val_offset:78951*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78951*0 + 3*205*FLEN/8, x4, x1, x2)

inst_26318:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffc00; valaddr_reg:x3; val_offset:78954*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78954*0 + 3*206*FLEN/8, x4, x1, x2)

inst_26319:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffe00; valaddr_reg:x3; val_offset:78957*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78957*0 + 3*207*FLEN/8, x4, x1, x2)

inst_26320:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fff00; valaddr_reg:x3; val_offset:78960*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78960*0 + 3*208*FLEN/8, x4, x1, x2)

inst_26321:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fff80; valaddr_reg:x3; val_offset:78963*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78963*0 + 3*209*FLEN/8, x4, x1, x2)

inst_26322:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fffc0; valaddr_reg:x3; val_offset:78966*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78966*0 + 3*210*FLEN/8, x4, x1, x2)

inst_26323:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fffe0; valaddr_reg:x3; val_offset:78969*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78969*0 + 3*211*FLEN/8, x4, x1, x2)

inst_26324:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffff0; valaddr_reg:x3; val_offset:78972*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78972*0 + 3*212*FLEN/8, x4, x1, x2)

inst_26325:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffff8; valaddr_reg:x3; val_offset:78975*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78975*0 + 3*213*FLEN/8, x4, x1, x2)

inst_26326:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffffc; valaddr_reg:x3; val_offset:78978*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78978*0 + 3*214*FLEN/8, x4, x1, x2)

inst_26327:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377ffffe; valaddr_reg:x3; val_offset:78981*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78981*0 + 3*215*FLEN/8, x4, x1, x2)

inst_26328:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x377fffff; valaddr_reg:x3; val_offset:78984*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78984*0 + 3*216*FLEN/8, x4, x1, x2)

inst_26329:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3f800001; valaddr_reg:x3; val_offset:78987*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78987*0 + 3*217*FLEN/8, x4, x1, x2)

inst_26330:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3f800003; valaddr_reg:x3; val_offset:78990*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78990*0 + 3*218*FLEN/8, x4, x1, x2)

inst_26331:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3f800007; valaddr_reg:x3; val_offset:78993*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78993*0 + 3*219*FLEN/8, x4, x1, x2)

inst_26332:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3f999999; valaddr_reg:x3; val_offset:78996*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78996*0 + 3*220*FLEN/8, x4, x1, x2)

inst_26333:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:78999*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78999*0 + 3*221*FLEN/8, x4, x1, x2)

inst_26334:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:79002*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79002*0 + 3*222*FLEN/8, x4, x1, x2)

inst_26335:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79005*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79005*0 + 3*223*FLEN/8, x4, x1, x2)

inst_26336:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79008*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79008*0 + 3*224*FLEN/8, x4, x1, x2)

inst_26337:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:79011*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79011*0 + 3*225*FLEN/8, x4, x1, x2)

inst_26338:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79014*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79014*0 + 3*226*FLEN/8, x4, x1, x2)

inst_26339:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79017*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79017*0 + 3*227*FLEN/8, x4, x1, x2)

inst_26340:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:79020*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79020*0 + 3*228*FLEN/8, x4, x1, x2)

inst_26341:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:79023*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79023*0 + 3*229*FLEN/8, x4, x1, x2)

inst_26342:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:79026*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79026*0 + 3*230*FLEN/8, x4, x1, x2)

inst_26343:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:79029*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79029*0 + 3*231*FLEN/8, x4, x1, x2)

inst_26344:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026c09 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecfbd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026c09; op2val:0x3ecfbd;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:79032*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79032*0 + 3*232*FLEN/8, x4, x1, x2)

inst_26345:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61800000; valaddr_reg:x3; val_offset:79035*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79035*0 + 3*233*FLEN/8, x4, x1, x2)

inst_26346:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61800001; valaddr_reg:x3; val_offset:79038*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79038*0 + 3*234*FLEN/8, x4, x1, x2)

inst_26347:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61800003; valaddr_reg:x3; val_offset:79041*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79041*0 + 3*235*FLEN/8, x4, x1, x2)

inst_26348:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61800007; valaddr_reg:x3; val_offset:79044*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79044*0 + 3*236*FLEN/8, x4, x1, x2)

inst_26349:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6180000f; valaddr_reg:x3; val_offset:79047*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79047*0 + 3*237*FLEN/8, x4, x1, x2)

inst_26350:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6180001f; valaddr_reg:x3; val_offset:79050*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79050*0 + 3*238*FLEN/8, x4, x1, x2)

inst_26351:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6180003f; valaddr_reg:x3; val_offset:79053*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79053*0 + 3*239*FLEN/8, x4, x1, x2)

inst_26352:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6180007f; valaddr_reg:x3; val_offset:79056*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79056*0 + 3*240*FLEN/8, x4, x1, x2)

inst_26353:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x618000ff; valaddr_reg:x3; val_offset:79059*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79059*0 + 3*241*FLEN/8, x4, x1, x2)

inst_26354:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x618001ff; valaddr_reg:x3; val_offset:79062*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79062*0 + 3*242*FLEN/8, x4, x1, x2)

inst_26355:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x618003ff; valaddr_reg:x3; val_offset:79065*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79065*0 + 3*243*FLEN/8, x4, x1, x2)

inst_26356:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x618007ff; valaddr_reg:x3; val_offset:79068*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79068*0 + 3*244*FLEN/8, x4, x1, x2)

inst_26357:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61800fff; valaddr_reg:x3; val_offset:79071*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79071*0 + 3*245*FLEN/8, x4, x1, x2)

inst_26358:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61801fff; valaddr_reg:x3; val_offset:79074*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79074*0 + 3*246*FLEN/8, x4, x1, x2)

inst_26359:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61803fff; valaddr_reg:x3; val_offset:79077*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79077*0 + 3*247*FLEN/8, x4, x1, x2)

inst_26360:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61807fff; valaddr_reg:x3; val_offset:79080*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79080*0 + 3*248*FLEN/8, x4, x1, x2)

inst_26361:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6180ffff; valaddr_reg:x3; val_offset:79083*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79083*0 + 3*249*FLEN/8, x4, x1, x2)

inst_26362:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6181ffff; valaddr_reg:x3; val_offset:79086*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79086*0 + 3*250*FLEN/8, x4, x1, x2)

inst_26363:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6183ffff; valaddr_reg:x3; val_offset:79089*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79089*0 + 3*251*FLEN/8, x4, x1, x2)

inst_26364:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x6187ffff; valaddr_reg:x3; val_offset:79092*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79092*0 + 3*252*FLEN/8, x4, x1, x2)

inst_26365:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x618fffff; valaddr_reg:x3; val_offset:79095*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79095*0 + 3*253*FLEN/8, x4, x1, x2)

inst_26366:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x619fffff; valaddr_reg:x3; val_offset:79098*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79098*0 + 3*254*FLEN/8, x4, x1, x2)

inst_26367:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61bfffff; valaddr_reg:x3; val_offset:79101*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79101*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_26368:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61c00000; valaddr_reg:x3; val_offset:79104*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79104*0 + 3*256*FLEN/8, x4, x1, x2)

inst_26369:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61e00000; valaddr_reg:x3; val_offset:79107*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79107*0 + 3*257*FLEN/8, x4, x1, x2)

inst_26370:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61f00000; valaddr_reg:x3; val_offset:79110*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79110*0 + 3*258*FLEN/8, x4, x1, x2)

inst_26371:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61f80000; valaddr_reg:x3; val_offset:79113*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79113*0 + 3*259*FLEN/8, x4, x1, x2)

inst_26372:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fc0000; valaddr_reg:x3; val_offset:79116*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79116*0 + 3*260*FLEN/8, x4, x1, x2)

inst_26373:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fe0000; valaddr_reg:x3; val_offset:79119*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79119*0 + 3*261*FLEN/8, x4, x1, x2)

inst_26374:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ff0000; valaddr_reg:x3; val_offset:79122*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79122*0 + 3*262*FLEN/8, x4, x1, x2)

inst_26375:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ff8000; valaddr_reg:x3; val_offset:79125*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79125*0 + 3*263*FLEN/8, x4, x1, x2)

inst_26376:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffc000; valaddr_reg:x3; val_offset:79128*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79128*0 + 3*264*FLEN/8, x4, x1, x2)

inst_26377:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffe000; valaddr_reg:x3; val_offset:79131*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79131*0 + 3*265*FLEN/8, x4, x1, x2)

inst_26378:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fff000; valaddr_reg:x3; val_offset:79134*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79134*0 + 3*266*FLEN/8, x4, x1, x2)

inst_26379:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fff800; valaddr_reg:x3; val_offset:79137*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79137*0 + 3*267*FLEN/8, x4, x1, x2)

inst_26380:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffc00; valaddr_reg:x3; val_offset:79140*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79140*0 + 3*268*FLEN/8, x4, x1, x2)

inst_26381:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffe00; valaddr_reg:x3; val_offset:79143*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79143*0 + 3*269*FLEN/8, x4, x1, x2)

inst_26382:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffff00; valaddr_reg:x3; val_offset:79146*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79146*0 + 3*270*FLEN/8, x4, x1, x2)

inst_26383:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffff80; valaddr_reg:x3; val_offset:79149*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79149*0 + 3*271*FLEN/8, x4, x1, x2)

inst_26384:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffffc0; valaddr_reg:x3; val_offset:79152*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79152*0 + 3*272*FLEN/8, x4, x1, x2)

inst_26385:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffffe0; valaddr_reg:x3; val_offset:79155*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79155*0 + 3*273*FLEN/8, x4, x1, x2)

inst_26386:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffff0; valaddr_reg:x3; val_offset:79158*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79158*0 + 3*274*FLEN/8, x4, x1, x2)

inst_26387:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffff8; valaddr_reg:x3; val_offset:79161*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79161*0 + 3*275*FLEN/8, x4, x1, x2)

inst_26388:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffffc; valaddr_reg:x3; val_offset:79164*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79164*0 + 3*276*FLEN/8, x4, x1, x2)

inst_26389:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61fffffe; valaddr_reg:x3; val_offset:79167*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79167*0 + 3*277*FLEN/8, x4, x1, x2)

inst_26390:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x61ffffff; valaddr_reg:x3; val_offset:79170*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79170*0 + 3*278*FLEN/8, x4, x1, x2)

inst_26391:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f000001; valaddr_reg:x3; val_offset:79173*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79173*0 + 3*279*FLEN/8, x4, x1, x2)

inst_26392:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f000003; valaddr_reg:x3; val_offset:79176*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79176*0 + 3*280*FLEN/8, x4, x1, x2)

inst_26393:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f000007; valaddr_reg:x3; val_offset:79179*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79179*0 + 3*281*FLEN/8, x4, x1, x2)

inst_26394:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f199999; valaddr_reg:x3; val_offset:79182*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79182*0 + 3*282*FLEN/8, x4, x1, x2)

inst_26395:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f249249; valaddr_reg:x3; val_offset:79185*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79185*0 + 3*283*FLEN/8, x4, x1, x2)

inst_26396:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f333333; valaddr_reg:x3; val_offset:79188*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79188*0 + 3*284*FLEN/8, x4, x1, x2)

inst_26397:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:79191*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79191*0 + 3*285*FLEN/8, x4, x1, x2)

inst_26398:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:79194*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79194*0 + 3*286*FLEN/8, x4, x1, x2)

inst_26399:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f444444; valaddr_reg:x3; val_offset:79197*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79197*0 + 3*287*FLEN/8, x4, x1, x2)

inst_26400:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:79200*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79200*0 + 3*288*FLEN/8, x4, x1, x2)

inst_26401:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:79203*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79203*0 + 3*289*FLEN/8, x4, x1, x2)

inst_26402:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f666666; valaddr_reg:x3; val_offset:79206*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79206*0 + 3*290*FLEN/8, x4, x1, x2)

inst_26403:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:79209*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79209*0 + 3*291*FLEN/8, x4, x1, x2)

inst_26404:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:79212*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79212*0 + 3*292*FLEN/8, x4, x1, x2)

inst_26405:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:79215*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79215*0 + 3*293*FLEN/8, x4, x1, x2)

inst_26406:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02d831 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7a6f45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02d831; op2val:0x3ffa6f45;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:79218*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79218*0 + 3*294*FLEN/8, x4, x1, x2)

inst_26407:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:79221*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79221*0 + 3*295*FLEN/8, x4, x1, x2)

inst_26408:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:79224*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79224*0 + 3*296*FLEN/8, x4, x1, x2)

inst_26409:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:79227*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79227*0 + 3*297*FLEN/8, x4, x1, x2)

inst_26410:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:79230*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79230*0 + 3*298*FLEN/8, x4, x1, x2)

inst_26411:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:79233*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79233*0 + 3*299*FLEN/8, x4, x1, x2)

inst_26412:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:79236*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79236*0 + 3*300*FLEN/8, x4, x1, x2)

inst_26413:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:79239*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79239*0 + 3*301*FLEN/8, x4, x1, x2)

inst_26414:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:79242*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79242*0 + 3*302*FLEN/8, x4, x1, x2)

inst_26415:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:79245*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79245*0 + 3*303*FLEN/8, x4, x1, x2)

inst_26416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:79248*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79248*0 + 3*304*FLEN/8, x4, x1, x2)

inst_26417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:79251*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79251*0 + 3*305*FLEN/8, x4, x1, x2)

inst_26418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:79254*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79254*0 + 3*306*FLEN/8, x4, x1, x2)

inst_26419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:79257*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79257*0 + 3*307*FLEN/8, x4, x1, x2)

inst_26420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:79260*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79260*0 + 3*308*FLEN/8, x4, x1, x2)

inst_26421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:79263*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79263*0 + 3*309*FLEN/8, x4, x1, x2)

inst_26422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:79266*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79266*0 + 3*310*FLEN/8, x4, x1, x2)

inst_26423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86000000; valaddr_reg:x3; val_offset:79269*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79269*0 + 3*311*FLEN/8, x4, x1, x2)

inst_26424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86000001; valaddr_reg:x3; val_offset:79272*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79272*0 + 3*312*FLEN/8, x4, x1, x2)

inst_26425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86000003; valaddr_reg:x3; val_offset:79275*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79275*0 + 3*313*FLEN/8, x4, x1, x2)

inst_26426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86000007; valaddr_reg:x3; val_offset:79278*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79278*0 + 3*314*FLEN/8, x4, x1, x2)

inst_26427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8600000f; valaddr_reg:x3; val_offset:79281*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79281*0 + 3*315*FLEN/8, x4, x1, x2)

inst_26428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8600001f; valaddr_reg:x3; val_offset:79284*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79284*0 + 3*316*FLEN/8, x4, x1, x2)

inst_26429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8600003f; valaddr_reg:x3; val_offset:79287*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79287*0 + 3*317*FLEN/8, x4, x1, x2)

inst_26430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8600007f; valaddr_reg:x3; val_offset:79290*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79290*0 + 3*318*FLEN/8, x4, x1, x2)

inst_26431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x860000ff; valaddr_reg:x3; val_offset:79293*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79293*0 + 3*319*FLEN/8, x4, x1, x2)

inst_26432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x860001ff; valaddr_reg:x3; val_offset:79296*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79296*0 + 3*320*FLEN/8, x4, x1, x2)

inst_26433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x860003ff; valaddr_reg:x3; val_offset:79299*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79299*0 + 3*321*FLEN/8, x4, x1, x2)

inst_26434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x860007ff; valaddr_reg:x3; val_offset:79302*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79302*0 + 3*322*FLEN/8, x4, x1, x2)

inst_26435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86000fff; valaddr_reg:x3; val_offset:79305*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79305*0 + 3*323*FLEN/8, x4, x1, x2)

inst_26436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86001fff; valaddr_reg:x3; val_offset:79308*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79308*0 + 3*324*FLEN/8, x4, x1, x2)

inst_26437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86003fff; valaddr_reg:x3; val_offset:79311*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79311*0 + 3*325*FLEN/8, x4, x1, x2)

inst_26438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86007fff; valaddr_reg:x3; val_offset:79314*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79314*0 + 3*326*FLEN/8, x4, x1, x2)

inst_26439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8600ffff; valaddr_reg:x3; val_offset:79317*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79317*0 + 3*327*FLEN/8, x4, x1, x2)

inst_26440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8601ffff; valaddr_reg:x3; val_offset:79320*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79320*0 + 3*328*FLEN/8, x4, x1, x2)

inst_26441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8603ffff; valaddr_reg:x3; val_offset:79323*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79323*0 + 3*329*FLEN/8, x4, x1, x2)

inst_26442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x8607ffff; valaddr_reg:x3; val_offset:79326*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79326*0 + 3*330*FLEN/8, x4, x1, x2)

inst_26443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x860fffff; valaddr_reg:x3; val_offset:79329*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79329*0 + 3*331*FLEN/8, x4, x1, x2)

inst_26444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x861fffff; valaddr_reg:x3; val_offset:79332*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79332*0 + 3*332*FLEN/8, x4, x1, x2)

inst_26445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x863fffff; valaddr_reg:x3; val_offset:79335*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79335*0 + 3*333*FLEN/8, x4, x1, x2)

inst_26446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86400000; valaddr_reg:x3; val_offset:79338*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79338*0 + 3*334*FLEN/8, x4, x1, x2)

inst_26447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86600000; valaddr_reg:x3; val_offset:79341*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79341*0 + 3*335*FLEN/8, x4, x1, x2)

inst_26448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86700000; valaddr_reg:x3; val_offset:79344*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79344*0 + 3*336*FLEN/8, x4, x1, x2)

inst_26449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x86780000; valaddr_reg:x3; val_offset:79347*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79347*0 + 3*337*FLEN/8, x4, x1, x2)

inst_26450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867c0000; valaddr_reg:x3; val_offset:79350*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79350*0 + 3*338*FLEN/8, x4, x1, x2)

inst_26451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867e0000; valaddr_reg:x3; val_offset:79353*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79353*0 + 3*339*FLEN/8, x4, x1, x2)

inst_26452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867f0000; valaddr_reg:x3; val_offset:79356*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79356*0 + 3*340*FLEN/8, x4, x1, x2)

inst_26453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867f8000; valaddr_reg:x3; val_offset:79359*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79359*0 + 3*341*FLEN/8, x4, x1, x2)

inst_26454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fc000; valaddr_reg:x3; val_offset:79362*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79362*0 + 3*342*FLEN/8, x4, x1, x2)

inst_26455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fe000; valaddr_reg:x3; val_offset:79365*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79365*0 + 3*343*FLEN/8, x4, x1, x2)

inst_26456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ff000; valaddr_reg:x3; val_offset:79368*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79368*0 + 3*344*FLEN/8, x4, x1, x2)

inst_26457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ff800; valaddr_reg:x3; val_offset:79371*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79371*0 + 3*345*FLEN/8, x4, x1, x2)

inst_26458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffc00; valaddr_reg:x3; val_offset:79374*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79374*0 + 3*346*FLEN/8, x4, x1, x2)

inst_26459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffe00; valaddr_reg:x3; val_offset:79377*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79377*0 + 3*347*FLEN/8, x4, x1, x2)

inst_26460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fff00; valaddr_reg:x3; val_offset:79380*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79380*0 + 3*348*FLEN/8, x4, x1, x2)

inst_26461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fff80; valaddr_reg:x3; val_offset:79383*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79383*0 + 3*349*FLEN/8, x4, x1, x2)

inst_26462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fffc0; valaddr_reg:x3; val_offset:79386*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79386*0 + 3*350*FLEN/8, x4, x1, x2)

inst_26463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fffe0; valaddr_reg:x3; val_offset:79389*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79389*0 + 3*351*FLEN/8, x4, x1, x2)

inst_26464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffff0; valaddr_reg:x3; val_offset:79392*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79392*0 + 3*352*FLEN/8, x4, x1, x2)

inst_26465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffff8; valaddr_reg:x3; val_offset:79395*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79395*0 + 3*353*FLEN/8, x4, x1, x2)

inst_26466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffffc; valaddr_reg:x3; val_offset:79398*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79398*0 + 3*354*FLEN/8, x4, x1, x2)

inst_26467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867ffffe; valaddr_reg:x3; val_offset:79401*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79401*0 + 3*355*FLEN/8, x4, x1, x2)

inst_26468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02f0c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02f0c8; op2val:0x80000000;
op3val:0x867fffff; valaddr_reg:x3; val_offset:79404*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79404*0 + 3*356*FLEN/8, x4, x1, x2)

inst_26469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:79407*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79407*0 + 3*357*FLEN/8, x4, x1, x2)

inst_26470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:79410*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79410*0 + 3*358*FLEN/8, x4, x1, x2)

inst_26471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:79413*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79413*0 + 3*359*FLEN/8, x4, x1, x2)

inst_26472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:79416*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79416*0 + 3*360*FLEN/8, x4, x1, x2)

inst_26473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:79419*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79419*0 + 3*361*FLEN/8, x4, x1, x2)

inst_26474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:79422*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79422*0 + 3*362*FLEN/8, x4, x1, x2)

inst_26475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:79425*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79425*0 + 3*363*FLEN/8, x4, x1, x2)

inst_26476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:79428*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79428*0 + 3*364*FLEN/8, x4, x1, x2)

inst_26477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:79431*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79431*0 + 3*365*FLEN/8, x4, x1, x2)

inst_26478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:79434*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79434*0 + 3*366*FLEN/8, x4, x1, x2)

inst_26479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:79437*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79437*0 + 3*367*FLEN/8, x4, x1, x2)

inst_26480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:79440*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79440*0 + 3*368*FLEN/8, x4, x1, x2)

inst_26481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:79443*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79443*0 + 3*369*FLEN/8, x4, x1, x2)

inst_26482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:79446*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79446*0 + 3*370*FLEN/8, x4, x1, x2)

inst_26483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:79449*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79449*0 + 3*371*FLEN/8, x4, x1, x2)

inst_26484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:79452*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79452*0 + 3*372*FLEN/8, x4, x1, x2)

inst_26485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1800000; valaddr_reg:x3; val_offset:79455*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79455*0 + 3*373*FLEN/8, x4, x1, x2)

inst_26486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1800001; valaddr_reg:x3; val_offset:79458*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79458*0 + 3*374*FLEN/8, x4, x1, x2)

inst_26487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1800003; valaddr_reg:x3; val_offset:79461*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79461*0 + 3*375*FLEN/8, x4, x1, x2)

inst_26488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1800007; valaddr_reg:x3; val_offset:79464*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79464*0 + 3*376*FLEN/8, x4, x1, x2)

inst_26489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x180000f; valaddr_reg:x3; val_offset:79467*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79467*0 + 3*377*FLEN/8, x4, x1, x2)

inst_26490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x180001f; valaddr_reg:x3; val_offset:79470*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79470*0 + 3*378*FLEN/8, x4, x1, x2)

inst_26491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x180003f; valaddr_reg:x3; val_offset:79473*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79473*0 + 3*379*FLEN/8, x4, x1, x2)

inst_26492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x180007f; valaddr_reg:x3; val_offset:79476*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79476*0 + 3*380*FLEN/8, x4, x1, x2)

inst_26493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x18000ff; valaddr_reg:x3; val_offset:79479*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79479*0 + 3*381*FLEN/8, x4, x1, x2)

inst_26494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x18001ff; valaddr_reg:x3; val_offset:79482*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79482*0 + 3*382*FLEN/8, x4, x1, x2)

inst_26495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x18003ff; valaddr_reg:x3; val_offset:79485*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79485*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_26496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x18007ff; valaddr_reg:x3; val_offset:79488*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79488*0 + 3*384*FLEN/8, x4, x1, x2)

inst_26497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1800fff; valaddr_reg:x3; val_offset:79491*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79491*0 + 3*385*FLEN/8, x4, x1, x2)

inst_26498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1801fff; valaddr_reg:x3; val_offset:79494*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79494*0 + 3*386*FLEN/8, x4, x1, x2)

inst_26499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1803fff; valaddr_reg:x3; val_offset:79497*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79497*0 + 3*387*FLEN/8, x4, x1, x2)

inst_26500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1807fff; valaddr_reg:x3; val_offset:79500*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79500*0 + 3*388*FLEN/8, x4, x1, x2)

inst_26501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x180ffff; valaddr_reg:x3; val_offset:79503*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79503*0 + 3*389*FLEN/8, x4, x1, x2)

inst_26502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x181ffff; valaddr_reg:x3; val_offset:79506*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79506*0 + 3*390*FLEN/8, x4, x1, x2)

inst_26503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x183ffff; valaddr_reg:x3; val_offset:79509*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79509*0 + 3*391*FLEN/8, x4, x1, x2)

inst_26504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x187ffff; valaddr_reg:x3; val_offset:79512*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79512*0 + 3*392*FLEN/8, x4, x1, x2)

inst_26505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x18fffff; valaddr_reg:x3; val_offset:79515*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79515*0 + 3*393*FLEN/8, x4, x1, x2)

inst_26506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x19fffff; valaddr_reg:x3; val_offset:79518*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79518*0 + 3*394*FLEN/8, x4, x1, x2)

inst_26507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1bfffff; valaddr_reg:x3; val_offset:79521*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79521*0 + 3*395*FLEN/8, x4, x1, x2)

inst_26508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1c00000; valaddr_reg:x3; val_offset:79524*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79524*0 + 3*396*FLEN/8, x4, x1, x2)

inst_26509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1e00000; valaddr_reg:x3; val_offset:79527*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79527*0 + 3*397*FLEN/8, x4, x1, x2)

inst_26510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1f00000; valaddr_reg:x3; val_offset:79530*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79530*0 + 3*398*FLEN/8, x4, x1, x2)

inst_26511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1f80000; valaddr_reg:x3; val_offset:79533*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79533*0 + 3*399*FLEN/8, x4, x1, x2)

inst_26512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fc0000; valaddr_reg:x3; val_offset:79536*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79536*0 + 3*400*FLEN/8, x4, x1, x2)

inst_26513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fe0000; valaddr_reg:x3; val_offset:79539*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79539*0 + 3*401*FLEN/8, x4, x1, x2)

inst_26514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ff0000; valaddr_reg:x3; val_offset:79542*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79542*0 + 3*402*FLEN/8, x4, x1, x2)

inst_26515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ff8000; valaddr_reg:x3; val_offset:79545*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79545*0 + 3*403*FLEN/8, x4, x1, x2)

inst_26516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffc000; valaddr_reg:x3; val_offset:79548*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79548*0 + 3*404*FLEN/8, x4, x1, x2)

inst_26517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffe000; valaddr_reg:x3; val_offset:79551*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79551*0 + 3*405*FLEN/8, x4, x1, x2)

inst_26518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fff000; valaddr_reg:x3; val_offset:79554*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79554*0 + 3*406*FLEN/8, x4, x1, x2)

inst_26519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fff800; valaddr_reg:x3; val_offset:79557*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79557*0 + 3*407*FLEN/8, x4, x1, x2)

inst_26520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffc00; valaddr_reg:x3; val_offset:79560*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79560*0 + 3*408*FLEN/8, x4, x1, x2)

inst_26521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffe00; valaddr_reg:x3; val_offset:79563*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79563*0 + 3*409*FLEN/8, x4, x1, x2)

inst_26522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffff00; valaddr_reg:x3; val_offset:79566*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79566*0 + 3*410*FLEN/8, x4, x1, x2)

inst_26523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffff80; valaddr_reg:x3; val_offset:79569*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79569*0 + 3*411*FLEN/8, x4, x1, x2)

inst_26524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffffc0; valaddr_reg:x3; val_offset:79572*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79572*0 + 3*412*FLEN/8, x4, x1, x2)

inst_26525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffffe0; valaddr_reg:x3; val_offset:79575*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79575*0 + 3*413*FLEN/8, x4, x1, x2)

inst_26526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffff0; valaddr_reg:x3; val_offset:79578*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79578*0 + 3*414*FLEN/8, x4, x1, x2)

inst_26527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffff8; valaddr_reg:x3; val_offset:79581*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79581*0 + 3*415*FLEN/8, x4, x1, x2)

inst_26528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffffc; valaddr_reg:x3; val_offset:79584*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79584*0 + 3*416*FLEN/8, x4, x1, x2)

inst_26529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1fffffe; valaddr_reg:x3; val_offset:79587*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79587*0 + 3*417*FLEN/8, x4, x1, x2)

inst_26530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x03a09d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f03a09d; op2val:0x0;
op3val:0x1ffffff; valaddr_reg:x3; val_offset:79590*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79590*0 + 3*418*FLEN/8, x4, x1, x2)

inst_26531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:79593*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79593*0 + 3*419*FLEN/8, x4, x1, x2)

inst_26532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:79596*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79596*0 + 3*420*FLEN/8, x4, x1, x2)

inst_26533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:79599*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79599*0 + 3*421*FLEN/8, x4, x1, x2)

inst_26534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:79602*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79602*0 + 3*422*FLEN/8, x4, x1, x2)

inst_26535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:79605*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79605*0 + 3*423*FLEN/8, x4, x1, x2)

inst_26536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:79608*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79608*0 + 3*424*FLEN/8, x4, x1, x2)

inst_26537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:79611*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79611*0 + 3*425*FLEN/8, x4, x1, x2)

inst_26538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:79614*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79614*0 + 3*426*FLEN/8, x4, x1, x2)

inst_26539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:79617*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79617*0 + 3*427*FLEN/8, x4, x1, x2)

inst_26540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:79620*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79620*0 + 3*428*FLEN/8, x4, x1, x2)

inst_26541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:79623*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79623*0 + 3*429*FLEN/8, x4, x1, x2)

inst_26542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:79626*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79626*0 + 3*430*FLEN/8, x4, x1, x2)

inst_26543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:79629*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79629*0 + 3*431*FLEN/8, x4, x1, x2)

inst_26544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:79632*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79632*0 + 3*432*FLEN/8, x4, x1, x2)

inst_26545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:79635*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79635*0 + 3*433*FLEN/8, x4, x1, x2)

inst_26546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:79638*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79638*0 + 3*434*FLEN/8, x4, x1, x2)

inst_26547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8000000; valaddr_reg:x3; val_offset:79641*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79641*0 + 3*435*FLEN/8, x4, x1, x2)

inst_26548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8000001; valaddr_reg:x3; val_offset:79644*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79644*0 + 3*436*FLEN/8, x4, x1, x2)

inst_26549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8000003; valaddr_reg:x3; val_offset:79647*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79647*0 + 3*437*FLEN/8, x4, x1, x2)

inst_26550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8000007; valaddr_reg:x3; val_offset:79650*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79650*0 + 3*438*FLEN/8, x4, x1, x2)

inst_26551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x800000f; valaddr_reg:x3; val_offset:79653*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79653*0 + 3*439*FLEN/8, x4, x1, x2)

inst_26552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x800001f; valaddr_reg:x3; val_offset:79656*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79656*0 + 3*440*FLEN/8, x4, x1, x2)

inst_26553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x800003f; valaddr_reg:x3; val_offset:79659*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79659*0 + 3*441*FLEN/8, x4, x1, x2)

inst_26554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x800007f; valaddr_reg:x3; val_offset:79662*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79662*0 + 3*442*FLEN/8, x4, x1, x2)

inst_26555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x80000ff; valaddr_reg:x3; val_offset:79665*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79665*0 + 3*443*FLEN/8, x4, x1, x2)

inst_26556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x80001ff; valaddr_reg:x3; val_offset:79668*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79668*0 + 3*444*FLEN/8, x4, x1, x2)

inst_26557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x80003ff; valaddr_reg:x3; val_offset:79671*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79671*0 + 3*445*FLEN/8, x4, x1, x2)

inst_26558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x80007ff; valaddr_reg:x3; val_offset:79674*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79674*0 + 3*446*FLEN/8, x4, x1, x2)

inst_26559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8000fff; valaddr_reg:x3; val_offset:79677*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79677*0 + 3*447*FLEN/8, x4, x1, x2)

inst_26560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8001fff; valaddr_reg:x3; val_offset:79680*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79680*0 + 3*448*FLEN/8, x4, x1, x2)

inst_26561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8003fff; valaddr_reg:x3; val_offset:79683*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79683*0 + 3*449*FLEN/8, x4, x1, x2)

inst_26562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8007fff; valaddr_reg:x3; val_offset:79686*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79686*0 + 3*450*FLEN/8, x4, x1, x2)

inst_26563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x800ffff; valaddr_reg:x3; val_offset:79689*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79689*0 + 3*451*FLEN/8, x4, x1, x2)

inst_26564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x801ffff; valaddr_reg:x3; val_offset:79692*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79692*0 + 3*452*FLEN/8, x4, x1, x2)

inst_26565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x803ffff; valaddr_reg:x3; val_offset:79695*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79695*0 + 3*453*FLEN/8, x4, x1, x2)

inst_26566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x807ffff; valaddr_reg:x3; val_offset:79698*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79698*0 + 3*454*FLEN/8, x4, x1, x2)

inst_26567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x80fffff; valaddr_reg:x3; val_offset:79701*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79701*0 + 3*455*FLEN/8, x4, x1, x2)

inst_26568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x81fffff; valaddr_reg:x3; val_offset:79704*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79704*0 + 3*456*FLEN/8, x4, x1, x2)

inst_26569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x83fffff; valaddr_reg:x3; val_offset:79707*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79707*0 + 3*457*FLEN/8, x4, x1, x2)

inst_26570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8400000; valaddr_reg:x3; val_offset:79710*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79710*0 + 3*458*FLEN/8, x4, x1, x2)

inst_26571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8600000; valaddr_reg:x3; val_offset:79713*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79713*0 + 3*459*FLEN/8, x4, x1, x2)

inst_26572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8700000; valaddr_reg:x3; val_offset:79716*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79716*0 + 3*460*FLEN/8, x4, x1, x2)

inst_26573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x8780000; valaddr_reg:x3; val_offset:79719*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79719*0 + 3*461*FLEN/8, x4, x1, x2)

inst_26574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87c0000; valaddr_reg:x3; val_offset:79722*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79722*0 + 3*462*FLEN/8, x4, x1, x2)

inst_26575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87e0000; valaddr_reg:x3; val_offset:79725*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79725*0 + 3*463*FLEN/8, x4, x1, x2)

inst_26576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87f0000; valaddr_reg:x3; val_offset:79728*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79728*0 + 3*464*FLEN/8, x4, x1, x2)

inst_26577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87f8000; valaddr_reg:x3; val_offset:79731*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79731*0 + 3*465*FLEN/8, x4, x1, x2)

inst_26578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fc000; valaddr_reg:x3; val_offset:79734*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79734*0 + 3*466*FLEN/8, x4, x1, x2)

inst_26579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fe000; valaddr_reg:x3; val_offset:79737*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79737*0 + 3*467*FLEN/8, x4, x1, x2)

inst_26580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ff000; valaddr_reg:x3; val_offset:79740*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79740*0 + 3*468*FLEN/8, x4, x1, x2)

inst_26581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ff800; valaddr_reg:x3; val_offset:79743*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79743*0 + 3*469*FLEN/8, x4, x1, x2)

inst_26582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffc00; valaddr_reg:x3; val_offset:79746*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79746*0 + 3*470*FLEN/8, x4, x1, x2)

inst_26583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffe00; valaddr_reg:x3; val_offset:79749*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79749*0 + 3*471*FLEN/8, x4, x1, x2)

inst_26584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fff00; valaddr_reg:x3; val_offset:79752*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79752*0 + 3*472*FLEN/8, x4, x1, x2)

inst_26585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fff80; valaddr_reg:x3; val_offset:79755*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79755*0 + 3*473*FLEN/8, x4, x1, x2)

inst_26586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fffc0; valaddr_reg:x3; val_offset:79758*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79758*0 + 3*474*FLEN/8, x4, x1, x2)

inst_26587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fffe0; valaddr_reg:x3; val_offset:79761*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79761*0 + 3*475*FLEN/8, x4, x1, x2)

inst_26588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffff0; valaddr_reg:x3; val_offset:79764*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79764*0 + 3*476*FLEN/8, x4, x1, x2)

inst_26589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffff8; valaddr_reg:x3; val_offset:79767*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79767*0 + 3*477*FLEN/8, x4, x1, x2)

inst_26590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffffc; valaddr_reg:x3; val_offset:79770*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79770*0 + 3*478*FLEN/8, x4, x1, x2)

inst_26591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87ffffe; valaddr_reg:x3; val_offset:79773*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79773*0 + 3*479*FLEN/8, x4, x1, x2)

inst_26592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04962d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04962d; op2val:0x0;
op3val:0x87fffff; valaddr_reg:x3; val_offset:79776*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79776*0 + 3*480*FLEN/8, x4, x1, x2)

inst_26593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000000; valaddr_reg:x3; val_offset:79779*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79779*0 + 3*481*FLEN/8, x4, x1, x2)

inst_26594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000001; valaddr_reg:x3; val_offset:79782*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79782*0 + 3*482*FLEN/8, x4, x1, x2)

inst_26595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000003; valaddr_reg:x3; val_offset:79785*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79785*0 + 3*483*FLEN/8, x4, x1, x2)

inst_26596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000007; valaddr_reg:x3; val_offset:79788*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79788*0 + 3*484*FLEN/8, x4, x1, x2)

inst_26597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00000f; valaddr_reg:x3; val_offset:79791*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79791*0 + 3*485*FLEN/8, x4, x1, x2)

inst_26598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00001f; valaddr_reg:x3; val_offset:79794*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79794*0 + 3*486*FLEN/8, x4, x1, x2)

inst_26599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00003f; valaddr_reg:x3; val_offset:79797*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79797*0 + 3*487*FLEN/8, x4, x1, x2)

inst_26600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00007f; valaddr_reg:x3; val_offset:79800*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79800*0 + 3*488*FLEN/8, x4, x1, x2)

inst_26601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0000ff; valaddr_reg:x3; val_offset:79803*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79803*0 + 3*489*FLEN/8, x4, x1, x2)

inst_26602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0001ff; valaddr_reg:x3; val_offset:79806*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79806*0 + 3*490*FLEN/8, x4, x1, x2)

inst_26603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0003ff; valaddr_reg:x3; val_offset:79809*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79809*0 + 3*491*FLEN/8, x4, x1, x2)

inst_26604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0007ff; valaddr_reg:x3; val_offset:79812*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79812*0 + 3*492*FLEN/8, x4, x1, x2)

inst_26605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae000fff; valaddr_reg:x3; val_offset:79815*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79815*0 + 3*493*FLEN/8, x4, x1, x2)

inst_26606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae001fff; valaddr_reg:x3; val_offset:79818*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79818*0 + 3*494*FLEN/8, x4, x1, x2)

inst_26607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae003fff; valaddr_reg:x3; val_offset:79821*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79821*0 + 3*495*FLEN/8, x4, x1, x2)

inst_26608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae007fff; valaddr_reg:x3; val_offset:79824*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79824*0 + 3*496*FLEN/8, x4, x1, x2)

inst_26609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae00ffff; valaddr_reg:x3; val_offset:79827*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79827*0 + 3*497*FLEN/8, x4, x1, x2)

inst_26610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae01ffff; valaddr_reg:x3; val_offset:79830*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79830*0 + 3*498*FLEN/8, x4, x1, x2)

inst_26611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae03ffff; valaddr_reg:x3; val_offset:79833*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79833*0 + 3*499*FLEN/8, x4, x1, x2)

inst_26612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae07ffff; valaddr_reg:x3; val_offset:79836*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79836*0 + 3*500*FLEN/8, x4, x1, x2)

inst_26613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae0fffff; valaddr_reg:x3; val_offset:79839*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79839*0 + 3*501*FLEN/8, x4, x1, x2)

inst_26614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae1fffff; valaddr_reg:x3; val_offset:79842*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79842*0 + 3*502*FLEN/8, x4, x1, x2)

inst_26615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae3fffff; valaddr_reg:x3; val_offset:79845*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79845*0 + 3*503*FLEN/8, x4, x1, x2)

inst_26616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae400000; valaddr_reg:x3; val_offset:79848*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79848*0 + 3*504*FLEN/8, x4, x1, x2)

inst_26617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae600000; valaddr_reg:x3; val_offset:79851*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79851*0 + 3*505*FLEN/8, x4, x1, x2)

inst_26618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae700000; valaddr_reg:x3; val_offset:79854*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79854*0 + 3*506*FLEN/8, x4, x1, x2)

inst_26619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae780000; valaddr_reg:x3; val_offset:79857*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79857*0 + 3*507*FLEN/8, x4, x1, x2)

inst_26620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7c0000; valaddr_reg:x3; val_offset:79860*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79860*0 + 3*508*FLEN/8, x4, x1, x2)

inst_26621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7e0000; valaddr_reg:x3; val_offset:79863*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79863*0 + 3*509*FLEN/8, x4, x1, x2)

inst_26622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7f0000; valaddr_reg:x3; val_offset:79866*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79866*0 + 3*510*FLEN/8, x4, x1, x2)

inst_26623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7f8000; valaddr_reg:x3; val_offset:79869*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79869*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_26624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fc000; valaddr_reg:x3; val_offset:79872*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79872*0 + 3*512*FLEN/8, x4, x1, x2)

inst_26625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fe000; valaddr_reg:x3; val_offset:79875*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79875*0 + 3*513*FLEN/8, x4, x1, x2)

inst_26626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ff000; valaddr_reg:x3; val_offset:79878*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79878*0 + 3*514*FLEN/8, x4, x1, x2)

inst_26627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ff800; valaddr_reg:x3; val_offset:79881*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79881*0 + 3*515*FLEN/8, x4, x1, x2)

inst_26628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffc00; valaddr_reg:x3; val_offset:79884*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79884*0 + 3*516*FLEN/8, x4, x1, x2)

inst_26629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffe00; valaddr_reg:x3; val_offset:79887*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79887*0 + 3*517*FLEN/8, x4, x1, x2)

inst_26630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fff00; valaddr_reg:x3; val_offset:79890*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79890*0 + 3*518*FLEN/8, x4, x1, x2)

inst_26631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fff80; valaddr_reg:x3; val_offset:79893*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79893*0 + 3*519*FLEN/8, x4, x1, x2)

inst_26632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffc0; valaddr_reg:x3; val_offset:79896*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79896*0 + 3*520*FLEN/8, x4, x1, x2)

inst_26633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffe0; valaddr_reg:x3; val_offset:79899*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79899*0 + 3*521*FLEN/8, x4, x1, x2)

inst_26634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffff0; valaddr_reg:x3; val_offset:79902*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79902*0 + 3*522*FLEN/8, x4, x1, x2)

inst_26635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffff8; valaddr_reg:x3; val_offset:79905*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79905*0 + 3*523*FLEN/8, x4, x1, x2)

inst_26636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffffc; valaddr_reg:x3; val_offset:79908*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79908*0 + 3*524*FLEN/8, x4, x1, x2)

inst_26637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7ffffe; valaddr_reg:x3; val_offset:79911*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79911*0 + 3*525*FLEN/8, x4, x1, x2)

inst_26638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xae7fffff; valaddr_reg:x3; val_offset:79914*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79914*0 + 3*526*FLEN/8, x4, x1, x2)

inst_26639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800001; valaddr_reg:x3; val_offset:79917*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79917*0 + 3*527*FLEN/8, x4, x1, x2)

inst_26640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800003; valaddr_reg:x3; val_offset:79920*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79920*0 + 3*528*FLEN/8, x4, x1, x2)

inst_26641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf800007; valaddr_reg:x3; val_offset:79923*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79923*0 + 3*529*FLEN/8, x4, x1, x2)

inst_26642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbf999999; valaddr_reg:x3; val_offset:79926*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79926*0 + 3*530*FLEN/8, x4, x1, x2)

inst_26643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:79929*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79929*0 + 3*531*FLEN/8, x4, x1, x2)

inst_26644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:79932*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79932*0 + 3*532*FLEN/8, x4, x1, x2)

inst_26645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:79935*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79935*0 + 3*533*FLEN/8, x4, x1, x2)

inst_26646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:79938*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79938*0 + 3*534*FLEN/8, x4, x1, x2)

inst_26647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:79941*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79941*0 + 3*535*FLEN/8, x4, x1, x2)

inst_26648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:79944*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79944*0 + 3*536*FLEN/8, x4, x1, x2)

inst_26649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:79947*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79947*0 + 3*537*FLEN/8, x4, x1, x2)

inst_26650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:79950*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79950*0 + 3*538*FLEN/8, x4, x1, x2)

inst_26651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:79953*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79953*0 + 3*539*FLEN/8, x4, x1, x2)

inst_26652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:79956*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79956*0 + 3*540*FLEN/8, x4, x1, x2)

inst_26653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:79959*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79959*0 + 3*541*FLEN/8, x4, x1, x2)

inst_26654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x053104 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d8164 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f053104; op2val:0x803d8164;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:79962*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79962*0 + 3*542*FLEN/8, x4, x1, x2)

inst_26655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3f800001; valaddr_reg:x3; val_offset:79965*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79965*0 + 3*543*FLEN/8, x4, x1, x2)

inst_26656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3f800003; valaddr_reg:x3; val_offset:79968*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79968*0 + 3*544*FLEN/8, x4, x1, x2)

inst_26657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3f800007; valaddr_reg:x3; val_offset:79971*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79971*0 + 3*545*FLEN/8, x4, x1, x2)

inst_26658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3f999999; valaddr_reg:x3; val_offset:79974*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79974*0 + 3*546*FLEN/8, x4, x1, x2)

inst_26659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:79977*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79977*0 + 3*547*FLEN/8, x4, x1, x2)

inst_26660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:79980*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79980*0 + 3*548*FLEN/8, x4, x1, x2)

inst_26661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79983*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79983*0 + 3*549*FLEN/8, x4, x1, x2)

inst_26662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79986*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79986*0 + 3*550*FLEN/8, x4, x1, x2)

inst_26663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:79989*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79989*0 + 3*551*FLEN/8, x4, x1, x2)

inst_26664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79992*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79992*0 + 3*552*FLEN/8, x4, x1, x2)

inst_26665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79995*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79995*0 + 3*553*FLEN/8, x4, x1, x2)

inst_26666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:79998*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79998*0 + 3*554*FLEN/8, x4, x1, x2)

inst_26667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:80001*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80001*0 + 3*555*FLEN/8, x4, x1, x2)

inst_26668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:80004*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80004*0 + 3*556*FLEN/8, x4, x1, x2)

inst_26669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:80007*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80007*0 + 3*557*FLEN/8, x4, x1, x2)

inst_26670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:80010*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80010*0 + 3*558*FLEN/8, x4, x1, x2)

inst_26671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45000000; valaddr_reg:x3; val_offset:80013*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80013*0 + 3*559*FLEN/8, x4, x1, x2)

inst_26672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45000001; valaddr_reg:x3; val_offset:80016*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80016*0 + 3*560*FLEN/8, x4, x1, x2)

inst_26673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45000003; valaddr_reg:x3; val_offset:80019*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80019*0 + 3*561*FLEN/8, x4, x1, x2)

inst_26674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45000007; valaddr_reg:x3; val_offset:80022*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80022*0 + 3*562*FLEN/8, x4, x1, x2)

inst_26675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4500000f; valaddr_reg:x3; val_offset:80025*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80025*0 + 3*563*FLEN/8, x4, x1, x2)

inst_26676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4500001f; valaddr_reg:x3; val_offset:80028*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80028*0 + 3*564*FLEN/8, x4, x1, x2)

inst_26677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4500003f; valaddr_reg:x3; val_offset:80031*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80031*0 + 3*565*FLEN/8, x4, x1, x2)

inst_26678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4500007f; valaddr_reg:x3; val_offset:80034*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80034*0 + 3*566*FLEN/8, x4, x1, x2)

inst_26679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x450000ff; valaddr_reg:x3; val_offset:80037*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80037*0 + 3*567*FLEN/8, x4, x1, x2)

inst_26680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x450001ff; valaddr_reg:x3; val_offset:80040*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80040*0 + 3*568*FLEN/8, x4, x1, x2)

inst_26681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x450003ff; valaddr_reg:x3; val_offset:80043*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80043*0 + 3*569*FLEN/8, x4, x1, x2)

inst_26682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x450007ff; valaddr_reg:x3; val_offset:80046*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80046*0 + 3*570*FLEN/8, x4, x1, x2)

inst_26683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45000fff; valaddr_reg:x3; val_offset:80049*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80049*0 + 3*571*FLEN/8, x4, x1, x2)

inst_26684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45001fff; valaddr_reg:x3; val_offset:80052*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80052*0 + 3*572*FLEN/8, x4, x1, x2)

inst_26685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45003fff; valaddr_reg:x3; val_offset:80055*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80055*0 + 3*573*FLEN/8, x4, x1, x2)

inst_26686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45007fff; valaddr_reg:x3; val_offset:80058*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80058*0 + 3*574*FLEN/8, x4, x1, x2)

inst_26687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4500ffff; valaddr_reg:x3; val_offset:80061*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80061*0 + 3*575*FLEN/8, x4, x1, x2)

inst_26688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4501ffff; valaddr_reg:x3; val_offset:80064*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80064*0 + 3*576*FLEN/8, x4, x1, x2)

inst_26689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4503ffff; valaddr_reg:x3; val_offset:80067*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80067*0 + 3*577*FLEN/8, x4, x1, x2)

inst_26690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x4507ffff; valaddr_reg:x3; val_offset:80070*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80070*0 + 3*578*FLEN/8, x4, x1, x2)

inst_26691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x450fffff; valaddr_reg:x3; val_offset:80073*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80073*0 + 3*579*FLEN/8, x4, x1, x2)

inst_26692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x451fffff; valaddr_reg:x3; val_offset:80076*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80076*0 + 3*580*FLEN/8, x4, x1, x2)

inst_26693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x453fffff; valaddr_reg:x3; val_offset:80079*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80079*0 + 3*581*FLEN/8, x4, x1, x2)

inst_26694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45400000; valaddr_reg:x3; val_offset:80082*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80082*0 + 3*582*FLEN/8, x4, x1, x2)

inst_26695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45600000; valaddr_reg:x3; val_offset:80085*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80085*0 + 3*583*FLEN/8, x4, x1, x2)

inst_26696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45700000; valaddr_reg:x3; val_offset:80088*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80088*0 + 3*584*FLEN/8, x4, x1, x2)

inst_26697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x45780000; valaddr_reg:x3; val_offset:80091*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80091*0 + 3*585*FLEN/8, x4, x1, x2)

inst_26698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457c0000; valaddr_reg:x3; val_offset:80094*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80094*0 + 3*586*FLEN/8, x4, x1, x2)

inst_26699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457e0000; valaddr_reg:x3; val_offset:80097*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80097*0 + 3*587*FLEN/8, x4, x1, x2)

inst_26700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457f0000; valaddr_reg:x3; val_offset:80100*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80100*0 + 3*588*FLEN/8, x4, x1, x2)

inst_26701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457f8000; valaddr_reg:x3; val_offset:80103*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80103*0 + 3*589*FLEN/8, x4, x1, x2)

inst_26702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fc000; valaddr_reg:x3; val_offset:80106*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80106*0 + 3*590*FLEN/8, x4, x1, x2)

inst_26703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fe000; valaddr_reg:x3; val_offset:80109*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80109*0 + 3*591*FLEN/8, x4, x1, x2)

inst_26704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ff000; valaddr_reg:x3; val_offset:80112*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80112*0 + 3*592*FLEN/8, x4, x1, x2)

inst_26705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ff800; valaddr_reg:x3; val_offset:80115*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80115*0 + 3*593*FLEN/8, x4, x1, x2)

inst_26706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffc00; valaddr_reg:x3; val_offset:80118*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80118*0 + 3*594*FLEN/8, x4, x1, x2)

inst_26707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffe00; valaddr_reg:x3; val_offset:80121*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80121*0 + 3*595*FLEN/8, x4, x1, x2)

inst_26708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fff00; valaddr_reg:x3; val_offset:80124*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80124*0 + 3*596*FLEN/8, x4, x1, x2)

inst_26709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fff80; valaddr_reg:x3; val_offset:80127*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80127*0 + 3*597*FLEN/8, x4, x1, x2)

inst_26710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fffc0; valaddr_reg:x3; val_offset:80130*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80130*0 + 3*598*FLEN/8, x4, x1, x2)

inst_26711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fffe0; valaddr_reg:x3; val_offset:80133*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80133*0 + 3*599*FLEN/8, x4, x1, x2)

inst_26712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffff0; valaddr_reg:x3; val_offset:80136*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80136*0 + 3*600*FLEN/8, x4, x1, x2)

inst_26713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffff8; valaddr_reg:x3; val_offset:80139*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80139*0 + 3*601*FLEN/8, x4, x1, x2)

inst_26714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffffc; valaddr_reg:x3; val_offset:80142*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80142*0 + 3*602*FLEN/8, x4, x1, x2)

inst_26715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457ffffe; valaddr_reg:x3; val_offset:80145*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80145*0 + 3*603*FLEN/8, x4, x1, x2)

inst_26716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d1f08 and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06075b; op2val:0x3d1f08;
op3val:0x457fffff; valaddr_reg:x3; val_offset:80148*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80148*0 + 3*604*FLEN/8, x4, x1, x2)

inst_26717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63800000; valaddr_reg:x3; val_offset:80151*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80151*0 + 3*605*FLEN/8, x4, x1, x2)

inst_26718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63800001; valaddr_reg:x3; val_offset:80154*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80154*0 + 3*606*FLEN/8, x4, x1, x2)

inst_26719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63800003; valaddr_reg:x3; val_offset:80157*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80157*0 + 3*607*FLEN/8, x4, x1, x2)

inst_26720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63800007; valaddr_reg:x3; val_offset:80160*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80160*0 + 3*608*FLEN/8, x4, x1, x2)

inst_26721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6380000f; valaddr_reg:x3; val_offset:80163*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80163*0 + 3*609*FLEN/8, x4, x1, x2)

inst_26722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6380001f; valaddr_reg:x3; val_offset:80166*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80166*0 + 3*610*FLEN/8, x4, x1, x2)

inst_26723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6380003f; valaddr_reg:x3; val_offset:80169*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80169*0 + 3*611*FLEN/8, x4, x1, x2)

inst_26724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6380007f; valaddr_reg:x3; val_offset:80172*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80172*0 + 3*612*FLEN/8, x4, x1, x2)

inst_26725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x638000ff; valaddr_reg:x3; val_offset:80175*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80175*0 + 3*613*FLEN/8, x4, x1, x2)

inst_26726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x638001ff; valaddr_reg:x3; val_offset:80178*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80178*0 + 3*614*FLEN/8, x4, x1, x2)

inst_26727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x638003ff; valaddr_reg:x3; val_offset:80181*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80181*0 + 3*615*FLEN/8, x4, x1, x2)

inst_26728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x638007ff; valaddr_reg:x3; val_offset:80184*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80184*0 + 3*616*FLEN/8, x4, x1, x2)

inst_26729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63800fff; valaddr_reg:x3; val_offset:80187*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80187*0 + 3*617*FLEN/8, x4, x1, x2)

inst_26730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63801fff; valaddr_reg:x3; val_offset:80190*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80190*0 + 3*618*FLEN/8, x4, x1, x2)

inst_26731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63803fff; valaddr_reg:x3; val_offset:80193*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80193*0 + 3*619*FLEN/8, x4, x1, x2)

inst_26732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63807fff; valaddr_reg:x3; val_offset:80196*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80196*0 + 3*620*FLEN/8, x4, x1, x2)

inst_26733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6380ffff; valaddr_reg:x3; val_offset:80199*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80199*0 + 3*621*FLEN/8, x4, x1, x2)

inst_26734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6381ffff; valaddr_reg:x3; val_offset:80202*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80202*0 + 3*622*FLEN/8, x4, x1, x2)

inst_26735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6383ffff; valaddr_reg:x3; val_offset:80205*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80205*0 + 3*623*FLEN/8, x4, x1, x2)

inst_26736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x6387ffff; valaddr_reg:x3; val_offset:80208*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80208*0 + 3*624*FLEN/8, x4, x1, x2)

inst_26737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x638fffff; valaddr_reg:x3; val_offset:80211*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80211*0 + 3*625*FLEN/8, x4, x1, x2)

inst_26738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x639fffff; valaddr_reg:x3; val_offset:80214*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80214*0 + 3*626*FLEN/8, x4, x1, x2)

inst_26739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63bfffff; valaddr_reg:x3; val_offset:80217*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80217*0 + 3*627*FLEN/8, x4, x1, x2)

inst_26740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63c00000; valaddr_reg:x3; val_offset:80220*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80220*0 + 3*628*FLEN/8, x4, x1, x2)

inst_26741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63e00000; valaddr_reg:x3; val_offset:80223*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80223*0 + 3*629*FLEN/8, x4, x1, x2)

inst_26742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63f00000; valaddr_reg:x3; val_offset:80226*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80226*0 + 3*630*FLEN/8, x4, x1, x2)

inst_26743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63f80000; valaddr_reg:x3; val_offset:80229*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80229*0 + 3*631*FLEN/8, x4, x1, x2)

inst_26744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fc0000; valaddr_reg:x3; val_offset:80232*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80232*0 + 3*632*FLEN/8, x4, x1, x2)

inst_26745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fe0000; valaddr_reg:x3; val_offset:80235*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80235*0 + 3*633*FLEN/8, x4, x1, x2)

inst_26746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ff0000; valaddr_reg:x3; val_offset:80238*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80238*0 + 3*634*FLEN/8, x4, x1, x2)

inst_26747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ff8000; valaddr_reg:x3; val_offset:80241*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80241*0 + 3*635*FLEN/8, x4, x1, x2)

inst_26748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffc000; valaddr_reg:x3; val_offset:80244*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80244*0 + 3*636*FLEN/8, x4, x1, x2)

inst_26749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffe000; valaddr_reg:x3; val_offset:80247*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80247*0 + 3*637*FLEN/8, x4, x1, x2)

inst_26750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fff000; valaddr_reg:x3; val_offset:80250*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80250*0 + 3*638*FLEN/8, x4, x1, x2)

inst_26751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fff800; valaddr_reg:x3; val_offset:80253*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80253*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_26752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffc00; valaddr_reg:x3; val_offset:80256*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80256*0 + 3*640*FLEN/8, x4, x1, x2)

inst_26753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffe00; valaddr_reg:x3; val_offset:80259*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80259*0 + 3*641*FLEN/8, x4, x1, x2)

inst_26754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffff00; valaddr_reg:x3; val_offset:80262*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80262*0 + 3*642*FLEN/8, x4, x1, x2)

inst_26755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffff80; valaddr_reg:x3; val_offset:80265*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80265*0 + 3*643*FLEN/8, x4, x1, x2)

inst_26756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffffc0; valaddr_reg:x3; val_offset:80268*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80268*0 + 3*644*FLEN/8, x4, x1, x2)

inst_26757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffffe0; valaddr_reg:x3; val_offset:80271*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80271*0 + 3*645*FLEN/8, x4, x1, x2)

inst_26758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffff0; valaddr_reg:x3; val_offset:80274*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80274*0 + 3*646*FLEN/8, x4, x1, x2)

inst_26759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffff8; valaddr_reg:x3; val_offset:80277*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80277*0 + 3*647*FLEN/8, x4, x1, x2)

inst_26760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffffc; valaddr_reg:x3; val_offset:80280*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80280*0 + 3*648*FLEN/8, x4, x1, x2)

inst_26761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63fffffe; valaddr_reg:x3; val_offset:80283*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80283*0 + 3*649*FLEN/8, x4, x1, x2)

inst_26762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x63ffffff; valaddr_reg:x3; val_offset:80286*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80286*0 + 3*650*FLEN/8, x4, x1, x2)

inst_26763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f000001; valaddr_reg:x3; val_offset:80289*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80289*0 + 3*651*FLEN/8, x4, x1, x2)

inst_26764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f000003; valaddr_reg:x3; val_offset:80292*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80292*0 + 3*652*FLEN/8, x4, x1, x2)

inst_26765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f000007; valaddr_reg:x3; val_offset:80295*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80295*0 + 3*653*FLEN/8, x4, x1, x2)

inst_26766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f199999; valaddr_reg:x3; val_offset:80298*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80298*0 + 3*654*FLEN/8, x4, x1, x2)

inst_26767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f249249; valaddr_reg:x3; val_offset:80301*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80301*0 + 3*655*FLEN/8, x4, x1, x2)

inst_26768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f333333; valaddr_reg:x3; val_offset:80304*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80304*0 + 3*656*FLEN/8, x4, x1, x2)

inst_26769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:80307*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80307*0 + 3*657*FLEN/8, x4, x1, x2)

inst_26770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:80310*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80310*0 + 3*658*FLEN/8, x4, x1, x2)

inst_26771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f444444; valaddr_reg:x3; val_offset:80313*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80313*0 + 3*659*FLEN/8, x4, x1, x2)

inst_26772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:80316*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80316*0 + 3*660*FLEN/8, x4, x1, x2)

inst_26773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:80319*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80319*0 + 3*661*FLEN/8, x4, x1, x2)

inst_26774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f666666; valaddr_reg:x3; val_offset:80322*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80322*0 + 3*662*FLEN/8, x4, x1, x2)

inst_26775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:80325*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80325*0 + 3*663*FLEN/8, x4, x1, x2)

inst_26776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:80328*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80328*0 + 3*664*FLEN/8, x4, x1, x2)

inst_26777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:80331*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80331*0 + 3*665*FLEN/8, x4, x1, x2)

inst_26778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x060c9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x747285 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f060c9f; op2val:0x3ff47285;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:80334*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80334*0 + 3*666*FLEN/8, x4, x1, x2)

inst_26779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:80337*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80337*0 + 3*667*FLEN/8, x4, x1, x2)

inst_26780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:80340*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80340*0 + 3*668*FLEN/8, x4, x1, x2)

inst_26781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:80343*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80343*0 + 3*669*FLEN/8, x4, x1, x2)

inst_26782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:80346*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80346*0 + 3*670*FLEN/8, x4, x1, x2)

inst_26783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:80349*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80349*0 + 3*671*FLEN/8, x4, x1, x2)

inst_26784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:80352*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80352*0 + 3*672*FLEN/8, x4, x1, x2)

inst_26785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:80355*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80355*0 + 3*673*FLEN/8, x4, x1, x2)

inst_26786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:80358*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80358*0 + 3*674*FLEN/8, x4, x1, x2)

inst_26787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:80361*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80361*0 + 3*675*FLEN/8, x4, x1, x2)

inst_26788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:80364*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80364*0 + 3*676*FLEN/8, x4, x1, x2)

inst_26789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:80367*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80367*0 + 3*677*FLEN/8, x4, x1, x2)

inst_26790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:80370*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80370*0 + 3*678*FLEN/8, x4, x1, x2)

inst_26791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:80373*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80373*0 + 3*679*FLEN/8, x4, x1, x2)

inst_26792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:80376*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80376*0 + 3*680*FLEN/8, x4, x1, x2)

inst_26793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:80379*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80379*0 + 3*681*FLEN/8, x4, x1, x2)

inst_26794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:80382*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80382*0 + 3*682*FLEN/8, x4, x1, x2)

inst_26795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5000000; valaddr_reg:x3; val_offset:80385*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80385*0 + 3*683*FLEN/8, x4, x1, x2)

inst_26796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5000001; valaddr_reg:x3; val_offset:80388*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80388*0 + 3*684*FLEN/8, x4, x1, x2)

inst_26797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5000003; valaddr_reg:x3; val_offset:80391*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80391*0 + 3*685*FLEN/8, x4, x1, x2)

inst_26798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5000007; valaddr_reg:x3; val_offset:80394*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80394*0 + 3*686*FLEN/8, x4, x1, x2)

inst_26799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x500000f; valaddr_reg:x3; val_offset:80397*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80397*0 + 3*687*FLEN/8, x4, x1, x2)

inst_26800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x500001f; valaddr_reg:x3; val_offset:80400*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80400*0 + 3*688*FLEN/8, x4, x1, x2)

inst_26801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x500003f; valaddr_reg:x3; val_offset:80403*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80403*0 + 3*689*FLEN/8, x4, x1, x2)

inst_26802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x500007f; valaddr_reg:x3; val_offset:80406*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80406*0 + 3*690*FLEN/8, x4, x1, x2)

inst_26803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x50000ff; valaddr_reg:x3; val_offset:80409*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80409*0 + 3*691*FLEN/8, x4, x1, x2)

inst_26804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x50001ff; valaddr_reg:x3; val_offset:80412*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80412*0 + 3*692*FLEN/8, x4, x1, x2)

inst_26805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x50003ff; valaddr_reg:x3; val_offset:80415*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80415*0 + 3*693*FLEN/8, x4, x1, x2)

inst_26806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x50007ff; valaddr_reg:x3; val_offset:80418*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80418*0 + 3*694*FLEN/8, x4, x1, x2)

inst_26807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5000fff; valaddr_reg:x3; val_offset:80421*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80421*0 + 3*695*FLEN/8, x4, x1, x2)

inst_26808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5001fff; valaddr_reg:x3; val_offset:80424*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80424*0 + 3*696*FLEN/8, x4, x1, x2)

inst_26809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5003fff; valaddr_reg:x3; val_offset:80427*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80427*0 + 3*697*FLEN/8, x4, x1, x2)

inst_26810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5007fff; valaddr_reg:x3; val_offset:80430*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80430*0 + 3*698*FLEN/8, x4, x1, x2)

inst_26811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x500ffff; valaddr_reg:x3; val_offset:80433*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80433*0 + 3*699*FLEN/8, x4, x1, x2)

inst_26812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x501ffff; valaddr_reg:x3; val_offset:80436*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80436*0 + 3*700*FLEN/8, x4, x1, x2)

inst_26813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x503ffff; valaddr_reg:x3; val_offset:80439*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80439*0 + 3*701*FLEN/8, x4, x1, x2)

inst_26814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x507ffff; valaddr_reg:x3; val_offset:80442*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80442*0 + 3*702*FLEN/8, x4, x1, x2)

inst_26815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x50fffff; valaddr_reg:x3; val_offset:80445*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80445*0 + 3*703*FLEN/8, x4, x1, x2)

inst_26816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x51fffff; valaddr_reg:x3; val_offset:80448*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80448*0 + 3*704*FLEN/8, x4, x1, x2)

inst_26817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x53fffff; valaddr_reg:x3; val_offset:80451*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80451*0 + 3*705*FLEN/8, x4, x1, x2)

inst_26818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5400000; valaddr_reg:x3; val_offset:80454*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80454*0 + 3*706*FLEN/8, x4, x1, x2)

inst_26819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5600000; valaddr_reg:x3; val_offset:80457*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80457*0 + 3*707*FLEN/8, x4, x1, x2)

inst_26820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5700000; valaddr_reg:x3; val_offset:80460*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80460*0 + 3*708*FLEN/8, x4, x1, x2)

inst_26821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x5780000; valaddr_reg:x3; val_offset:80463*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80463*0 + 3*709*FLEN/8, x4, x1, x2)

inst_26822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57c0000; valaddr_reg:x3; val_offset:80466*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80466*0 + 3*710*FLEN/8, x4, x1, x2)

inst_26823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57e0000; valaddr_reg:x3; val_offset:80469*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80469*0 + 3*711*FLEN/8, x4, x1, x2)

inst_26824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57f0000; valaddr_reg:x3; val_offset:80472*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80472*0 + 3*712*FLEN/8, x4, x1, x2)

inst_26825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57f8000; valaddr_reg:x3; val_offset:80475*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80475*0 + 3*713*FLEN/8, x4, x1, x2)

inst_26826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fc000; valaddr_reg:x3; val_offset:80478*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80478*0 + 3*714*FLEN/8, x4, x1, x2)

inst_26827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fe000; valaddr_reg:x3; val_offset:80481*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80481*0 + 3*715*FLEN/8, x4, x1, x2)

inst_26828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ff000; valaddr_reg:x3; val_offset:80484*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80484*0 + 3*716*FLEN/8, x4, x1, x2)

inst_26829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ff800; valaddr_reg:x3; val_offset:80487*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80487*0 + 3*717*FLEN/8, x4, x1, x2)

inst_26830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffc00; valaddr_reg:x3; val_offset:80490*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80490*0 + 3*718*FLEN/8, x4, x1, x2)

inst_26831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffe00; valaddr_reg:x3; val_offset:80493*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80493*0 + 3*719*FLEN/8, x4, x1, x2)

inst_26832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fff00; valaddr_reg:x3; val_offset:80496*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80496*0 + 3*720*FLEN/8, x4, x1, x2)

inst_26833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fff80; valaddr_reg:x3; val_offset:80499*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80499*0 + 3*721*FLEN/8, x4, x1, x2)

inst_26834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fffc0; valaddr_reg:x3; val_offset:80502*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80502*0 + 3*722*FLEN/8, x4, x1, x2)

inst_26835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fffe0; valaddr_reg:x3; val_offset:80505*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80505*0 + 3*723*FLEN/8, x4, x1, x2)

inst_26836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffff0; valaddr_reg:x3; val_offset:80508*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80508*0 + 3*724*FLEN/8, x4, x1, x2)

inst_26837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffff8; valaddr_reg:x3; val_offset:80511*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80511*0 + 3*725*FLEN/8, x4, x1, x2)

inst_26838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffffc; valaddr_reg:x3; val_offset:80514*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80514*0 + 3*726*FLEN/8, x4, x1, x2)

inst_26839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57ffffe; valaddr_reg:x3; val_offset:80517*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80517*0 + 3*727*FLEN/8, x4, x1, x2)

inst_26840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x062380 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f062380; op2val:0x0;
op3val:0x57fffff; valaddr_reg:x3; val_offset:80520*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80520*0 + 3*728*FLEN/8, x4, x1, x2)

inst_26841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7000000; valaddr_reg:x3; val_offset:80523*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80523*0 + 3*729*FLEN/8, x4, x1, x2)

inst_26842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7000001; valaddr_reg:x3; val_offset:80526*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80526*0 + 3*730*FLEN/8, x4, x1, x2)

inst_26843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7000003; valaddr_reg:x3; val_offset:80529*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80529*0 + 3*731*FLEN/8, x4, x1, x2)

inst_26844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7000007; valaddr_reg:x3; val_offset:80532*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80532*0 + 3*732*FLEN/8, x4, x1, x2)

inst_26845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe700000f; valaddr_reg:x3; val_offset:80535*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80535*0 + 3*733*FLEN/8, x4, x1, x2)

inst_26846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe700001f; valaddr_reg:x3; val_offset:80538*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80538*0 + 3*734*FLEN/8, x4, x1, x2)

inst_26847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe700003f; valaddr_reg:x3; val_offset:80541*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80541*0 + 3*735*FLEN/8, x4, x1, x2)

inst_26848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe700007f; valaddr_reg:x3; val_offset:80544*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80544*0 + 3*736*FLEN/8, x4, x1, x2)

inst_26849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe70000ff; valaddr_reg:x3; val_offset:80547*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80547*0 + 3*737*FLEN/8, x4, x1, x2)

inst_26850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe70001ff; valaddr_reg:x3; val_offset:80550*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80550*0 + 3*738*FLEN/8, x4, x1, x2)

inst_26851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe70003ff; valaddr_reg:x3; val_offset:80553*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80553*0 + 3*739*FLEN/8, x4, x1, x2)

inst_26852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe70007ff; valaddr_reg:x3; val_offset:80556*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80556*0 + 3*740*FLEN/8, x4, x1, x2)

inst_26853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7000fff; valaddr_reg:x3; val_offset:80559*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80559*0 + 3*741*FLEN/8, x4, x1, x2)

inst_26854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7001fff; valaddr_reg:x3; val_offset:80562*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80562*0 + 3*742*FLEN/8, x4, x1, x2)

inst_26855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7003fff; valaddr_reg:x3; val_offset:80565*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80565*0 + 3*743*FLEN/8, x4, x1, x2)

inst_26856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7007fff; valaddr_reg:x3; val_offset:80568*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80568*0 + 3*744*FLEN/8, x4, x1, x2)

inst_26857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe700ffff; valaddr_reg:x3; val_offset:80571*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80571*0 + 3*745*FLEN/8, x4, x1, x2)

inst_26858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe701ffff; valaddr_reg:x3; val_offset:80574*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80574*0 + 3*746*FLEN/8, x4, x1, x2)

inst_26859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe703ffff; valaddr_reg:x3; val_offset:80577*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80577*0 + 3*747*FLEN/8, x4, x1, x2)

inst_26860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe707ffff; valaddr_reg:x3; val_offset:80580*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80580*0 + 3*748*FLEN/8, x4, x1, x2)

inst_26861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe70fffff; valaddr_reg:x3; val_offset:80583*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80583*0 + 3*749*FLEN/8, x4, x1, x2)

inst_26862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe71fffff; valaddr_reg:x3; val_offset:80586*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80586*0 + 3*750*FLEN/8, x4, x1, x2)

inst_26863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe73fffff; valaddr_reg:x3; val_offset:80589*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80589*0 + 3*751*FLEN/8, x4, x1, x2)

inst_26864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7400000; valaddr_reg:x3; val_offset:80592*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80592*0 + 3*752*FLEN/8, x4, x1, x2)

inst_26865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7600000; valaddr_reg:x3; val_offset:80595*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80595*0 + 3*753*FLEN/8, x4, x1, x2)

inst_26866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7700000; valaddr_reg:x3; val_offset:80598*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80598*0 + 3*754*FLEN/8, x4, x1, x2)

inst_26867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe7780000; valaddr_reg:x3; val_offset:80601*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80601*0 + 3*755*FLEN/8, x4, x1, x2)

inst_26868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77c0000; valaddr_reg:x3; val_offset:80604*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80604*0 + 3*756*FLEN/8, x4, x1, x2)

inst_26869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77e0000; valaddr_reg:x3; val_offset:80607*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80607*0 + 3*757*FLEN/8, x4, x1, x2)

inst_26870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77f0000; valaddr_reg:x3; val_offset:80610*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80610*0 + 3*758*FLEN/8, x4, x1, x2)

inst_26871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77f8000; valaddr_reg:x3; val_offset:80613*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80613*0 + 3*759*FLEN/8, x4, x1, x2)

inst_26872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77fc000; valaddr_reg:x3; val_offset:80616*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80616*0 + 3*760*FLEN/8, x4, x1, x2)

inst_26873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77fe000; valaddr_reg:x3; val_offset:80619*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80619*0 + 3*761*FLEN/8, x4, x1, x2)

inst_26874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77ff000; valaddr_reg:x3; val_offset:80622*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80622*0 + 3*762*FLEN/8, x4, x1, x2)

inst_26875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77ff800; valaddr_reg:x3; val_offset:80625*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80625*0 + 3*763*FLEN/8, x4, x1, x2)

inst_26876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77ffc00; valaddr_reg:x3; val_offset:80628*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80628*0 + 3*764*FLEN/8, x4, x1, x2)

inst_26877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77ffe00; valaddr_reg:x3; val_offset:80631*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80631*0 + 3*765*FLEN/8, x4, x1, x2)

inst_26878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77fff00; valaddr_reg:x3; val_offset:80634*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80634*0 + 3*766*FLEN/8, x4, x1, x2)

inst_26879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x740fae and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0642e8; op2val:0xbff40fae;
op3val:0xe77fff80; valaddr_reg:x3; val_offset:80637*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80637*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a0001ff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a0003ff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a0007ff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a000fff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a001fff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a003fff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a007fff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a00ffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a01ffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a03ffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a07ffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a0fffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a1fffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a3fffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a400000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a600000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a700000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a780000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7c0000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7e0000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7f0000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7f8000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fc000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fe000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ff000,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ff800,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffc00,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffe00,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fff00,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fff80,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fffc0,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fffe0,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffff0,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffff8,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffffc,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7ffffe,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3a7fffff,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f01cbbf,32,FLEN)
NAN_BOXED(0x3f1d4e,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb000000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb000001,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb000003,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb000007,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb00000f,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb00001f,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb00003f,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb00007f,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb0000ff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb0001ff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb0003ff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb0007ff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb000fff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb001fff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb003fff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb007fff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb00ffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb01ffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb03ffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb07ffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb0fffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb1fffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb3fffff,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb400000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb600000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb700000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb780000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7c0000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7e0000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7f0000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7f8000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fc000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fe000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ff000,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ff800,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffc00,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffe00,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fff00,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fff80,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fffc0,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fffe0,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffff0,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffff8,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffffc,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7ffffe,32,FLEN)
NAN_BOXED(0x7f02421b,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb7fffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080000f,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080001f,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080003f,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080007f,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808000ff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808001ff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808003ff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808007ff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800fff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80801fff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80803fff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80807fff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8080ffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8081ffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8083ffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8087ffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x808fffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x809fffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bfffff,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c00000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e00000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80f00000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80f80000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fc0000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fe0000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ff0000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ff8000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffc000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffe000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fff000,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fff800,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffc00,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffe00,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffff00,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffff80,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffc0,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffe0,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff0,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7f0247c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80ffffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37000000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37000001,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37000003,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37000007,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3700000f,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3700001f,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3700003f,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3700007f,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x370000ff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x370001ff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x370003ff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x370007ff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37000fff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37001fff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37003fff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37007fff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3700ffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3701ffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3703ffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3707ffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x370fffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x371fffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x373fffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37400000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37600000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37700000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x37780000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377c0000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377e0000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377f0000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377f8000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fc000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fe000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ff000,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ff800,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffc00,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffe00,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fff00,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fff80,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fffc0,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fffe0,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffff0,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffff8,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffffc,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377ffffe,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x377fffff,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f026c09,32,FLEN)
NAN_BOXED(0x3ecfbd,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61800000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61800001,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61800003,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61800007,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6180000f,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6180001f,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6180003f,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6180007f,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x618000ff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x618001ff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x618003ff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x618007ff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61800fff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61801fff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61803fff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61807fff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6180ffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6181ffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6183ffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x6187ffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x618fffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x619fffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61bfffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61c00000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61e00000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61f00000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61f80000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fc0000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fe0000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ff0000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ff8000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffc000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffe000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fff000,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fff800,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffc00,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffe00,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffff00,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffff80,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffffc0,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffffe0,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffff0,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffff8,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffffc,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61fffffe,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x61ffffff,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f02d831,32,FLEN)
NAN_BOXED(0x3ffa6f45,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000001,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000003,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000007,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600000f,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600001f,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600003f,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600007f,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860000ff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860001ff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860003ff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860007ff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86000fff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86001fff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86003fff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86007fff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8600ffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8601ffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8603ffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8607ffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x860fffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x861fffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x863fffff,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86400000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86600000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86700000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x86780000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867c0000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867e0000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f0000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867f8000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fc000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fe000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff000,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ff800,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffc00,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffe00,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff00,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fff80,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffc0,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffe0,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff0,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffff8,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffc,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867ffffe,32,FLEN)
NAN_BOXED(0x7f02f0c8,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x867fffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800001,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800003,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800007,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180000f,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180001f,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180003f,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180007f,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18000ff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18001ff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18003ff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18007ff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1800fff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1801fff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1803fff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1807fff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x180ffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x181ffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x183ffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x187ffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x18fffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x19fffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1bfffff,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1c00000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1e00000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f00000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1f80000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fc0000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fe0000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff0000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ff8000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffc000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffe000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff000,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fff800,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffc00,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffe00,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff00,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffff80,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffc0,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffe0,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff0,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffff8,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffffc,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1fffffe,32,FLEN)
NAN_BOXED(0x7f03a09d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1ffffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000001,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000003,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000007,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800000f,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001f,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003f,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007f,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80000ff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80001ff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80003ff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80007ff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8000fff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8001fff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8003fff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8007fff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800ffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x801ffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x803ffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x807ffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80fffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x81fffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x83fffff,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8400000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8600000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8700000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8780000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87c0000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87e0000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87f0000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87f8000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fc000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fe000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ff000,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ff800,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffc00,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffe00,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fff00,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fff80,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffc0,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffe0,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffff0,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffff8,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffffc,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffffe,32,FLEN)
NAN_BOXED(0x7f04962d,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae000000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae000001,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae000003,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae000007,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae00000f,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae00001f,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae00003f,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae00007f,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae0000ff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae0001ff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae0003ff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae0007ff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae000fff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae001fff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae003fff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae007fff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae00ffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae01ffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae03ffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae07ffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae0fffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae1fffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae3fffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae400000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae600000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae700000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae780000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7c0000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7e0000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7f0000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7f8000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fc000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fe000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ff000,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ff800,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffc00,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffe00,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fff00,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fff80,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fffc0,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fffe0,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffff0,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffff8,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffffc,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7ffffe,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xae7fffff,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f053104,32,FLEN)
NAN_BOXED(0x803d8164,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45000000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45000001,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45000003,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45000007,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4500000f,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4500001f,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4500003f,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4500007f,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x450000ff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x450001ff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x450003ff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x450007ff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45000fff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45001fff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45003fff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45007fff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4500ffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4501ffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4503ffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x4507ffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x450fffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x451fffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x453fffff,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45400000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45600000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45700000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x45780000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457c0000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457e0000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457f0000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457f8000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fc000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fe000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ff000,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ff800,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffc00,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffe00,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fff00,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fff80,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fffc0,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fffe0,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffff0,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffff8,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffffc,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457ffffe,32,FLEN)
NAN_BOXED(0x7f06075b,32,FLEN)
NAN_BOXED(0x3d1f08,32,FLEN)
NAN_BOXED(0x457fffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63800000,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63800001,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63800003,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63800007,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6380000f,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6380001f,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6380003f,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6380007f,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x638000ff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x638001ff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x638003ff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x638007ff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63800fff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63801fff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63803fff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63807fff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6380ffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6381ffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6383ffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x6387ffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x638fffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x639fffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
NAN_BOXED(0x3ff47285,32,FLEN)
NAN_BOXED(0x63bfffff,32,FLEN)
NAN_BOXED(0x7f060c9f,32,FLEN)
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NAN_BOXED(0x63c00000,32,FLEN)
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NAN_BOXED(0x63e00000,32,FLEN)
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NAN_BOXED(0x3ff47285,32,FLEN)
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NAN_BOXED(0x3ff47285,32,FLEN)
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NAN_BOXED(0x3ff47285,32,FLEN)
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NAN_BOXED(0x3,32,FLEN)
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NAN_BOXED(0x501ffff,32,FLEN)
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NAN_BOXED(0xe77ffc00,32,FLEN)
NAN_BOXED(0x7f0642e8,32,FLEN)
NAN_BOXED(0xbff40fae,32,FLEN)
NAN_BOXED(0xe77ffe00,32,FLEN)
NAN_BOXED(0x7f0642e8,32,FLEN)
NAN_BOXED(0xbff40fae,32,FLEN)
NAN_BOXED(0xe77fff00,32,FLEN)
NAN_BOXED(0x7f0642e8,32,FLEN)
NAN_BOXED(0xbff40fae,32,FLEN)
NAN_BOXED(0xe77fff80,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
