
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 15:29:07 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32D/fnmsub.d.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.d instruction of the RISC-V RV32FD_Zicsr,RV64FD_Zicsr extension for the fnmsub.d_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IFD_Zicsr,RV64IFD_Zicsr,RV32EFD_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*D.*);def TEST_CASE_1=True;",fnmsub.d_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*D.*);def TEST_CASE_1=True;",fnmsub.d_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_2304:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000000003fff; valaddr_reg:x3; val_offset:6912*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6912*0 + 3*0*FLEN/8, x4, x1, x2)

inst_2305:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000000007fff; valaddr_reg:x3; val_offset:6915*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6915*0 + 3*1*FLEN/8, x4, x1, x2)

inst_2306:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000000000ffff; valaddr_reg:x3; val_offset:6918*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6918*0 + 3*2*FLEN/8, x4, x1, x2)

inst_2307:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000000001ffff; valaddr_reg:x3; val_offset:6921*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6921*0 + 3*3*FLEN/8, x4, x1, x2)

inst_2308:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000000003ffff; valaddr_reg:x3; val_offset:6924*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6924*0 + 3*4*FLEN/8, x4, x1, x2)

inst_2309:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000000007ffff; valaddr_reg:x3; val_offset:6927*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6927*0 + 3*5*FLEN/8, x4, x1, x2)

inst_2310:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400000000fffff; valaddr_reg:x3; val_offset:6930*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6930*0 + 3*6*FLEN/8, x4, x1, x2)

inst_2311:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400000001fffff; valaddr_reg:x3; val_offset:6933*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6933*0 + 3*7*FLEN/8, x4, x1, x2)

inst_2312:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400000003fffff; valaddr_reg:x3; val_offset:6936*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6936*0 + 3*8*FLEN/8, x4, x1, x2)

inst_2313:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400000007fffff; valaddr_reg:x3; val_offset:6939*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6939*0 + 3*9*FLEN/8, x4, x1, x2)

inst_2314:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000000ffffff; valaddr_reg:x3; val_offset:6942*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6942*0 + 3*10*FLEN/8, x4, x1, x2)

inst_2315:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000001ffffff; valaddr_reg:x3; val_offset:6945*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6945*0 + 3*11*FLEN/8, x4, x1, x2)

inst_2316:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000003ffffff; valaddr_reg:x3; val_offset:6948*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6948*0 + 3*12*FLEN/8, x4, x1, x2)

inst_2317:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000007ffffff; valaddr_reg:x3; val_offset:6951*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6951*0 + 3*13*FLEN/8, x4, x1, x2)

inst_2318:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000000fffffff; valaddr_reg:x3; val_offset:6954*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6954*0 + 3*14*FLEN/8, x4, x1, x2)

inst_2319:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000001fffffff; valaddr_reg:x3; val_offset:6957*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6957*0 + 3*15*FLEN/8, x4, x1, x2)

inst_2320:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000003fffffff; valaddr_reg:x3; val_offset:6960*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6960*0 + 3*16*FLEN/8, x4, x1, x2)

inst_2321:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000007fffffff; valaddr_reg:x3; val_offset:6963*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6963*0 + 3*17*FLEN/8, x4, x1, x2)

inst_2322:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400000ffffffff; valaddr_reg:x3; val_offset:6966*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6966*0 + 3*18*FLEN/8, x4, x1, x2)

inst_2323:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400001ffffffff; valaddr_reg:x3; val_offset:6969*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6969*0 + 3*19*FLEN/8, x4, x1, x2)

inst_2324:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400003ffffffff; valaddr_reg:x3; val_offset:6972*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6972*0 + 3*20*FLEN/8, x4, x1, x2)

inst_2325:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400007ffffffff; valaddr_reg:x3; val_offset:6975*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6975*0 + 3*21*FLEN/8, x4, x1, x2)

inst_2326:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040000fffffffff; valaddr_reg:x3; val_offset:6978*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6978*0 + 3*22*FLEN/8, x4, x1, x2)

inst_2327:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040001fffffffff; valaddr_reg:x3; val_offset:6981*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6981*0 + 3*23*FLEN/8, x4, x1, x2)

inst_2328:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040003fffffffff; valaddr_reg:x3; val_offset:6984*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6984*0 + 3*24*FLEN/8, x4, x1, x2)

inst_2329:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040007fffffffff; valaddr_reg:x3; val_offset:6987*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6987*0 + 3*25*FLEN/8, x4, x1, x2)

inst_2330:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804000ffffffffff; valaddr_reg:x3; val_offset:6990*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6990*0 + 3*26*FLEN/8, x4, x1, x2)

inst_2331:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804001ffffffffff; valaddr_reg:x3; val_offset:6993*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6993*0 + 3*27*FLEN/8, x4, x1, x2)

inst_2332:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804003ffffffffff; valaddr_reg:x3; val_offset:6996*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6996*0 + 3*28*FLEN/8, x4, x1, x2)

inst_2333:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804007ffffffffff; valaddr_reg:x3; val_offset:6999*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 6999*0 + 3*29*FLEN/8, x4, x1, x2)

inst_2334:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80400fffffffffff; valaddr_reg:x3; val_offset:7002*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7002*0 + 3*30*FLEN/8, x4, x1, x2)

inst_2335:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80401fffffffffff; valaddr_reg:x3; val_offset:7005*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7005*0 + 3*31*FLEN/8, x4, x1, x2)

inst_2336:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80403fffffffffff; valaddr_reg:x3; val_offset:7008*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7008*0 + 3*32*FLEN/8, x4, x1, x2)

inst_2337:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x80407fffffffffff; valaddr_reg:x3; val_offset:7011*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7011*0 + 3*33*FLEN/8, x4, x1, x2)

inst_2338:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8040ffffffffffff; valaddr_reg:x3; val_offset:7014*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7014*0 + 3*34*FLEN/8, x4, x1, x2)

inst_2339:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8041ffffffffffff; valaddr_reg:x3; val_offset:7017*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7017*0 + 3*35*FLEN/8, x4, x1, x2)

inst_2340:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8043ffffffffffff; valaddr_reg:x3; val_offset:7020*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7020*0 + 3*36*FLEN/8, x4, x1, x2)

inst_2341:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8047ffffffffffff; valaddr_reg:x3; val_offset:7023*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7023*0 + 3*37*FLEN/8, x4, x1, x2)

inst_2342:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x8048000000000000; valaddr_reg:x3; val_offset:7026*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7026*0 + 3*38*FLEN/8, x4, x1, x2)

inst_2343:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804c000000000000; valaddr_reg:x3; val_offset:7029*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7029*0 + 3*39*FLEN/8, x4, x1, x2)

inst_2344:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804e000000000000; valaddr_reg:x3; val_offset:7032*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7032*0 + 3*40*FLEN/8, x4, x1, x2)

inst_2345:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804f000000000000; valaddr_reg:x3; val_offset:7035*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7035*0 + 3*41*FLEN/8, x4, x1, x2)

inst_2346:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804f800000000000; valaddr_reg:x3; val_offset:7038*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7038*0 + 3*42*FLEN/8, x4, x1, x2)

inst_2347:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fc00000000000; valaddr_reg:x3; val_offset:7041*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7041*0 + 3*43*FLEN/8, x4, x1, x2)

inst_2348:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fe00000000000; valaddr_reg:x3; val_offset:7044*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7044*0 + 3*44*FLEN/8, x4, x1, x2)

inst_2349:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ff00000000000; valaddr_reg:x3; val_offset:7047*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7047*0 + 3*45*FLEN/8, x4, x1, x2)

inst_2350:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ff80000000000; valaddr_reg:x3; val_offset:7050*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7050*0 + 3*46*FLEN/8, x4, x1, x2)

inst_2351:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffc0000000000; valaddr_reg:x3; val_offset:7053*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7053*0 + 3*47*FLEN/8, x4, x1, x2)

inst_2352:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffe0000000000; valaddr_reg:x3; val_offset:7056*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7056*0 + 3*48*FLEN/8, x4, x1, x2)

inst_2353:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fff0000000000; valaddr_reg:x3; val_offset:7059*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7059*0 + 3*49*FLEN/8, x4, x1, x2)

inst_2354:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fff8000000000; valaddr_reg:x3; val_offset:7062*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7062*0 + 3*50*FLEN/8, x4, x1, x2)

inst_2355:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffc000000000; valaddr_reg:x3; val_offset:7065*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7065*0 + 3*51*FLEN/8, x4, x1, x2)

inst_2356:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffe000000000; valaddr_reg:x3; val_offset:7068*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7068*0 + 3*52*FLEN/8, x4, x1, x2)

inst_2357:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffff000000000; valaddr_reg:x3; val_offset:7071*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7071*0 + 3*53*FLEN/8, x4, x1, x2)

inst_2358:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffff800000000; valaddr_reg:x3; val_offset:7074*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7074*0 + 3*54*FLEN/8, x4, x1, x2)

inst_2359:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffc00000000; valaddr_reg:x3; val_offset:7077*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7077*0 + 3*55*FLEN/8, x4, x1, x2)

inst_2360:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffe00000000; valaddr_reg:x3; val_offset:7080*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7080*0 + 3*56*FLEN/8, x4, x1, x2)

inst_2361:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffff00000000; valaddr_reg:x3; val_offset:7083*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7083*0 + 3*57*FLEN/8, x4, x1, x2)

inst_2362:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffff80000000; valaddr_reg:x3; val_offset:7086*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7086*0 + 3*58*FLEN/8, x4, x1, x2)

inst_2363:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffc0000000; valaddr_reg:x3; val_offset:7089*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7089*0 + 3*59*FLEN/8, x4, x1, x2)

inst_2364:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffe0000000; valaddr_reg:x3; val_offset:7092*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7092*0 + 3*60*FLEN/8, x4, x1, x2)

inst_2365:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffff0000000; valaddr_reg:x3; val_offset:7095*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7095*0 + 3*61*FLEN/8, x4, x1, x2)

inst_2366:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffff8000000; valaddr_reg:x3; val_offset:7098*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7098*0 + 3*62*FLEN/8, x4, x1, x2)

inst_2367:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffc000000; valaddr_reg:x3; val_offset:7101*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7101*0 + 3*63*FLEN/8, x4, x1, x2)

inst_2368:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffe000000; valaddr_reg:x3; val_offset:7104*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7104*0 + 3*64*FLEN/8, x4, x1, x2)

inst_2369:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffff000000; valaddr_reg:x3; val_offset:7107*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7107*0 + 3*65*FLEN/8, x4, x1, x2)

inst_2370:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffff800000; valaddr_reg:x3; val_offset:7110*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7110*0 + 3*66*FLEN/8, x4, x1, x2)

inst_2371:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffc00000; valaddr_reg:x3; val_offset:7113*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7113*0 + 3*67*FLEN/8, x4, x1, x2)

inst_2372:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffe00000; valaddr_reg:x3; val_offset:7116*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7116*0 + 3*68*FLEN/8, x4, x1, x2)

inst_2373:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffff00000; valaddr_reg:x3; val_offset:7119*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7119*0 + 3*69*FLEN/8, x4, x1, x2)

inst_2374:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffff80000; valaddr_reg:x3; val_offset:7122*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7122*0 + 3*70*FLEN/8, x4, x1, x2)

inst_2375:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffc0000; valaddr_reg:x3; val_offset:7125*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7125*0 + 3*71*FLEN/8, x4, x1, x2)

inst_2376:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffe0000; valaddr_reg:x3; val_offset:7128*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7128*0 + 3*72*FLEN/8, x4, x1, x2)

inst_2377:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffff0000; valaddr_reg:x3; val_offset:7131*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7131*0 + 3*73*FLEN/8, x4, x1, x2)

inst_2378:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffff8000; valaddr_reg:x3; val_offset:7134*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7134*0 + 3*74*FLEN/8, x4, x1, x2)

inst_2379:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffc000; valaddr_reg:x3; val_offset:7137*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7137*0 + 3*75*FLEN/8, x4, x1, x2)

inst_2380:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffe000; valaddr_reg:x3; val_offset:7140*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7140*0 + 3*76*FLEN/8, x4, x1, x2)

inst_2381:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffff000; valaddr_reg:x3; val_offset:7143*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7143*0 + 3*77*FLEN/8, x4, x1, x2)

inst_2382:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffff800; valaddr_reg:x3; val_offset:7146*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7146*0 + 3*78*FLEN/8, x4, x1, x2)

inst_2383:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffc00; valaddr_reg:x3; val_offset:7149*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7149*0 + 3*79*FLEN/8, x4, x1, x2)

inst_2384:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffe00; valaddr_reg:x3; val_offset:7152*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7152*0 + 3*80*FLEN/8, x4, x1, x2)

inst_2385:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffff00; valaddr_reg:x3; val_offset:7155*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7155*0 + 3*81*FLEN/8, x4, x1, x2)

inst_2386:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffff80; valaddr_reg:x3; val_offset:7158*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7158*0 + 3*82*FLEN/8, x4, x1, x2)

inst_2387:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffffc0; valaddr_reg:x3; val_offset:7161*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7161*0 + 3*83*FLEN/8, x4, x1, x2)

inst_2388:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffffe0; valaddr_reg:x3; val_offset:7164*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7164*0 + 3*84*FLEN/8, x4, x1, x2)

inst_2389:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffff0; valaddr_reg:x3; val_offset:7167*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7167*0 + 3*85*FLEN/8, x4, x1, x2)

inst_2390:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffff8; valaddr_reg:x3; val_offset:7170*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7170*0 + 3*86*FLEN/8, x4, x1, x2)

inst_2391:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffffc; valaddr_reg:x3; val_offset:7173*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7173*0 + 3*87*FLEN/8, x4, x1, x2)

inst_2392:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804ffffffffffffe; valaddr_reg:x3; val_offset:7176*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7176*0 + 3*88*FLEN/8, x4, x1, x2)

inst_2393:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xb4d97f458961f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x004 and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5b4d97f458961f; op2val:0x8000;
op3val:0x804fffffffffffff; valaddr_reg:x3; val_offset:7179*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7179*0 + 3*89*FLEN/8, x4, x1, x2)

inst_2394:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8010000000000001; valaddr_reg:x3; val_offset:7182*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7182*0 + 3*90*FLEN/8, x4, x1, x2)

inst_2395:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8010000000000003; valaddr_reg:x3; val_offset:7185*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7185*0 + 3*91*FLEN/8, x4, x1, x2)

inst_2396:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8010000000000007; valaddr_reg:x3; val_offset:7188*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7188*0 + 3*92*FLEN/8, x4, x1, x2)

inst_2397:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801000000000000f; valaddr_reg:x3; val_offset:7191*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7191*0 + 3*93*FLEN/8, x4, x1, x2)

inst_2398:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801000000000001f; valaddr_reg:x3; val_offset:7194*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7194*0 + 3*94*FLEN/8, x4, x1, x2)

inst_2399:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801000000000003f; valaddr_reg:x3; val_offset:7197*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7197*0 + 3*95*FLEN/8, x4, x1, x2)

inst_2400:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8013333333333333; valaddr_reg:x3; val_offset:7200*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7200*0 + 3*96*FLEN/8, x4, x1, x2)

inst_2401:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8014924924924924; valaddr_reg:x3; val_offset:7203*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7203*0 + 3*97*FLEN/8, x4, x1, x2)

inst_2402:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8016666666666666; valaddr_reg:x3; val_offset:7206*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7206*0 + 3*98*FLEN/8, x4, x1, x2)

inst_2403:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8016db6db6db6db6; valaddr_reg:x3; val_offset:7209*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7209*0 + 3*99*FLEN/8, x4, x1, x2)

inst_2404:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8017777777777777; valaddr_reg:x3; val_offset:7212*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7212*0 + 3*100*FLEN/8, x4, x1, x2)

inst_2405:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8018888888888888; valaddr_reg:x3; val_offset:7215*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7215*0 + 3*101*FLEN/8, x4, x1, x2)

inst_2406:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8019999999999999; valaddr_reg:x3; val_offset:7218*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7218*0 + 3*102*FLEN/8, x4, x1, x2)

inst_2407:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801b6db6db6db6db; valaddr_reg:x3; val_offset:7221*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7221*0 + 3*103*FLEN/8, x4, x1, x2)

inst_2408:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801ccccccccccccc; valaddr_reg:x3; val_offset:7224*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7224*0 + 3*104*FLEN/8, x4, x1, x2)

inst_2409:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801db6db6db6db6d; valaddr_reg:x3; val_offset:7227*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7227*0 + 3*105*FLEN/8, x4, x1, x2)

inst_2410:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801fffffffffffc0; valaddr_reg:x3; val_offset:7230*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7230*0 + 3*106*FLEN/8, x4, x1, x2)

inst_2411:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801fffffffffffe0; valaddr_reg:x3; val_offset:7233*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7233*0 + 3*107*FLEN/8, x4, x1, x2)

inst_2412:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801ffffffffffff0; valaddr_reg:x3; val_offset:7236*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7236*0 + 3*108*FLEN/8, x4, x1, x2)

inst_2413:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801ffffffffffff8; valaddr_reg:x3; val_offset:7239*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7239*0 + 3*109*FLEN/8, x4, x1, x2)

inst_2414:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801ffffffffffffc; valaddr_reg:x3; val_offset:7242*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7242*0 + 3*110*FLEN/8, x4, x1, x2)

inst_2415:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x001 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x801ffffffffffffe; valaddr_reg:x3; val_offset:7245*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7245*0 + 3*111*FLEN/8, x4, x1, x2)

inst_2416:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000000000; valaddr_reg:x3; val_offset:7248*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7248*0 + 3*112*FLEN/8, x4, x1, x2)

inst_2417:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000000001; valaddr_reg:x3; val_offset:7251*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7251*0 + 3*113*FLEN/8, x4, x1, x2)

inst_2418:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000000003; valaddr_reg:x3; val_offset:7254*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7254*0 + 3*114*FLEN/8, x4, x1, x2)

inst_2419:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000000007; valaddr_reg:x3; val_offset:7257*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7257*0 + 3*115*FLEN/8, x4, x1, x2)

inst_2420:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000000000f; valaddr_reg:x3; val_offset:7260*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7260*0 + 3*116*FLEN/8, x4, x1, x2)

inst_2421:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000000001f; valaddr_reg:x3; val_offset:7263*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7263*0 + 3*117*FLEN/8, x4, x1, x2)

inst_2422:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000000003f; valaddr_reg:x3; val_offset:7266*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7266*0 + 3*118*FLEN/8, x4, x1, x2)

inst_2423:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000000007f; valaddr_reg:x3; val_offset:7269*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7269*0 + 3*119*FLEN/8, x4, x1, x2)

inst_2424:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000000000ff; valaddr_reg:x3; val_offset:7272*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7272*0 + 3*120*FLEN/8, x4, x1, x2)

inst_2425:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000000001ff; valaddr_reg:x3; val_offset:7275*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7275*0 + 3*121*FLEN/8, x4, x1, x2)

inst_2426:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000000003ff; valaddr_reg:x3; val_offset:7278*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7278*0 + 3*122*FLEN/8, x4, x1, x2)

inst_2427:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000000007ff; valaddr_reg:x3; val_offset:7281*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7281*0 + 3*123*FLEN/8, x4, x1, x2)

inst_2428:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000000fff; valaddr_reg:x3; val_offset:7284*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7284*0 + 3*124*FLEN/8, x4, x1, x2)

inst_2429:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000001fff; valaddr_reg:x3; val_offset:7287*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7287*0 + 3*125*FLEN/8, x4, x1, x2)

inst_2430:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000003fff; valaddr_reg:x3; val_offset:7290*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7290*0 + 3*126*FLEN/8, x4, x1, x2)

inst_2431:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000007fff; valaddr_reg:x3; val_offset:7293*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7293*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_2432:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000000ffff; valaddr_reg:x3; val_offset:7296*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7296*0 + 3*128*FLEN/8, x4, x1, x2)

inst_2433:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000001ffff; valaddr_reg:x3; val_offset:7299*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7299*0 + 3*129*FLEN/8, x4, x1, x2)

inst_2434:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000003ffff; valaddr_reg:x3; val_offset:7302*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7302*0 + 3*130*FLEN/8, x4, x1, x2)

inst_2435:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000007ffff; valaddr_reg:x3; val_offset:7305*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7305*0 + 3*131*FLEN/8, x4, x1, x2)

inst_2436:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000000fffff; valaddr_reg:x3; val_offset:7308*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7308*0 + 3*132*FLEN/8, x4, x1, x2)

inst_2437:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000001fffff; valaddr_reg:x3; val_offset:7311*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7311*0 + 3*133*FLEN/8, x4, x1, x2)

inst_2438:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000003fffff; valaddr_reg:x3; val_offset:7314*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7314*0 + 3*134*FLEN/8, x4, x1, x2)

inst_2439:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000007fffff; valaddr_reg:x3; val_offset:7317*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7317*0 + 3*135*FLEN/8, x4, x1, x2)

inst_2440:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000000ffffff; valaddr_reg:x3; val_offset:7320*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7320*0 + 3*136*FLEN/8, x4, x1, x2)

inst_2441:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000001ffffff; valaddr_reg:x3; val_offset:7323*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7323*0 + 3*137*FLEN/8, x4, x1, x2)

inst_2442:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000003ffffff; valaddr_reg:x3; val_offset:7326*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7326*0 + 3*138*FLEN/8, x4, x1, x2)

inst_2443:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000007ffffff; valaddr_reg:x3; val_offset:7329*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7329*0 + 3*139*FLEN/8, x4, x1, x2)

inst_2444:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000000fffffff; valaddr_reg:x3; val_offset:7332*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7332*0 + 3*140*FLEN/8, x4, x1, x2)

inst_2445:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000001fffffff; valaddr_reg:x3; val_offset:7335*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7335*0 + 3*141*FLEN/8, x4, x1, x2)

inst_2446:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000003fffffff; valaddr_reg:x3; val_offset:7338*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7338*0 + 3*142*FLEN/8, x4, x1, x2)

inst_2447:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000007fffffff; valaddr_reg:x3; val_offset:7341*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7341*0 + 3*143*FLEN/8, x4, x1, x2)

inst_2448:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900000ffffffff; valaddr_reg:x3; val_offset:7344*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7344*0 + 3*144*FLEN/8, x4, x1, x2)

inst_2449:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900001ffffffff; valaddr_reg:x3; val_offset:7347*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7347*0 + 3*145*FLEN/8, x4, x1, x2)

inst_2450:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900003ffffffff; valaddr_reg:x3; val_offset:7350*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7350*0 + 3*146*FLEN/8, x4, x1, x2)

inst_2451:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900007ffffffff; valaddr_reg:x3; val_offset:7353*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7353*0 + 3*147*FLEN/8, x4, x1, x2)

inst_2452:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290000fffffffff; valaddr_reg:x3; val_offset:7356*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7356*0 + 3*148*FLEN/8, x4, x1, x2)

inst_2453:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290001fffffffff; valaddr_reg:x3; val_offset:7359*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7359*0 + 3*149*FLEN/8, x4, x1, x2)

inst_2454:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290003fffffffff; valaddr_reg:x3; val_offset:7362*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7362*0 + 3*150*FLEN/8, x4, x1, x2)

inst_2455:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290007fffffffff; valaddr_reg:x3; val_offset:7365*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7365*0 + 3*151*FLEN/8, x4, x1, x2)

inst_2456:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829000ffffffffff; valaddr_reg:x3; val_offset:7368*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7368*0 + 3*152*FLEN/8, x4, x1, x2)

inst_2457:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829001ffffffffff; valaddr_reg:x3; val_offset:7371*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7371*0 + 3*153*FLEN/8, x4, x1, x2)

inst_2458:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829003ffffffffff; valaddr_reg:x3; val_offset:7374*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7374*0 + 3*154*FLEN/8, x4, x1, x2)

inst_2459:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829007ffffffffff; valaddr_reg:x3; val_offset:7377*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7377*0 + 3*155*FLEN/8, x4, x1, x2)

inst_2460:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82900fffffffffff; valaddr_reg:x3; val_offset:7380*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7380*0 + 3*156*FLEN/8, x4, x1, x2)

inst_2461:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82901fffffffffff; valaddr_reg:x3; val_offset:7383*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7383*0 + 3*157*FLEN/8, x4, x1, x2)

inst_2462:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82903fffffffffff; valaddr_reg:x3; val_offset:7386*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7386*0 + 3*158*FLEN/8, x4, x1, x2)

inst_2463:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x82907fffffffffff; valaddr_reg:x3; val_offset:7389*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7389*0 + 3*159*FLEN/8, x4, x1, x2)

inst_2464:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8290ffffffffffff; valaddr_reg:x3; val_offset:7392*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7392*0 + 3*160*FLEN/8, x4, x1, x2)

inst_2465:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8291ffffffffffff; valaddr_reg:x3; val_offset:7395*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7395*0 + 3*161*FLEN/8, x4, x1, x2)

inst_2466:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8293ffffffffffff; valaddr_reg:x3; val_offset:7398*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7398*0 + 3*162*FLEN/8, x4, x1, x2)

inst_2467:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8297ffffffffffff; valaddr_reg:x3; val_offset:7401*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7401*0 + 3*163*FLEN/8, x4, x1, x2)

inst_2468:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x8298000000000000; valaddr_reg:x3; val_offset:7404*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7404*0 + 3*164*FLEN/8, x4, x1, x2)

inst_2469:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829c000000000000; valaddr_reg:x3; val_offset:7407*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7407*0 + 3*165*FLEN/8, x4, x1, x2)

inst_2470:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829e000000000000; valaddr_reg:x3; val_offset:7410*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7410*0 + 3*166*FLEN/8, x4, x1, x2)

inst_2471:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829f000000000000; valaddr_reg:x3; val_offset:7413*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7413*0 + 3*167*FLEN/8, x4, x1, x2)

inst_2472:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829f800000000000; valaddr_reg:x3; val_offset:7416*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7416*0 + 3*168*FLEN/8, x4, x1, x2)

inst_2473:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fc00000000000; valaddr_reg:x3; val_offset:7419*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7419*0 + 3*169*FLEN/8, x4, x1, x2)

inst_2474:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fe00000000000; valaddr_reg:x3; val_offset:7422*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7422*0 + 3*170*FLEN/8, x4, x1, x2)

inst_2475:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ff00000000000; valaddr_reg:x3; val_offset:7425*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7425*0 + 3*171*FLEN/8, x4, x1, x2)

inst_2476:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ff80000000000; valaddr_reg:x3; val_offset:7428*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7428*0 + 3*172*FLEN/8, x4, x1, x2)

inst_2477:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffc0000000000; valaddr_reg:x3; val_offset:7431*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7431*0 + 3*173*FLEN/8, x4, x1, x2)

inst_2478:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffe0000000000; valaddr_reg:x3; val_offset:7434*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7434*0 + 3*174*FLEN/8, x4, x1, x2)

inst_2479:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fff0000000000; valaddr_reg:x3; val_offset:7437*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7437*0 + 3*175*FLEN/8, x4, x1, x2)

inst_2480:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fff8000000000; valaddr_reg:x3; val_offset:7440*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7440*0 + 3*176*FLEN/8, x4, x1, x2)

inst_2481:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffc000000000; valaddr_reg:x3; val_offset:7443*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7443*0 + 3*177*FLEN/8, x4, x1, x2)

inst_2482:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffe000000000; valaddr_reg:x3; val_offset:7446*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7446*0 + 3*178*FLEN/8, x4, x1, x2)

inst_2483:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffff000000000; valaddr_reg:x3; val_offset:7449*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7449*0 + 3*179*FLEN/8, x4, x1, x2)

inst_2484:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffff800000000; valaddr_reg:x3; val_offset:7452*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7452*0 + 3*180*FLEN/8, x4, x1, x2)

inst_2485:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffc00000000; valaddr_reg:x3; val_offset:7455*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7455*0 + 3*181*FLEN/8, x4, x1, x2)

inst_2486:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffe00000000; valaddr_reg:x3; val_offset:7458*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7458*0 + 3*182*FLEN/8, x4, x1, x2)

inst_2487:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffff00000000; valaddr_reg:x3; val_offset:7461*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7461*0 + 3*183*FLEN/8, x4, x1, x2)

inst_2488:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffff80000000; valaddr_reg:x3; val_offset:7464*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7464*0 + 3*184*FLEN/8, x4, x1, x2)

inst_2489:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffc0000000; valaddr_reg:x3; val_offset:7467*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7467*0 + 3*185*FLEN/8, x4, x1, x2)

inst_2490:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffe0000000; valaddr_reg:x3; val_offset:7470*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7470*0 + 3*186*FLEN/8, x4, x1, x2)

inst_2491:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffff0000000; valaddr_reg:x3; val_offset:7473*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7473*0 + 3*187*FLEN/8, x4, x1, x2)

inst_2492:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffff8000000; valaddr_reg:x3; val_offset:7476*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7476*0 + 3*188*FLEN/8, x4, x1, x2)

inst_2493:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffc000000; valaddr_reg:x3; val_offset:7479*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7479*0 + 3*189*FLEN/8, x4, x1, x2)

inst_2494:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffe000000; valaddr_reg:x3; val_offset:7482*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7482*0 + 3*190*FLEN/8, x4, x1, x2)

inst_2495:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffff000000; valaddr_reg:x3; val_offset:7485*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7485*0 + 3*191*FLEN/8, x4, x1, x2)

inst_2496:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffff800000; valaddr_reg:x3; val_offset:7488*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7488*0 + 3*192*FLEN/8, x4, x1, x2)

inst_2497:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffc00000; valaddr_reg:x3; val_offset:7491*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7491*0 + 3*193*FLEN/8, x4, x1, x2)

inst_2498:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffe00000; valaddr_reg:x3; val_offset:7494*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7494*0 + 3*194*FLEN/8, x4, x1, x2)

inst_2499:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffff00000; valaddr_reg:x3; val_offset:7497*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7497*0 + 3*195*FLEN/8, x4, x1, x2)

inst_2500:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffff80000; valaddr_reg:x3; val_offset:7500*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7500*0 + 3*196*FLEN/8, x4, x1, x2)

inst_2501:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffc0000; valaddr_reg:x3; val_offset:7503*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7503*0 + 3*197*FLEN/8, x4, x1, x2)

inst_2502:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffe0000; valaddr_reg:x3; val_offset:7506*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7506*0 + 3*198*FLEN/8, x4, x1, x2)

inst_2503:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffff0000; valaddr_reg:x3; val_offset:7509*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7509*0 + 3*199*FLEN/8, x4, x1, x2)

inst_2504:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffff8000; valaddr_reg:x3; val_offset:7512*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7512*0 + 3*200*FLEN/8, x4, x1, x2)

inst_2505:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffc000; valaddr_reg:x3; val_offset:7515*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7515*0 + 3*201*FLEN/8, x4, x1, x2)

inst_2506:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffe000; valaddr_reg:x3; val_offset:7518*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7518*0 + 3*202*FLEN/8, x4, x1, x2)

inst_2507:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffff000; valaddr_reg:x3; val_offset:7521*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7521*0 + 3*203*FLEN/8, x4, x1, x2)

inst_2508:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffff800; valaddr_reg:x3; val_offset:7524*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7524*0 + 3*204*FLEN/8, x4, x1, x2)

inst_2509:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffc00; valaddr_reg:x3; val_offset:7527*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7527*0 + 3*205*FLEN/8, x4, x1, x2)

inst_2510:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffe00; valaddr_reg:x3; val_offset:7530*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7530*0 + 3*206*FLEN/8, x4, x1, x2)

inst_2511:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffff00; valaddr_reg:x3; val_offset:7533*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7533*0 + 3*207*FLEN/8, x4, x1, x2)

inst_2512:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffff80; valaddr_reg:x3; val_offset:7536*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7536*0 + 3*208*FLEN/8, x4, x1, x2)

inst_2513:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffffc0; valaddr_reg:x3; val_offset:7539*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7539*0 + 3*209*FLEN/8, x4, x1, x2)

inst_2514:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffffe0; valaddr_reg:x3; val_offset:7542*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7542*0 + 3*210*FLEN/8, x4, x1, x2)

inst_2515:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffff0; valaddr_reg:x3; val_offset:7545*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7545*0 + 3*211*FLEN/8, x4, x1, x2)

inst_2516:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffff8; valaddr_reg:x3; val_offset:7548*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7548*0 + 3*212*FLEN/8, x4, x1, x2)

inst_2517:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffffc; valaddr_reg:x3; val_offset:7551*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7551*0 + 3*213*FLEN/8, x4, x1, x2)

inst_2518:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829ffffffffffffe; valaddr_reg:x3; val_offset:7554*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7554*0 + 3*214*FLEN/8, x4, x1, x2)

inst_2519:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xcf2eb5c7640bf and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x029 and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5cf2eb5c7640bf; op2val:0x8000;
op3val:0x829fffffffffffff; valaddr_reg:x3; val_offset:7557*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7557*0 + 3*215*FLEN/8, x4, x1, x2)

inst_2520:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:7560*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7560*0 + 3*216*FLEN/8, x4, x1, x2)

inst_2521:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:7563*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7563*0 + 3*217*FLEN/8, x4, x1, x2)

inst_2522:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:7566*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7566*0 + 3*218*FLEN/8, x4, x1, x2)

inst_2523:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xf; valaddr_reg:x3; val_offset:7569*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7569*0 + 3*219*FLEN/8, x4, x1, x2)

inst_2524:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x1f; valaddr_reg:x3; val_offset:7572*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7572*0 + 3*220*FLEN/8, x4, x1, x2)

inst_2525:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3f; valaddr_reg:x3; val_offset:7575*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7575*0 + 3*221*FLEN/8, x4, x1, x2)

inst_2526:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3333333333333; valaddr_reg:x3; val_offset:7578*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7578*0 + 3*222*FLEN/8, x4, x1, x2)

inst_2527:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x4924924924924; valaddr_reg:x3; val_offset:7581*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7581*0 + 3*223*FLEN/8, x4, x1, x2)

inst_2528:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x6666666666666; valaddr_reg:x3; val_offset:7584*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7584*0 + 3*224*FLEN/8, x4, x1, x2)

inst_2529:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x6db6db6db6db6; valaddr_reg:x3; val_offset:7587*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7587*0 + 3*225*FLEN/8, x4, x1, x2)

inst_2530:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x7777777777777; valaddr_reg:x3; val_offset:7590*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7590*0 + 3*226*FLEN/8, x4, x1, x2)

inst_2531:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x8888888888888; valaddr_reg:x3; val_offset:7593*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7593*0 + 3*227*FLEN/8, x4, x1, x2)

inst_2532:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x9999999999999; valaddr_reg:x3; val_offset:7596*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7596*0 + 3*228*FLEN/8, x4, x1, x2)

inst_2533:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xb6db6db6db6db; valaddr_reg:x3; val_offset:7599*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7599*0 + 3*229*FLEN/8, x4, x1, x2)

inst_2534:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xccccccccccccc; valaddr_reg:x3; val_offset:7602*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7602*0 + 3*230*FLEN/8, x4, x1, x2)

inst_2535:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xdb6db6db6db6d; valaddr_reg:x3; val_offset:7605*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7605*0 + 3*231*FLEN/8, x4, x1, x2)

inst_2536:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xfffffffffffc0; valaddr_reg:x3; val_offset:7608*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7608*0 + 3*232*FLEN/8, x4, x1, x2)

inst_2537:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xfffffffffffe0; valaddr_reg:x3; val_offset:7611*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7611*0 + 3*233*FLEN/8, x4, x1, x2)

inst_2538:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xffffffffffff0; valaddr_reg:x3; val_offset:7614*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7614*0 + 3*234*FLEN/8, x4, x1, x2)

inst_2539:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xffffffffffff8; valaddr_reg:x3; val_offset:7617*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7617*0 + 3*235*FLEN/8, x4, x1, x2)

inst_2540:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xffffffffffffc; valaddr_reg:x3; val_offset:7620*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7620*0 + 3*236*FLEN/8, x4, x1, x2)

inst_2541:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0xffffffffffffe; valaddr_reg:x3; val_offset:7623*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7623*0 + 3*237*FLEN/8, x4, x1, x2)

inst_2542:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000000000; valaddr_reg:x3; val_offset:7626*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7626*0 + 3*238*FLEN/8, x4, x1, x2)

inst_2543:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000000001; valaddr_reg:x3; val_offset:7629*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7629*0 + 3*239*FLEN/8, x4, x1, x2)

inst_2544:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000000003; valaddr_reg:x3; val_offset:7632*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7632*0 + 3*240*FLEN/8, x4, x1, x2)

inst_2545:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000000007; valaddr_reg:x3; val_offset:7635*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7635*0 + 3*241*FLEN/8, x4, x1, x2)

inst_2546:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000000000f; valaddr_reg:x3; val_offset:7638*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7638*0 + 3*242*FLEN/8, x4, x1, x2)

inst_2547:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000000001f; valaddr_reg:x3; val_offset:7641*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7641*0 + 3*243*FLEN/8, x4, x1, x2)

inst_2548:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000000003f; valaddr_reg:x3; val_offset:7644*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7644*0 + 3*244*FLEN/8, x4, x1, x2)

inst_2549:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000000007f; valaddr_reg:x3; val_offset:7647*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7647*0 + 3*245*FLEN/8, x4, x1, x2)

inst_2550:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000000000ff; valaddr_reg:x3; val_offset:7650*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7650*0 + 3*246*FLEN/8, x4, x1, x2)

inst_2551:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000000001ff; valaddr_reg:x3; val_offset:7653*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7653*0 + 3*247*FLEN/8, x4, x1, x2)

inst_2552:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000000003ff; valaddr_reg:x3; val_offset:7656*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7656*0 + 3*248*FLEN/8, x4, x1, x2)

inst_2553:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000000007ff; valaddr_reg:x3; val_offset:7659*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7659*0 + 3*249*FLEN/8, x4, x1, x2)

inst_2554:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000000fff; valaddr_reg:x3; val_offset:7662*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7662*0 + 3*250*FLEN/8, x4, x1, x2)

inst_2555:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000001fff; valaddr_reg:x3; val_offset:7665*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7665*0 + 3*251*FLEN/8, x4, x1, x2)

inst_2556:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000003fff; valaddr_reg:x3; val_offset:7668*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7668*0 + 3*252*FLEN/8, x4, x1, x2)

inst_2557:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000007fff; valaddr_reg:x3; val_offset:7671*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7671*0 + 3*253*FLEN/8, x4, x1, x2)

inst_2558:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000000ffff; valaddr_reg:x3; val_offset:7674*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7674*0 + 3*254*FLEN/8, x4, x1, x2)

inst_2559:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000001ffff; valaddr_reg:x3; val_offset:7677*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7677*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_2560:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000003ffff; valaddr_reg:x3; val_offset:7680*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7680*0 + 3*256*FLEN/8, x4, x1, x2)

inst_2561:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000007ffff; valaddr_reg:x3; val_offset:7683*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7683*0 + 3*257*FLEN/8, x4, x1, x2)

inst_2562:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000000fffff; valaddr_reg:x3; val_offset:7686*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7686*0 + 3*258*FLEN/8, x4, x1, x2)

inst_2563:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000001fffff; valaddr_reg:x3; val_offset:7689*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7689*0 + 3*259*FLEN/8, x4, x1, x2)

inst_2564:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000003fffff; valaddr_reg:x3; val_offset:7692*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7692*0 + 3*260*FLEN/8, x4, x1, x2)

inst_2565:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000007fffff; valaddr_reg:x3; val_offset:7695*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7695*0 + 3*261*FLEN/8, x4, x1, x2)

inst_2566:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000000ffffff; valaddr_reg:x3; val_offset:7698*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7698*0 + 3*262*FLEN/8, x4, x1, x2)

inst_2567:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000001ffffff; valaddr_reg:x3; val_offset:7701*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7701*0 + 3*263*FLEN/8, x4, x1, x2)

inst_2568:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000003ffffff; valaddr_reg:x3; val_offset:7704*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7704*0 + 3*264*FLEN/8, x4, x1, x2)

inst_2569:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000007ffffff; valaddr_reg:x3; val_offset:7707*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7707*0 + 3*265*FLEN/8, x4, x1, x2)

inst_2570:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000000fffffff; valaddr_reg:x3; val_offset:7710*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7710*0 + 3*266*FLEN/8, x4, x1, x2)

inst_2571:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000001fffffff; valaddr_reg:x3; val_offset:7713*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7713*0 + 3*267*FLEN/8, x4, x1, x2)

inst_2572:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000003fffffff; valaddr_reg:x3; val_offset:7716*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7716*0 + 3*268*FLEN/8, x4, x1, x2)

inst_2573:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000007fffffff; valaddr_reg:x3; val_offset:7719*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7719*0 + 3*269*FLEN/8, x4, x1, x2)

inst_2574:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100000ffffffff; valaddr_reg:x3; val_offset:7722*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7722*0 + 3*270*FLEN/8, x4, x1, x2)

inst_2575:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100001ffffffff; valaddr_reg:x3; val_offset:7725*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7725*0 + 3*271*FLEN/8, x4, x1, x2)

inst_2576:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100003ffffffff; valaddr_reg:x3; val_offset:7728*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7728*0 + 3*272*FLEN/8, x4, x1, x2)

inst_2577:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100007ffffffff; valaddr_reg:x3; val_offset:7731*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7731*0 + 3*273*FLEN/8, x4, x1, x2)

inst_2578:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310000fffffffff; valaddr_reg:x3; val_offset:7734*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7734*0 + 3*274*FLEN/8, x4, x1, x2)

inst_2579:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310001fffffffff; valaddr_reg:x3; val_offset:7737*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7737*0 + 3*275*FLEN/8, x4, x1, x2)

inst_2580:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310003fffffffff; valaddr_reg:x3; val_offset:7740*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7740*0 + 3*276*FLEN/8, x4, x1, x2)

inst_2581:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310007fffffffff; valaddr_reg:x3; val_offset:7743*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7743*0 + 3*277*FLEN/8, x4, x1, x2)

inst_2582:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31000ffffffffff; valaddr_reg:x3; val_offset:7746*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7746*0 + 3*278*FLEN/8, x4, x1, x2)

inst_2583:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31001ffffffffff; valaddr_reg:x3; val_offset:7749*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7749*0 + 3*279*FLEN/8, x4, x1, x2)

inst_2584:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31003ffffffffff; valaddr_reg:x3; val_offset:7752*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7752*0 + 3*280*FLEN/8, x4, x1, x2)

inst_2585:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31007ffffffffff; valaddr_reg:x3; val_offset:7755*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7755*0 + 3*281*FLEN/8, x4, x1, x2)

inst_2586:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3100fffffffffff; valaddr_reg:x3; val_offset:7758*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7758*0 + 3*282*FLEN/8, x4, x1, x2)

inst_2587:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3101fffffffffff; valaddr_reg:x3; val_offset:7761*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7761*0 + 3*283*FLEN/8, x4, x1, x2)

inst_2588:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3103fffffffffff; valaddr_reg:x3; val_offset:7764*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7764*0 + 3*284*FLEN/8, x4, x1, x2)

inst_2589:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x3107fffffffffff; valaddr_reg:x3; val_offset:7767*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7767*0 + 3*285*FLEN/8, x4, x1, x2)

inst_2590:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x310ffffffffffff; valaddr_reg:x3; val_offset:7770*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7770*0 + 3*286*FLEN/8, x4, x1, x2)

inst_2591:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x311ffffffffffff; valaddr_reg:x3; val_offset:7773*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7773*0 + 3*287*FLEN/8, x4, x1, x2)

inst_2592:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x313ffffffffffff; valaddr_reg:x3; val_offset:7776*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7776*0 + 3*288*FLEN/8, x4, x1, x2)

inst_2593:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x317ffffffffffff; valaddr_reg:x3; val_offset:7779*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7779*0 + 3*289*FLEN/8, x4, x1, x2)

inst_2594:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x318000000000000; valaddr_reg:x3; val_offset:7782*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7782*0 + 3*290*FLEN/8, x4, x1, x2)

inst_2595:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31c000000000000; valaddr_reg:x3; val_offset:7785*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7785*0 + 3*291*FLEN/8, x4, x1, x2)

inst_2596:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31e000000000000; valaddr_reg:x3; val_offset:7788*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7788*0 + 3*292*FLEN/8, x4, x1, x2)

inst_2597:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31f000000000000; valaddr_reg:x3; val_offset:7791*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7791*0 + 3*293*FLEN/8, x4, x1, x2)

inst_2598:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31f800000000000; valaddr_reg:x3; val_offset:7794*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7794*0 + 3*294*FLEN/8, x4, x1, x2)

inst_2599:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fc00000000000; valaddr_reg:x3; val_offset:7797*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7797*0 + 3*295*FLEN/8, x4, x1, x2)

inst_2600:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fe00000000000; valaddr_reg:x3; val_offset:7800*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7800*0 + 3*296*FLEN/8, x4, x1, x2)

inst_2601:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ff00000000000; valaddr_reg:x3; val_offset:7803*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7803*0 + 3*297*FLEN/8, x4, x1, x2)

inst_2602:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ff80000000000; valaddr_reg:x3; val_offset:7806*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7806*0 + 3*298*FLEN/8, x4, x1, x2)

inst_2603:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffc0000000000; valaddr_reg:x3; val_offset:7809*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7809*0 + 3*299*FLEN/8, x4, x1, x2)

inst_2604:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffe0000000000; valaddr_reg:x3; val_offset:7812*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7812*0 + 3*300*FLEN/8, x4, x1, x2)

inst_2605:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fff0000000000; valaddr_reg:x3; val_offset:7815*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7815*0 + 3*301*FLEN/8, x4, x1, x2)

inst_2606:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fff8000000000; valaddr_reg:x3; val_offset:7818*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7818*0 + 3*302*FLEN/8, x4, x1, x2)

inst_2607:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffc000000000; valaddr_reg:x3; val_offset:7821*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7821*0 + 3*303*FLEN/8, x4, x1, x2)

inst_2608:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffe000000000; valaddr_reg:x3; val_offset:7824*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7824*0 + 3*304*FLEN/8, x4, x1, x2)

inst_2609:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffff000000000; valaddr_reg:x3; val_offset:7827*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7827*0 + 3*305*FLEN/8, x4, x1, x2)

inst_2610:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffff800000000; valaddr_reg:x3; val_offset:7830*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7830*0 + 3*306*FLEN/8, x4, x1, x2)

inst_2611:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffc00000000; valaddr_reg:x3; val_offset:7833*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7833*0 + 3*307*FLEN/8, x4, x1, x2)

inst_2612:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffe00000000; valaddr_reg:x3; val_offset:7836*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7836*0 + 3*308*FLEN/8, x4, x1, x2)

inst_2613:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffff00000000; valaddr_reg:x3; val_offset:7839*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7839*0 + 3*309*FLEN/8, x4, x1, x2)

inst_2614:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffff80000000; valaddr_reg:x3; val_offset:7842*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7842*0 + 3*310*FLEN/8, x4, x1, x2)

inst_2615:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffc0000000; valaddr_reg:x3; val_offset:7845*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7845*0 + 3*311*FLEN/8, x4, x1, x2)

inst_2616:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffe0000000; valaddr_reg:x3; val_offset:7848*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7848*0 + 3*312*FLEN/8, x4, x1, x2)

inst_2617:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffff0000000; valaddr_reg:x3; val_offset:7851*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7851*0 + 3*313*FLEN/8, x4, x1, x2)

inst_2618:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffff8000000; valaddr_reg:x3; val_offset:7854*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7854*0 + 3*314*FLEN/8, x4, x1, x2)

inst_2619:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffc000000; valaddr_reg:x3; val_offset:7857*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7857*0 + 3*315*FLEN/8, x4, x1, x2)

inst_2620:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffe000000; valaddr_reg:x3; val_offset:7860*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7860*0 + 3*316*FLEN/8, x4, x1, x2)

inst_2621:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffff000000; valaddr_reg:x3; val_offset:7863*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7863*0 + 3*317*FLEN/8, x4, x1, x2)

inst_2622:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffff800000; valaddr_reg:x3; val_offset:7866*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7866*0 + 3*318*FLEN/8, x4, x1, x2)

inst_2623:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffc00000; valaddr_reg:x3; val_offset:7869*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7869*0 + 3*319*FLEN/8, x4, x1, x2)

inst_2624:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffe00000; valaddr_reg:x3; val_offset:7872*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7872*0 + 3*320*FLEN/8, x4, x1, x2)

inst_2625:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffff00000; valaddr_reg:x3; val_offset:7875*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7875*0 + 3*321*FLEN/8, x4, x1, x2)

inst_2626:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffff80000; valaddr_reg:x3; val_offset:7878*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7878*0 + 3*322*FLEN/8, x4, x1, x2)

inst_2627:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffc0000; valaddr_reg:x3; val_offset:7881*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7881*0 + 3*323*FLEN/8, x4, x1, x2)

inst_2628:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffe0000; valaddr_reg:x3; val_offset:7884*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7884*0 + 3*324*FLEN/8, x4, x1, x2)

inst_2629:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffff0000; valaddr_reg:x3; val_offset:7887*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7887*0 + 3*325*FLEN/8, x4, x1, x2)

inst_2630:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffff8000; valaddr_reg:x3; val_offset:7890*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7890*0 + 3*326*FLEN/8, x4, x1, x2)

inst_2631:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffc000; valaddr_reg:x3; val_offset:7893*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7893*0 + 3*327*FLEN/8, x4, x1, x2)

inst_2632:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffe000; valaddr_reg:x3; val_offset:7896*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7896*0 + 3*328*FLEN/8, x4, x1, x2)

inst_2633:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffff000; valaddr_reg:x3; val_offset:7899*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7899*0 + 3*329*FLEN/8, x4, x1, x2)

inst_2634:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffff800; valaddr_reg:x3; val_offset:7902*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7902*0 + 3*330*FLEN/8, x4, x1, x2)

inst_2635:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffc00; valaddr_reg:x3; val_offset:7905*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7905*0 + 3*331*FLEN/8, x4, x1, x2)

inst_2636:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffe00; valaddr_reg:x3; val_offset:7908*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7908*0 + 3*332*FLEN/8, x4, x1, x2)

inst_2637:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffff00; valaddr_reg:x3; val_offset:7911*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7911*0 + 3*333*FLEN/8, x4, x1, x2)

inst_2638:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffff80; valaddr_reg:x3; val_offset:7914*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7914*0 + 3*334*FLEN/8, x4, x1, x2)

inst_2639:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffffc0; valaddr_reg:x3; val_offset:7917*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7917*0 + 3*335*FLEN/8, x4, x1, x2)

inst_2640:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffffe0; valaddr_reg:x3; val_offset:7920*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7920*0 + 3*336*FLEN/8, x4, x1, x2)

inst_2641:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffff0; valaddr_reg:x3; val_offset:7923*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7923*0 + 3*337*FLEN/8, x4, x1, x2)

inst_2642:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffff8; valaddr_reg:x3; val_offset:7926*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7926*0 + 3*338*FLEN/8, x4, x1, x2)

inst_2643:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffffc; valaddr_reg:x3; val_offset:7929*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7929*0 + 3*339*FLEN/8, x4, x1, x2)

inst_2644:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31ffffffffffffe; valaddr_reg:x3; val_offset:7932*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7932*0 + 3*340*FLEN/8, x4, x1, x2)

inst_2645:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xd5924ed9e889f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x031 and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5d5924ed9e889f; op2val:0x0;
op3val:0x31fffffffffffff; valaddr_reg:x3; val_offset:7935*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7935*0 + 3*341*FLEN/8, x4, x1, x2)

inst_2646:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:7938*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7938*0 + 3*342*FLEN/8, x4, x1, x2)

inst_2647:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:7941*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7941*0 + 3*343*FLEN/8, x4, x1, x2)

inst_2648:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:7944*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7944*0 + 3*344*FLEN/8, x4, x1, x2)

inst_2649:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf; valaddr_reg:x3; val_offset:7947*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7947*0 + 3*345*FLEN/8, x4, x1, x2)

inst_2650:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x1f; valaddr_reg:x3; val_offset:7950*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7950*0 + 3*346*FLEN/8, x4, x1, x2)

inst_2651:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x3f; valaddr_reg:x3; val_offset:7953*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7953*0 + 3*347*FLEN/8, x4, x1, x2)

inst_2652:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x3333333333333; valaddr_reg:x3; val_offset:7956*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7956*0 + 3*348*FLEN/8, x4, x1, x2)

inst_2653:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x4924924924924; valaddr_reg:x3; val_offset:7959*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7959*0 + 3*349*FLEN/8, x4, x1, x2)

inst_2654:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x6666666666666; valaddr_reg:x3; val_offset:7962*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7962*0 + 3*350*FLEN/8, x4, x1, x2)

inst_2655:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x6db6db6db6db6; valaddr_reg:x3; val_offset:7965*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7965*0 + 3*351*FLEN/8, x4, x1, x2)

inst_2656:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x7777777777777; valaddr_reg:x3; val_offset:7968*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7968*0 + 3*352*FLEN/8, x4, x1, x2)

inst_2657:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x8888888888888; valaddr_reg:x3; val_offset:7971*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7971*0 + 3*353*FLEN/8, x4, x1, x2)

inst_2658:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0x9999999999999; valaddr_reg:x3; val_offset:7974*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7974*0 + 3*354*FLEN/8, x4, x1, x2)

inst_2659:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xb6db6db6db6db; valaddr_reg:x3; val_offset:7977*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7977*0 + 3*355*FLEN/8, x4, x1, x2)

inst_2660:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xccccccccccccc; valaddr_reg:x3; val_offset:7980*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7980*0 + 3*356*FLEN/8, x4, x1, x2)

inst_2661:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xdb6db6db6db6d; valaddr_reg:x3; val_offset:7983*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7983*0 + 3*357*FLEN/8, x4, x1, x2)

inst_2662:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffc0; valaddr_reg:x3; val_offset:7986*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7986*0 + 3*358*FLEN/8, x4, x1, x2)

inst_2663:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffe0; valaddr_reg:x3; val_offset:7989*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7989*0 + 3*359*FLEN/8, x4, x1, x2)

inst_2664:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffff0; valaddr_reg:x3; val_offset:7992*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7992*0 + 3*360*FLEN/8, x4, x1, x2)

inst_2665:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffff8; valaddr_reg:x3; val_offset:7995*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7995*0 + 3*361*FLEN/8, x4, x1, x2)

inst_2666:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffffc; valaddr_reg:x3; val_offset:7998*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 7998*0 + 3*362*FLEN/8, x4, x1, x2)

inst_2667:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x000 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffffe; valaddr_reg:x3; val_offset:8001*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8001*0 + 3*363*FLEN/8, x4, x1, x2)

inst_2668:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000000000; valaddr_reg:x3; val_offset:8004*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8004*0 + 3*364*FLEN/8, x4, x1, x2)

inst_2669:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000000001; valaddr_reg:x3; val_offset:8007*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8007*0 + 3*365*FLEN/8, x4, x1, x2)

inst_2670:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000000003; valaddr_reg:x3; val_offset:8010*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8010*0 + 3*366*FLEN/8, x4, x1, x2)

inst_2671:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000000007; valaddr_reg:x3; val_offset:8013*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8013*0 + 3*367*FLEN/8, x4, x1, x2)

inst_2672:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000000000f; valaddr_reg:x3; val_offset:8016*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8016*0 + 3*368*FLEN/8, x4, x1, x2)

inst_2673:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000000001f; valaddr_reg:x3; val_offset:8019*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8019*0 + 3*369*FLEN/8, x4, x1, x2)

inst_2674:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000000003f; valaddr_reg:x3; val_offset:8022*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8022*0 + 3*370*FLEN/8, x4, x1, x2)

inst_2675:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000000007f; valaddr_reg:x3; val_offset:8025*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8025*0 + 3*371*FLEN/8, x4, x1, x2)

inst_2676:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000000000ff; valaddr_reg:x3; val_offset:8028*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8028*0 + 3*372*FLEN/8, x4, x1, x2)

inst_2677:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000000001ff; valaddr_reg:x3; val_offset:8031*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8031*0 + 3*373*FLEN/8, x4, x1, x2)

inst_2678:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000000003ff; valaddr_reg:x3; val_offset:8034*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8034*0 + 3*374*FLEN/8, x4, x1, x2)

inst_2679:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000000007ff; valaddr_reg:x3; val_offset:8037*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8037*0 + 3*375*FLEN/8, x4, x1, x2)

inst_2680:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000000fff; valaddr_reg:x3; val_offset:8040*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8040*0 + 3*376*FLEN/8, x4, x1, x2)

inst_2681:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000001fff; valaddr_reg:x3; val_offset:8043*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8043*0 + 3*377*FLEN/8, x4, x1, x2)

inst_2682:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000003fff; valaddr_reg:x3; val_offset:8046*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8046*0 + 3*378*FLEN/8, x4, x1, x2)

inst_2683:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000007fff; valaddr_reg:x3; val_offset:8049*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8049*0 + 3*379*FLEN/8, x4, x1, x2)

inst_2684:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000000ffff; valaddr_reg:x3; val_offset:8052*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8052*0 + 3*380*FLEN/8, x4, x1, x2)

inst_2685:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000001ffff; valaddr_reg:x3; val_offset:8055*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8055*0 + 3*381*FLEN/8, x4, x1, x2)

inst_2686:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000003ffff; valaddr_reg:x3; val_offset:8058*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8058*0 + 3*382*FLEN/8, x4, x1, x2)

inst_2687:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000007ffff; valaddr_reg:x3; val_offset:8061*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8061*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_2688:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000000fffff; valaddr_reg:x3; val_offset:8064*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8064*0 + 3*384*FLEN/8, x4, x1, x2)

inst_2689:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000001fffff; valaddr_reg:x3; val_offset:8067*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8067*0 + 3*385*FLEN/8, x4, x1, x2)

inst_2690:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000003fffff; valaddr_reg:x3; val_offset:8070*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8070*0 + 3*386*FLEN/8, x4, x1, x2)

inst_2691:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000007fffff; valaddr_reg:x3; val_offset:8073*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8073*0 + 3*387*FLEN/8, x4, x1, x2)

inst_2692:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000000ffffff; valaddr_reg:x3; val_offset:8076*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8076*0 + 3*388*FLEN/8, x4, x1, x2)

inst_2693:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000001ffffff; valaddr_reg:x3; val_offset:8079*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8079*0 + 3*389*FLEN/8, x4, x1, x2)

inst_2694:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000003ffffff; valaddr_reg:x3; val_offset:8082*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8082*0 + 3*390*FLEN/8, x4, x1, x2)

inst_2695:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000007ffffff; valaddr_reg:x3; val_offset:8085*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8085*0 + 3*391*FLEN/8, x4, x1, x2)

inst_2696:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000000fffffff; valaddr_reg:x3; val_offset:8088*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8088*0 + 3*392*FLEN/8, x4, x1, x2)

inst_2697:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000001fffffff; valaddr_reg:x3; val_offset:8091*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8091*0 + 3*393*FLEN/8, x4, x1, x2)

inst_2698:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000003fffffff; valaddr_reg:x3; val_offset:8094*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8094*0 + 3*394*FLEN/8, x4, x1, x2)

inst_2699:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000007fffffff; valaddr_reg:x3; val_offset:8097*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8097*0 + 3*395*FLEN/8, x4, x1, x2)

inst_2700:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00000ffffffff; valaddr_reg:x3; val_offset:8100*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8100*0 + 3*396*FLEN/8, x4, x1, x2)

inst_2701:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00001ffffffff; valaddr_reg:x3; val_offset:8103*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8103*0 + 3*397*FLEN/8, x4, x1, x2)

inst_2702:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00003ffffffff; valaddr_reg:x3; val_offset:8106*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8106*0 + 3*398*FLEN/8, x4, x1, x2)

inst_2703:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00007ffffffff; valaddr_reg:x3; val_offset:8109*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8109*0 + 3*399*FLEN/8, x4, x1, x2)

inst_2704:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0000fffffffff; valaddr_reg:x3; val_offset:8112*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8112*0 + 3*400*FLEN/8, x4, x1, x2)

inst_2705:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0001fffffffff; valaddr_reg:x3; val_offset:8115*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8115*0 + 3*401*FLEN/8, x4, x1, x2)

inst_2706:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0003fffffffff; valaddr_reg:x3; val_offset:8118*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8118*0 + 3*402*FLEN/8, x4, x1, x2)

inst_2707:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0007fffffffff; valaddr_reg:x3; val_offset:8121*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8121*0 + 3*403*FLEN/8, x4, x1, x2)

inst_2708:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf000ffffffffff; valaddr_reg:x3; val_offset:8124*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8124*0 + 3*404*FLEN/8, x4, x1, x2)

inst_2709:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf001ffffffffff; valaddr_reg:x3; val_offset:8127*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8127*0 + 3*405*FLEN/8, x4, x1, x2)

inst_2710:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf003ffffffffff; valaddr_reg:x3; val_offset:8130*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8130*0 + 3*406*FLEN/8, x4, x1, x2)

inst_2711:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf007ffffffffff; valaddr_reg:x3; val_offset:8133*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8133*0 + 3*407*FLEN/8, x4, x1, x2)

inst_2712:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf00fffffffffff; valaddr_reg:x3; val_offset:8136*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8136*0 + 3*408*FLEN/8, x4, x1, x2)

inst_2713:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf01fffffffffff; valaddr_reg:x3; val_offset:8139*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8139*0 + 3*409*FLEN/8, x4, x1, x2)

inst_2714:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf03fffffffffff; valaddr_reg:x3; val_offset:8142*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8142*0 + 3*410*FLEN/8, x4, x1, x2)

inst_2715:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf07fffffffffff; valaddr_reg:x3; val_offset:8145*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8145*0 + 3*411*FLEN/8, x4, x1, x2)

inst_2716:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf0ffffffffffff; valaddr_reg:x3; val_offset:8148*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8148*0 + 3*412*FLEN/8, x4, x1, x2)

inst_2717:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf1ffffffffffff; valaddr_reg:x3; val_offset:8151*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8151*0 + 3*413*FLEN/8, x4, x1, x2)

inst_2718:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf3ffffffffffff; valaddr_reg:x3; val_offset:8154*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8154*0 + 3*414*FLEN/8, x4, x1, x2)

inst_2719:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf7ffffffffffff; valaddr_reg:x3; val_offset:8157*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8157*0 + 3*415*FLEN/8, x4, x1, x2)

inst_2720:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xf8000000000000; valaddr_reg:x3; val_offset:8160*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8160*0 + 3*416*FLEN/8, x4, x1, x2)

inst_2721:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfc000000000000; valaddr_reg:x3; val_offset:8163*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8163*0 + 3*417*FLEN/8, x4, x1, x2)

inst_2722:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfe000000000000; valaddr_reg:x3; val_offset:8166*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8166*0 + 3*418*FLEN/8, x4, x1, x2)

inst_2723:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xff000000000000; valaddr_reg:x3; val_offset:8169*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8169*0 + 3*419*FLEN/8, x4, x1, x2)

inst_2724:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xff800000000000; valaddr_reg:x3; val_offset:8172*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8172*0 + 3*420*FLEN/8, x4, x1, x2)

inst_2725:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffc00000000000; valaddr_reg:x3; val_offset:8175*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8175*0 + 3*421*FLEN/8, x4, x1, x2)

inst_2726:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffe00000000000; valaddr_reg:x3; val_offset:8178*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8178*0 + 3*422*FLEN/8, x4, x1, x2)

inst_2727:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfff00000000000; valaddr_reg:x3; val_offset:8181*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8181*0 + 3*423*FLEN/8, x4, x1, x2)

inst_2728:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfff80000000000; valaddr_reg:x3; val_offset:8184*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8184*0 + 3*424*FLEN/8, x4, x1, x2)

inst_2729:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffc0000000000; valaddr_reg:x3; val_offset:8187*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8187*0 + 3*425*FLEN/8, x4, x1, x2)

inst_2730:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffe0000000000; valaddr_reg:x3; val_offset:8190*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8190*0 + 3*426*FLEN/8, x4, x1, x2)

inst_2731:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffff0000000000; valaddr_reg:x3; val_offset:8193*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8193*0 + 3*427*FLEN/8, x4, x1, x2)

inst_2732:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffff8000000000; valaddr_reg:x3; val_offset:8196*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8196*0 + 3*428*FLEN/8, x4, x1, x2)

inst_2733:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffc000000000; valaddr_reg:x3; val_offset:8199*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8199*0 + 3*429*FLEN/8, x4, x1, x2)

inst_2734:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffe000000000; valaddr_reg:x3; val_offset:8202*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8202*0 + 3*430*FLEN/8, x4, x1, x2)

inst_2735:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffff000000000; valaddr_reg:x3; val_offset:8205*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8205*0 + 3*431*FLEN/8, x4, x1, x2)

inst_2736:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffff800000000; valaddr_reg:x3; val_offset:8208*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8208*0 + 3*432*FLEN/8, x4, x1, x2)

inst_2737:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffc00000000; valaddr_reg:x3; val_offset:8211*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8211*0 + 3*433*FLEN/8, x4, x1, x2)

inst_2738:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffe00000000; valaddr_reg:x3; val_offset:8214*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8214*0 + 3*434*FLEN/8, x4, x1, x2)

inst_2739:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffff00000000; valaddr_reg:x3; val_offset:8217*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8217*0 + 3*435*FLEN/8, x4, x1, x2)

inst_2740:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffff80000000; valaddr_reg:x3; val_offset:8220*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8220*0 + 3*436*FLEN/8, x4, x1, x2)

inst_2741:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffc0000000; valaddr_reg:x3; val_offset:8223*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8223*0 + 3*437*FLEN/8, x4, x1, x2)

inst_2742:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffe0000000; valaddr_reg:x3; val_offset:8226*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8226*0 + 3*438*FLEN/8, x4, x1, x2)

inst_2743:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffff0000000; valaddr_reg:x3; val_offset:8229*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8229*0 + 3*439*FLEN/8, x4, x1, x2)

inst_2744:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffff8000000; valaddr_reg:x3; val_offset:8232*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8232*0 + 3*440*FLEN/8, x4, x1, x2)

inst_2745:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffc000000; valaddr_reg:x3; val_offset:8235*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8235*0 + 3*441*FLEN/8, x4, x1, x2)

inst_2746:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffe000000; valaddr_reg:x3; val_offset:8238*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8238*0 + 3*442*FLEN/8, x4, x1, x2)

inst_2747:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffff000000; valaddr_reg:x3; val_offset:8241*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8241*0 + 3*443*FLEN/8, x4, x1, x2)

inst_2748:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffff800000; valaddr_reg:x3; val_offset:8244*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8244*0 + 3*444*FLEN/8, x4, x1, x2)

inst_2749:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffc00000; valaddr_reg:x3; val_offset:8247*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8247*0 + 3*445*FLEN/8, x4, x1, x2)

inst_2750:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffe00000; valaddr_reg:x3; val_offset:8250*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8250*0 + 3*446*FLEN/8, x4, x1, x2)

inst_2751:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffff00000; valaddr_reg:x3; val_offset:8253*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8253*0 + 3*447*FLEN/8, x4, x1, x2)

inst_2752:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffff80000; valaddr_reg:x3; val_offset:8256*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8256*0 + 3*448*FLEN/8, x4, x1, x2)

inst_2753:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffc0000; valaddr_reg:x3; val_offset:8259*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8259*0 + 3*449*FLEN/8, x4, x1, x2)

inst_2754:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffe0000; valaddr_reg:x3; val_offset:8262*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8262*0 + 3*450*FLEN/8, x4, x1, x2)

inst_2755:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffff0000; valaddr_reg:x3; val_offset:8265*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8265*0 + 3*451*FLEN/8, x4, x1, x2)

inst_2756:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffff8000; valaddr_reg:x3; val_offset:8268*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8268*0 + 3*452*FLEN/8, x4, x1, x2)

inst_2757:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffc000; valaddr_reg:x3; val_offset:8271*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8271*0 + 3*453*FLEN/8, x4, x1, x2)

inst_2758:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffe000; valaddr_reg:x3; val_offset:8274*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8274*0 + 3*454*FLEN/8, x4, x1, x2)

inst_2759:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffff000; valaddr_reg:x3; val_offset:8277*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8277*0 + 3*455*FLEN/8, x4, x1, x2)

inst_2760:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffff800; valaddr_reg:x3; val_offset:8280*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8280*0 + 3*456*FLEN/8, x4, x1, x2)

inst_2761:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffc00; valaddr_reg:x3; val_offset:8283*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8283*0 + 3*457*FLEN/8, x4, x1, x2)

inst_2762:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffe00; valaddr_reg:x3; val_offset:8286*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8286*0 + 3*458*FLEN/8, x4, x1, x2)

inst_2763:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffff00; valaddr_reg:x3; val_offset:8289*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8289*0 + 3*459*FLEN/8, x4, x1, x2)

inst_2764:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffff80; valaddr_reg:x3; val_offset:8292*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8292*0 + 3*460*FLEN/8, x4, x1, x2)

inst_2765:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffffc0; valaddr_reg:x3; val_offset:8295*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8295*0 + 3*461*FLEN/8, x4, x1, x2)

inst_2766:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffffe0; valaddr_reg:x3; val_offset:8298*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8298*0 + 3*462*FLEN/8, x4, x1, x2)

inst_2767:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffff0; valaddr_reg:x3; val_offset:8301*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8301*0 + 3*463*FLEN/8, x4, x1, x2)

inst_2768:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffff8; valaddr_reg:x3; val_offset:8304*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8304*0 + 3*464*FLEN/8, x4, x1, x2)

inst_2769:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffffc; valaddr_reg:x3; val_offset:8307*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8307*0 + 3*465*FLEN/8, x4, x1, x2)

inst_2770:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xfffffffffffffe; valaddr_reg:x3; val_offset:8310*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8310*0 + 3*466*FLEN/8, x4, x1, x2)

inst_2771:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xe16e22adaca1f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000000000 and fs3 == 0 and fe3 == 0x00f and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5e16e22adaca1f; op2val:0x0;
op3val:0xffffffffffffff; valaddr_reg:x3; val_offset:8313*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8313*0 + 3*467*FLEN/8, x4, x1, x2)

inst_2772:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8000000000000001; valaddr_reg:x3; val_offset:8316*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8316*0 + 3*468*FLEN/8, x4, x1, x2)

inst_2773:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8000000000000003; valaddr_reg:x3; val_offset:8319*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8319*0 + 3*469*FLEN/8, x4, x1, x2)

inst_2774:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8000000000000007; valaddr_reg:x3; val_offset:8322*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8322*0 + 3*470*FLEN/8, x4, x1, x2)

inst_2775:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800000000000000f; valaddr_reg:x3; val_offset:8325*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8325*0 + 3*471*FLEN/8, x4, x1, x2)

inst_2776:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800000000000001f; valaddr_reg:x3; val_offset:8328*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8328*0 + 3*472*FLEN/8, x4, x1, x2)

inst_2777:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800000000000003f; valaddr_reg:x3; val_offset:8331*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8331*0 + 3*473*FLEN/8, x4, x1, x2)

inst_2778:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8003333333333333; valaddr_reg:x3; val_offset:8334*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8334*0 + 3*474*FLEN/8, x4, x1, x2)

inst_2779:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8004924924924924; valaddr_reg:x3; val_offset:8337*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8337*0 + 3*475*FLEN/8, x4, x1, x2)

inst_2780:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8006666666666666; valaddr_reg:x3; val_offset:8340*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8340*0 + 3*476*FLEN/8, x4, x1, x2)

inst_2781:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8006db6db6db6db6; valaddr_reg:x3; val_offset:8343*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8343*0 + 3*477*FLEN/8, x4, x1, x2)

inst_2782:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8007777777777777; valaddr_reg:x3; val_offset:8346*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8346*0 + 3*478*FLEN/8, x4, x1, x2)

inst_2783:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8008888888888888; valaddr_reg:x3; val_offset:8349*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8349*0 + 3*479*FLEN/8, x4, x1, x2)

inst_2784:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8009999999999999; valaddr_reg:x3; val_offset:8352*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8352*0 + 3*480*FLEN/8, x4, x1, x2)

inst_2785:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800b6db6db6db6db; valaddr_reg:x3; val_offset:8355*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8355*0 + 3*481*FLEN/8, x4, x1, x2)

inst_2786:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800ccccccccccccc; valaddr_reg:x3; val_offset:8358*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8358*0 + 3*482*FLEN/8, x4, x1, x2)

inst_2787:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800db6db6db6db6d; valaddr_reg:x3; val_offset:8361*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8361*0 + 3*483*FLEN/8, x4, x1, x2)

inst_2788:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800fffffffffffc0; valaddr_reg:x3; val_offset:8364*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8364*0 + 3*484*FLEN/8, x4, x1, x2)

inst_2789:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800fffffffffffe0; valaddr_reg:x3; val_offset:8367*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8367*0 + 3*485*FLEN/8, x4, x1, x2)

inst_2790:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800ffffffffffff0; valaddr_reg:x3; val_offset:8370*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8370*0 + 3*486*FLEN/8, x4, x1, x2)

inst_2791:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800ffffffffffff8; valaddr_reg:x3; val_offset:8373*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8373*0 + 3*487*FLEN/8, x4, x1, x2)

inst_2792:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800ffffffffffffc; valaddr_reg:x3; val_offset:8376*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8376*0 + 3*488*FLEN/8, x4, x1, x2)

inst_2793:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x800ffffffffffffe; valaddr_reg:x3; val_offset:8379*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8379*0 + 3*489*FLEN/8, x4, x1, x2)

inst_2794:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000000000; valaddr_reg:x3; val_offset:8382*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8382*0 + 3*490*FLEN/8, x4, x1, x2)

inst_2795:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000000001; valaddr_reg:x3; val_offset:8385*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8385*0 + 3*491*FLEN/8, x4, x1, x2)

inst_2796:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000000003; valaddr_reg:x3; val_offset:8388*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8388*0 + 3*492*FLEN/8, x4, x1, x2)

inst_2797:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000000007; valaddr_reg:x3; val_offset:8391*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8391*0 + 3*493*FLEN/8, x4, x1, x2)

inst_2798:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000000000f; valaddr_reg:x3; val_offset:8394*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8394*0 + 3*494*FLEN/8, x4, x1, x2)

inst_2799:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000000001f; valaddr_reg:x3; val_offset:8397*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8397*0 + 3*495*FLEN/8, x4, x1, x2)

inst_2800:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000000003f; valaddr_reg:x3; val_offset:8400*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8400*0 + 3*496*FLEN/8, x4, x1, x2)

inst_2801:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000000007f; valaddr_reg:x3; val_offset:8403*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8403*0 + 3*497*FLEN/8, x4, x1, x2)

inst_2802:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000000000ff; valaddr_reg:x3; val_offset:8406*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8406*0 + 3*498*FLEN/8, x4, x1, x2)

inst_2803:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000000001ff; valaddr_reg:x3; val_offset:8409*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8409*0 + 3*499*FLEN/8, x4, x1, x2)

inst_2804:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000000003ff; valaddr_reg:x3; val_offset:8412*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8412*0 + 3*500*FLEN/8, x4, x1, x2)

inst_2805:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000000007ff; valaddr_reg:x3; val_offset:8415*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8415*0 + 3*501*FLEN/8, x4, x1, x2)

inst_2806:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000000fff; valaddr_reg:x3; val_offset:8418*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8418*0 + 3*502*FLEN/8, x4, x1, x2)

inst_2807:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000001fff; valaddr_reg:x3; val_offset:8421*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8421*0 + 3*503*FLEN/8, x4, x1, x2)

inst_2808:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000003fff; valaddr_reg:x3; val_offset:8424*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8424*0 + 3*504*FLEN/8, x4, x1, x2)

inst_2809:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000007fff; valaddr_reg:x3; val_offset:8427*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8427*0 + 3*505*FLEN/8, x4, x1, x2)

inst_2810:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000000ffff; valaddr_reg:x3; val_offset:8430*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8430*0 + 3*506*FLEN/8, x4, x1, x2)

inst_2811:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000001ffff; valaddr_reg:x3; val_offset:8433*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8433*0 + 3*507*FLEN/8, x4, x1, x2)

inst_2812:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000003ffff; valaddr_reg:x3; val_offset:8436*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8436*0 + 3*508*FLEN/8, x4, x1, x2)

inst_2813:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000007ffff; valaddr_reg:x3; val_offset:8439*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8439*0 + 3*509*FLEN/8, x4, x1, x2)

inst_2814:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000000fffff; valaddr_reg:x3; val_offset:8442*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8442*0 + 3*510*FLEN/8, x4, x1, x2)

inst_2815:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000001fffff; valaddr_reg:x3; val_offset:8445*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8445*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_2816:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000003fffff; valaddr_reg:x3; val_offset:8448*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8448*0 + 3*512*FLEN/8, x4, x1, x2)

inst_2817:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000007fffff; valaddr_reg:x3; val_offset:8451*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8451*0 + 3*513*FLEN/8, x4, x1, x2)

inst_2818:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000000ffffff; valaddr_reg:x3; val_offset:8454*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8454*0 + 3*514*FLEN/8, x4, x1, x2)

inst_2819:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000001ffffff; valaddr_reg:x3; val_offset:8457*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8457*0 + 3*515*FLEN/8, x4, x1, x2)

inst_2820:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000003ffffff; valaddr_reg:x3; val_offset:8460*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8460*0 + 3*516*FLEN/8, x4, x1, x2)

inst_2821:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000007ffffff; valaddr_reg:x3; val_offset:8463*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8463*0 + 3*517*FLEN/8, x4, x1, x2)

inst_2822:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000000fffffff; valaddr_reg:x3; val_offset:8466*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8466*0 + 3*518*FLEN/8, x4, x1, x2)

inst_2823:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000001fffffff; valaddr_reg:x3; val_offset:8469*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8469*0 + 3*519*FLEN/8, x4, x1, x2)

inst_2824:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000003fffffff; valaddr_reg:x3; val_offset:8472*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8472*0 + 3*520*FLEN/8, x4, x1, x2)

inst_2825:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000007fffffff; valaddr_reg:x3; val_offset:8475*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8475*0 + 3*521*FLEN/8, x4, x1, x2)

inst_2826:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800000ffffffff; valaddr_reg:x3; val_offset:8478*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8478*0 + 3*522*FLEN/8, x4, x1, x2)

inst_2827:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800001ffffffff; valaddr_reg:x3; val_offset:8481*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8481*0 + 3*523*FLEN/8, x4, x1, x2)

inst_2828:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800003ffffffff; valaddr_reg:x3; val_offset:8484*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8484*0 + 3*524*FLEN/8, x4, x1, x2)

inst_2829:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800007ffffffff; valaddr_reg:x3; val_offset:8487*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8487*0 + 3*525*FLEN/8, x4, x1, x2)

inst_2830:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280000fffffffff; valaddr_reg:x3; val_offset:8490*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8490*0 + 3*526*FLEN/8, x4, x1, x2)

inst_2831:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280001fffffffff; valaddr_reg:x3; val_offset:8493*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8493*0 + 3*527*FLEN/8, x4, x1, x2)

inst_2832:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280003fffffffff; valaddr_reg:x3; val_offset:8496*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8496*0 + 3*528*FLEN/8, x4, x1, x2)

inst_2833:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280007fffffffff; valaddr_reg:x3; val_offset:8499*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8499*0 + 3*529*FLEN/8, x4, x1, x2)

inst_2834:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828000ffffffffff; valaddr_reg:x3; val_offset:8502*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8502*0 + 3*530*FLEN/8, x4, x1, x2)

inst_2835:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828001ffffffffff; valaddr_reg:x3; val_offset:8505*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8505*0 + 3*531*FLEN/8, x4, x1, x2)

inst_2836:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828003ffffffffff; valaddr_reg:x3; val_offset:8508*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8508*0 + 3*532*FLEN/8, x4, x1, x2)

inst_2837:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828007ffffffffff; valaddr_reg:x3; val_offset:8511*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8511*0 + 3*533*FLEN/8, x4, x1, x2)

inst_2838:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82800fffffffffff; valaddr_reg:x3; val_offset:8514*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8514*0 + 3*534*FLEN/8, x4, x1, x2)

inst_2839:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82801fffffffffff; valaddr_reg:x3; val_offset:8517*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8517*0 + 3*535*FLEN/8, x4, x1, x2)

inst_2840:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82803fffffffffff; valaddr_reg:x3; val_offset:8520*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8520*0 + 3*536*FLEN/8, x4, x1, x2)

inst_2841:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x82807fffffffffff; valaddr_reg:x3; val_offset:8523*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8523*0 + 3*537*FLEN/8, x4, x1, x2)

inst_2842:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8280ffffffffffff; valaddr_reg:x3; val_offset:8526*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8526*0 + 3*538*FLEN/8, x4, x1, x2)

inst_2843:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8281ffffffffffff; valaddr_reg:x3; val_offset:8529*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8529*0 + 3*539*FLEN/8, x4, x1, x2)

inst_2844:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8283ffffffffffff; valaddr_reg:x3; val_offset:8532*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8532*0 + 3*540*FLEN/8, x4, x1, x2)

inst_2845:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8287ffffffffffff; valaddr_reg:x3; val_offset:8535*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8535*0 + 3*541*FLEN/8, x4, x1, x2)

inst_2846:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x8288000000000000; valaddr_reg:x3; val_offset:8538*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8538*0 + 3*542*FLEN/8, x4, x1, x2)

inst_2847:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828c000000000000; valaddr_reg:x3; val_offset:8541*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8541*0 + 3*543*FLEN/8, x4, x1, x2)

inst_2848:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828e000000000000; valaddr_reg:x3; val_offset:8544*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8544*0 + 3*544*FLEN/8, x4, x1, x2)

inst_2849:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828f000000000000; valaddr_reg:x3; val_offset:8547*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8547*0 + 3*545*FLEN/8, x4, x1, x2)

inst_2850:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828f800000000000; valaddr_reg:x3; val_offset:8550*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8550*0 + 3*546*FLEN/8, x4, x1, x2)

inst_2851:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fc00000000000; valaddr_reg:x3; val_offset:8553*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8553*0 + 3*547*FLEN/8, x4, x1, x2)

inst_2852:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fe00000000000; valaddr_reg:x3; val_offset:8556*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8556*0 + 3*548*FLEN/8, x4, x1, x2)

inst_2853:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ff00000000000; valaddr_reg:x3; val_offset:8559*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8559*0 + 3*549*FLEN/8, x4, x1, x2)

inst_2854:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ff80000000000; valaddr_reg:x3; val_offset:8562*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8562*0 + 3*550*FLEN/8, x4, x1, x2)

inst_2855:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffc0000000000; valaddr_reg:x3; val_offset:8565*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8565*0 + 3*551*FLEN/8, x4, x1, x2)

inst_2856:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffe0000000000; valaddr_reg:x3; val_offset:8568*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8568*0 + 3*552*FLEN/8, x4, x1, x2)

inst_2857:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fff0000000000; valaddr_reg:x3; val_offset:8571*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8571*0 + 3*553*FLEN/8, x4, x1, x2)

inst_2858:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fff8000000000; valaddr_reg:x3; val_offset:8574*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8574*0 + 3*554*FLEN/8, x4, x1, x2)

inst_2859:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffc000000000; valaddr_reg:x3; val_offset:8577*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8577*0 + 3*555*FLEN/8, x4, x1, x2)

inst_2860:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffe000000000; valaddr_reg:x3; val_offset:8580*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8580*0 + 3*556*FLEN/8, x4, x1, x2)

inst_2861:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffff000000000; valaddr_reg:x3; val_offset:8583*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8583*0 + 3*557*FLEN/8, x4, x1, x2)

inst_2862:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffff800000000; valaddr_reg:x3; val_offset:8586*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8586*0 + 3*558*FLEN/8, x4, x1, x2)

inst_2863:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffc00000000; valaddr_reg:x3; val_offset:8589*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8589*0 + 3*559*FLEN/8, x4, x1, x2)

inst_2864:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffe00000000; valaddr_reg:x3; val_offset:8592*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8592*0 + 3*560*FLEN/8, x4, x1, x2)

inst_2865:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffff00000000; valaddr_reg:x3; val_offset:8595*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8595*0 + 3*561*FLEN/8, x4, x1, x2)

inst_2866:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffff80000000; valaddr_reg:x3; val_offset:8598*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8598*0 + 3*562*FLEN/8, x4, x1, x2)

inst_2867:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffc0000000; valaddr_reg:x3; val_offset:8601*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8601*0 + 3*563*FLEN/8, x4, x1, x2)

inst_2868:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffe0000000; valaddr_reg:x3; val_offset:8604*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8604*0 + 3*564*FLEN/8, x4, x1, x2)

inst_2869:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffff0000000; valaddr_reg:x3; val_offset:8607*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8607*0 + 3*565*FLEN/8, x4, x1, x2)

inst_2870:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffff8000000; valaddr_reg:x3; val_offset:8610*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8610*0 + 3*566*FLEN/8, x4, x1, x2)

inst_2871:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffc000000; valaddr_reg:x3; val_offset:8613*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8613*0 + 3*567*FLEN/8, x4, x1, x2)

inst_2872:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffe000000; valaddr_reg:x3; val_offset:8616*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8616*0 + 3*568*FLEN/8, x4, x1, x2)

inst_2873:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffff000000; valaddr_reg:x3; val_offset:8619*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8619*0 + 3*569*FLEN/8, x4, x1, x2)

inst_2874:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffff800000; valaddr_reg:x3; val_offset:8622*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8622*0 + 3*570*FLEN/8, x4, x1, x2)

inst_2875:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffc00000; valaddr_reg:x3; val_offset:8625*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8625*0 + 3*571*FLEN/8, x4, x1, x2)

inst_2876:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffe00000; valaddr_reg:x3; val_offset:8628*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8628*0 + 3*572*FLEN/8, x4, x1, x2)

inst_2877:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffff00000; valaddr_reg:x3; val_offset:8631*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8631*0 + 3*573*FLEN/8, x4, x1, x2)

inst_2878:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffff80000; valaddr_reg:x3; val_offset:8634*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8634*0 + 3*574*FLEN/8, x4, x1, x2)

inst_2879:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffc0000; valaddr_reg:x3; val_offset:8637*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8637*0 + 3*575*FLEN/8, x4, x1, x2)

inst_2880:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffe0000; valaddr_reg:x3; val_offset:8640*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8640*0 + 3*576*FLEN/8, x4, x1, x2)

inst_2881:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffff0000; valaddr_reg:x3; val_offset:8643*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8643*0 + 3*577*FLEN/8, x4, x1, x2)

inst_2882:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffff8000; valaddr_reg:x3; val_offset:8646*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8646*0 + 3*578*FLEN/8, x4, x1, x2)

inst_2883:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffc000; valaddr_reg:x3; val_offset:8649*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8649*0 + 3*579*FLEN/8, x4, x1, x2)

inst_2884:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffe000; valaddr_reg:x3; val_offset:8652*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8652*0 + 3*580*FLEN/8, x4, x1, x2)

inst_2885:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffff000; valaddr_reg:x3; val_offset:8655*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8655*0 + 3*581*FLEN/8, x4, x1, x2)

inst_2886:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffff800; valaddr_reg:x3; val_offset:8658*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8658*0 + 3*582*FLEN/8, x4, x1, x2)

inst_2887:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffc00; valaddr_reg:x3; val_offset:8661*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8661*0 + 3*583*FLEN/8, x4, x1, x2)

inst_2888:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffe00; valaddr_reg:x3; val_offset:8664*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8664*0 + 3*584*FLEN/8, x4, x1, x2)

inst_2889:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffff00; valaddr_reg:x3; val_offset:8667*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8667*0 + 3*585*FLEN/8, x4, x1, x2)

inst_2890:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffff80; valaddr_reg:x3; val_offset:8670*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8670*0 + 3*586*FLEN/8, x4, x1, x2)

inst_2891:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffffc0; valaddr_reg:x3; val_offset:8673*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8673*0 + 3*587*FLEN/8, x4, x1, x2)

inst_2892:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffffe0; valaddr_reg:x3; val_offset:8676*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8676*0 + 3*588*FLEN/8, x4, x1, x2)

inst_2893:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffff0; valaddr_reg:x3; val_offset:8679*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8679*0 + 3*589*FLEN/8, x4, x1, x2)

inst_2894:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffff8; valaddr_reg:x3; val_offset:8682*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8682*0 + 3*590*FLEN/8, x4, x1, x2)

inst_2895:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffffc; valaddr_reg:x3; val_offset:8685*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8685*0 + 3*591*FLEN/8, x4, x1, x2)

inst_2896:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828ffffffffffffe; valaddr_reg:x3; val_offset:8688*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8688*0 + 3*592*FLEN/8, x4, x1, x2)

inst_2897:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xecf3eebd0649f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x028 and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5ecf3eebd0649f; op2val:0x8000;
op3val:0x828fffffffffffff; valaddr_reg:x3; val_offset:8691*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8691*0 + 3*593*FLEN/8, x4, x1, x2)

inst_2898:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8000000000000001; valaddr_reg:x3; val_offset:8694*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8694*0 + 3*594*FLEN/8, x4, x1, x2)

inst_2899:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8000000000000003; valaddr_reg:x3; val_offset:8697*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8697*0 + 3*595*FLEN/8, x4, x1, x2)

inst_2900:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8000000000000007; valaddr_reg:x3; val_offset:8700*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8700*0 + 3*596*FLEN/8, x4, x1, x2)

inst_2901:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800000000000000f; valaddr_reg:x3; val_offset:8703*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8703*0 + 3*597*FLEN/8, x4, x1, x2)

inst_2902:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800000000000001f; valaddr_reg:x3; val_offset:8706*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8706*0 + 3*598*FLEN/8, x4, x1, x2)

inst_2903:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800000000000003f; valaddr_reg:x3; val_offset:8709*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8709*0 + 3*599*FLEN/8, x4, x1, x2)

inst_2904:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8003333333333333; valaddr_reg:x3; val_offset:8712*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8712*0 + 3*600*FLEN/8, x4, x1, x2)

inst_2905:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8004924924924924; valaddr_reg:x3; val_offset:8715*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8715*0 + 3*601*FLEN/8, x4, x1, x2)

inst_2906:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8006666666666666; valaddr_reg:x3; val_offset:8718*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8718*0 + 3*602*FLEN/8, x4, x1, x2)

inst_2907:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8006db6db6db6db6; valaddr_reg:x3; val_offset:8721*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8721*0 + 3*603*FLEN/8, x4, x1, x2)

inst_2908:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8007777777777777; valaddr_reg:x3; val_offset:8724*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8724*0 + 3*604*FLEN/8, x4, x1, x2)

inst_2909:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8008888888888888; valaddr_reg:x3; val_offset:8727*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8727*0 + 3*605*FLEN/8, x4, x1, x2)

inst_2910:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x8009999999999999; valaddr_reg:x3; val_offset:8730*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8730*0 + 3*606*FLEN/8, x4, x1, x2)

inst_2911:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800b6db6db6db6db; valaddr_reg:x3; val_offset:8733*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8733*0 + 3*607*FLEN/8, x4, x1, x2)

inst_2912:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800ccccccccccccc; valaddr_reg:x3; val_offset:8736*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8736*0 + 3*608*FLEN/8, x4, x1, x2)

inst_2913:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800db6db6db6db6d; valaddr_reg:x3; val_offset:8739*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8739*0 + 3*609*FLEN/8, x4, x1, x2)

inst_2914:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800fffffffffffc0; valaddr_reg:x3; val_offset:8742*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8742*0 + 3*610*FLEN/8, x4, x1, x2)

inst_2915:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800fffffffffffe0; valaddr_reg:x3; val_offset:8745*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8745*0 + 3*611*FLEN/8, x4, x1, x2)

inst_2916:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800ffffffffffff0; valaddr_reg:x3; val_offset:8748*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8748*0 + 3*612*FLEN/8, x4, x1, x2)

inst_2917:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800ffffffffffff8; valaddr_reg:x3; val_offset:8751*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8751*0 + 3*613*FLEN/8, x4, x1, x2)

inst_2918:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800ffffffffffffc; valaddr_reg:x3; val_offset:8754*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8754*0 + 3*614*FLEN/8, x4, x1, x2)

inst_2919:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x800ffffffffffffe; valaddr_reg:x3; val_offset:8757*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8757*0 + 3*615*FLEN/8, x4, x1, x2)

inst_2920:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000000000; valaddr_reg:x3; val_offset:8760*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8760*0 + 3*616*FLEN/8, x4, x1, x2)

inst_2921:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000000001; valaddr_reg:x3; val_offset:8763*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8763*0 + 3*617*FLEN/8, x4, x1, x2)

inst_2922:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000000003; valaddr_reg:x3; val_offset:8766*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8766*0 + 3*618*FLEN/8, x4, x1, x2)

inst_2923:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000000007; valaddr_reg:x3; val_offset:8769*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8769*0 + 3*619*FLEN/8, x4, x1, x2)

inst_2924:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000000000f; valaddr_reg:x3; val_offset:8772*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8772*0 + 3*620*FLEN/8, x4, x1, x2)

inst_2925:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000000001f; valaddr_reg:x3; val_offset:8775*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8775*0 + 3*621*FLEN/8, x4, x1, x2)

inst_2926:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000000003f; valaddr_reg:x3; val_offset:8778*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8778*0 + 3*622*FLEN/8, x4, x1, x2)

inst_2927:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000000007f; valaddr_reg:x3; val_offset:8781*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8781*0 + 3*623*FLEN/8, x4, x1, x2)

inst_2928:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000000000ff; valaddr_reg:x3; val_offset:8784*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8784*0 + 3*624*FLEN/8, x4, x1, x2)

inst_2929:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000000001ff; valaddr_reg:x3; val_offset:8787*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8787*0 + 3*625*FLEN/8, x4, x1, x2)

inst_2930:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000000003ff; valaddr_reg:x3; val_offset:8790*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8790*0 + 3*626*FLEN/8, x4, x1, x2)

inst_2931:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000000007ff; valaddr_reg:x3; val_offset:8793*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8793*0 + 3*627*FLEN/8, x4, x1, x2)

inst_2932:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000000fff; valaddr_reg:x3; val_offset:8796*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8796*0 + 3*628*FLEN/8, x4, x1, x2)

inst_2933:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000001fff; valaddr_reg:x3; val_offset:8799*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8799*0 + 3*629*FLEN/8, x4, x1, x2)

inst_2934:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000003fff; valaddr_reg:x3; val_offset:8802*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8802*0 + 3*630*FLEN/8, x4, x1, x2)

inst_2935:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000007fff; valaddr_reg:x3; val_offset:8805*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8805*0 + 3*631*FLEN/8, x4, x1, x2)

inst_2936:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000000ffff; valaddr_reg:x3; val_offset:8808*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8808*0 + 3*632*FLEN/8, x4, x1, x2)

inst_2937:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000001ffff; valaddr_reg:x3; val_offset:8811*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8811*0 + 3*633*FLEN/8, x4, x1, x2)

inst_2938:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000003ffff; valaddr_reg:x3; val_offset:8814*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8814*0 + 3*634*FLEN/8, x4, x1, x2)

inst_2939:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000007ffff; valaddr_reg:x3; val_offset:8817*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8817*0 + 3*635*FLEN/8, x4, x1, x2)

inst_2940:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000000fffff; valaddr_reg:x3; val_offset:8820*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8820*0 + 3*636*FLEN/8, x4, x1, x2)

inst_2941:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000001fffff; valaddr_reg:x3; val_offset:8823*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8823*0 + 3*637*FLEN/8, x4, x1, x2)

inst_2942:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000003fffff; valaddr_reg:x3; val_offset:8826*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8826*0 + 3*638*FLEN/8, x4, x1, x2)

inst_2943:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000007fffff; valaddr_reg:x3; val_offset:8829*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8829*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_2944:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000000ffffff; valaddr_reg:x3; val_offset:8832*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8832*0 + 3*640*FLEN/8, x4, x1, x2)

inst_2945:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000001ffffff; valaddr_reg:x3; val_offset:8835*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8835*0 + 3*641*FLEN/8, x4, x1, x2)

inst_2946:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000003ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000003ffffff; valaddr_reg:x3; val_offset:8838*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8838*0 + 3*642*FLEN/8, x4, x1, x2)

inst_2947:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000007ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000007ffffff; valaddr_reg:x3; val_offset:8841*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8841*0 + 3*643*FLEN/8, x4, x1, x2)

inst_2948:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000000fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000000fffffff; valaddr_reg:x3; val_offset:8844*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8844*0 + 3*644*FLEN/8, x4, x1, x2)

inst_2949:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000001fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000001fffffff; valaddr_reg:x3; val_offset:8847*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8847*0 + 3*645*FLEN/8, x4, x1, x2)

inst_2950:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000003fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000003fffffff; valaddr_reg:x3; val_offset:8850*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8850*0 + 3*646*FLEN/8, x4, x1, x2)

inst_2951:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000007fffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000007fffffff; valaddr_reg:x3; val_offset:8853*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8853*0 + 3*647*FLEN/8, x4, x1, x2)

inst_2952:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00000ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00000ffffffff; valaddr_reg:x3; val_offset:8856*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8856*0 + 3*648*FLEN/8, x4, x1, x2)

inst_2953:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00001ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00001ffffffff; valaddr_reg:x3; val_offset:8859*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8859*0 + 3*649*FLEN/8, x4, x1, x2)

inst_2954:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00003ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00003ffffffff; valaddr_reg:x3; val_offset:8862*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8862*0 + 3*650*FLEN/8, x4, x1, x2)

inst_2955:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00007ffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00007ffffffff; valaddr_reg:x3; val_offset:8865*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8865*0 + 3*651*FLEN/8, x4, x1, x2)

inst_2956:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0000fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0000fffffffff; valaddr_reg:x3; val_offset:8868*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8868*0 + 3*652*FLEN/8, x4, x1, x2)

inst_2957:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0001fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0001fffffffff; valaddr_reg:x3; val_offset:8871*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8871*0 + 3*653*FLEN/8, x4, x1, x2)

inst_2958:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0003fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0003fffffffff; valaddr_reg:x3; val_offset:8874*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8874*0 + 3*654*FLEN/8, x4, x1, x2)

inst_2959:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0007fffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0007fffffffff; valaddr_reg:x3; val_offset:8877*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8877*0 + 3*655*FLEN/8, x4, x1, x2)

inst_2960:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x000ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e000ffffffffff; valaddr_reg:x3; val_offset:8880*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8880*0 + 3*656*FLEN/8, x4, x1, x2)

inst_2961:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x001ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e001ffffffffff; valaddr_reg:x3; val_offset:8883*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8883*0 + 3*657*FLEN/8, x4, x1, x2)

inst_2962:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x003ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e003ffffffffff; valaddr_reg:x3; val_offset:8886*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8886*0 + 3*658*FLEN/8, x4, x1, x2)

inst_2963:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x007ffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e007ffffffffff; valaddr_reg:x3; val_offset:8889*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8889*0 + 3*659*FLEN/8, x4, x1, x2)

inst_2964:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x00fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e00fffffffffff; valaddr_reg:x3; val_offset:8892*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8892*0 + 3*660*FLEN/8, x4, x1, x2)

inst_2965:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x01fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e01fffffffffff; valaddr_reg:x3; val_offset:8895*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8895*0 + 3*661*FLEN/8, x4, x1, x2)

inst_2966:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x03fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e03fffffffffff; valaddr_reg:x3; val_offset:8898*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8898*0 + 3*662*FLEN/8, x4, x1, x2)

inst_2967:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x07fffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e07fffffffffff; valaddr_reg:x3; val_offset:8901*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8901*0 + 3*663*FLEN/8, x4, x1, x2)

inst_2968:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x0ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e0ffffffffffff; valaddr_reg:x3; val_offset:8904*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8904*0 + 3*664*FLEN/8, x4, x1, x2)

inst_2969:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x1ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e1ffffffffffff; valaddr_reg:x3; val_offset:8907*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8907*0 + 3*665*FLEN/8, x4, x1, x2)

inst_2970:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x3ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e3ffffffffffff; valaddr_reg:x3; val_offset:8910*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8910*0 + 3*666*FLEN/8, x4, x1, x2)

inst_2971:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x7ffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e7ffffffffffff; valaddr_reg:x3; val_offset:8913*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8913*0 + 3*667*FLEN/8, x4, x1, x2)

inst_2972:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0x8000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81e8000000000000; valaddr_reg:x3; val_offset:8916*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8916*0 + 3*668*FLEN/8, x4, x1, x2)

inst_2973:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xc000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81ec000000000000; valaddr_reg:x3; val_offset:8919*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8919*0 + 3*669*FLEN/8, x4, x1, x2)

inst_2974:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xe000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81ee000000000000; valaddr_reg:x3; val_offset:8922*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8922*0 + 3*670*FLEN/8, x4, x1, x2)

inst_2975:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xf000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81ef000000000000; valaddr_reg:x3; val_offset:8925*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8925*0 + 3*671*FLEN/8, x4, x1, x2)

inst_2976:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xf800000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81ef800000000000; valaddr_reg:x3; val_offset:8928*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8928*0 + 3*672*FLEN/8, x4, x1, x2)

inst_2977:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfc00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efc00000000000; valaddr_reg:x3; val_offset:8931*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8931*0 + 3*673*FLEN/8, x4, x1, x2)

inst_2978:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfe00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efe00000000000; valaddr_reg:x3; val_offset:8934*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8934*0 + 3*674*FLEN/8, x4, x1, x2)

inst_2979:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xff00000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81eff00000000000; valaddr_reg:x3; val_offset:8937*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8937*0 + 3*675*FLEN/8, x4, x1, x2)

inst_2980:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xff80000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81eff80000000000; valaddr_reg:x3; val_offset:8940*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8940*0 + 3*676*FLEN/8, x4, x1, x2)

inst_2981:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffc0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effc0000000000; valaddr_reg:x3; val_offset:8943*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8943*0 + 3*677*FLEN/8, x4, x1, x2)

inst_2982:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffe0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effe0000000000; valaddr_reg:x3; val_offset:8946*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8946*0 + 3*678*FLEN/8, x4, x1, x2)

inst_2983:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfff0000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efff0000000000; valaddr_reg:x3; val_offset:8949*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8949*0 + 3*679*FLEN/8, x4, x1, x2)

inst_2984:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfff8000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efff8000000000; valaddr_reg:x3; val_offset:8952*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8952*0 + 3*680*FLEN/8, x4, x1, x2)

inst_2985:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffc000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffc000000000; valaddr_reg:x3; val_offset:8955*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8955*0 + 3*681*FLEN/8, x4, x1, x2)

inst_2986:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffe000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffe000000000; valaddr_reg:x3; val_offset:8958*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8958*0 + 3*682*FLEN/8, x4, x1, x2)

inst_2987:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffff000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effff000000000; valaddr_reg:x3; val_offset:8961*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8961*0 + 3*683*FLEN/8, x4, x1, x2)

inst_2988:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffff800000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effff800000000; valaddr_reg:x3; val_offset:8964*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8964*0 + 3*684*FLEN/8, x4, x1, x2)

inst_2989:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffc00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffc00000000; valaddr_reg:x3; val_offset:8967*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8967*0 + 3*685*FLEN/8, x4, x1, x2)

inst_2990:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffe00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffe00000000; valaddr_reg:x3; val_offset:8970*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8970*0 + 3*686*FLEN/8, x4, x1, x2)

inst_2991:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffff00000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffff00000000; valaddr_reg:x3; val_offset:8973*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8973*0 + 3*687*FLEN/8, x4, x1, x2)

inst_2992:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffff80000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffff80000000; valaddr_reg:x3; val_offset:8976*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8976*0 + 3*688*FLEN/8, x4, x1, x2)

inst_2993:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffc0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffc0000000; valaddr_reg:x3; val_offset:8979*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8979*0 + 3*689*FLEN/8, x4, x1, x2)

inst_2994:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffe0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffe0000000; valaddr_reg:x3; val_offset:8982*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8982*0 + 3*690*FLEN/8, x4, x1, x2)

inst_2995:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffff0000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffff0000000; valaddr_reg:x3; val_offset:8985*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8985*0 + 3*691*FLEN/8, x4, x1, x2)

inst_2996:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffff8000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffff8000000; valaddr_reg:x3; val_offset:8988*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8988*0 + 3*692*FLEN/8, x4, x1, x2)

inst_2997:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffc000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffc000000; valaddr_reg:x3; val_offset:8991*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8991*0 + 3*693*FLEN/8, x4, x1, x2)

inst_2998:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffe000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffe000000; valaddr_reg:x3; val_offset:8994*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8994*0 + 3*694*FLEN/8, x4, x1, x2)

inst_2999:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffff000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffff000000; valaddr_reg:x3; val_offset:8997*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 8997*0 + 3*695*FLEN/8, x4, x1, x2)

inst_3000:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffff800000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffff800000; valaddr_reg:x3; val_offset:9000*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9000*0 + 3*696*FLEN/8, x4, x1, x2)

inst_3001:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffc00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffc00000; valaddr_reg:x3; val_offset:9003*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9003*0 + 3*697*FLEN/8, x4, x1, x2)

inst_3002:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffe00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffe00000; valaddr_reg:x3; val_offset:9006*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9006*0 + 3*698*FLEN/8, x4, x1, x2)

inst_3003:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffff00000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffff00000; valaddr_reg:x3; val_offset:9009*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9009*0 + 3*699*FLEN/8, x4, x1, x2)

inst_3004:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffff80000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffff80000; valaddr_reg:x3; val_offset:9012*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9012*0 + 3*700*FLEN/8, x4, x1, x2)

inst_3005:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffc0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffc0000; valaddr_reg:x3; val_offset:9015*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9015*0 + 3*701*FLEN/8, x4, x1, x2)

inst_3006:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffe0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffe0000; valaddr_reg:x3; val_offset:9018*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9018*0 + 3*702*FLEN/8, x4, x1, x2)

inst_3007:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffff0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffff0000; valaddr_reg:x3; val_offset:9021*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9021*0 + 3*703*FLEN/8, x4, x1, x2)

inst_3008:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffff8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffff8000; valaddr_reg:x3; val_offset:9024*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9024*0 + 3*704*FLEN/8, x4, x1, x2)

inst_3009:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffc000; valaddr_reg:x3; val_offset:9027*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9027*0 + 3*705*FLEN/8, x4, x1, x2)

inst_3010:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffe000; valaddr_reg:x3; val_offset:9030*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9030*0 + 3*706*FLEN/8, x4, x1, x2)

inst_3011:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffff000; valaddr_reg:x3; val_offset:9033*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9033*0 + 3*707*FLEN/8, x4, x1, x2)

inst_3012:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffff800; valaddr_reg:x3; val_offset:9036*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9036*0 + 3*708*FLEN/8, x4, x1, x2)

inst_3013:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffc00; valaddr_reg:x3; val_offset:9039*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9039*0 + 3*709*FLEN/8, x4, x1, x2)

inst_3014:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffe00; valaddr_reg:x3; val_offset:9042*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9042*0 + 3*710*FLEN/8, x4, x1, x2)

inst_3015:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffff00; valaddr_reg:x3; val_offset:9045*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9045*0 + 3*711*FLEN/8, x4, x1, x2)

inst_3016:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffff80; valaddr_reg:x3; val_offset:9048*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9048*0 + 3*712*FLEN/8, x4, x1, x2)

inst_3017:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffffc0; valaddr_reg:x3; val_offset:9051*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9051*0 + 3*713*FLEN/8, x4, x1, x2)

inst_3018:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffffe0; valaddr_reg:x3; val_offset:9054*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9054*0 + 3*714*FLEN/8, x4, x1, x2)

inst_3019:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffff0; valaddr_reg:x3; val_offset:9057*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9057*0 + 3*715*FLEN/8, x4, x1, x2)

inst_3020:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffff8; valaddr_reg:x3; val_offset:9060*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9060*0 + 3*716*FLEN/8, x4, x1, x2)

inst_3021:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffffc; valaddr_reg:x3; val_offset:9063*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9063*0 + 3*717*FLEN/8, x4, x1, x2)

inst_3022:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81effffffffffffe; valaddr_reg:x3; val_offset:9066*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9066*0 + 3*718*FLEN/8, x4, x1, x2)

inst_3023:
// fs1 == 0 and fe1 == 0x5f5 and fm1 == 0xf0768d72584df and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x01e and fm3 == 0xfffffffffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f5f0768d72584df; op2val:0x8000;
op3val:0x81efffffffffffff; valaddr_reg:x3; val_offset:9069*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9069*0 + 3*719*FLEN/8, x4, x1, x2)

inst_3024:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8000000000000001; valaddr_reg:x3; val_offset:9072*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9072*0 + 3*720*FLEN/8, x4, x1, x2)

inst_3025:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8000000000000003; valaddr_reg:x3; val_offset:9075*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9075*0 + 3*721*FLEN/8, x4, x1, x2)

inst_3026:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8000000000000007; valaddr_reg:x3; val_offset:9078*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9078*0 + 3*722*FLEN/8, x4, x1, x2)

inst_3027:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800000000000000f; valaddr_reg:x3; val_offset:9081*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9081*0 + 3*723*FLEN/8, x4, x1, x2)

inst_3028:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800000000000001f; valaddr_reg:x3; val_offset:9084*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9084*0 + 3*724*FLEN/8, x4, x1, x2)

inst_3029:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800000000000003f; valaddr_reg:x3; val_offset:9087*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9087*0 + 3*725*FLEN/8, x4, x1, x2)

inst_3030:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x3333333333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8003333333333333; valaddr_reg:x3; val_offset:9090*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9090*0 + 3*726*FLEN/8, x4, x1, x2)

inst_3031:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x4924924924924 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8004924924924924; valaddr_reg:x3; val_offset:9093*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9093*0 + 3*727*FLEN/8, x4, x1, x2)

inst_3032:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6666666666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8006666666666666; valaddr_reg:x3; val_offset:9096*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9096*0 + 3*728*FLEN/8, x4, x1, x2)

inst_3033:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x6db6db6db6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8006db6db6db6db6; valaddr_reg:x3; val_offset:9099*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9099*0 + 3*729*FLEN/8, x4, x1, x2)

inst_3034:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x7777777777777 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8007777777777777; valaddr_reg:x3; val_offset:9102*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9102*0 + 3*730*FLEN/8, x4, x1, x2)

inst_3035:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x8888888888888 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8008888888888888; valaddr_reg:x3; val_offset:9105*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9105*0 + 3*731*FLEN/8, x4, x1, x2)

inst_3036:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0x9999999999999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8009999999999999; valaddr_reg:x3; val_offset:9108*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9108*0 + 3*732*FLEN/8, x4, x1, x2)

inst_3037:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xb6db6db6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800b6db6db6db6db; valaddr_reg:x3; val_offset:9111*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9111*0 + 3*733*FLEN/8, x4, x1, x2)

inst_3038:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xccccccccccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800ccccccccccccc; valaddr_reg:x3; val_offset:9114*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9114*0 + 3*734*FLEN/8, x4, x1, x2)

inst_3039:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xdb6db6db6db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800db6db6db6db6d; valaddr_reg:x3; val_offset:9117*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9117*0 + 3*735*FLEN/8, x4, x1, x2)

inst_3040:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800fffffffffffc0; valaddr_reg:x3; val_offset:9120*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9120*0 + 3*736*FLEN/8, x4, x1, x2)

inst_3041:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xfffffffffffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800fffffffffffe0; valaddr_reg:x3; val_offset:9123*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9123*0 + 3*737*FLEN/8, x4, x1, x2)

inst_3042:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800ffffffffffff0; valaddr_reg:x3; val_offset:9126*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9126*0 + 3*738*FLEN/8, x4, x1, x2)

inst_3043:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800ffffffffffff8; valaddr_reg:x3; val_offset:9129*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9129*0 + 3*739*FLEN/8, x4, x1, x2)

inst_3044:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800ffffffffffffc; valaddr_reg:x3; val_offset:9132*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9132*0 + 3*740*FLEN/8, x4, x1, x2)

inst_3045:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x000 and fm3 == 0xffffffffffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x800ffffffffffffe; valaddr_reg:x3; val_offset:9135*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9135*0 + 3*741*FLEN/8, x4, x1, x2)

inst_3046:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000000000; valaddr_reg:x3; val_offset:9138*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9138*0 + 3*742*FLEN/8, x4, x1, x2)

inst_3047:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000000001; valaddr_reg:x3; val_offset:9141*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9141*0 + 3*743*FLEN/8, x4, x1, x2)

inst_3048:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000000003; valaddr_reg:x3; val_offset:9144*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9144*0 + 3*744*FLEN/8, x4, x1, x2)

inst_3049:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000000007; valaddr_reg:x3; val_offset:9147*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9147*0 + 3*745*FLEN/8, x4, x1, x2)

inst_3050:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000000000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000000000f; valaddr_reg:x3; val_offset:9150*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9150*0 + 3*746*FLEN/8, x4, x1, x2)

inst_3051:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000000001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000000001f; valaddr_reg:x3; val_offset:9153*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9153*0 + 3*747*FLEN/8, x4, x1, x2)

inst_3052:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000000003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000000003f; valaddr_reg:x3; val_offset:9156*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9156*0 + 3*748*FLEN/8, x4, x1, x2)

inst_3053:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000000007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000000007f; valaddr_reg:x3; val_offset:9159*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9159*0 + 3*749*FLEN/8, x4, x1, x2)

inst_3054:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000000000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000000000ff; valaddr_reg:x3; val_offset:9162*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9162*0 + 3*750*FLEN/8, x4, x1, x2)

inst_3055:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000000001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000000001ff; valaddr_reg:x3; val_offset:9165*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9165*0 + 3*751*FLEN/8, x4, x1, x2)

inst_3056:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000000003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000000003ff; valaddr_reg:x3; val_offset:9168*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9168*0 + 3*752*FLEN/8, x4, x1, x2)

inst_3057:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000000007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000000007ff; valaddr_reg:x3; val_offset:9171*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9171*0 + 3*753*FLEN/8, x4, x1, x2)

inst_3058:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000000fff; valaddr_reg:x3; val_offset:9174*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9174*0 + 3*754*FLEN/8, x4, x1, x2)

inst_3059:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000001fff; valaddr_reg:x3; val_offset:9177*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9177*0 + 3*755*FLEN/8, x4, x1, x2)

inst_3060:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000003fff; valaddr_reg:x3; val_offset:9180*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9180*0 + 3*756*FLEN/8, x4, x1, x2)

inst_3061:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000007fff; valaddr_reg:x3; val_offset:9183*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9183*0 + 3*757*FLEN/8, x4, x1, x2)

inst_3062:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000000ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000000ffff; valaddr_reg:x3; val_offset:9186*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9186*0 + 3*758*FLEN/8, x4, x1, x2)

inst_3063:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000001ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000001ffff; valaddr_reg:x3; val_offset:9189*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9189*0 + 3*759*FLEN/8, x4, x1, x2)

inst_3064:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000003ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000003ffff; valaddr_reg:x3; val_offset:9192*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9192*0 + 3*760*FLEN/8, x4, x1, x2)

inst_3065:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x000000007ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x811000000007ffff; valaddr_reg:x3; val_offset:9195*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9195*0 + 3*761*FLEN/8, x4, x1, x2)

inst_3066:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000000fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000000fffff; valaddr_reg:x3; val_offset:9198*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9198*0 + 3*762*FLEN/8, x4, x1, x2)

inst_3067:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000001fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000001fffff; valaddr_reg:x3; val_offset:9201*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9201*0 + 3*763*FLEN/8, x4, x1, x2)

inst_3068:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000003fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000003fffff; valaddr_reg:x3; val_offset:9204*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9204*0 + 3*764*FLEN/8, x4, x1, x2)

inst_3069:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x00000007fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x81100000007fffff; valaddr_reg:x3; val_offset:9207*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9207*0 + 3*765*FLEN/8, x4, x1, x2)

inst_3070:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000000ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000000ffffff; valaddr_reg:x3; val_offset:9210*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9210*0 + 3*766*FLEN/8, x4, x1, x2)

inst_3071:
// fs1 == 0 and fe1 == 0x5f6 and fm1 == 0x010befcbab41f and fs2 == 0 and fe2 == 0x000 and fm2 == 0x0000000008000 and fs3 == 1 and fe3 == 0x011 and fm3 == 0x0000001ffffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmsub.d ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x5f6010befcbab41f; op2val:0x8000;
op3val:0x8110000001ffffff; valaddr_reg:x3; val_offset:9213*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.d, f31, f30, f29, f28, dyn, 0, 0, x3, 9213*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000000003fff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000000007fff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000000000ffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000000001ffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000000003ffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000000007ffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400000000fffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400000001fffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400000003fffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400000007fffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000000ffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000001ffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000003ffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000007ffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000000fffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000001fffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000003fffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000007fffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400000ffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400001ffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400003ffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400007ffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040000fffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040001fffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040003fffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040007fffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804000ffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804001ffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804003ffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804007ffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80400fffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80401fffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80403fffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x80407fffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8040ffffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8041ffffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8043ffffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8047ffffffffffff
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x8048000000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804c000000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804e000000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804f000000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804f800000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fc00000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fe00000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ff00000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ff80000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffc0000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffe0000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fff0000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fff8000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffc000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffe000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffff000000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffff800000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffc00000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffe00000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffff00000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffff80000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffc0000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffe0000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffff0000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffff8000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffc000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffe000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffff000000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffff800000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffc00000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffe00000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffff00000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffff80000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffc0000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffe0000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffff0000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffff8000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffc000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffe000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffff000
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffff800
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffc00
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffe00
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffff00
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffff80
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffffc0
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffffe0
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffff0
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffff8
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffffc
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804ffffffffffffe
.dword 0x5f5b4d97f458961f
.dword 0x8000
.dword 0x804fffffffffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8010000000000001
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8010000000000003
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8010000000000007
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801000000000000f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801000000000001f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801000000000003f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8013333333333333
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8014924924924924
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8016666666666666
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8016db6db6db6db6
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8017777777777777
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8018888888888888
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8019999999999999
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801b6db6db6db6db
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801ccccccccccccc
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801db6db6db6db6d
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801fffffffffffc0
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801fffffffffffe0
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801ffffffffffff0
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801ffffffffffff8
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801ffffffffffffc
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x801ffffffffffffe
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000000000
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000000001
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000000003
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000000007
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000000000f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000000001f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000000003f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000000007f
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000000000ff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000000001ff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000000003ff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000000007ff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000000fff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000001fff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000003fff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000007fff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000000ffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000001ffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000003ffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000007ffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000000fffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000001fffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000003fffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000007fffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000000ffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000001ffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000003ffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x8290000007ffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000000fffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000001fffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000003fffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x829000007fffffff
.dword 0x5f5cf2eb5c7640bf
.dword 0x8000
.dword 0x82900000ffffffff
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.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828fffffffffff00
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828fffffffffff80
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828fffffffffffc0
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828fffffffffffe0
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828ffffffffffff0
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828ffffffffffff8
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828ffffffffffffc
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828ffffffffffffe
.dword 0x5f5ecf3eebd0649f
.dword 0x8000
.dword 0x828fffffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8000000000000001
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8000000000000003
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8000000000000007
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800000000000000f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800000000000001f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800000000000003f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8003333333333333
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8004924924924924
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8006666666666666
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8006db6db6db6db6
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8007777777777777
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8008888888888888
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x8009999999999999
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800b6db6db6db6db
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800ccccccccccccc
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800db6db6db6db6d
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800fffffffffffc0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800fffffffffffe0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800ffffffffffff0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800ffffffffffff8
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800ffffffffffffc
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x800ffffffffffffe
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000000001
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000000003
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000000007
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000000000f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000000001f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000000003f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000000007f
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000000000ff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000000001ff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000000003ff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000000007ff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000000fff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000001fff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000003fff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000007fff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000000ffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000001ffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000003ffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000007ffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000000fffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000001fffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000003fffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000007fffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000000ffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000001ffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000003ffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000007ffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000000fffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000001fffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000003fffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000007fffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00000ffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00001ffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00003ffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00007ffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0000fffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0001fffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0003fffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0007fffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e000ffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e001ffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e003ffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e007ffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e00fffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e01fffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e03fffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e07fffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e0ffffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e1ffffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e3ffffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e7ffffffffffff
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81e8000000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81ec000000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81ee000000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81ef000000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81ef800000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efc00000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efe00000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81eff00000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81eff80000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effc0000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effe0000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efff0000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efff8000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffc000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffe000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effff000000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effff800000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffc00000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffe00000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffff00000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffff80000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffc0000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffe0000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffff0000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffff8000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffc000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffe000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffff000000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffff800000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffc00000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffe00000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffff00000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffff80000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffc0000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffe0000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffff0000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffff8000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffc000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffe000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffff000
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffff800
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffc00
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffe00
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffff00
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffff80
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffffc0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffffe0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffff0
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffff8
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffffc
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81effffffffffffe
.dword 0x5f5f0768d72584df
.dword 0x8000
.dword 0x81efffffffffffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8000000000000001
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8000000000000003
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8000000000000007
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800000000000000f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800000000000001f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800000000000003f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8003333333333333
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8004924924924924
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8006666666666666
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8006db6db6db6db6
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8007777777777777
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8008888888888888
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8009999999999999
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800b6db6db6db6db
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800ccccccccccccc
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800db6db6db6db6d
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800fffffffffffc0
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800fffffffffffe0
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800ffffffffffff0
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800ffffffffffff8
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800ffffffffffffc
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x800ffffffffffffe
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000000000
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000000001
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000000003
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000000007
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000000000f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000000001f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000000003f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000000007f
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000000000ff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000000001ff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000000003ff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000000007ff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000000fff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000001fff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000003fff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000007fff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000000ffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000001ffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000003ffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x811000000007ffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000000fffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000001fffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000003fffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x81100000007fffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000000ffffff
.dword 0x5f6010befcbab41f
.dword 0x8000
.dword 0x8110000001ffffff
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
