
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_28416:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb8001ff; valaddr_reg:x3; val_offset:85248*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85248*0 + 3*0*FLEN/8, x4, x1, x2)

inst_28417:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb8003ff; valaddr_reg:x3; val_offset:85251*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85251*0 + 3*1*FLEN/8, x4, x1, x2)

inst_28418:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb8007ff; valaddr_reg:x3; val_offset:85254*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85254*0 + 3*2*FLEN/8, x4, x1, x2)

inst_28419:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb800fff; valaddr_reg:x3; val_offset:85257*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85257*0 + 3*3*FLEN/8, x4, x1, x2)

inst_28420:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb801fff; valaddr_reg:x3; val_offset:85260*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85260*0 + 3*4*FLEN/8, x4, x1, x2)

inst_28421:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb803fff; valaddr_reg:x3; val_offset:85263*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85263*0 + 3*5*FLEN/8, x4, x1, x2)

inst_28422:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb807fff; valaddr_reg:x3; val_offset:85266*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85266*0 + 3*6*FLEN/8, x4, x1, x2)

inst_28423:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb80ffff; valaddr_reg:x3; val_offset:85269*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85269*0 + 3*7*FLEN/8, x4, x1, x2)

inst_28424:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb81ffff; valaddr_reg:x3; val_offset:85272*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85272*0 + 3*8*FLEN/8, x4, x1, x2)

inst_28425:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb83ffff; valaddr_reg:x3; val_offset:85275*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85275*0 + 3*9*FLEN/8, x4, x1, x2)

inst_28426:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb87ffff; valaddr_reg:x3; val_offset:85278*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85278*0 + 3*10*FLEN/8, x4, x1, x2)

inst_28427:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb8fffff; valaddr_reg:x3; val_offset:85281*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85281*0 + 3*11*FLEN/8, x4, x1, x2)

inst_28428:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xb9fffff; valaddr_reg:x3; val_offset:85284*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85284*0 + 3*12*FLEN/8, x4, x1, x2)

inst_28429:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbbfffff; valaddr_reg:x3; val_offset:85287*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85287*0 + 3*13*FLEN/8, x4, x1, x2)

inst_28430:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbc00000; valaddr_reg:x3; val_offset:85290*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85290*0 + 3*14*FLEN/8, x4, x1, x2)

inst_28431:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbe00000; valaddr_reg:x3; val_offset:85293*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85293*0 + 3*15*FLEN/8, x4, x1, x2)

inst_28432:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbf00000; valaddr_reg:x3; val_offset:85296*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85296*0 + 3*16*FLEN/8, x4, x1, x2)

inst_28433:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbf80000; valaddr_reg:x3; val_offset:85299*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85299*0 + 3*17*FLEN/8, x4, x1, x2)

inst_28434:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfc0000; valaddr_reg:x3; val_offset:85302*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85302*0 + 3*18*FLEN/8, x4, x1, x2)

inst_28435:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfe0000; valaddr_reg:x3; val_offset:85305*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85305*0 + 3*19*FLEN/8, x4, x1, x2)

inst_28436:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbff0000; valaddr_reg:x3; val_offset:85308*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85308*0 + 3*20*FLEN/8, x4, x1, x2)

inst_28437:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbff8000; valaddr_reg:x3; val_offset:85311*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85311*0 + 3*21*FLEN/8, x4, x1, x2)

inst_28438:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffc000; valaddr_reg:x3; val_offset:85314*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85314*0 + 3*22*FLEN/8, x4, x1, x2)

inst_28439:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffe000; valaddr_reg:x3; val_offset:85317*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85317*0 + 3*23*FLEN/8, x4, x1, x2)

inst_28440:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfff000; valaddr_reg:x3; val_offset:85320*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85320*0 + 3*24*FLEN/8, x4, x1, x2)

inst_28441:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfff800; valaddr_reg:x3; val_offset:85323*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85323*0 + 3*25*FLEN/8, x4, x1, x2)

inst_28442:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffc00; valaddr_reg:x3; val_offset:85326*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85326*0 + 3*26*FLEN/8, x4, x1, x2)

inst_28443:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffe00; valaddr_reg:x3; val_offset:85329*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85329*0 + 3*27*FLEN/8, x4, x1, x2)

inst_28444:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffff00; valaddr_reg:x3; val_offset:85332*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85332*0 + 3*28*FLEN/8, x4, x1, x2)

inst_28445:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffff80; valaddr_reg:x3; val_offset:85335*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85335*0 + 3*29*FLEN/8, x4, x1, x2)

inst_28446:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffffc0; valaddr_reg:x3; val_offset:85338*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85338*0 + 3*30*FLEN/8, x4, x1, x2)

inst_28447:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffffe0; valaddr_reg:x3; val_offset:85341*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85341*0 + 3*31*FLEN/8, x4, x1, x2)

inst_28448:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffff0; valaddr_reg:x3; val_offset:85344*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85344*0 + 3*32*FLEN/8, x4, x1, x2)

inst_28449:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffff8; valaddr_reg:x3; val_offset:85347*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85347*0 + 3*33*FLEN/8, x4, x1, x2)

inst_28450:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffffc; valaddr_reg:x3; val_offset:85350*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85350*0 + 3*34*FLEN/8, x4, x1, x2)

inst_28451:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbfffffe; valaddr_reg:x3; val_offset:85353*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85353*0 + 3*35*FLEN/8, x4, x1, x2)

inst_28452:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0;
op3val:0xbffffff; valaddr_reg:x3; val_offset:85356*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85356*0 + 3*36*FLEN/8, x4, x1, x2)

inst_28453:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3f800001; valaddr_reg:x3; val_offset:85359*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85359*0 + 3*37*FLEN/8, x4, x1, x2)

inst_28454:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3f800003; valaddr_reg:x3; val_offset:85362*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85362*0 + 3*38*FLEN/8, x4, x1, x2)

inst_28455:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3f800007; valaddr_reg:x3; val_offset:85365*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85365*0 + 3*39*FLEN/8, x4, x1, x2)

inst_28456:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3f999999; valaddr_reg:x3; val_offset:85368*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85368*0 + 3*40*FLEN/8, x4, x1, x2)

inst_28457:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:85371*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85371*0 + 3*41*FLEN/8, x4, x1, x2)

inst_28458:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:85374*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85374*0 + 3*42*FLEN/8, x4, x1, x2)

inst_28459:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:85377*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85377*0 + 3*43*FLEN/8, x4, x1, x2)

inst_28460:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:85380*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85380*0 + 3*44*FLEN/8, x4, x1, x2)

inst_28461:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:85383*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85383*0 + 3*45*FLEN/8, x4, x1, x2)

inst_28462:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:85386*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85386*0 + 3*46*FLEN/8, x4, x1, x2)

inst_28463:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:85389*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85389*0 + 3*47*FLEN/8, x4, x1, x2)

inst_28464:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:85392*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85392*0 + 3*48*FLEN/8, x4, x1, x2)

inst_28465:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:85395*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85395*0 + 3*49*FLEN/8, x4, x1, x2)

inst_28466:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:85398*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85398*0 + 3*50*FLEN/8, x4, x1, x2)

inst_28467:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:85401*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85401*0 + 3*51*FLEN/8, x4, x1, x2)

inst_28468:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:85404*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85404*0 + 3*52*FLEN/8, x4, x1, x2)

inst_28469:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f800000; valaddr_reg:x3; val_offset:85407*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85407*0 + 3*53*FLEN/8, x4, x1, x2)

inst_28470:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f800001; valaddr_reg:x3; val_offset:85410*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85410*0 + 3*54*FLEN/8, x4, x1, x2)

inst_28471:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f800003; valaddr_reg:x3; val_offset:85413*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85413*0 + 3*55*FLEN/8, x4, x1, x2)

inst_28472:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f800007; valaddr_reg:x3; val_offset:85416*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85416*0 + 3*56*FLEN/8, x4, x1, x2)

inst_28473:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f80000f; valaddr_reg:x3; val_offset:85419*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85419*0 + 3*57*FLEN/8, x4, x1, x2)

inst_28474:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f80001f; valaddr_reg:x3; val_offset:85422*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85422*0 + 3*58*FLEN/8, x4, x1, x2)

inst_28475:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f80003f; valaddr_reg:x3; val_offset:85425*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85425*0 + 3*59*FLEN/8, x4, x1, x2)

inst_28476:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f80007f; valaddr_reg:x3; val_offset:85428*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85428*0 + 3*60*FLEN/8, x4, x1, x2)

inst_28477:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f8000ff; valaddr_reg:x3; val_offset:85431*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85431*0 + 3*61*FLEN/8, x4, x1, x2)

inst_28478:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f8001ff; valaddr_reg:x3; val_offset:85434*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85434*0 + 3*62*FLEN/8, x4, x1, x2)

inst_28479:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f8003ff; valaddr_reg:x3; val_offset:85437*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85437*0 + 3*63*FLEN/8, x4, x1, x2)

inst_28480:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f8007ff; valaddr_reg:x3; val_offset:85440*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85440*0 + 3*64*FLEN/8, x4, x1, x2)

inst_28481:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f800fff; valaddr_reg:x3; val_offset:85443*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85443*0 + 3*65*FLEN/8, x4, x1, x2)

inst_28482:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f801fff; valaddr_reg:x3; val_offset:85446*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85446*0 + 3*66*FLEN/8, x4, x1, x2)

inst_28483:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f803fff; valaddr_reg:x3; val_offset:85449*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85449*0 + 3*67*FLEN/8, x4, x1, x2)

inst_28484:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f807fff; valaddr_reg:x3; val_offset:85452*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85452*0 + 3*68*FLEN/8, x4, x1, x2)

inst_28485:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f80ffff; valaddr_reg:x3; val_offset:85455*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85455*0 + 3*69*FLEN/8, x4, x1, x2)

inst_28486:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f81ffff; valaddr_reg:x3; val_offset:85458*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85458*0 + 3*70*FLEN/8, x4, x1, x2)

inst_28487:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f83ffff; valaddr_reg:x3; val_offset:85461*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85461*0 + 3*71*FLEN/8, x4, x1, x2)

inst_28488:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f87ffff; valaddr_reg:x3; val_offset:85464*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85464*0 + 3*72*FLEN/8, x4, x1, x2)

inst_28489:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f8fffff; valaddr_reg:x3; val_offset:85467*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85467*0 + 3*73*FLEN/8, x4, x1, x2)

inst_28490:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4f9fffff; valaddr_reg:x3; val_offset:85470*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85470*0 + 3*74*FLEN/8, x4, x1, x2)

inst_28491:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fbfffff; valaddr_reg:x3; val_offset:85473*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85473*0 + 3*75*FLEN/8, x4, x1, x2)

inst_28492:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fc00000; valaddr_reg:x3; val_offset:85476*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85476*0 + 3*76*FLEN/8, x4, x1, x2)

inst_28493:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fe00000; valaddr_reg:x3; val_offset:85479*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85479*0 + 3*77*FLEN/8, x4, x1, x2)

inst_28494:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ff00000; valaddr_reg:x3; val_offset:85482*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85482*0 + 3*78*FLEN/8, x4, x1, x2)

inst_28495:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ff80000; valaddr_reg:x3; val_offset:85485*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85485*0 + 3*79*FLEN/8, x4, x1, x2)

inst_28496:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffc0000; valaddr_reg:x3; val_offset:85488*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85488*0 + 3*80*FLEN/8, x4, x1, x2)

inst_28497:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffe0000; valaddr_reg:x3; val_offset:85491*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85491*0 + 3*81*FLEN/8, x4, x1, x2)

inst_28498:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fff0000; valaddr_reg:x3; val_offset:85494*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85494*0 + 3*82*FLEN/8, x4, x1, x2)

inst_28499:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fff8000; valaddr_reg:x3; val_offset:85497*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85497*0 + 3*83*FLEN/8, x4, x1, x2)

inst_28500:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffc000; valaddr_reg:x3; val_offset:85500*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85500*0 + 3*84*FLEN/8, x4, x1, x2)

inst_28501:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffe000; valaddr_reg:x3; val_offset:85503*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85503*0 + 3*85*FLEN/8, x4, x1, x2)

inst_28502:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffff000; valaddr_reg:x3; val_offset:85506*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85506*0 + 3*86*FLEN/8, x4, x1, x2)

inst_28503:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffff800; valaddr_reg:x3; val_offset:85509*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85509*0 + 3*87*FLEN/8, x4, x1, x2)

inst_28504:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffc00; valaddr_reg:x3; val_offset:85512*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85512*0 + 3*88*FLEN/8, x4, x1, x2)

inst_28505:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffe00; valaddr_reg:x3; val_offset:85515*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85515*0 + 3*89*FLEN/8, x4, x1, x2)

inst_28506:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffff00; valaddr_reg:x3; val_offset:85518*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85518*0 + 3*90*FLEN/8, x4, x1, x2)

inst_28507:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffff80; valaddr_reg:x3; val_offset:85521*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85521*0 + 3*91*FLEN/8, x4, x1, x2)

inst_28508:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffffc0; valaddr_reg:x3; val_offset:85524*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85524*0 + 3*92*FLEN/8, x4, x1, x2)

inst_28509:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffffe0; valaddr_reg:x3; val_offset:85527*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85527*0 + 3*93*FLEN/8, x4, x1, x2)

inst_28510:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffff0; valaddr_reg:x3; val_offset:85530*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85530*0 + 3*94*FLEN/8, x4, x1, x2)

inst_28511:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffff8; valaddr_reg:x3; val_offset:85533*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85533*0 + 3*95*FLEN/8, x4, x1, x2)

inst_28512:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffffc; valaddr_reg:x3; val_offset:85536*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85536*0 + 3*96*FLEN/8, x4, x1, x2)

inst_28513:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4ffffffe; valaddr_reg:x3; val_offset:85539*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85539*0 + 3*97*FLEN/8, x4, x1, x2)

inst_28514:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03;
op3val:0x4fffffff; valaddr_reg:x3; val_offset:85542*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85542*0 + 3*98*FLEN/8, x4, x1, x2)

inst_28515:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:85545*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85545*0 + 3*99*FLEN/8, x4, x1, x2)

inst_28516:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:85548*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85548*0 + 3*100*FLEN/8, x4, x1, x2)

inst_28517:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:85551*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85551*0 + 3*101*FLEN/8, x4, x1, x2)

inst_28518:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:85554*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85554*0 + 3*102*FLEN/8, x4, x1, x2)

inst_28519:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:85557*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85557*0 + 3*103*FLEN/8, x4, x1, x2)

inst_28520:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:85560*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85560*0 + 3*104*FLEN/8, x4, x1, x2)

inst_28521:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:85563*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85563*0 + 3*105*FLEN/8, x4, x1, x2)

inst_28522:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:85566*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85566*0 + 3*106*FLEN/8, x4, x1, x2)

inst_28523:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:85569*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85569*0 + 3*107*FLEN/8, x4, x1, x2)

inst_28524:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:85572*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85572*0 + 3*108*FLEN/8, x4, x1, x2)

inst_28525:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:85575*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85575*0 + 3*109*FLEN/8, x4, x1, x2)

inst_28526:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:85578*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85578*0 + 3*110*FLEN/8, x4, x1, x2)

inst_28527:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:85581*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85581*0 + 3*111*FLEN/8, x4, x1, x2)

inst_28528:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:85584*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85584*0 + 3*112*FLEN/8, x4, x1, x2)

inst_28529:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:85587*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85587*0 + 3*113*FLEN/8, x4, x1, x2)

inst_28530:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:85590*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85590*0 + 3*114*FLEN/8, x4, x1, x2)

inst_28531:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a000000; valaddr_reg:x3; val_offset:85593*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85593*0 + 3*115*FLEN/8, x4, x1, x2)

inst_28532:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a000001; valaddr_reg:x3; val_offset:85596*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85596*0 + 3*116*FLEN/8, x4, x1, x2)

inst_28533:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a000003; valaddr_reg:x3; val_offset:85599*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85599*0 + 3*117*FLEN/8, x4, x1, x2)

inst_28534:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a000007; valaddr_reg:x3; val_offset:85602*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85602*0 + 3*118*FLEN/8, x4, x1, x2)

inst_28535:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a00000f; valaddr_reg:x3; val_offset:85605*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85605*0 + 3*119*FLEN/8, x4, x1, x2)

inst_28536:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a00001f; valaddr_reg:x3; val_offset:85608*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85608*0 + 3*120*FLEN/8, x4, x1, x2)

inst_28537:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a00003f; valaddr_reg:x3; val_offset:85611*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85611*0 + 3*121*FLEN/8, x4, x1, x2)

inst_28538:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a00007f; valaddr_reg:x3; val_offset:85614*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85614*0 + 3*122*FLEN/8, x4, x1, x2)

inst_28539:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a0000ff; valaddr_reg:x3; val_offset:85617*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85617*0 + 3*123*FLEN/8, x4, x1, x2)

inst_28540:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a0001ff; valaddr_reg:x3; val_offset:85620*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85620*0 + 3*124*FLEN/8, x4, x1, x2)

inst_28541:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a0003ff; valaddr_reg:x3; val_offset:85623*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85623*0 + 3*125*FLEN/8, x4, x1, x2)

inst_28542:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a0007ff; valaddr_reg:x3; val_offset:85626*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85626*0 + 3*126*FLEN/8, x4, x1, x2)

inst_28543:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a000fff; valaddr_reg:x3; val_offset:85629*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85629*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_28544:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a001fff; valaddr_reg:x3; val_offset:85632*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85632*0 + 3*128*FLEN/8, x4, x1, x2)

inst_28545:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a003fff; valaddr_reg:x3; val_offset:85635*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85635*0 + 3*129*FLEN/8, x4, x1, x2)

inst_28546:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a007fff; valaddr_reg:x3; val_offset:85638*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85638*0 + 3*130*FLEN/8, x4, x1, x2)

inst_28547:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a00ffff; valaddr_reg:x3; val_offset:85641*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85641*0 + 3*131*FLEN/8, x4, x1, x2)

inst_28548:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a01ffff; valaddr_reg:x3; val_offset:85644*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85644*0 + 3*132*FLEN/8, x4, x1, x2)

inst_28549:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a03ffff; valaddr_reg:x3; val_offset:85647*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85647*0 + 3*133*FLEN/8, x4, x1, x2)

inst_28550:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a07ffff; valaddr_reg:x3; val_offset:85650*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85650*0 + 3*134*FLEN/8, x4, x1, x2)

inst_28551:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a0fffff; valaddr_reg:x3; val_offset:85653*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85653*0 + 3*135*FLEN/8, x4, x1, x2)

inst_28552:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a1fffff; valaddr_reg:x3; val_offset:85656*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85656*0 + 3*136*FLEN/8, x4, x1, x2)

inst_28553:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a3fffff; valaddr_reg:x3; val_offset:85659*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85659*0 + 3*137*FLEN/8, x4, x1, x2)

inst_28554:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a400000; valaddr_reg:x3; val_offset:85662*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85662*0 + 3*138*FLEN/8, x4, x1, x2)

inst_28555:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a600000; valaddr_reg:x3; val_offset:85665*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85665*0 + 3*139*FLEN/8, x4, x1, x2)

inst_28556:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a700000; valaddr_reg:x3; val_offset:85668*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85668*0 + 3*140*FLEN/8, x4, x1, x2)

inst_28557:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a780000; valaddr_reg:x3; val_offset:85671*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85671*0 + 3*141*FLEN/8, x4, x1, x2)

inst_28558:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7c0000; valaddr_reg:x3; val_offset:85674*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85674*0 + 3*142*FLEN/8, x4, x1, x2)

inst_28559:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7e0000; valaddr_reg:x3; val_offset:85677*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85677*0 + 3*143*FLEN/8, x4, x1, x2)

inst_28560:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7f0000; valaddr_reg:x3; val_offset:85680*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85680*0 + 3*144*FLEN/8, x4, x1, x2)

inst_28561:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7f8000; valaddr_reg:x3; val_offset:85683*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85683*0 + 3*145*FLEN/8, x4, x1, x2)

inst_28562:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fc000; valaddr_reg:x3; val_offset:85686*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85686*0 + 3*146*FLEN/8, x4, x1, x2)

inst_28563:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fe000; valaddr_reg:x3; val_offset:85689*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85689*0 + 3*147*FLEN/8, x4, x1, x2)

inst_28564:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ff000; valaddr_reg:x3; val_offset:85692*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85692*0 + 3*148*FLEN/8, x4, x1, x2)

inst_28565:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ff800; valaddr_reg:x3; val_offset:85695*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85695*0 + 3*149*FLEN/8, x4, x1, x2)

inst_28566:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:85698*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85698*0 + 3*150*FLEN/8, x4, x1, x2)

inst_28567:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:85701*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85701*0 + 3*151*FLEN/8, x4, x1, x2)

inst_28568:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fff00; valaddr_reg:x3; val_offset:85704*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85704*0 + 3*152*FLEN/8, x4, x1, x2)

inst_28569:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fff80; valaddr_reg:x3; val_offset:85707*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85707*0 + 3*153*FLEN/8, x4, x1, x2)

inst_28570:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:85710*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85710*0 + 3*154*FLEN/8, x4, x1, x2)

inst_28571:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:85713*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85713*0 + 3*155*FLEN/8, x4, x1, x2)

inst_28572:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:85716*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85716*0 + 3*156*FLEN/8, x4, x1, x2)

inst_28573:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:85719*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85719*0 + 3*157*FLEN/8, x4, x1, x2)

inst_28574:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:85722*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85722*0 + 3*158*FLEN/8, x4, x1, x2)

inst_28575:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:85725*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85725*0 + 3*159*FLEN/8, x4, x1, x2)

inst_28576:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000;
op3val:0x8a7fffff; valaddr_reg:x3; val_offset:85728*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85728*0 + 3*160*FLEN/8, x4, x1, x2)

inst_28577:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68800000; valaddr_reg:x3; val_offset:85731*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85731*0 + 3*161*FLEN/8, x4, x1, x2)

inst_28578:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68800001; valaddr_reg:x3; val_offset:85734*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85734*0 + 3*162*FLEN/8, x4, x1, x2)

inst_28579:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68800003; valaddr_reg:x3; val_offset:85737*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85737*0 + 3*163*FLEN/8, x4, x1, x2)

inst_28580:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68800007; valaddr_reg:x3; val_offset:85740*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85740*0 + 3*164*FLEN/8, x4, x1, x2)

inst_28581:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6880000f; valaddr_reg:x3; val_offset:85743*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85743*0 + 3*165*FLEN/8, x4, x1, x2)

inst_28582:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6880001f; valaddr_reg:x3; val_offset:85746*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85746*0 + 3*166*FLEN/8, x4, x1, x2)

inst_28583:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6880003f; valaddr_reg:x3; val_offset:85749*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85749*0 + 3*167*FLEN/8, x4, x1, x2)

inst_28584:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6880007f; valaddr_reg:x3; val_offset:85752*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85752*0 + 3*168*FLEN/8, x4, x1, x2)

inst_28585:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x688000ff; valaddr_reg:x3; val_offset:85755*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85755*0 + 3*169*FLEN/8, x4, x1, x2)

inst_28586:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x688001ff; valaddr_reg:x3; val_offset:85758*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85758*0 + 3*170*FLEN/8, x4, x1, x2)

inst_28587:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x688003ff; valaddr_reg:x3; val_offset:85761*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85761*0 + 3*171*FLEN/8, x4, x1, x2)

inst_28588:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x688007ff; valaddr_reg:x3; val_offset:85764*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85764*0 + 3*172*FLEN/8, x4, x1, x2)

inst_28589:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68800fff; valaddr_reg:x3; val_offset:85767*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85767*0 + 3*173*FLEN/8, x4, x1, x2)

inst_28590:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68801fff; valaddr_reg:x3; val_offset:85770*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85770*0 + 3*174*FLEN/8, x4, x1, x2)

inst_28591:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68803fff; valaddr_reg:x3; val_offset:85773*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85773*0 + 3*175*FLEN/8, x4, x1, x2)

inst_28592:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68807fff; valaddr_reg:x3; val_offset:85776*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85776*0 + 3*176*FLEN/8, x4, x1, x2)

inst_28593:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6880ffff; valaddr_reg:x3; val_offset:85779*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85779*0 + 3*177*FLEN/8, x4, x1, x2)

inst_28594:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6881ffff; valaddr_reg:x3; val_offset:85782*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85782*0 + 3*178*FLEN/8, x4, x1, x2)

inst_28595:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6883ffff; valaddr_reg:x3; val_offset:85785*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85785*0 + 3*179*FLEN/8, x4, x1, x2)

inst_28596:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x6887ffff; valaddr_reg:x3; val_offset:85788*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85788*0 + 3*180*FLEN/8, x4, x1, x2)

inst_28597:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x688fffff; valaddr_reg:x3; val_offset:85791*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85791*0 + 3*181*FLEN/8, x4, x1, x2)

inst_28598:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x689fffff; valaddr_reg:x3; val_offset:85794*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85794*0 + 3*182*FLEN/8, x4, x1, x2)

inst_28599:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68bfffff; valaddr_reg:x3; val_offset:85797*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85797*0 + 3*183*FLEN/8, x4, x1, x2)

inst_28600:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68c00000; valaddr_reg:x3; val_offset:85800*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85800*0 + 3*184*FLEN/8, x4, x1, x2)

inst_28601:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68e00000; valaddr_reg:x3; val_offset:85803*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85803*0 + 3*185*FLEN/8, x4, x1, x2)

inst_28602:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68f00000; valaddr_reg:x3; val_offset:85806*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85806*0 + 3*186*FLEN/8, x4, x1, x2)

inst_28603:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68f80000; valaddr_reg:x3; val_offset:85809*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85809*0 + 3*187*FLEN/8, x4, x1, x2)

inst_28604:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fc0000; valaddr_reg:x3; val_offset:85812*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85812*0 + 3*188*FLEN/8, x4, x1, x2)

inst_28605:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fe0000; valaddr_reg:x3; val_offset:85815*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85815*0 + 3*189*FLEN/8, x4, x1, x2)

inst_28606:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ff0000; valaddr_reg:x3; val_offset:85818*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85818*0 + 3*190*FLEN/8, x4, x1, x2)

inst_28607:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ff8000; valaddr_reg:x3; val_offset:85821*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85821*0 + 3*191*FLEN/8, x4, x1, x2)

inst_28608:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffc000; valaddr_reg:x3; val_offset:85824*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85824*0 + 3*192*FLEN/8, x4, x1, x2)

inst_28609:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffe000; valaddr_reg:x3; val_offset:85827*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85827*0 + 3*193*FLEN/8, x4, x1, x2)

inst_28610:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fff000; valaddr_reg:x3; val_offset:85830*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85830*0 + 3*194*FLEN/8, x4, x1, x2)

inst_28611:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fff800; valaddr_reg:x3; val_offset:85833*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85833*0 + 3*195*FLEN/8, x4, x1, x2)

inst_28612:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffc00; valaddr_reg:x3; val_offset:85836*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85836*0 + 3*196*FLEN/8, x4, x1, x2)

inst_28613:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffe00; valaddr_reg:x3; val_offset:85839*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85839*0 + 3*197*FLEN/8, x4, x1, x2)

inst_28614:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffff00; valaddr_reg:x3; val_offset:85842*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85842*0 + 3*198*FLEN/8, x4, x1, x2)

inst_28615:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffff80; valaddr_reg:x3; val_offset:85845*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85845*0 + 3*199*FLEN/8, x4, x1, x2)

inst_28616:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffffc0; valaddr_reg:x3; val_offset:85848*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85848*0 + 3*200*FLEN/8, x4, x1, x2)

inst_28617:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffffe0; valaddr_reg:x3; val_offset:85851*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85851*0 + 3*201*FLEN/8, x4, x1, x2)

inst_28618:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffff0; valaddr_reg:x3; val_offset:85854*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85854*0 + 3*202*FLEN/8, x4, x1, x2)

inst_28619:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffff8; valaddr_reg:x3; val_offset:85857*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85857*0 + 3*203*FLEN/8, x4, x1, x2)

inst_28620:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffffc; valaddr_reg:x3; val_offset:85860*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85860*0 + 3*204*FLEN/8, x4, x1, x2)

inst_28621:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68fffffe; valaddr_reg:x3; val_offset:85863*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85863*0 + 3*205*FLEN/8, x4, x1, x2)

inst_28622:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x68ffffff; valaddr_reg:x3; val_offset:85866*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85866*0 + 3*206*FLEN/8, x4, x1, x2)

inst_28623:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f000001; valaddr_reg:x3; val_offset:85869*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85869*0 + 3*207*FLEN/8, x4, x1, x2)

inst_28624:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f000003; valaddr_reg:x3; val_offset:85872*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85872*0 + 3*208*FLEN/8, x4, x1, x2)

inst_28625:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f000007; valaddr_reg:x3; val_offset:85875*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85875*0 + 3*209*FLEN/8, x4, x1, x2)

inst_28626:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f199999; valaddr_reg:x3; val_offset:85878*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85878*0 + 3*210*FLEN/8, x4, x1, x2)

inst_28627:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f249249; valaddr_reg:x3; val_offset:85881*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85881*0 + 3*211*FLEN/8, x4, x1, x2)

inst_28628:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f333333; valaddr_reg:x3; val_offset:85884*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85884*0 + 3*212*FLEN/8, x4, x1, x2)

inst_28629:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:85887*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85887*0 + 3*213*FLEN/8, x4, x1, x2)

inst_28630:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:85890*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85890*0 + 3*214*FLEN/8, x4, x1, x2)

inst_28631:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f444444; valaddr_reg:x3; val_offset:85893*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85893*0 + 3*215*FLEN/8, x4, x1, x2)

inst_28632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:85896*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85896*0 + 3*216*FLEN/8, x4, x1, x2)

inst_28633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:85899*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85899*0 + 3*217*FLEN/8, x4, x1, x2)

inst_28634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f666666; valaddr_reg:x3; val_offset:85902*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85902*0 + 3*218*FLEN/8, x4, x1, x2)

inst_28635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:85905*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85905*0 + 3*219*FLEN/8, x4, x1, x2)

inst_28636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:85908*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85908*0 + 3*220*FLEN/8, x4, x1, x2)

inst_28637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:85911*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85911*0 + 3*221*FLEN/8, x4, x1, x2)

inst_28638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:85914*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85914*0 + 3*222*FLEN/8, x4, x1, x2)

inst_28639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3000000; valaddr_reg:x3; val_offset:85917*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85917*0 + 3*223*FLEN/8, x4, x1, x2)

inst_28640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3000001; valaddr_reg:x3; val_offset:85920*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85920*0 + 3*224*FLEN/8, x4, x1, x2)

inst_28641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3000003; valaddr_reg:x3; val_offset:85923*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85923*0 + 3*225*FLEN/8, x4, x1, x2)

inst_28642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3000007; valaddr_reg:x3; val_offset:85926*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85926*0 + 3*226*FLEN/8, x4, x1, x2)

inst_28643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa300000f; valaddr_reg:x3; val_offset:85929*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85929*0 + 3*227*FLEN/8, x4, x1, x2)

inst_28644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa300001f; valaddr_reg:x3; val_offset:85932*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85932*0 + 3*228*FLEN/8, x4, x1, x2)

inst_28645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa300003f; valaddr_reg:x3; val_offset:85935*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85935*0 + 3*229*FLEN/8, x4, x1, x2)

inst_28646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa300007f; valaddr_reg:x3; val_offset:85938*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85938*0 + 3*230*FLEN/8, x4, x1, x2)

inst_28647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa30000ff; valaddr_reg:x3; val_offset:85941*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85941*0 + 3*231*FLEN/8, x4, x1, x2)

inst_28648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa30001ff; valaddr_reg:x3; val_offset:85944*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85944*0 + 3*232*FLEN/8, x4, x1, x2)

inst_28649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa30003ff; valaddr_reg:x3; val_offset:85947*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85947*0 + 3*233*FLEN/8, x4, x1, x2)

inst_28650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa30007ff; valaddr_reg:x3; val_offset:85950*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85950*0 + 3*234*FLEN/8, x4, x1, x2)

inst_28651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3000fff; valaddr_reg:x3; val_offset:85953*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85953*0 + 3*235*FLEN/8, x4, x1, x2)

inst_28652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3001fff; valaddr_reg:x3; val_offset:85956*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85956*0 + 3*236*FLEN/8, x4, x1, x2)

inst_28653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3003fff; valaddr_reg:x3; val_offset:85959*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85959*0 + 3*237*FLEN/8, x4, x1, x2)

inst_28654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3007fff; valaddr_reg:x3; val_offset:85962*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85962*0 + 3*238*FLEN/8, x4, x1, x2)

inst_28655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa300ffff; valaddr_reg:x3; val_offset:85965*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85965*0 + 3*239*FLEN/8, x4, x1, x2)

inst_28656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa301ffff; valaddr_reg:x3; val_offset:85968*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85968*0 + 3*240*FLEN/8, x4, x1, x2)

inst_28657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa303ffff; valaddr_reg:x3; val_offset:85971*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85971*0 + 3*241*FLEN/8, x4, x1, x2)

inst_28658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa307ffff; valaddr_reg:x3; val_offset:85974*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85974*0 + 3*242*FLEN/8, x4, x1, x2)

inst_28659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa30fffff; valaddr_reg:x3; val_offset:85977*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85977*0 + 3*243*FLEN/8, x4, x1, x2)

inst_28660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa31fffff; valaddr_reg:x3; val_offset:85980*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85980*0 + 3*244*FLEN/8, x4, x1, x2)

inst_28661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa33fffff; valaddr_reg:x3; val_offset:85983*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85983*0 + 3*245*FLEN/8, x4, x1, x2)

inst_28662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3400000; valaddr_reg:x3; val_offset:85986*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85986*0 + 3*246*FLEN/8, x4, x1, x2)

inst_28663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3600000; valaddr_reg:x3; val_offset:85989*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85989*0 + 3*247*FLEN/8, x4, x1, x2)

inst_28664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3700000; valaddr_reg:x3; val_offset:85992*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85992*0 + 3*248*FLEN/8, x4, x1, x2)

inst_28665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa3780000; valaddr_reg:x3; val_offset:85995*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85995*0 + 3*249*FLEN/8, x4, x1, x2)

inst_28666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37c0000; valaddr_reg:x3; val_offset:85998*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85998*0 + 3*250*FLEN/8, x4, x1, x2)

inst_28667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37e0000; valaddr_reg:x3; val_offset:86001*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86001*0 + 3*251*FLEN/8, x4, x1, x2)

inst_28668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37f0000; valaddr_reg:x3; val_offset:86004*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86004*0 + 3*252*FLEN/8, x4, x1, x2)

inst_28669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37f8000; valaddr_reg:x3; val_offset:86007*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86007*0 + 3*253*FLEN/8, x4, x1, x2)

inst_28670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fc000; valaddr_reg:x3; val_offset:86010*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86010*0 + 3*254*FLEN/8, x4, x1, x2)

inst_28671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fe000; valaddr_reg:x3; val_offset:86013*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86013*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_28672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ff000; valaddr_reg:x3; val_offset:86016*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86016*0 + 3*256*FLEN/8, x4, x1, x2)

inst_28673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ff800; valaddr_reg:x3; val_offset:86019*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86019*0 + 3*257*FLEN/8, x4, x1, x2)

inst_28674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffc00; valaddr_reg:x3; val_offset:86022*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86022*0 + 3*258*FLEN/8, x4, x1, x2)

inst_28675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffe00; valaddr_reg:x3; val_offset:86025*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86025*0 + 3*259*FLEN/8, x4, x1, x2)

inst_28676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fff00; valaddr_reg:x3; val_offset:86028*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86028*0 + 3*260*FLEN/8, x4, x1, x2)

inst_28677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fff80; valaddr_reg:x3; val_offset:86031*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86031*0 + 3*261*FLEN/8, x4, x1, x2)

inst_28678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fffc0; valaddr_reg:x3; val_offset:86034*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86034*0 + 3*262*FLEN/8, x4, x1, x2)

inst_28679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fffe0; valaddr_reg:x3; val_offset:86037*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86037*0 + 3*263*FLEN/8, x4, x1, x2)

inst_28680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffff0; valaddr_reg:x3; val_offset:86040*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86040*0 + 3*264*FLEN/8, x4, x1, x2)

inst_28681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffff8; valaddr_reg:x3; val_offset:86043*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86043*0 + 3*265*FLEN/8, x4, x1, x2)

inst_28682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffffc; valaddr_reg:x3; val_offset:86046*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86046*0 + 3*266*FLEN/8, x4, x1, x2)

inst_28683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37ffffe; valaddr_reg:x3; val_offset:86049*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86049*0 + 3*267*FLEN/8, x4, x1, x2)

inst_28684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xa37fffff; valaddr_reg:x3; val_offset:86052*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86052*0 + 3*268*FLEN/8, x4, x1, x2)

inst_28685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbf800001; valaddr_reg:x3; val_offset:86055*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86055*0 + 3*269*FLEN/8, x4, x1, x2)

inst_28686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbf800003; valaddr_reg:x3; val_offset:86058*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86058*0 + 3*270*FLEN/8, x4, x1, x2)

inst_28687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbf800007; valaddr_reg:x3; val_offset:86061*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86061*0 + 3*271*FLEN/8, x4, x1, x2)

inst_28688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbf999999; valaddr_reg:x3; val_offset:86064*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86064*0 + 3*272*FLEN/8, x4, x1, x2)

inst_28689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:86067*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86067*0 + 3*273*FLEN/8, x4, x1, x2)

inst_28690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:86070*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86070*0 + 3*274*FLEN/8, x4, x1, x2)

inst_28691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86073*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86073*0 + 3*275*FLEN/8, x4, x1, x2)

inst_28692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86076*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86076*0 + 3*276*FLEN/8, x4, x1, x2)

inst_28693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:86079*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86079*0 + 3*277*FLEN/8, x4, x1, x2)

inst_28694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86082*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86082*0 + 3*278*FLEN/8, x4, x1, x2)

inst_28695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86085*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86085*0 + 3*279*FLEN/8, x4, x1, x2)

inst_28696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:86088*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86088*0 + 3*280*FLEN/8, x4, x1, x2)

inst_28697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86091*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86091*0 + 3*281*FLEN/8, x4, x1, x2)

inst_28698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:86094*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86094*0 + 3*282*FLEN/8, x4, x1, x2)

inst_28699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:86097*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86097*0 + 3*283*FLEN/8, x4, x1, x2)

inst_28700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:86100*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86100*0 + 3*284*FLEN/8, x4, x1, x2)

inst_28701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:86103*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86103*0 + 3*285*FLEN/8, x4, x1, x2)

inst_28702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:86106*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86106*0 + 3*286*FLEN/8, x4, x1, x2)

inst_28703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:86109*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86109*0 + 3*287*FLEN/8, x4, x1, x2)

inst_28704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:86112*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86112*0 + 3*288*FLEN/8, x4, x1, x2)

inst_28705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:86115*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86115*0 + 3*289*FLEN/8, x4, x1, x2)

inst_28706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:86118*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86118*0 + 3*290*FLEN/8, x4, x1, x2)

inst_28707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:86121*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86121*0 + 3*291*FLEN/8, x4, x1, x2)

inst_28708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:86124*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86124*0 + 3*292*FLEN/8, x4, x1, x2)

inst_28709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:86127*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86127*0 + 3*293*FLEN/8, x4, x1, x2)

inst_28710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:86130*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86130*0 + 3*294*FLEN/8, x4, x1, x2)

inst_28711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:86133*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86133*0 + 3*295*FLEN/8, x4, x1, x2)

inst_28712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:86136*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86136*0 + 3*296*FLEN/8, x4, x1, x2)

inst_28713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:86139*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86139*0 + 3*297*FLEN/8, x4, x1, x2)

inst_28714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:86142*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86142*0 + 3*298*FLEN/8, x4, x1, x2)

inst_28715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:86145*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86145*0 + 3*299*FLEN/8, x4, x1, x2)

inst_28716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:86148*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86148*0 + 3*300*FLEN/8, x4, x1, x2)

inst_28717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10000000; valaddr_reg:x3; val_offset:86151*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86151*0 + 3*301*FLEN/8, x4, x1, x2)

inst_28718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10000001; valaddr_reg:x3; val_offset:86154*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86154*0 + 3*302*FLEN/8, x4, x1, x2)

inst_28719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10000003; valaddr_reg:x3; val_offset:86157*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86157*0 + 3*303*FLEN/8, x4, x1, x2)

inst_28720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10000007; valaddr_reg:x3; val_offset:86160*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86160*0 + 3*304*FLEN/8, x4, x1, x2)

inst_28721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1000000f; valaddr_reg:x3; val_offset:86163*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86163*0 + 3*305*FLEN/8, x4, x1, x2)

inst_28722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1000001f; valaddr_reg:x3; val_offset:86166*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86166*0 + 3*306*FLEN/8, x4, x1, x2)

inst_28723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1000003f; valaddr_reg:x3; val_offset:86169*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86169*0 + 3*307*FLEN/8, x4, x1, x2)

inst_28724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1000007f; valaddr_reg:x3; val_offset:86172*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86172*0 + 3*308*FLEN/8, x4, x1, x2)

inst_28725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x100000ff; valaddr_reg:x3; val_offset:86175*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86175*0 + 3*309*FLEN/8, x4, x1, x2)

inst_28726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x100001ff; valaddr_reg:x3; val_offset:86178*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86178*0 + 3*310*FLEN/8, x4, x1, x2)

inst_28727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x100003ff; valaddr_reg:x3; val_offset:86181*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86181*0 + 3*311*FLEN/8, x4, x1, x2)

inst_28728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x100007ff; valaddr_reg:x3; val_offset:86184*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86184*0 + 3*312*FLEN/8, x4, x1, x2)

inst_28729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10000fff; valaddr_reg:x3; val_offset:86187*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86187*0 + 3*313*FLEN/8, x4, x1, x2)

inst_28730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10001fff; valaddr_reg:x3; val_offset:86190*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86190*0 + 3*314*FLEN/8, x4, x1, x2)

inst_28731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10003fff; valaddr_reg:x3; val_offset:86193*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86193*0 + 3*315*FLEN/8, x4, x1, x2)

inst_28732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10007fff; valaddr_reg:x3; val_offset:86196*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86196*0 + 3*316*FLEN/8, x4, x1, x2)

inst_28733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1000ffff; valaddr_reg:x3; val_offset:86199*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86199*0 + 3*317*FLEN/8, x4, x1, x2)

inst_28734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1001ffff; valaddr_reg:x3; val_offset:86202*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86202*0 + 3*318*FLEN/8, x4, x1, x2)

inst_28735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1003ffff; valaddr_reg:x3; val_offset:86205*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86205*0 + 3*319*FLEN/8, x4, x1, x2)

inst_28736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x1007ffff; valaddr_reg:x3; val_offset:86208*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86208*0 + 3*320*FLEN/8, x4, x1, x2)

inst_28737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x100fffff; valaddr_reg:x3; val_offset:86211*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86211*0 + 3*321*FLEN/8, x4, x1, x2)

inst_28738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x101fffff; valaddr_reg:x3; val_offset:86214*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86214*0 + 3*322*FLEN/8, x4, x1, x2)

inst_28739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x103fffff; valaddr_reg:x3; val_offset:86217*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86217*0 + 3*323*FLEN/8, x4, x1, x2)

inst_28740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10400000; valaddr_reg:x3; val_offset:86220*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86220*0 + 3*324*FLEN/8, x4, x1, x2)

inst_28741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10600000; valaddr_reg:x3; val_offset:86223*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86223*0 + 3*325*FLEN/8, x4, x1, x2)

inst_28742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10700000; valaddr_reg:x3; val_offset:86226*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86226*0 + 3*326*FLEN/8, x4, x1, x2)

inst_28743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x10780000; valaddr_reg:x3; val_offset:86229*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86229*0 + 3*327*FLEN/8, x4, x1, x2)

inst_28744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107c0000; valaddr_reg:x3; val_offset:86232*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86232*0 + 3*328*FLEN/8, x4, x1, x2)

inst_28745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107e0000; valaddr_reg:x3; val_offset:86235*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86235*0 + 3*329*FLEN/8, x4, x1, x2)

inst_28746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107f0000; valaddr_reg:x3; val_offset:86238*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86238*0 + 3*330*FLEN/8, x4, x1, x2)

inst_28747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107f8000; valaddr_reg:x3; val_offset:86241*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86241*0 + 3*331*FLEN/8, x4, x1, x2)

inst_28748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fc000; valaddr_reg:x3; val_offset:86244*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86244*0 + 3*332*FLEN/8, x4, x1, x2)

inst_28749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fe000; valaddr_reg:x3; val_offset:86247*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86247*0 + 3*333*FLEN/8, x4, x1, x2)

inst_28750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ff000; valaddr_reg:x3; val_offset:86250*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86250*0 + 3*334*FLEN/8, x4, x1, x2)

inst_28751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ff800; valaddr_reg:x3; val_offset:86253*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86253*0 + 3*335*FLEN/8, x4, x1, x2)

inst_28752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffc00; valaddr_reg:x3; val_offset:86256*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86256*0 + 3*336*FLEN/8, x4, x1, x2)

inst_28753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffe00; valaddr_reg:x3; val_offset:86259*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86259*0 + 3*337*FLEN/8, x4, x1, x2)

inst_28754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fff00; valaddr_reg:x3; val_offset:86262*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86262*0 + 3*338*FLEN/8, x4, x1, x2)

inst_28755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fff80; valaddr_reg:x3; val_offset:86265*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86265*0 + 3*339*FLEN/8, x4, x1, x2)

inst_28756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fffc0; valaddr_reg:x3; val_offset:86268*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86268*0 + 3*340*FLEN/8, x4, x1, x2)

inst_28757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fffe0; valaddr_reg:x3; val_offset:86271*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86271*0 + 3*341*FLEN/8, x4, x1, x2)

inst_28758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffff0; valaddr_reg:x3; val_offset:86274*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86274*0 + 3*342*FLEN/8, x4, x1, x2)

inst_28759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffff8; valaddr_reg:x3; val_offset:86277*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86277*0 + 3*343*FLEN/8, x4, x1, x2)

inst_28760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffffc; valaddr_reg:x3; val_offset:86280*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86280*0 + 3*344*FLEN/8, x4, x1, x2)

inst_28761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107ffffe; valaddr_reg:x3; val_offset:86283*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86283*0 + 3*345*FLEN/8, x4, x1, x2)

inst_28762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0;
op3val:0x107fffff; valaddr_reg:x3; val_offset:86286*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86286*0 + 3*346*FLEN/8, x4, x1, x2)

inst_28763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:86289*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86289*0 + 3*347*FLEN/8, x4, x1, x2)

inst_28764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:86292*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86292*0 + 3*348*FLEN/8, x4, x1, x2)

inst_28765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:86295*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86295*0 + 3*349*FLEN/8, x4, x1, x2)

inst_28766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:86298*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86298*0 + 3*350*FLEN/8, x4, x1, x2)

inst_28767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:86301*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86301*0 + 3*351*FLEN/8, x4, x1, x2)

inst_28768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:86304*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86304*0 + 3*352*FLEN/8, x4, x1, x2)

inst_28769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:86307*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86307*0 + 3*353*FLEN/8, x4, x1, x2)

inst_28770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86310*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86310*0 + 3*354*FLEN/8, x4, x1, x2)

inst_28771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:86313*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86313*0 + 3*355*FLEN/8, x4, x1, x2)

inst_28772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:86316*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86316*0 + 3*356*FLEN/8, x4, x1, x2)

inst_28773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:86319*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86319*0 + 3*357*FLEN/8, x4, x1, x2)

inst_28774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:86322*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86322*0 + 3*358*FLEN/8, x4, x1, x2)

inst_28775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:86325*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86325*0 + 3*359*FLEN/8, x4, x1, x2)

inst_28776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:86328*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86328*0 + 3*360*FLEN/8, x4, x1, x2)

inst_28777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:86331*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86331*0 + 3*361*FLEN/8, x4, x1, x2)

inst_28778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:86334*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86334*0 + 3*362*FLEN/8, x4, x1, x2)

inst_28779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800000; valaddr_reg:x3; val_offset:86337*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86337*0 + 3*363*FLEN/8, x4, x1, x2)

inst_28780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800001; valaddr_reg:x3; val_offset:86340*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86340*0 + 3*364*FLEN/8, x4, x1, x2)

inst_28781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800003; valaddr_reg:x3; val_offset:86343*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86343*0 + 3*365*FLEN/8, x4, x1, x2)

inst_28782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800007; valaddr_reg:x3; val_offset:86346*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86346*0 + 3*366*FLEN/8, x4, x1, x2)

inst_28783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880000f; valaddr_reg:x3; val_offset:86349*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86349*0 + 3*367*FLEN/8, x4, x1, x2)

inst_28784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880001f; valaddr_reg:x3; val_offset:86352*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86352*0 + 3*368*FLEN/8, x4, x1, x2)

inst_28785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880003f; valaddr_reg:x3; val_offset:86355*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86355*0 + 3*369*FLEN/8, x4, x1, x2)

inst_28786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880007f; valaddr_reg:x3; val_offset:86358*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86358*0 + 3*370*FLEN/8, x4, x1, x2)

inst_28787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888000ff; valaddr_reg:x3; val_offset:86361*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86361*0 + 3*371*FLEN/8, x4, x1, x2)

inst_28788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888001ff; valaddr_reg:x3; val_offset:86364*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86364*0 + 3*372*FLEN/8, x4, x1, x2)

inst_28789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888003ff; valaddr_reg:x3; val_offset:86367*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86367*0 + 3*373*FLEN/8, x4, x1, x2)

inst_28790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888007ff; valaddr_reg:x3; val_offset:86370*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86370*0 + 3*374*FLEN/8, x4, x1, x2)

inst_28791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88800fff; valaddr_reg:x3; val_offset:86373*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86373*0 + 3*375*FLEN/8, x4, x1, x2)

inst_28792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88801fff; valaddr_reg:x3; val_offset:86376*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86376*0 + 3*376*FLEN/8, x4, x1, x2)

inst_28793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88803fff; valaddr_reg:x3; val_offset:86379*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86379*0 + 3*377*FLEN/8, x4, x1, x2)

inst_28794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88807fff; valaddr_reg:x3; val_offset:86382*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86382*0 + 3*378*FLEN/8, x4, x1, x2)

inst_28795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8880ffff; valaddr_reg:x3; val_offset:86385*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86385*0 + 3*379*FLEN/8, x4, x1, x2)

inst_28796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8881ffff; valaddr_reg:x3; val_offset:86388*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86388*0 + 3*380*FLEN/8, x4, x1, x2)

inst_28797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8883ffff; valaddr_reg:x3; val_offset:86391*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86391*0 + 3*381*FLEN/8, x4, x1, x2)

inst_28798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x8887ffff; valaddr_reg:x3; val_offset:86394*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86394*0 + 3*382*FLEN/8, x4, x1, x2)

inst_28799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x888fffff; valaddr_reg:x3; val_offset:86397*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86397*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_28800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x889fffff; valaddr_reg:x3; val_offset:86400*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86400*0 + 3*384*FLEN/8, x4, x1, x2)

inst_28801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88bfffff; valaddr_reg:x3; val_offset:86403*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86403*0 + 3*385*FLEN/8, x4, x1, x2)

inst_28802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88c00000; valaddr_reg:x3; val_offset:86406*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86406*0 + 3*386*FLEN/8, x4, x1, x2)

inst_28803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88e00000; valaddr_reg:x3; val_offset:86409*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86409*0 + 3*387*FLEN/8, x4, x1, x2)

inst_28804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88f00000; valaddr_reg:x3; val_offset:86412*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86412*0 + 3*388*FLEN/8, x4, x1, x2)

inst_28805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88f80000; valaddr_reg:x3; val_offset:86415*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86415*0 + 3*389*FLEN/8, x4, x1, x2)

inst_28806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fc0000; valaddr_reg:x3; val_offset:86418*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86418*0 + 3*390*FLEN/8, x4, x1, x2)

inst_28807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fe0000; valaddr_reg:x3; val_offset:86421*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86421*0 + 3*391*FLEN/8, x4, x1, x2)

inst_28808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ff0000; valaddr_reg:x3; val_offset:86424*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86424*0 + 3*392*FLEN/8, x4, x1, x2)

inst_28809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ff8000; valaddr_reg:x3; val_offset:86427*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86427*0 + 3*393*FLEN/8, x4, x1, x2)

inst_28810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffc000; valaddr_reg:x3; val_offset:86430*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86430*0 + 3*394*FLEN/8, x4, x1, x2)

inst_28811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffe000; valaddr_reg:x3; val_offset:86433*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86433*0 + 3*395*FLEN/8, x4, x1, x2)

inst_28812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fff000; valaddr_reg:x3; val_offset:86436*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86436*0 + 3*396*FLEN/8, x4, x1, x2)

inst_28813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fff800; valaddr_reg:x3; val_offset:86439*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86439*0 + 3*397*FLEN/8, x4, x1, x2)

inst_28814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffc00; valaddr_reg:x3; val_offset:86442*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86442*0 + 3*398*FLEN/8, x4, x1, x2)

inst_28815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffe00; valaddr_reg:x3; val_offset:86445*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86445*0 + 3*399*FLEN/8, x4, x1, x2)

inst_28816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffff00; valaddr_reg:x3; val_offset:86448*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86448*0 + 3*400*FLEN/8, x4, x1, x2)

inst_28817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffff80; valaddr_reg:x3; val_offset:86451*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86451*0 + 3*401*FLEN/8, x4, x1, x2)

inst_28818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffc0; valaddr_reg:x3; val_offset:86454*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86454*0 + 3*402*FLEN/8, x4, x1, x2)

inst_28819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffe0; valaddr_reg:x3; val_offset:86457*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86457*0 + 3*403*FLEN/8, x4, x1, x2)

inst_28820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffff0; valaddr_reg:x3; val_offset:86460*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86460*0 + 3*404*FLEN/8, x4, x1, x2)

inst_28821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffff8; valaddr_reg:x3; val_offset:86463*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86463*0 + 3*405*FLEN/8, x4, x1, x2)

inst_28822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffffc; valaddr_reg:x3; val_offset:86466*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86466*0 + 3*406*FLEN/8, x4, x1, x2)

inst_28823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88fffffe; valaddr_reg:x3; val_offset:86469*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86469*0 + 3*407*FLEN/8, x4, x1, x2)

inst_28824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000;
op3val:0x88ffffff; valaddr_reg:x3; val_offset:86472*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86472*0 + 3*408*FLEN/8, x4, x1, x2)

inst_28825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:86475*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86475*0 + 3*409*FLEN/8, x4, x1, x2)

inst_28826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:86478*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86478*0 + 3*410*FLEN/8, x4, x1, x2)

inst_28827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:86481*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86481*0 + 3*411*FLEN/8, x4, x1, x2)

inst_28828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:86484*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86484*0 + 3*412*FLEN/8, x4, x1, x2)

inst_28829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:86487*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86487*0 + 3*413*FLEN/8, x4, x1, x2)

inst_28830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:86490*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86490*0 + 3*414*FLEN/8, x4, x1, x2)

inst_28831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:86493*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86493*0 + 3*415*FLEN/8, x4, x1, x2)

inst_28832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86496*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86496*0 + 3*416*FLEN/8, x4, x1, x2)

inst_28833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:86499*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86499*0 + 3*417*FLEN/8, x4, x1, x2)

inst_28834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:86502*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86502*0 + 3*418*FLEN/8, x4, x1, x2)

inst_28835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:86505*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86505*0 + 3*419*FLEN/8, x4, x1, x2)

inst_28836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:86508*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86508*0 + 3*420*FLEN/8, x4, x1, x2)

inst_28837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:86511*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86511*0 + 3*421*FLEN/8, x4, x1, x2)

inst_28838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:86514*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86514*0 + 3*422*FLEN/8, x4, x1, x2)

inst_28839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:86517*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86517*0 + 3*423*FLEN/8, x4, x1, x2)

inst_28840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:86520*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86520*0 + 3*424*FLEN/8, x4, x1, x2)

inst_28841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84000000; valaddr_reg:x3; val_offset:86523*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86523*0 + 3*425*FLEN/8, x4, x1, x2)

inst_28842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84000001; valaddr_reg:x3; val_offset:86526*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86526*0 + 3*426*FLEN/8, x4, x1, x2)

inst_28843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84000003; valaddr_reg:x3; val_offset:86529*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86529*0 + 3*427*FLEN/8, x4, x1, x2)

inst_28844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84000007; valaddr_reg:x3; val_offset:86532*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86532*0 + 3*428*FLEN/8, x4, x1, x2)

inst_28845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8400000f; valaddr_reg:x3; val_offset:86535*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86535*0 + 3*429*FLEN/8, x4, x1, x2)

inst_28846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8400001f; valaddr_reg:x3; val_offset:86538*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86538*0 + 3*430*FLEN/8, x4, x1, x2)

inst_28847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8400003f; valaddr_reg:x3; val_offset:86541*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86541*0 + 3*431*FLEN/8, x4, x1, x2)

inst_28848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8400007f; valaddr_reg:x3; val_offset:86544*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86544*0 + 3*432*FLEN/8, x4, x1, x2)

inst_28849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x840000ff; valaddr_reg:x3; val_offset:86547*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86547*0 + 3*433*FLEN/8, x4, x1, x2)

inst_28850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x840001ff; valaddr_reg:x3; val_offset:86550*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86550*0 + 3*434*FLEN/8, x4, x1, x2)

inst_28851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x840003ff; valaddr_reg:x3; val_offset:86553*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86553*0 + 3*435*FLEN/8, x4, x1, x2)

inst_28852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x840007ff; valaddr_reg:x3; val_offset:86556*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86556*0 + 3*436*FLEN/8, x4, x1, x2)

inst_28853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84000fff; valaddr_reg:x3; val_offset:86559*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86559*0 + 3*437*FLEN/8, x4, x1, x2)

inst_28854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84001fff; valaddr_reg:x3; val_offset:86562*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86562*0 + 3*438*FLEN/8, x4, x1, x2)

inst_28855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84003fff; valaddr_reg:x3; val_offset:86565*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86565*0 + 3*439*FLEN/8, x4, x1, x2)

inst_28856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84007fff; valaddr_reg:x3; val_offset:86568*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86568*0 + 3*440*FLEN/8, x4, x1, x2)

inst_28857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8400ffff; valaddr_reg:x3; val_offset:86571*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86571*0 + 3*441*FLEN/8, x4, x1, x2)

inst_28858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8401ffff; valaddr_reg:x3; val_offset:86574*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86574*0 + 3*442*FLEN/8, x4, x1, x2)

inst_28859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8403ffff; valaddr_reg:x3; val_offset:86577*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86577*0 + 3*443*FLEN/8, x4, x1, x2)

inst_28860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x8407ffff; valaddr_reg:x3; val_offset:86580*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86580*0 + 3*444*FLEN/8, x4, x1, x2)

inst_28861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x840fffff; valaddr_reg:x3; val_offset:86583*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86583*0 + 3*445*FLEN/8, x4, x1, x2)

inst_28862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x841fffff; valaddr_reg:x3; val_offset:86586*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86586*0 + 3*446*FLEN/8, x4, x1, x2)

inst_28863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x843fffff; valaddr_reg:x3; val_offset:86589*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86589*0 + 3*447*FLEN/8, x4, x1, x2)

inst_28864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84400000; valaddr_reg:x3; val_offset:86592*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86592*0 + 3*448*FLEN/8, x4, x1, x2)

inst_28865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84600000; valaddr_reg:x3; val_offset:86595*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86595*0 + 3*449*FLEN/8, x4, x1, x2)

inst_28866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84700000; valaddr_reg:x3; val_offset:86598*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86598*0 + 3*450*FLEN/8, x4, x1, x2)

inst_28867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x84780000; valaddr_reg:x3; val_offset:86601*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86601*0 + 3*451*FLEN/8, x4, x1, x2)

inst_28868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847c0000; valaddr_reg:x3; val_offset:86604*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86604*0 + 3*452*FLEN/8, x4, x1, x2)

inst_28869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847e0000; valaddr_reg:x3; val_offset:86607*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86607*0 + 3*453*FLEN/8, x4, x1, x2)

inst_28870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847f0000; valaddr_reg:x3; val_offset:86610*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86610*0 + 3*454*FLEN/8, x4, x1, x2)

inst_28871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847f8000; valaddr_reg:x3; val_offset:86613*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86613*0 + 3*455*FLEN/8, x4, x1, x2)

inst_28872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fc000; valaddr_reg:x3; val_offset:86616*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86616*0 + 3*456*FLEN/8, x4, x1, x2)

inst_28873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fe000; valaddr_reg:x3; val_offset:86619*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86619*0 + 3*457*FLEN/8, x4, x1, x2)

inst_28874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ff000; valaddr_reg:x3; val_offset:86622*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86622*0 + 3*458*FLEN/8, x4, x1, x2)

inst_28875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ff800; valaddr_reg:x3; val_offset:86625*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86625*0 + 3*459*FLEN/8, x4, x1, x2)

inst_28876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffc00; valaddr_reg:x3; val_offset:86628*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86628*0 + 3*460*FLEN/8, x4, x1, x2)

inst_28877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffe00; valaddr_reg:x3; val_offset:86631*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86631*0 + 3*461*FLEN/8, x4, x1, x2)

inst_28878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fff00; valaddr_reg:x3; val_offset:86634*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86634*0 + 3*462*FLEN/8, x4, x1, x2)

inst_28879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fff80; valaddr_reg:x3; val_offset:86637*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86637*0 + 3*463*FLEN/8, x4, x1, x2)

inst_28880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fffc0; valaddr_reg:x3; val_offset:86640*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86640*0 + 3*464*FLEN/8, x4, x1, x2)

inst_28881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fffe0; valaddr_reg:x3; val_offset:86643*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86643*0 + 3*465*FLEN/8, x4, x1, x2)

inst_28882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffff0; valaddr_reg:x3; val_offset:86646*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86646*0 + 3*466*FLEN/8, x4, x1, x2)

inst_28883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffff8; valaddr_reg:x3; val_offset:86649*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86649*0 + 3*467*FLEN/8, x4, x1, x2)

inst_28884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffffc; valaddr_reg:x3; val_offset:86652*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86652*0 + 3*468*FLEN/8, x4, x1, x2)

inst_28885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847ffffe; valaddr_reg:x3; val_offset:86655*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86655*0 + 3*469*FLEN/8, x4, x1, x2)

inst_28886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000;
op3val:0x847fffff; valaddr_reg:x3; val_offset:86658*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86658*0 + 3*470*FLEN/8, x4, x1, x2)

inst_28887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7800000; valaddr_reg:x3; val_offset:86661*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86661*0 + 3*471*FLEN/8, x4, x1, x2)

inst_28888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7800001; valaddr_reg:x3; val_offset:86664*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86664*0 + 3*472*FLEN/8, x4, x1, x2)

inst_28889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7800003; valaddr_reg:x3; val_offset:86667*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86667*0 + 3*473*FLEN/8, x4, x1, x2)

inst_28890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7800007; valaddr_reg:x3; val_offset:86670*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86670*0 + 3*474*FLEN/8, x4, x1, x2)

inst_28891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb780000f; valaddr_reg:x3; val_offset:86673*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86673*0 + 3*475*FLEN/8, x4, x1, x2)

inst_28892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb780001f; valaddr_reg:x3; val_offset:86676*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86676*0 + 3*476*FLEN/8, x4, x1, x2)

inst_28893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb780003f; valaddr_reg:x3; val_offset:86679*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86679*0 + 3*477*FLEN/8, x4, x1, x2)

inst_28894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb780007f; valaddr_reg:x3; val_offset:86682*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86682*0 + 3*478*FLEN/8, x4, x1, x2)

inst_28895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb78000ff; valaddr_reg:x3; val_offset:86685*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86685*0 + 3*479*FLEN/8, x4, x1, x2)

inst_28896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb78001ff; valaddr_reg:x3; val_offset:86688*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86688*0 + 3*480*FLEN/8, x4, x1, x2)

inst_28897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb78003ff; valaddr_reg:x3; val_offset:86691*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86691*0 + 3*481*FLEN/8, x4, x1, x2)

inst_28898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb78007ff; valaddr_reg:x3; val_offset:86694*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86694*0 + 3*482*FLEN/8, x4, x1, x2)

inst_28899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7800fff; valaddr_reg:x3; val_offset:86697*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86697*0 + 3*483*FLEN/8, x4, x1, x2)

inst_28900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7801fff; valaddr_reg:x3; val_offset:86700*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86700*0 + 3*484*FLEN/8, x4, x1, x2)

inst_28901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7803fff; valaddr_reg:x3; val_offset:86703*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86703*0 + 3*485*FLEN/8, x4, x1, x2)

inst_28902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7807fff; valaddr_reg:x3; val_offset:86706*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86706*0 + 3*486*FLEN/8, x4, x1, x2)

inst_28903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb780ffff; valaddr_reg:x3; val_offset:86709*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86709*0 + 3*487*FLEN/8, x4, x1, x2)

inst_28904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb781ffff; valaddr_reg:x3; val_offset:86712*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86712*0 + 3*488*FLEN/8, x4, x1, x2)

inst_28905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb783ffff; valaddr_reg:x3; val_offset:86715*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86715*0 + 3*489*FLEN/8, x4, x1, x2)

inst_28906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb787ffff; valaddr_reg:x3; val_offset:86718*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86718*0 + 3*490*FLEN/8, x4, x1, x2)

inst_28907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb78fffff; valaddr_reg:x3; val_offset:86721*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86721*0 + 3*491*FLEN/8, x4, x1, x2)

inst_28908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb79fffff; valaddr_reg:x3; val_offset:86724*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86724*0 + 3*492*FLEN/8, x4, x1, x2)

inst_28909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7bfffff; valaddr_reg:x3; val_offset:86727*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86727*0 + 3*493*FLEN/8, x4, x1, x2)

inst_28910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7c00000; valaddr_reg:x3; val_offset:86730*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86730*0 + 3*494*FLEN/8, x4, x1, x2)

inst_28911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7e00000; valaddr_reg:x3; val_offset:86733*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86733*0 + 3*495*FLEN/8, x4, x1, x2)

inst_28912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7f00000; valaddr_reg:x3; val_offset:86736*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86736*0 + 3*496*FLEN/8, x4, x1, x2)

inst_28913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7f80000; valaddr_reg:x3; val_offset:86739*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86739*0 + 3*497*FLEN/8, x4, x1, x2)

inst_28914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fc0000; valaddr_reg:x3; val_offset:86742*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86742*0 + 3*498*FLEN/8, x4, x1, x2)

inst_28915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fe0000; valaddr_reg:x3; val_offset:86745*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86745*0 + 3*499*FLEN/8, x4, x1, x2)

inst_28916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ff0000; valaddr_reg:x3; val_offset:86748*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86748*0 + 3*500*FLEN/8, x4, x1, x2)

inst_28917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ff8000; valaddr_reg:x3; val_offset:86751*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86751*0 + 3*501*FLEN/8, x4, x1, x2)

inst_28918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffc000; valaddr_reg:x3; val_offset:86754*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86754*0 + 3*502*FLEN/8, x4, x1, x2)

inst_28919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffe000; valaddr_reg:x3; val_offset:86757*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86757*0 + 3*503*FLEN/8, x4, x1, x2)

inst_28920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fff000; valaddr_reg:x3; val_offset:86760*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86760*0 + 3*504*FLEN/8, x4, x1, x2)

inst_28921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fff800; valaddr_reg:x3; val_offset:86763*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86763*0 + 3*505*FLEN/8, x4, x1, x2)

inst_28922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffc00; valaddr_reg:x3; val_offset:86766*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86766*0 + 3*506*FLEN/8, x4, x1, x2)

inst_28923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffe00; valaddr_reg:x3; val_offset:86769*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86769*0 + 3*507*FLEN/8, x4, x1, x2)

inst_28924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffff00; valaddr_reg:x3; val_offset:86772*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86772*0 + 3*508*FLEN/8, x4, x1, x2)

inst_28925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffff80; valaddr_reg:x3; val_offset:86775*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86775*0 + 3*509*FLEN/8, x4, x1, x2)

inst_28926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffffc0; valaddr_reg:x3; val_offset:86778*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86778*0 + 3*510*FLEN/8, x4, x1, x2)

inst_28927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffffe0; valaddr_reg:x3; val_offset:86781*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86781*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_28928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffff0; valaddr_reg:x3; val_offset:86784*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86784*0 + 3*512*FLEN/8, x4, x1, x2)

inst_28929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffff8; valaddr_reg:x3; val_offset:86787*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86787*0 + 3*513*FLEN/8, x4, x1, x2)

inst_28930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffffc; valaddr_reg:x3; val_offset:86790*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86790*0 + 3*514*FLEN/8, x4, x1, x2)

inst_28931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7fffffe; valaddr_reg:x3; val_offset:86793*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86793*0 + 3*515*FLEN/8, x4, x1, x2)

inst_28932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xb7ffffff; valaddr_reg:x3; val_offset:86796*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86796*0 + 3*516*FLEN/8, x4, x1, x2)

inst_28933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbf800001; valaddr_reg:x3; val_offset:86799*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86799*0 + 3*517*FLEN/8, x4, x1, x2)

inst_28934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbf800003; valaddr_reg:x3; val_offset:86802*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86802*0 + 3*518*FLEN/8, x4, x1, x2)

inst_28935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbf800007; valaddr_reg:x3; val_offset:86805*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86805*0 + 3*519*FLEN/8, x4, x1, x2)

inst_28936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbf999999; valaddr_reg:x3; val_offset:86808*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86808*0 + 3*520*FLEN/8, x4, x1, x2)

inst_28937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:86811*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86811*0 + 3*521*FLEN/8, x4, x1, x2)

inst_28938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:86814*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86814*0 + 3*522*FLEN/8, x4, x1, x2)

inst_28939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86817*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86817*0 + 3*523*FLEN/8, x4, x1, x2)

inst_28940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86820*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86820*0 + 3*524*FLEN/8, x4, x1, x2)

inst_28941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:86823*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86823*0 + 3*525*FLEN/8, x4, x1, x2)

inst_28942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86826*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86826*0 + 3*526*FLEN/8, x4, x1, x2)

inst_28943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86829*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86829*0 + 3*527*FLEN/8, x4, x1, x2)

inst_28944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:86832*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86832*0 + 3*528*FLEN/8, x4, x1, x2)

inst_28945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86835*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86835*0 + 3*529*FLEN/8, x4, x1, x2)

inst_28946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:86838*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86838*0 + 3*530*FLEN/8, x4, x1, x2)

inst_28947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:86841*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86841*0 + 3*531*FLEN/8, x4, x1, x2)

inst_28948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:86844*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86844*0 + 3*532*FLEN/8, x4, x1, x2)

inst_28949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800000; valaddr_reg:x3; val_offset:86847*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86847*0 + 3*533*FLEN/8, x4, x1, x2)

inst_28950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800001; valaddr_reg:x3; val_offset:86850*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86850*0 + 3*534*FLEN/8, x4, x1, x2)

inst_28951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800003; valaddr_reg:x3; val_offset:86853*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86853*0 + 3*535*FLEN/8, x4, x1, x2)

inst_28952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800007; valaddr_reg:x3; val_offset:86856*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86856*0 + 3*536*FLEN/8, x4, x1, x2)

inst_28953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780000f; valaddr_reg:x3; val_offset:86859*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86859*0 + 3*537*FLEN/8, x4, x1, x2)

inst_28954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780001f; valaddr_reg:x3; val_offset:86862*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86862*0 + 3*538*FLEN/8, x4, x1, x2)

inst_28955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780003f; valaddr_reg:x3; val_offset:86865*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86865*0 + 3*539*FLEN/8, x4, x1, x2)

inst_28956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780007f; valaddr_reg:x3; val_offset:86868*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86868*0 + 3*540*FLEN/8, x4, x1, x2)

inst_28957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78000ff; valaddr_reg:x3; val_offset:86871*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86871*0 + 3*541*FLEN/8, x4, x1, x2)

inst_28958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78001ff; valaddr_reg:x3; val_offset:86874*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86874*0 + 3*542*FLEN/8, x4, x1, x2)

inst_28959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78003ff; valaddr_reg:x3; val_offset:86877*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86877*0 + 3*543*FLEN/8, x4, x1, x2)

inst_28960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78007ff; valaddr_reg:x3; val_offset:86880*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86880*0 + 3*544*FLEN/8, x4, x1, x2)

inst_28961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7800fff; valaddr_reg:x3; val_offset:86883*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86883*0 + 3*545*FLEN/8, x4, x1, x2)

inst_28962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7801fff; valaddr_reg:x3; val_offset:86886*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86886*0 + 3*546*FLEN/8, x4, x1, x2)

inst_28963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7803fff; valaddr_reg:x3; val_offset:86889*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86889*0 + 3*547*FLEN/8, x4, x1, x2)

inst_28964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7807fff; valaddr_reg:x3; val_offset:86892*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86892*0 + 3*548*FLEN/8, x4, x1, x2)

inst_28965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf780ffff; valaddr_reg:x3; val_offset:86895*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86895*0 + 3*549*FLEN/8, x4, x1, x2)

inst_28966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf781ffff; valaddr_reg:x3; val_offset:86898*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86898*0 + 3*550*FLEN/8, x4, x1, x2)

inst_28967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf783ffff; valaddr_reg:x3; val_offset:86901*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86901*0 + 3*551*FLEN/8, x4, x1, x2)

inst_28968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf787ffff; valaddr_reg:x3; val_offset:86904*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86904*0 + 3*552*FLEN/8, x4, x1, x2)

inst_28969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf78fffff; valaddr_reg:x3; val_offset:86907*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86907*0 + 3*553*FLEN/8, x4, x1, x2)

inst_28970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf79fffff; valaddr_reg:x3; val_offset:86910*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86910*0 + 3*554*FLEN/8, x4, x1, x2)

inst_28971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7bfffff; valaddr_reg:x3; val_offset:86913*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86913*0 + 3*555*FLEN/8, x4, x1, x2)

inst_28972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7c00000; valaddr_reg:x3; val_offset:86916*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86916*0 + 3*556*FLEN/8, x4, x1, x2)

inst_28973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7e00000; valaddr_reg:x3; val_offset:86919*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86919*0 + 3*557*FLEN/8, x4, x1, x2)

inst_28974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7f00000; valaddr_reg:x3; val_offset:86922*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86922*0 + 3*558*FLEN/8, x4, x1, x2)

inst_28975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7f80000; valaddr_reg:x3; val_offset:86925*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86925*0 + 3*559*FLEN/8, x4, x1, x2)

inst_28976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fc0000; valaddr_reg:x3; val_offset:86928*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86928*0 + 3*560*FLEN/8, x4, x1, x2)

inst_28977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fe0000; valaddr_reg:x3; val_offset:86931*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86931*0 + 3*561*FLEN/8, x4, x1, x2)

inst_28978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ff0000; valaddr_reg:x3; val_offset:86934*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86934*0 + 3*562*FLEN/8, x4, x1, x2)

inst_28979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ff8000; valaddr_reg:x3; val_offset:86937*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86937*0 + 3*563*FLEN/8, x4, x1, x2)

inst_28980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffc000; valaddr_reg:x3; val_offset:86940*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86940*0 + 3*564*FLEN/8, x4, x1, x2)

inst_28981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffe000; valaddr_reg:x3; val_offset:86943*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86943*0 + 3*565*FLEN/8, x4, x1, x2)

inst_28982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fff000; valaddr_reg:x3; val_offset:86946*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86946*0 + 3*566*FLEN/8, x4, x1, x2)

inst_28983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fff800; valaddr_reg:x3; val_offset:86949*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86949*0 + 3*567*FLEN/8, x4, x1, x2)

inst_28984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffc00; valaddr_reg:x3; val_offset:86952*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86952*0 + 3*568*FLEN/8, x4, x1, x2)

inst_28985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffe00; valaddr_reg:x3; val_offset:86955*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86955*0 + 3*569*FLEN/8, x4, x1, x2)

inst_28986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffff00; valaddr_reg:x3; val_offset:86958*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86958*0 + 3*570*FLEN/8, x4, x1, x2)

inst_28987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffff80; valaddr_reg:x3; val_offset:86961*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86961*0 + 3*571*FLEN/8, x4, x1, x2)

inst_28988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffc0; valaddr_reg:x3; val_offset:86964*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86964*0 + 3*572*FLEN/8, x4, x1, x2)

inst_28989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffe0; valaddr_reg:x3; val_offset:86967*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86967*0 + 3*573*FLEN/8, x4, x1, x2)

inst_28990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffff0; valaddr_reg:x3; val_offset:86970*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86970*0 + 3*574*FLEN/8, x4, x1, x2)

inst_28991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffff8; valaddr_reg:x3; val_offset:86973*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86973*0 + 3*575*FLEN/8, x4, x1, x2)

inst_28992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffffc; valaddr_reg:x3; val_offset:86976*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86976*0 + 3*576*FLEN/8, x4, x1, x2)

inst_28993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7fffffe; valaddr_reg:x3; val_offset:86979*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86979*0 + 3*577*FLEN/8, x4, x1, x2)

inst_28994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xf7ffffff; valaddr_reg:x3; val_offset:86982*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86982*0 + 3*578*FLEN/8, x4, x1, x2)

inst_28995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000001; valaddr_reg:x3; val_offset:86985*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86985*0 + 3*579*FLEN/8, x4, x1, x2)

inst_28996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000003; valaddr_reg:x3; val_offset:86988*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86988*0 + 3*580*FLEN/8, x4, x1, x2)

inst_28997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff000007; valaddr_reg:x3; val_offset:86991*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86991*0 + 3*581*FLEN/8, x4, x1, x2)

inst_28998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff199999; valaddr_reg:x3; val_offset:86994*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86994*0 + 3*582*FLEN/8, x4, x1, x2)

inst_28999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff249249; valaddr_reg:x3; val_offset:86997*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86997*0 + 3*583*FLEN/8, x4, x1, x2)

inst_29000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff333333; valaddr_reg:x3; val_offset:87000*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87000*0 + 3*584*FLEN/8, x4, x1, x2)

inst_29001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:87003*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87003*0 + 3*585*FLEN/8, x4, x1, x2)

inst_29002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87006*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87006*0 + 3*586*FLEN/8, x4, x1, x2)

inst_29003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff444444; valaddr_reg:x3; val_offset:87009*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87009*0 + 3*587*FLEN/8, x4, x1, x2)

inst_29004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87012*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87012*0 + 3*588*FLEN/8, x4, x1, x2)

inst_29005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87015*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87015*0 + 3*589*FLEN/8, x4, x1, x2)

inst_29006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff666666; valaddr_reg:x3; val_offset:87018*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87018*0 + 3*590*FLEN/8, x4, x1, x2)

inst_29007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:87021*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87021*0 + 3*591*FLEN/8, x4, x1, x2)

inst_29008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87024*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87024*0 + 3*592*FLEN/8, x4, x1, x2)

inst_29009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87027*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87027*0 + 3*593*FLEN/8, x4, x1, x2)

inst_29010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87030*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87030*0 + 3*594*FLEN/8, x4, x1, x2)

inst_29011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80800001; valaddr_reg:x3; val_offset:87033*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87033*0 + 3*595*FLEN/8, x4, x1, x2)

inst_29012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80800003; valaddr_reg:x3; val_offset:87036*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87036*0 + 3*596*FLEN/8, x4, x1, x2)

inst_29013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80800007; valaddr_reg:x3; val_offset:87039*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87039*0 + 3*597*FLEN/8, x4, x1, x2)

inst_29014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80999999; valaddr_reg:x3; val_offset:87042*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87042*0 + 3*598*FLEN/8, x4, x1, x2)

inst_29015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80a49249; valaddr_reg:x3; val_offset:87045*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87045*0 + 3*599*FLEN/8, x4, x1, x2)

inst_29016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80b33333; valaddr_reg:x3; val_offset:87048*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87048*0 + 3*600*FLEN/8, x4, x1, x2)

inst_29017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80b6db6d; valaddr_reg:x3; val_offset:87051*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87051*0 + 3*601*FLEN/8, x4, x1, x2)

inst_29018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:87054*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87054*0 + 3*602*FLEN/8, x4, x1, x2)

inst_29019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80c44444; valaddr_reg:x3; val_offset:87057*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87057*0 + 3*603*FLEN/8, x4, x1, x2)

inst_29020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80cccccc; valaddr_reg:x3; val_offset:87060*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87060*0 + 3*604*FLEN/8, x4, x1, x2)

inst_29021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80db6db6; valaddr_reg:x3; val_offset:87063*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87063*0 + 3*605*FLEN/8, x4, x1, x2)

inst_29022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80e66666; valaddr_reg:x3; val_offset:87066*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87066*0 + 3*606*FLEN/8, x4, x1, x2)

inst_29023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80edb6db; valaddr_reg:x3; val_offset:87069*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87069*0 + 3*607*FLEN/8, x4, x1, x2)

inst_29024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80fffff8; valaddr_reg:x3; val_offset:87072*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87072*0 + 3*608*FLEN/8, x4, x1, x2)

inst_29025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80fffffc; valaddr_reg:x3; val_offset:87075*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87075*0 + 3*609*FLEN/8, x4, x1, x2)

inst_29026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x80fffffe; valaddr_reg:x3; val_offset:87078*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87078*0 + 3*610*FLEN/8, x4, x1, x2)

inst_29027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83800000; valaddr_reg:x3; val_offset:87081*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87081*0 + 3*611*FLEN/8, x4, x1, x2)

inst_29028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83800001; valaddr_reg:x3; val_offset:87084*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87084*0 + 3*612*FLEN/8, x4, x1, x2)

inst_29029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83800003; valaddr_reg:x3; val_offset:87087*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87087*0 + 3*613*FLEN/8, x4, x1, x2)

inst_29030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83800007; valaddr_reg:x3; val_offset:87090*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87090*0 + 3*614*FLEN/8, x4, x1, x2)

inst_29031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8380000f; valaddr_reg:x3; val_offset:87093*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87093*0 + 3*615*FLEN/8, x4, x1, x2)

inst_29032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8380001f; valaddr_reg:x3; val_offset:87096*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87096*0 + 3*616*FLEN/8, x4, x1, x2)

inst_29033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8380003f; valaddr_reg:x3; val_offset:87099*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87099*0 + 3*617*FLEN/8, x4, x1, x2)

inst_29034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8380007f; valaddr_reg:x3; val_offset:87102*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87102*0 + 3*618*FLEN/8, x4, x1, x2)

inst_29035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x838000ff; valaddr_reg:x3; val_offset:87105*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87105*0 + 3*619*FLEN/8, x4, x1, x2)

inst_29036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x838001ff; valaddr_reg:x3; val_offset:87108*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87108*0 + 3*620*FLEN/8, x4, x1, x2)

inst_29037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x838003ff; valaddr_reg:x3; val_offset:87111*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87111*0 + 3*621*FLEN/8, x4, x1, x2)

inst_29038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x838007ff; valaddr_reg:x3; val_offset:87114*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87114*0 + 3*622*FLEN/8, x4, x1, x2)

inst_29039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83800fff; valaddr_reg:x3; val_offset:87117*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87117*0 + 3*623*FLEN/8, x4, x1, x2)

inst_29040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83801fff; valaddr_reg:x3; val_offset:87120*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87120*0 + 3*624*FLEN/8, x4, x1, x2)

inst_29041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83803fff; valaddr_reg:x3; val_offset:87123*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87123*0 + 3*625*FLEN/8, x4, x1, x2)

inst_29042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83807fff; valaddr_reg:x3; val_offset:87126*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87126*0 + 3*626*FLEN/8, x4, x1, x2)

inst_29043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8380ffff; valaddr_reg:x3; val_offset:87129*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87129*0 + 3*627*FLEN/8, x4, x1, x2)

inst_29044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8381ffff; valaddr_reg:x3; val_offset:87132*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87132*0 + 3*628*FLEN/8, x4, x1, x2)

inst_29045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8383ffff; valaddr_reg:x3; val_offset:87135*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87135*0 + 3*629*FLEN/8, x4, x1, x2)

inst_29046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x8387ffff; valaddr_reg:x3; val_offset:87138*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87138*0 + 3*630*FLEN/8, x4, x1, x2)

inst_29047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x838fffff; valaddr_reg:x3; val_offset:87141*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87141*0 + 3*631*FLEN/8, x4, x1, x2)

inst_29048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x839fffff; valaddr_reg:x3; val_offset:87144*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87144*0 + 3*632*FLEN/8, x4, x1, x2)

inst_29049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83bfffff; valaddr_reg:x3; val_offset:87147*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87147*0 + 3*633*FLEN/8, x4, x1, x2)

inst_29050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83c00000; valaddr_reg:x3; val_offset:87150*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87150*0 + 3*634*FLEN/8, x4, x1, x2)

inst_29051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83e00000; valaddr_reg:x3; val_offset:87153*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87153*0 + 3*635*FLEN/8, x4, x1, x2)

inst_29052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83f00000; valaddr_reg:x3; val_offset:87156*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87156*0 + 3*636*FLEN/8, x4, x1, x2)

inst_29053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83f80000; valaddr_reg:x3; val_offset:87159*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87159*0 + 3*637*FLEN/8, x4, x1, x2)

inst_29054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fc0000; valaddr_reg:x3; val_offset:87162*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87162*0 + 3*638*FLEN/8, x4, x1, x2)

inst_29055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fe0000; valaddr_reg:x3; val_offset:87165*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87165*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_29056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ff0000; valaddr_reg:x3; val_offset:87168*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87168*0 + 3*640*FLEN/8, x4, x1, x2)

inst_29057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ff8000; valaddr_reg:x3; val_offset:87171*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87171*0 + 3*641*FLEN/8, x4, x1, x2)

inst_29058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffc000; valaddr_reg:x3; val_offset:87174*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87174*0 + 3*642*FLEN/8, x4, x1, x2)

inst_29059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffe000; valaddr_reg:x3; val_offset:87177*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87177*0 + 3*643*FLEN/8, x4, x1, x2)

inst_29060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fff000; valaddr_reg:x3; val_offset:87180*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87180*0 + 3*644*FLEN/8, x4, x1, x2)

inst_29061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fff800; valaddr_reg:x3; val_offset:87183*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87183*0 + 3*645*FLEN/8, x4, x1, x2)

inst_29062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffc00; valaddr_reg:x3; val_offset:87186*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87186*0 + 3*646*FLEN/8, x4, x1, x2)

inst_29063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffe00; valaddr_reg:x3; val_offset:87189*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87189*0 + 3*647*FLEN/8, x4, x1, x2)

inst_29064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffff00; valaddr_reg:x3; val_offset:87192*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87192*0 + 3*648*FLEN/8, x4, x1, x2)

inst_29065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffff80; valaddr_reg:x3; val_offset:87195*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87195*0 + 3*649*FLEN/8, x4, x1, x2)

inst_29066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffffc0; valaddr_reg:x3; val_offset:87198*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87198*0 + 3*650*FLEN/8, x4, x1, x2)

inst_29067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffffe0; valaddr_reg:x3; val_offset:87201*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87201*0 + 3*651*FLEN/8, x4, x1, x2)

inst_29068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffff0; valaddr_reg:x3; val_offset:87204*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87204*0 + 3*652*FLEN/8, x4, x1, x2)

inst_29069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffff8; valaddr_reg:x3; val_offset:87207*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87207*0 + 3*653*FLEN/8, x4, x1, x2)

inst_29070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffffc; valaddr_reg:x3; val_offset:87210*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87210*0 + 3*654*FLEN/8, x4, x1, x2)

inst_29071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83fffffe; valaddr_reg:x3; val_offset:87213*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87213*0 + 3*655*FLEN/8, x4, x1, x2)

inst_29072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000;
op3val:0x83ffffff; valaddr_reg:x3; val_offset:87216*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87216*0 + 3*656*FLEN/8, x4, x1, x2)

inst_29073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0000000; valaddr_reg:x3; val_offset:87219*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87219*0 + 3*657*FLEN/8, x4, x1, x2)

inst_29074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0000001; valaddr_reg:x3; val_offset:87222*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87222*0 + 3*658*FLEN/8, x4, x1, x2)

inst_29075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0000003; valaddr_reg:x3; val_offset:87225*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87225*0 + 3*659*FLEN/8, x4, x1, x2)

inst_29076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0000007; valaddr_reg:x3; val_offset:87228*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87228*0 + 3*660*FLEN/8, x4, x1, x2)

inst_29077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf000000f; valaddr_reg:x3; val_offset:87231*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87231*0 + 3*661*FLEN/8, x4, x1, x2)

inst_29078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf000001f; valaddr_reg:x3; val_offset:87234*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87234*0 + 3*662*FLEN/8, x4, x1, x2)

inst_29079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf000003f; valaddr_reg:x3; val_offset:87237*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87237*0 + 3*663*FLEN/8, x4, x1, x2)

inst_29080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf000007f; valaddr_reg:x3; val_offset:87240*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87240*0 + 3*664*FLEN/8, x4, x1, x2)

inst_29081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf00000ff; valaddr_reg:x3; val_offset:87243*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87243*0 + 3*665*FLEN/8, x4, x1, x2)

inst_29082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf00001ff; valaddr_reg:x3; val_offset:87246*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87246*0 + 3*666*FLEN/8, x4, x1, x2)

inst_29083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf00003ff; valaddr_reg:x3; val_offset:87249*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87249*0 + 3*667*FLEN/8, x4, x1, x2)

inst_29084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf00007ff; valaddr_reg:x3; val_offset:87252*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87252*0 + 3*668*FLEN/8, x4, x1, x2)

inst_29085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0000fff; valaddr_reg:x3; val_offset:87255*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87255*0 + 3*669*FLEN/8, x4, x1, x2)

inst_29086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0001fff; valaddr_reg:x3; val_offset:87258*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87258*0 + 3*670*FLEN/8, x4, x1, x2)

inst_29087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0003fff; valaddr_reg:x3; val_offset:87261*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87261*0 + 3*671*FLEN/8, x4, x1, x2)

inst_29088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0007fff; valaddr_reg:x3; val_offset:87264*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87264*0 + 3*672*FLEN/8, x4, x1, x2)

inst_29089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf000ffff; valaddr_reg:x3; val_offset:87267*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87267*0 + 3*673*FLEN/8, x4, x1, x2)

inst_29090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf001ffff; valaddr_reg:x3; val_offset:87270*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87270*0 + 3*674*FLEN/8, x4, x1, x2)

inst_29091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf003ffff; valaddr_reg:x3; val_offset:87273*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87273*0 + 3*675*FLEN/8, x4, x1, x2)

inst_29092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf007ffff; valaddr_reg:x3; val_offset:87276*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87276*0 + 3*676*FLEN/8, x4, x1, x2)

inst_29093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf00fffff; valaddr_reg:x3; val_offset:87279*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87279*0 + 3*677*FLEN/8, x4, x1, x2)

inst_29094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf01fffff; valaddr_reg:x3; val_offset:87282*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87282*0 + 3*678*FLEN/8, x4, x1, x2)

inst_29095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf03fffff; valaddr_reg:x3; val_offset:87285*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87285*0 + 3*679*FLEN/8, x4, x1, x2)

inst_29096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0400000; valaddr_reg:x3; val_offset:87288*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87288*0 + 3*680*FLEN/8, x4, x1, x2)

inst_29097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0600000; valaddr_reg:x3; val_offset:87291*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87291*0 + 3*681*FLEN/8, x4, x1, x2)

inst_29098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0700000; valaddr_reg:x3; val_offset:87294*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87294*0 + 3*682*FLEN/8, x4, x1, x2)

inst_29099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf0780000; valaddr_reg:x3; val_offset:87297*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87297*0 + 3*683*FLEN/8, x4, x1, x2)

inst_29100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07c0000; valaddr_reg:x3; val_offset:87300*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87300*0 + 3*684*FLEN/8, x4, x1, x2)

inst_29101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07e0000; valaddr_reg:x3; val_offset:87303*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87303*0 + 3*685*FLEN/8, x4, x1, x2)

inst_29102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07f0000; valaddr_reg:x3; val_offset:87306*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87306*0 + 3*686*FLEN/8, x4, x1, x2)

inst_29103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07f8000; valaddr_reg:x3; val_offset:87309*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87309*0 + 3*687*FLEN/8, x4, x1, x2)

inst_29104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fc000; valaddr_reg:x3; val_offset:87312*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87312*0 + 3*688*FLEN/8, x4, x1, x2)

inst_29105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fe000; valaddr_reg:x3; val_offset:87315*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87315*0 + 3*689*FLEN/8, x4, x1, x2)

inst_29106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ff000; valaddr_reg:x3; val_offset:87318*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87318*0 + 3*690*FLEN/8, x4, x1, x2)

inst_29107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ff800; valaddr_reg:x3; val_offset:87321*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87321*0 + 3*691*FLEN/8, x4, x1, x2)

inst_29108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffc00; valaddr_reg:x3; val_offset:87324*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87324*0 + 3*692*FLEN/8, x4, x1, x2)

inst_29109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffe00; valaddr_reg:x3; val_offset:87327*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87327*0 + 3*693*FLEN/8, x4, x1, x2)

inst_29110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fff00; valaddr_reg:x3; val_offset:87330*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87330*0 + 3*694*FLEN/8, x4, x1, x2)

inst_29111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fff80; valaddr_reg:x3; val_offset:87333*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87333*0 + 3*695*FLEN/8, x4, x1, x2)

inst_29112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fffc0; valaddr_reg:x3; val_offset:87336*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87336*0 + 3*696*FLEN/8, x4, x1, x2)

inst_29113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fffe0; valaddr_reg:x3; val_offset:87339*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87339*0 + 3*697*FLEN/8, x4, x1, x2)

inst_29114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffff0; valaddr_reg:x3; val_offset:87342*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87342*0 + 3*698*FLEN/8, x4, x1, x2)

inst_29115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffff8; valaddr_reg:x3; val_offset:87345*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87345*0 + 3*699*FLEN/8, x4, x1, x2)

inst_29116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffffc; valaddr_reg:x3; val_offset:87348*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87348*0 + 3*700*FLEN/8, x4, x1, x2)

inst_29117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07ffffe; valaddr_reg:x3; val_offset:87351*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87351*0 + 3*701*FLEN/8, x4, x1, x2)

inst_29118:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xf07fffff; valaddr_reg:x3; val_offset:87354*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87354*0 + 3*702*FLEN/8, x4, x1, x2)

inst_29119:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff000001; valaddr_reg:x3; val_offset:87357*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87357*0 + 3*703*FLEN/8, x4, x1, x2)

inst_29120:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff000003; valaddr_reg:x3; val_offset:87360*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87360*0 + 3*704*FLEN/8, x4, x1, x2)

inst_29121:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff000007; valaddr_reg:x3; val_offset:87363*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87363*0 + 3*705*FLEN/8, x4, x1, x2)

inst_29122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff199999; valaddr_reg:x3; val_offset:87366*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87366*0 + 3*706*FLEN/8, x4, x1, x2)

inst_29123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff249249; valaddr_reg:x3; val_offset:87369*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87369*0 + 3*707*FLEN/8, x4, x1, x2)

inst_29124:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff333333; valaddr_reg:x3; val_offset:87372*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87372*0 + 3*708*FLEN/8, x4, x1, x2)

inst_29125:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:87375*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87375*0 + 3*709*FLEN/8, x4, x1, x2)

inst_29126:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87378*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87378*0 + 3*710*FLEN/8, x4, x1, x2)

inst_29127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff444444; valaddr_reg:x3; val_offset:87381*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87381*0 + 3*711*FLEN/8, x4, x1, x2)

inst_29128:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87384*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87384*0 + 3*712*FLEN/8, x4, x1, x2)

inst_29129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87387*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87387*0 + 3*713*FLEN/8, x4, x1, x2)

inst_29130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff666666; valaddr_reg:x3; val_offset:87390*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87390*0 + 3*714*FLEN/8, x4, x1, x2)

inst_29131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:87393*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87393*0 + 3*715*FLEN/8, x4, x1, x2)

inst_29132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87396*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87396*0 + 3*716*FLEN/8, x4, x1, x2)

inst_29133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87399*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87399*0 + 3*717*FLEN/8, x4, x1, x2)

inst_29134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87402*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87402*0 + 3*718*FLEN/8, x4, x1, x2)

inst_29135:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1000000; valaddr_reg:x3; val_offset:87405*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87405*0 + 3*719*FLEN/8, x4, x1, x2)

inst_29136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1000001; valaddr_reg:x3; val_offset:87408*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87408*0 + 3*720*FLEN/8, x4, x1, x2)

inst_29137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1000003; valaddr_reg:x3; val_offset:87411*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87411*0 + 3*721*FLEN/8, x4, x1, x2)

inst_29138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1000007; valaddr_reg:x3; val_offset:87414*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87414*0 + 3*722*FLEN/8, x4, x1, x2)

inst_29139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf100000f; valaddr_reg:x3; val_offset:87417*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87417*0 + 3*723*FLEN/8, x4, x1, x2)

inst_29140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf100001f; valaddr_reg:x3; val_offset:87420*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87420*0 + 3*724*FLEN/8, x4, x1, x2)

inst_29141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf100003f; valaddr_reg:x3; val_offset:87423*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87423*0 + 3*725*FLEN/8, x4, x1, x2)

inst_29142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf100007f; valaddr_reg:x3; val_offset:87426*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87426*0 + 3*726*FLEN/8, x4, x1, x2)

inst_29143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf10000ff; valaddr_reg:x3; val_offset:87429*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87429*0 + 3*727*FLEN/8, x4, x1, x2)

inst_29144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf10001ff; valaddr_reg:x3; val_offset:87432*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87432*0 + 3*728*FLEN/8, x4, x1, x2)

inst_29145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf10003ff; valaddr_reg:x3; val_offset:87435*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87435*0 + 3*729*FLEN/8, x4, x1, x2)

inst_29146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf10007ff; valaddr_reg:x3; val_offset:87438*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87438*0 + 3*730*FLEN/8, x4, x1, x2)

inst_29147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1000fff; valaddr_reg:x3; val_offset:87441*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87441*0 + 3*731*FLEN/8, x4, x1, x2)

inst_29148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1001fff; valaddr_reg:x3; val_offset:87444*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87444*0 + 3*732*FLEN/8, x4, x1, x2)

inst_29149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1003fff; valaddr_reg:x3; val_offset:87447*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87447*0 + 3*733*FLEN/8, x4, x1, x2)

inst_29150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1007fff; valaddr_reg:x3; val_offset:87450*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87450*0 + 3*734*FLEN/8, x4, x1, x2)

inst_29151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf100ffff; valaddr_reg:x3; val_offset:87453*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87453*0 + 3*735*FLEN/8, x4, x1, x2)

inst_29152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf101ffff; valaddr_reg:x3; val_offset:87456*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87456*0 + 3*736*FLEN/8, x4, x1, x2)

inst_29153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf103ffff; valaddr_reg:x3; val_offset:87459*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87459*0 + 3*737*FLEN/8, x4, x1, x2)

inst_29154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf107ffff; valaddr_reg:x3; val_offset:87462*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87462*0 + 3*738*FLEN/8, x4, x1, x2)

inst_29155:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf10fffff; valaddr_reg:x3; val_offset:87465*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87465*0 + 3*739*FLEN/8, x4, x1, x2)

inst_29156:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf11fffff; valaddr_reg:x3; val_offset:87468*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87468*0 + 3*740*FLEN/8, x4, x1, x2)

inst_29157:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf13fffff; valaddr_reg:x3; val_offset:87471*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87471*0 + 3*741*FLEN/8, x4, x1, x2)

inst_29158:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1400000; valaddr_reg:x3; val_offset:87474*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87474*0 + 3*742*FLEN/8, x4, x1, x2)

inst_29159:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1600000; valaddr_reg:x3; val_offset:87477*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87477*0 + 3*743*FLEN/8, x4, x1, x2)

inst_29160:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1700000; valaddr_reg:x3; val_offset:87480*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87480*0 + 3*744*FLEN/8, x4, x1, x2)

inst_29161:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf1780000; valaddr_reg:x3; val_offset:87483*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87483*0 + 3*745*FLEN/8, x4, x1, x2)

inst_29162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17c0000; valaddr_reg:x3; val_offset:87486*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87486*0 + 3*746*FLEN/8, x4, x1, x2)

inst_29163:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17e0000; valaddr_reg:x3; val_offset:87489*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87489*0 + 3*747*FLEN/8, x4, x1, x2)

inst_29164:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17f0000; valaddr_reg:x3; val_offset:87492*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87492*0 + 3*748*FLEN/8, x4, x1, x2)

inst_29165:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17f8000; valaddr_reg:x3; val_offset:87495*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87495*0 + 3*749*FLEN/8, x4, x1, x2)

inst_29166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fc000; valaddr_reg:x3; val_offset:87498*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87498*0 + 3*750*FLEN/8, x4, x1, x2)

inst_29167:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fe000; valaddr_reg:x3; val_offset:87501*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87501*0 + 3*751*FLEN/8, x4, x1, x2)

inst_29168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ff000; valaddr_reg:x3; val_offset:87504*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87504*0 + 3*752*FLEN/8, x4, x1, x2)

inst_29169:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ff800; valaddr_reg:x3; val_offset:87507*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87507*0 + 3*753*FLEN/8, x4, x1, x2)

inst_29170:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffc00; valaddr_reg:x3; val_offset:87510*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87510*0 + 3*754*FLEN/8, x4, x1, x2)

inst_29171:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffe00; valaddr_reg:x3; val_offset:87513*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87513*0 + 3*755*FLEN/8, x4, x1, x2)

inst_29172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fff00; valaddr_reg:x3; val_offset:87516*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87516*0 + 3*756*FLEN/8, x4, x1, x2)

inst_29173:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fff80; valaddr_reg:x3; val_offset:87519*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87519*0 + 3*757*FLEN/8, x4, x1, x2)

inst_29174:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fffc0; valaddr_reg:x3; val_offset:87522*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87522*0 + 3*758*FLEN/8, x4, x1, x2)

inst_29175:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fffe0; valaddr_reg:x3; val_offset:87525*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87525*0 + 3*759*FLEN/8, x4, x1, x2)

inst_29176:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffff0; valaddr_reg:x3; val_offset:87528*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87528*0 + 3*760*FLEN/8, x4, x1, x2)

inst_29177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffff8; valaddr_reg:x3; val_offset:87531*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87531*0 + 3*761*FLEN/8, x4, x1, x2)

inst_29178:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffffc; valaddr_reg:x3; val_offset:87534*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87534*0 + 3*762*FLEN/8, x4, x1, x2)

inst_29179:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17ffffe; valaddr_reg:x3; val_offset:87537*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87537*0 + 3*763*FLEN/8, x4, x1, x2)

inst_29180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xf17fffff; valaddr_reg:x3; val_offset:87540*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87540*0 + 3*764*FLEN/8, x4, x1, x2)

inst_29181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xff000001; valaddr_reg:x3; val_offset:87543*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87543*0 + 3*765*FLEN/8, x4, x1, x2)

inst_29182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xff000003; valaddr_reg:x3; val_offset:87546*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87546*0 + 3*766*FLEN/8, x4, x1, x2)

inst_29183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934;
op3val:0xff000007; valaddr_reg:x3; val_offset:87549*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87549*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8001ff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8003ff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8007ff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb800fff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb801fff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb803fff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb807fff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb80ffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb81ffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb83ffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb87ffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb8fffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb9fffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbfffff,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbc00000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbe00000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbf00000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbf80000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfc0000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfe0000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbff0000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbff8000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffc000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffe000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfff000,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfff800,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffc00,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffe00,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffff00,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffff80,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffc0,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffe0,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffff0,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffff8,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffffc,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbfffffe,32,FLEN)
NAN_BOXED(0x7f0d127a,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbffffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f800000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f800001,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f800003,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f800007,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f80000f,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f80001f,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f80003f,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f80007f,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f8000ff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f8001ff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f8003ff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f8007ff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f800fff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f801fff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f803fff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f807fff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f80ffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f81ffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f83ffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f87ffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f8fffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4f9fffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fbfffff,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fc00000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fe00000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ff00000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ff80000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffc0000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffe0000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fff0000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fff8000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffc000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffe000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffff000,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffff800,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffc00,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffe00,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffff00,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffff80,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffffc0,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffffe0,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffff0,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffff8,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffffc,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4ffffffe,32,FLEN)
NAN_BOXED(0x7f0de41e,32,FLEN)
NAN_BOXED(0x39bc03,32,FLEN)
NAN_BOXED(0x4fffffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000001,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000003,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000007,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00000f,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00001f,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00003f,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00007f,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0000ff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0001ff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0003ff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0007ff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a000fff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a001fff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a003fff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a007fff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a00ffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a01ffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a03ffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a07ffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a0fffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a1fffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a3fffff,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a400000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a600000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a700000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a780000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7c0000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7e0000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7f0000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7f8000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fc000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fe000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ff000,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ff800,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffc00,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffe00,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fff00,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fff80,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffc0,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffe0,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffff0,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffff8,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffffc,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7ffffe,32,FLEN)
NAN_BOXED(0x7f0e391d,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8a7fffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68800000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68800001,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68800003,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68800007,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6880000f,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6880001f,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6880003f,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6880007f,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x688000ff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x688001ff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x688003ff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x688007ff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68800fff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68801fff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68803fff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68807fff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6880ffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6881ffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6883ffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x6887ffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x688fffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x689fffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68bfffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68c00000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68e00000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68f00000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68f80000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fc0000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fe0000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ff0000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ff8000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffc000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffe000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fff000,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fff800,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffc00,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffe00,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffff00,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffff80,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffffc0,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffffe0,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffff0,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffff8,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffffc,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68fffffe,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x68ffffff,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7f0f9c8e,32,FLEN)
NAN_BOXED(0x3fe42bca,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3000000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3000001,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3000003,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3000007,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa300000f,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa300001f,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa300003f,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa300007f,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa30000ff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa30001ff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa30003ff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa30007ff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3000fff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3001fff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3003fff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3007fff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa300ffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa301ffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa303ffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa307ffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa30fffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa31fffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa33fffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3400000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3600000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3700000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa3780000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37c0000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37e0000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37f0000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37f8000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fc000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fe000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ff000,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ff800,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffc00,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffe00,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fff00,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fff80,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fffc0,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fffe0,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffff0,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffff8,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffffc,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37ffffe,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xa37fffff,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f0fb593,32,FLEN)
NAN_BOXED(0x80390104,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000001,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000003,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000007,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000000f,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000001f,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000003f,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000007f,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100000ff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100001ff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100003ff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100007ff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10000fff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10001fff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10003fff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10007fff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1000ffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1001ffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1003ffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1007ffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x100fffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x101fffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x103fffff,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10400000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10600000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10700000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x10780000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107c0000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107e0000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107f0000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107f8000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fc000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fe000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ff000,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ff800,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffc00,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffe00,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fff00,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fff80,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffc0,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffe0,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffff0,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffff8,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffffc,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107ffffe,32,FLEN)
NAN_BOXED(0x7f0ff996,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x107fffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88800000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88800001,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88800003,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88800007,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8880000f,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8880001f,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8880003f,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8880007f,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x888000ff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x888001ff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x888003ff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x888007ff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88800fff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88801fff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88803fff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88807fff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8880ffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8881ffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8883ffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8887ffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x888fffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x889fffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88bfffff,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88c00000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88e00000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88f00000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88f80000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fc0000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fe0000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ff0000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ff8000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffc000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffe000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fff000,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fff800,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffc00,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffe00,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffff00,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffff80,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffffc0,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffffe0,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffff0,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffff8,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffffc,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88fffffe,32,FLEN)
NAN_BOXED(0x7f1077d9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x88ffffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000001,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000003,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000007,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400000f,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400001f,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400003f,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400007f,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840000ff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840001ff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840003ff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840007ff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000fff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84001fff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84003fff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84007fff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400ffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8401ffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8403ffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8407ffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840fffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x841fffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x843fffff,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84400000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84600000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84700000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84780000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847c0000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847e0000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f0000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f8000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fc000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fe000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff000,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff800,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffc00,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffe00,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff00,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff80,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffc0,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffe0,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff0,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff8,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffc,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffe,32,FLEN)
NAN_BOXED(0x7f10e2fe,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7800000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7800001,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7800003,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7800007,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb780000f,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb780001f,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb780003f,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb780007f,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb78000ff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb78001ff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb78003ff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb78007ff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7800fff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7801fff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7803fff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7807fff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb780ffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb781ffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb783ffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb787ffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb78fffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb79fffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7bfffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7c00000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7e00000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7f00000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7f80000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fc0000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fe0000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ff0000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ff8000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffc000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffe000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fff000,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fff800,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffc00,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffe00,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffff00,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffff80,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffffc0,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffffe0,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffff0,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffff8,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffffc,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7fffffe,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xb7ffffff,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f10e9a8,32,FLEN)
NAN_BOXED(0x803887d3,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7800000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7800001,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7800003,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7800007,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf780000f,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf780001f,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf780003f,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf780007f,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf78000ff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf78001ff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf78003ff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf78007ff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7800fff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7801fff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7803fff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7807fff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf780ffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf781ffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf783ffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf787ffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf78fffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf79fffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7bfffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7c00000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7e00000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7f00000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7f80000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fc0000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fe0000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ff0000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ff8000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffc000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffe000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fff000,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fff800,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffc00,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffe00,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffff00,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffff80,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffffc0,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffffe0,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffff0,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffff8,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffffc,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7fffffe,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xf7ffffff,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f1100b6,32,FLEN)
NAN_BOXED(0xbfe1fb5a,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800001,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800003,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80800007,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80999999,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80a49249,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b33333,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80b6db6d,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80bbbbbb,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80c44444,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80cccccc,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80db6db6,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80e66666,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80edb6db,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffff8,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffc,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80fffffe,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83800000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83800001,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83800003,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83800007,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8380000f,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8380001f,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8380003f,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8380007f,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x838000ff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x838001ff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x838003ff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x838007ff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83800fff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83801fff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83803fff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83807fff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8380ffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8381ffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8383ffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8387ffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x838fffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x839fffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83bfffff,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83c00000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83e00000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83f00000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83f80000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fc0000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fe0000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ff0000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ff8000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffc000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffe000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fff000,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fff800,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffc00,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffe00,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffff00,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffff80,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffffc0,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffffe0,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffff0,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffff8,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffffc,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83fffffe,32,FLEN)
NAN_BOXED(0x7f114532,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x83ffffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0000000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0000001,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0000003,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0000007,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf000000f,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf000001f,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf000003f,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf000007f,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf00000ff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf00001ff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf00003ff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf00007ff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0000fff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0001fff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0003fff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0007fff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf000ffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf001ffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf003ffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf007ffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf00fffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf01fffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf03fffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0400000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0600000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0700000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf0780000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07c0000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07e0000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07f0000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07f8000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fc000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fe000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ff000,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ff800,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffc00,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffe00,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fff00,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fff80,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fffc0,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fffe0,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffff0,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffff8,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffffc,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07ffffe,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xf07fffff,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f11efef,32,FLEN)
NAN_BOXED(0xbfe088ec,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1000000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1000001,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1000003,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1000007,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf100000f,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf100001f,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf100003f,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf100007f,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf10000ff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf10001ff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf10003ff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf10007ff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1000fff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1001fff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1003fff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1007fff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf100ffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf101ffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf103ffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf107ffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf10fffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf11fffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf13fffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1400000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1600000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1700000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf1780000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17c0000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17e0000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17f0000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17f8000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fc000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fe000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ff000,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ff800,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffc00,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffe00,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fff00,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fff80,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fffc0,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fffe0,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffff0,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffff8,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffffc,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17ffffe,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xf17fffff,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f124d93,32,FLEN)
NAN_BOXED(0xbfdff934,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
