
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_37632:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb80003ff; valaddr_reg:x3; val_offset:112896*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112896*0 + 3*0*FLEN/8, x4, x1, x2)

inst_37633:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb80007ff; valaddr_reg:x3; val_offset:112899*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112899*0 + 3*1*FLEN/8, x4, x1, x2)

inst_37634:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8000fff; valaddr_reg:x3; val_offset:112902*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112902*0 + 3*2*FLEN/8, x4, x1, x2)

inst_37635:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8001fff; valaddr_reg:x3; val_offset:112905*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112905*0 + 3*3*FLEN/8, x4, x1, x2)

inst_37636:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8003fff; valaddr_reg:x3; val_offset:112908*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112908*0 + 3*4*FLEN/8, x4, x1, x2)

inst_37637:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8007fff; valaddr_reg:x3; val_offset:112911*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112911*0 + 3*5*FLEN/8, x4, x1, x2)

inst_37638:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb800ffff; valaddr_reg:x3; val_offset:112914*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112914*0 + 3*6*FLEN/8, x4, x1, x2)

inst_37639:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb801ffff; valaddr_reg:x3; val_offset:112917*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112917*0 + 3*7*FLEN/8, x4, x1, x2)

inst_37640:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb803ffff; valaddr_reg:x3; val_offset:112920*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112920*0 + 3*8*FLEN/8, x4, x1, x2)

inst_37641:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb807ffff; valaddr_reg:x3; val_offset:112923*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112923*0 + 3*9*FLEN/8, x4, x1, x2)

inst_37642:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb80fffff; valaddr_reg:x3; val_offset:112926*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112926*0 + 3*10*FLEN/8, x4, x1, x2)

inst_37643:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb81fffff; valaddr_reg:x3; val_offset:112929*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112929*0 + 3*11*FLEN/8, x4, x1, x2)

inst_37644:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb83fffff; valaddr_reg:x3; val_offset:112932*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112932*0 + 3*12*FLEN/8, x4, x1, x2)

inst_37645:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8400000; valaddr_reg:x3; val_offset:112935*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112935*0 + 3*13*FLEN/8, x4, x1, x2)

inst_37646:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8600000; valaddr_reg:x3; val_offset:112938*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112938*0 + 3*14*FLEN/8, x4, x1, x2)

inst_37647:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8700000; valaddr_reg:x3; val_offset:112941*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112941*0 + 3*15*FLEN/8, x4, x1, x2)

inst_37648:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb8780000; valaddr_reg:x3; val_offset:112944*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112944*0 + 3*16*FLEN/8, x4, x1, x2)

inst_37649:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87c0000; valaddr_reg:x3; val_offset:112947*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112947*0 + 3*17*FLEN/8, x4, x1, x2)

inst_37650:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87e0000; valaddr_reg:x3; val_offset:112950*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112950*0 + 3*18*FLEN/8, x4, x1, x2)

inst_37651:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87f0000; valaddr_reg:x3; val_offset:112953*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112953*0 + 3*19*FLEN/8, x4, x1, x2)

inst_37652:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87f8000; valaddr_reg:x3; val_offset:112956*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112956*0 + 3*20*FLEN/8, x4, x1, x2)

inst_37653:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fc000; valaddr_reg:x3; val_offset:112959*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112959*0 + 3*21*FLEN/8, x4, x1, x2)

inst_37654:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fe000; valaddr_reg:x3; val_offset:112962*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112962*0 + 3*22*FLEN/8, x4, x1, x2)

inst_37655:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ff000; valaddr_reg:x3; val_offset:112965*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112965*0 + 3*23*FLEN/8, x4, x1, x2)

inst_37656:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ff800; valaddr_reg:x3; val_offset:112968*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112968*0 + 3*24*FLEN/8, x4, x1, x2)

inst_37657:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffc00; valaddr_reg:x3; val_offset:112971*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112971*0 + 3*25*FLEN/8, x4, x1, x2)

inst_37658:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffe00; valaddr_reg:x3; val_offset:112974*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112974*0 + 3*26*FLEN/8, x4, x1, x2)

inst_37659:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fff00; valaddr_reg:x3; val_offset:112977*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112977*0 + 3*27*FLEN/8, x4, x1, x2)

inst_37660:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fff80; valaddr_reg:x3; val_offset:112980*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112980*0 + 3*28*FLEN/8, x4, x1, x2)

inst_37661:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fffc0; valaddr_reg:x3; val_offset:112983*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112983*0 + 3*29*FLEN/8, x4, x1, x2)

inst_37662:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fffe0; valaddr_reg:x3; val_offset:112986*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112986*0 + 3*30*FLEN/8, x4, x1, x2)

inst_37663:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffff0; valaddr_reg:x3; val_offset:112989*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112989*0 + 3*31*FLEN/8, x4, x1, x2)

inst_37664:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffff8; valaddr_reg:x3; val_offset:112992*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112992*0 + 3*32*FLEN/8, x4, x1, x2)

inst_37665:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffffc; valaddr_reg:x3; val_offset:112995*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112995*0 + 3*33*FLEN/8, x4, x1, x2)

inst_37666:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87ffffe; valaddr_reg:x3; val_offset:112998*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112998*0 + 3*34*FLEN/8, x4, x1, x2)

inst_37667:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xb87fffff; valaddr_reg:x3; val_offset:113001*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113001*0 + 3*35*FLEN/8, x4, x1, x2)

inst_37668:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbf800001; valaddr_reg:x3; val_offset:113004*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113004*0 + 3*36*FLEN/8, x4, x1, x2)

inst_37669:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbf800003; valaddr_reg:x3; val_offset:113007*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113007*0 + 3*37*FLEN/8, x4, x1, x2)

inst_37670:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbf800007; valaddr_reg:x3; val_offset:113010*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113010*0 + 3*38*FLEN/8, x4, x1, x2)

inst_37671:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbf999999; valaddr_reg:x3; val_offset:113013*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113013*0 + 3*39*FLEN/8, x4, x1, x2)

inst_37672:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:113016*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113016*0 + 3*40*FLEN/8, x4, x1, x2)

inst_37673:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:113019*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113019*0 + 3*41*FLEN/8, x4, x1, x2)

inst_37674:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:113022*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113022*0 + 3*42*FLEN/8, x4, x1, x2)

inst_37675:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:113025*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113025*0 + 3*43*FLEN/8, x4, x1, x2)

inst_37676:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:113028*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113028*0 + 3*44*FLEN/8, x4, x1, x2)

inst_37677:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:113031*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113031*0 + 3*45*FLEN/8, x4, x1, x2)

inst_37678:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:113034*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113034*0 + 3*46*FLEN/8, x4, x1, x2)

inst_37679:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:113037*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113037*0 + 3*47*FLEN/8, x4, x1, x2)

inst_37680:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:113040*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113040*0 + 3*48*FLEN/8, x4, x1, x2)

inst_37681:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:113043*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113043*0 + 3*49*FLEN/8, x4, x1, x2)

inst_37682:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:113046*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113046*0 + 3*50*FLEN/8, x4, x1, x2)

inst_37683:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:113049*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113049*0 + 3*51*FLEN/8, x4, x1, x2)

inst_37684:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:113052*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113052*0 + 3*52*FLEN/8, x4, x1, x2)

inst_37685:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:113055*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113055*0 + 3*53*FLEN/8, x4, x1, x2)

inst_37686:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:113058*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113058*0 + 3*54*FLEN/8, x4, x1, x2)

inst_37687:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:113061*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113061*0 + 3*55*FLEN/8, x4, x1, x2)

inst_37688:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:113064*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113064*0 + 3*56*FLEN/8, x4, x1, x2)

inst_37689:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:113067*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113067*0 + 3*57*FLEN/8, x4, x1, x2)

inst_37690:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:113070*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113070*0 + 3*58*FLEN/8, x4, x1, x2)

inst_37691:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113073*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113073*0 + 3*59*FLEN/8, x4, x1, x2)

inst_37692:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:113076*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113076*0 + 3*60*FLEN/8, x4, x1, x2)

inst_37693:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:113079*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113079*0 + 3*61*FLEN/8, x4, x1, x2)

inst_37694:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:113082*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113082*0 + 3*62*FLEN/8, x4, x1, x2)

inst_37695:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:113085*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113085*0 + 3*63*FLEN/8, x4, x1, x2)

inst_37696:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:113088*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113088*0 + 3*64*FLEN/8, x4, x1, x2)

inst_37697:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:113091*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113091*0 + 3*65*FLEN/8, x4, x1, x2)

inst_37698:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:113094*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113094*0 + 3*66*FLEN/8, x4, x1, x2)

inst_37699:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:113097*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113097*0 + 3*67*FLEN/8, x4, x1, x2)

inst_37700:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23800000; valaddr_reg:x3; val_offset:113100*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113100*0 + 3*68*FLEN/8, x4, x1, x2)

inst_37701:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23800001; valaddr_reg:x3; val_offset:113103*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113103*0 + 3*69*FLEN/8, x4, x1, x2)

inst_37702:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23800003; valaddr_reg:x3; val_offset:113106*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113106*0 + 3*70*FLEN/8, x4, x1, x2)

inst_37703:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23800007; valaddr_reg:x3; val_offset:113109*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113109*0 + 3*71*FLEN/8, x4, x1, x2)

inst_37704:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2380000f; valaddr_reg:x3; val_offset:113112*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113112*0 + 3*72*FLEN/8, x4, x1, x2)

inst_37705:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2380001f; valaddr_reg:x3; val_offset:113115*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113115*0 + 3*73*FLEN/8, x4, x1, x2)

inst_37706:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2380003f; valaddr_reg:x3; val_offset:113118*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113118*0 + 3*74*FLEN/8, x4, x1, x2)

inst_37707:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2380007f; valaddr_reg:x3; val_offset:113121*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113121*0 + 3*75*FLEN/8, x4, x1, x2)

inst_37708:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x238000ff; valaddr_reg:x3; val_offset:113124*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113124*0 + 3*76*FLEN/8, x4, x1, x2)

inst_37709:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x238001ff; valaddr_reg:x3; val_offset:113127*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113127*0 + 3*77*FLEN/8, x4, x1, x2)

inst_37710:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x238003ff; valaddr_reg:x3; val_offset:113130*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113130*0 + 3*78*FLEN/8, x4, x1, x2)

inst_37711:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x238007ff; valaddr_reg:x3; val_offset:113133*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113133*0 + 3*79*FLEN/8, x4, x1, x2)

inst_37712:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23800fff; valaddr_reg:x3; val_offset:113136*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113136*0 + 3*80*FLEN/8, x4, x1, x2)

inst_37713:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23801fff; valaddr_reg:x3; val_offset:113139*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113139*0 + 3*81*FLEN/8, x4, x1, x2)

inst_37714:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23803fff; valaddr_reg:x3; val_offset:113142*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113142*0 + 3*82*FLEN/8, x4, x1, x2)

inst_37715:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23807fff; valaddr_reg:x3; val_offset:113145*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113145*0 + 3*83*FLEN/8, x4, x1, x2)

inst_37716:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2380ffff; valaddr_reg:x3; val_offset:113148*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113148*0 + 3*84*FLEN/8, x4, x1, x2)

inst_37717:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2381ffff; valaddr_reg:x3; val_offset:113151*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113151*0 + 3*85*FLEN/8, x4, x1, x2)

inst_37718:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2383ffff; valaddr_reg:x3; val_offset:113154*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113154*0 + 3*86*FLEN/8, x4, x1, x2)

inst_37719:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x2387ffff; valaddr_reg:x3; val_offset:113157*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113157*0 + 3*87*FLEN/8, x4, x1, x2)

inst_37720:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x238fffff; valaddr_reg:x3; val_offset:113160*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113160*0 + 3*88*FLEN/8, x4, x1, x2)

inst_37721:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x239fffff; valaddr_reg:x3; val_offset:113163*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113163*0 + 3*89*FLEN/8, x4, x1, x2)

inst_37722:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23bfffff; valaddr_reg:x3; val_offset:113166*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113166*0 + 3*90*FLEN/8, x4, x1, x2)

inst_37723:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23c00000; valaddr_reg:x3; val_offset:113169*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113169*0 + 3*91*FLEN/8, x4, x1, x2)

inst_37724:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23e00000; valaddr_reg:x3; val_offset:113172*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113172*0 + 3*92*FLEN/8, x4, x1, x2)

inst_37725:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23f00000; valaddr_reg:x3; val_offset:113175*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113175*0 + 3*93*FLEN/8, x4, x1, x2)

inst_37726:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23f80000; valaddr_reg:x3; val_offset:113178*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113178*0 + 3*94*FLEN/8, x4, x1, x2)

inst_37727:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fc0000; valaddr_reg:x3; val_offset:113181*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113181*0 + 3*95*FLEN/8, x4, x1, x2)

inst_37728:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fe0000; valaddr_reg:x3; val_offset:113184*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113184*0 + 3*96*FLEN/8, x4, x1, x2)

inst_37729:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ff0000; valaddr_reg:x3; val_offset:113187*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113187*0 + 3*97*FLEN/8, x4, x1, x2)

inst_37730:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ff8000; valaddr_reg:x3; val_offset:113190*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113190*0 + 3*98*FLEN/8, x4, x1, x2)

inst_37731:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffc000; valaddr_reg:x3; val_offset:113193*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113193*0 + 3*99*FLEN/8, x4, x1, x2)

inst_37732:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffe000; valaddr_reg:x3; val_offset:113196*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113196*0 + 3*100*FLEN/8, x4, x1, x2)

inst_37733:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fff000; valaddr_reg:x3; val_offset:113199*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113199*0 + 3*101*FLEN/8, x4, x1, x2)

inst_37734:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fff800; valaddr_reg:x3; val_offset:113202*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113202*0 + 3*102*FLEN/8, x4, x1, x2)

inst_37735:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffc00; valaddr_reg:x3; val_offset:113205*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113205*0 + 3*103*FLEN/8, x4, x1, x2)

inst_37736:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffe00; valaddr_reg:x3; val_offset:113208*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113208*0 + 3*104*FLEN/8, x4, x1, x2)

inst_37737:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffff00; valaddr_reg:x3; val_offset:113211*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113211*0 + 3*105*FLEN/8, x4, x1, x2)

inst_37738:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffff80; valaddr_reg:x3; val_offset:113214*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113214*0 + 3*106*FLEN/8, x4, x1, x2)

inst_37739:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffffc0; valaddr_reg:x3; val_offset:113217*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113217*0 + 3*107*FLEN/8, x4, x1, x2)

inst_37740:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffffe0; valaddr_reg:x3; val_offset:113220*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113220*0 + 3*108*FLEN/8, x4, x1, x2)

inst_37741:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffff0; valaddr_reg:x3; val_offset:113223*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113223*0 + 3*109*FLEN/8, x4, x1, x2)

inst_37742:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffff8; valaddr_reg:x3; val_offset:113226*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113226*0 + 3*110*FLEN/8, x4, x1, x2)

inst_37743:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffffc; valaddr_reg:x3; val_offset:113229*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113229*0 + 3*111*FLEN/8, x4, x1, x2)

inst_37744:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23fffffe; valaddr_reg:x3; val_offset:113232*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113232*0 + 3*112*FLEN/8, x4, x1, x2)

inst_37745:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0;
op3val:0x23ffffff; valaddr_reg:x3; val_offset:113235*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113235*0 + 3*113*FLEN/8, x4, x1, x2)

inst_37746:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29800000; valaddr_reg:x3; val_offset:113238*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113238*0 + 3*114*FLEN/8, x4, x1, x2)

inst_37747:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29800001; valaddr_reg:x3; val_offset:113241*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113241*0 + 3*115*FLEN/8, x4, x1, x2)

inst_37748:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29800003; valaddr_reg:x3; val_offset:113244*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113244*0 + 3*116*FLEN/8, x4, x1, x2)

inst_37749:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29800007; valaddr_reg:x3; val_offset:113247*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113247*0 + 3*117*FLEN/8, x4, x1, x2)

inst_37750:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2980000f; valaddr_reg:x3; val_offset:113250*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113250*0 + 3*118*FLEN/8, x4, x1, x2)

inst_37751:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2980001f; valaddr_reg:x3; val_offset:113253*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113253*0 + 3*119*FLEN/8, x4, x1, x2)

inst_37752:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2980003f; valaddr_reg:x3; val_offset:113256*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113256*0 + 3*120*FLEN/8, x4, x1, x2)

inst_37753:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2980007f; valaddr_reg:x3; val_offset:113259*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113259*0 + 3*121*FLEN/8, x4, x1, x2)

inst_37754:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x298000ff; valaddr_reg:x3; val_offset:113262*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113262*0 + 3*122*FLEN/8, x4, x1, x2)

inst_37755:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x298001ff; valaddr_reg:x3; val_offset:113265*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113265*0 + 3*123*FLEN/8, x4, x1, x2)

inst_37756:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x298003ff; valaddr_reg:x3; val_offset:113268*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113268*0 + 3*124*FLEN/8, x4, x1, x2)

inst_37757:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x298007ff; valaddr_reg:x3; val_offset:113271*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113271*0 + 3*125*FLEN/8, x4, x1, x2)

inst_37758:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29800fff; valaddr_reg:x3; val_offset:113274*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113274*0 + 3*126*FLEN/8, x4, x1, x2)

inst_37759:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29801fff; valaddr_reg:x3; val_offset:113277*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113277*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_37760:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29803fff; valaddr_reg:x3; val_offset:113280*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113280*0 + 3*128*FLEN/8, x4, x1, x2)

inst_37761:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29807fff; valaddr_reg:x3; val_offset:113283*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113283*0 + 3*129*FLEN/8, x4, x1, x2)

inst_37762:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2980ffff; valaddr_reg:x3; val_offset:113286*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113286*0 + 3*130*FLEN/8, x4, x1, x2)

inst_37763:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2981ffff; valaddr_reg:x3; val_offset:113289*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113289*0 + 3*131*FLEN/8, x4, x1, x2)

inst_37764:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2983ffff; valaddr_reg:x3; val_offset:113292*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113292*0 + 3*132*FLEN/8, x4, x1, x2)

inst_37765:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x2987ffff; valaddr_reg:x3; val_offset:113295*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113295*0 + 3*133*FLEN/8, x4, x1, x2)

inst_37766:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x298fffff; valaddr_reg:x3; val_offset:113298*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113298*0 + 3*134*FLEN/8, x4, x1, x2)

inst_37767:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x299fffff; valaddr_reg:x3; val_offset:113301*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113301*0 + 3*135*FLEN/8, x4, x1, x2)

inst_37768:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29bfffff; valaddr_reg:x3; val_offset:113304*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113304*0 + 3*136*FLEN/8, x4, x1, x2)

inst_37769:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29c00000; valaddr_reg:x3; val_offset:113307*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113307*0 + 3*137*FLEN/8, x4, x1, x2)

inst_37770:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29e00000; valaddr_reg:x3; val_offset:113310*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113310*0 + 3*138*FLEN/8, x4, x1, x2)

inst_37771:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29f00000; valaddr_reg:x3; val_offset:113313*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113313*0 + 3*139*FLEN/8, x4, x1, x2)

inst_37772:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29f80000; valaddr_reg:x3; val_offset:113316*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113316*0 + 3*140*FLEN/8, x4, x1, x2)

inst_37773:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fc0000; valaddr_reg:x3; val_offset:113319*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113319*0 + 3*141*FLEN/8, x4, x1, x2)

inst_37774:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fe0000; valaddr_reg:x3; val_offset:113322*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113322*0 + 3*142*FLEN/8, x4, x1, x2)

inst_37775:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ff0000; valaddr_reg:x3; val_offset:113325*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113325*0 + 3*143*FLEN/8, x4, x1, x2)

inst_37776:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ff8000; valaddr_reg:x3; val_offset:113328*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113328*0 + 3*144*FLEN/8, x4, x1, x2)

inst_37777:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffc000; valaddr_reg:x3; val_offset:113331*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113331*0 + 3*145*FLEN/8, x4, x1, x2)

inst_37778:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffe000; valaddr_reg:x3; val_offset:113334*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113334*0 + 3*146*FLEN/8, x4, x1, x2)

inst_37779:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fff000; valaddr_reg:x3; val_offset:113337*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113337*0 + 3*147*FLEN/8, x4, x1, x2)

inst_37780:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fff800; valaddr_reg:x3; val_offset:113340*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113340*0 + 3*148*FLEN/8, x4, x1, x2)

inst_37781:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffc00; valaddr_reg:x3; val_offset:113343*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113343*0 + 3*149*FLEN/8, x4, x1, x2)

inst_37782:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffe00; valaddr_reg:x3; val_offset:113346*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113346*0 + 3*150*FLEN/8, x4, x1, x2)

inst_37783:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffff00; valaddr_reg:x3; val_offset:113349*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113349*0 + 3*151*FLEN/8, x4, x1, x2)

inst_37784:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffff80; valaddr_reg:x3; val_offset:113352*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113352*0 + 3*152*FLEN/8, x4, x1, x2)

inst_37785:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffffc0; valaddr_reg:x3; val_offset:113355*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113355*0 + 3*153*FLEN/8, x4, x1, x2)

inst_37786:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffffe0; valaddr_reg:x3; val_offset:113358*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113358*0 + 3*154*FLEN/8, x4, x1, x2)

inst_37787:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffff0; valaddr_reg:x3; val_offset:113361*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113361*0 + 3*155*FLEN/8, x4, x1, x2)

inst_37788:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffff8; valaddr_reg:x3; val_offset:113364*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113364*0 + 3*156*FLEN/8, x4, x1, x2)

inst_37789:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffffc; valaddr_reg:x3; val_offset:113367*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113367*0 + 3*157*FLEN/8, x4, x1, x2)

inst_37790:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29fffffe; valaddr_reg:x3; val_offset:113370*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113370*0 + 3*158*FLEN/8, x4, x1, x2)

inst_37791:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x29ffffff; valaddr_reg:x3; val_offset:113373*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113373*0 + 3*159*FLEN/8, x4, x1, x2)

inst_37792:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3f800001; valaddr_reg:x3; val_offset:113376*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113376*0 + 3*160*FLEN/8, x4, x1, x2)

inst_37793:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3f800003; valaddr_reg:x3; val_offset:113379*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113379*0 + 3*161*FLEN/8, x4, x1, x2)

inst_37794:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3f800007; valaddr_reg:x3; val_offset:113382*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113382*0 + 3*162*FLEN/8, x4, x1, x2)

inst_37795:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3f999999; valaddr_reg:x3; val_offset:113385*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113385*0 + 3*163*FLEN/8, x4, x1, x2)

inst_37796:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:113388*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113388*0 + 3*164*FLEN/8, x4, x1, x2)

inst_37797:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:113391*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113391*0 + 3*165*FLEN/8, x4, x1, x2)

inst_37798:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:113394*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113394*0 + 3*166*FLEN/8, x4, x1, x2)

inst_37799:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:113397*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113397*0 + 3*167*FLEN/8, x4, x1, x2)

inst_37800:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:113400*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113400*0 + 3*168*FLEN/8, x4, x1, x2)

inst_37801:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:113403*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113403*0 + 3*169*FLEN/8, x4, x1, x2)

inst_37802:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:113406*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113406*0 + 3*170*FLEN/8, x4, x1, x2)

inst_37803:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:113409*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113409*0 + 3*171*FLEN/8, x4, x1, x2)

inst_37804:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:113412*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113412*0 + 3*172*FLEN/8, x4, x1, x2)

inst_37805:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:113415*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113415*0 + 3*173*FLEN/8, x4, x1, x2)

inst_37806:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:113418*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113418*0 + 3*174*FLEN/8, x4, x1, x2)

inst_37807:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:113421*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113421*0 + 3*175*FLEN/8, x4, x1, x2)

inst_37808:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2000000; valaddr_reg:x3; val_offset:113424*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113424*0 + 3*176*FLEN/8, x4, x1, x2)

inst_37809:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2000001; valaddr_reg:x3; val_offset:113427*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113427*0 + 3*177*FLEN/8, x4, x1, x2)

inst_37810:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2000003; valaddr_reg:x3; val_offset:113430*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113430*0 + 3*178*FLEN/8, x4, x1, x2)

inst_37811:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2000007; valaddr_reg:x3; val_offset:113433*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113433*0 + 3*179*FLEN/8, x4, x1, x2)

inst_37812:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf200000f; valaddr_reg:x3; val_offset:113436*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113436*0 + 3*180*FLEN/8, x4, x1, x2)

inst_37813:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf200001f; valaddr_reg:x3; val_offset:113439*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113439*0 + 3*181*FLEN/8, x4, x1, x2)

inst_37814:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf200003f; valaddr_reg:x3; val_offset:113442*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113442*0 + 3*182*FLEN/8, x4, x1, x2)

inst_37815:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf200007f; valaddr_reg:x3; val_offset:113445*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113445*0 + 3*183*FLEN/8, x4, x1, x2)

inst_37816:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf20000ff; valaddr_reg:x3; val_offset:113448*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113448*0 + 3*184*FLEN/8, x4, x1, x2)

inst_37817:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf20001ff; valaddr_reg:x3; val_offset:113451*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113451*0 + 3*185*FLEN/8, x4, x1, x2)

inst_37818:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf20003ff; valaddr_reg:x3; val_offset:113454*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113454*0 + 3*186*FLEN/8, x4, x1, x2)

inst_37819:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf20007ff; valaddr_reg:x3; val_offset:113457*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113457*0 + 3*187*FLEN/8, x4, x1, x2)

inst_37820:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2000fff; valaddr_reg:x3; val_offset:113460*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113460*0 + 3*188*FLEN/8, x4, x1, x2)

inst_37821:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2001fff; valaddr_reg:x3; val_offset:113463*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113463*0 + 3*189*FLEN/8, x4, x1, x2)

inst_37822:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2003fff; valaddr_reg:x3; val_offset:113466*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113466*0 + 3*190*FLEN/8, x4, x1, x2)

inst_37823:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2007fff; valaddr_reg:x3; val_offset:113469*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113469*0 + 3*191*FLEN/8, x4, x1, x2)

inst_37824:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf200ffff; valaddr_reg:x3; val_offset:113472*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113472*0 + 3*192*FLEN/8, x4, x1, x2)

inst_37825:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf201ffff; valaddr_reg:x3; val_offset:113475*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113475*0 + 3*193*FLEN/8, x4, x1, x2)

inst_37826:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf203ffff; valaddr_reg:x3; val_offset:113478*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113478*0 + 3*194*FLEN/8, x4, x1, x2)

inst_37827:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf207ffff; valaddr_reg:x3; val_offset:113481*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113481*0 + 3*195*FLEN/8, x4, x1, x2)

inst_37828:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf20fffff; valaddr_reg:x3; val_offset:113484*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113484*0 + 3*196*FLEN/8, x4, x1, x2)

inst_37829:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf21fffff; valaddr_reg:x3; val_offset:113487*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113487*0 + 3*197*FLEN/8, x4, x1, x2)

inst_37830:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf23fffff; valaddr_reg:x3; val_offset:113490*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113490*0 + 3*198*FLEN/8, x4, x1, x2)

inst_37831:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2400000; valaddr_reg:x3; val_offset:113493*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113493*0 + 3*199*FLEN/8, x4, x1, x2)

inst_37832:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2600000; valaddr_reg:x3; val_offset:113496*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113496*0 + 3*200*FLEN/8, x4, x1, x2)

inst_37833:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2700000; valaddr_reg:x3; val_offset:113499*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113499*0 + 3*201*FLEN/8, x4, x1, x2)

inst_37834:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf2780000; valaddr_reg:x3; val_offset:113502*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113502*0 + 3*202*FLEN/8, x4, x1, x2)

inst_37835:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27c0000; valaddr_reg:x3; val_offset:113505*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113505*0 + 3*203*FLEN/8, x4, x1, x2)

inst_37836:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27e0000; valaddr_reg:x3; val_offset:113508*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113508*0 + 3*204*FLEN/8, x4, x1, x2)

inst_37837:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27f0000; valaddr_reg:x3; val_offset:113511*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113511*0 + 3*205*FLEN/8, x4, x1, x2)

inst_37838:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27f8000; valaddr_reg:x3; val_offset:113514*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113514*0 + 3*206*FLEN/8, x4, x1, x2)

inst_37839:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fc000; valaddr_reg:x3; val_offset:113517*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113517*0 + 3*207*FLEN/8, x4, x1, x2)

inst_37840:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fe000; valaddr_reg:x3; val_offset:113520*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113520*0 + 3*208*FLEN/8, x4, x1, x2)

inst_37841:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ff000; valaddr_reg:x3; val_offset:113523*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113523*0 + 3*209*FLEN/8, x4, x1, x2)

inst_37842:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ff800; valaddr_reg:x3; val_offset:113526*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113526*0 + 3*210*FLEN/8, x4, x1, x2)

inst_37843:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffc00; valaddr_reg:x3; val_offset:113529*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113529*0 + 3*211*FLEN/8, x4, x1, x2)

inst_37844:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffe00; valaddr_reg:x3; val_offset:113532*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113532*0 + 3*212*FLEN/8, x4, x1, x2)

inst_37845:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fff00; valaddr_reg:x3; val_offset:113535*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113535*0 + 3*213*FLEN/8, x4, x1, x2)

inst_37846:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fff80; valaddr_reg:x3; val_offset:113538*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113538*0 + 3*214*FLEN/8, x4, x1, x2)

inst_37847:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fffc0; valaddr_reg:x3; val_offset:113541*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113541*0 + 3*215*FLEN/8, x4, x1, x2)

inst_37848:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fffe0; valaddr_reg:x3; val_offset:113544*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113544*0 + 3*216*FLEN/8, x4, x1, x2)

inst_37849:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffff0; valaddr_reg:x3; val_offset:113547*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113547*0 + 3*217*FLEN/8, x4, x1, x2)

inst_37850:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffff8; valaddr_reg:x3; val_offset:113550*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113550*0 + 3*218*FLEN/8, x4, x1, x2)

inst_37851:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffffc; valaddr_reg:x3; val_offset:113553*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113553*0 + 3*219*FLEN/8, x4, x1, x2)

inst_37852:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27ffffe; valaddr_reg:x3; val_offset:113556*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113556*0 + 3*220*FLEN/8, x4, x1, x2)

inst_37853:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xf27fffff; valaddr_reg:x3; val_offset:113559*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113559*0 + 3*221*FLEN/8, x4, x1, x2)

inst_37854:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff000001; valaddr_reg:x3; val_offset:113562*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113562*0 + 3*222*FLEN/8, x4, x1, x2)

inst_37855:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff000003; valaddr_reg:x3; val_offset:113565*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113565*0 + 3*223*FLEN/8, x4, x1, x2)

inst_37856:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff000007; valaddr_reg:x3; val_offset:113568*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113568*0 + 3*224*FLEN/8, x4, x1, x2)

inst_37857:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff199999; valaddr_reg:x3; val_offset:113571*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113571*0 + 3*225*FLEN/8, x4, x1, x2)

inst_37858:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff249249; valaddr_reg:x3; val_offset:113574*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113574*0 + 3*226*FLEN/8, x4, x1, x2)

inst_37859:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff333333; valaddr_reg:x3; val_offset:113577*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113577*0 + 3*227*FLEN/8, x4, x1, x2)

inst_37860:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:113580*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113580*0 + 3*228*FLEN/8, x4, x1, x2)

inst_37861:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:113583*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113583*0 + 3*229*FLEN/8, x4, x1, x2)

inst_37862:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff444444; valaddr_reg:x3; val_offset:113586*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113586*0 + 3*230*FLEN/8, x4, x1, x2)

inst_37863:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:113589*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113589*0 + 3*231*FLEN/8, x4, x1, x2)

inst_37864:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:113592*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113592*0 + 3*232*FLEN/8, x4, x1, x2)

inst_37865:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff666666; valaddr_reg:x3; val_offset:113595*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113595*0 + 3*233*FLEN/8, x4, x1, x2)

inst_37866:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:113598*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113598*0 + 3*234*FLEN/8, x4, x1, x2)

inst_37867:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:113601*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113601*0 + 3*235*FLEN/8, x4, x1, x2)

inst_37868:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:113604*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113604*0 + 3*236*FLEN/8, x4, x1, x2)

inst_37869:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:113607*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113607*0 + 3*237*FLEN/8, x4, x1, x2)

inst_37870:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:113610*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113610*0 + 3*238*FLEN/8, x4, x1, x2)

inst_37871:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:113613*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113613*0 + 3*239*FLEN/8, x4, x1, x2)

inst_37872:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:113616*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113616*0 + 3*240*FLEN/8, x4, x1, x2)

inst_37873:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:113619*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113619*0 + 3*241*FLEN/8, x4, x1, x2)

inst_37874:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:113622*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113622*0 + 3*242*FLEN/8, x4, x1, x2)

inst_37875:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:113625*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113625*0 + 3*243*FLEN/8, x4, x1, x2)

inst_37876:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:113628*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113628*0 + 3*244*FLEN/8, x4, x1, x2)

inst_37877:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:113631*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113631*0 + 3*245*FLEN/8, x4, x1, x2)

inst_37878:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:113634*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113634*0 + 3*246*FLEN/8, x4, x1, x2)

inst_37879:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:113637*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113637*0 + 3*247*FLEN/8, x4, x1, x2)

inst_37880:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:113640*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113640*0 + 3*248*FLEN/8, x4, x1, x2)

inst_37881:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:113643*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113643*0 + 3*249*FLEN/8, x4, x1, x2)

inst_37882:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:113646*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113646*0 + 3*250*FLEN/8, x4, x1, x2)

inst_37883:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:113649*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113649*0 + 3*251*FLEN/8, x4, x1, x2)

inst_37884:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:113652*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113652*0 + 3*252*FLEN/8, x4, x1, x2)

inst_37885:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:113655*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113655*0 + 3*253*FLEN/8, x4, x1, x2)

inst_37886:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3800000; valaddr_reg:x3; val_offset:113658*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113658*0 + 3*254*FLEN/8, x4, x1, x2)

inst_37887:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3800001; valaddr_reg:x3; val_offset:113661*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113661*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_37888:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3800003; valaddr_reg:x3; val_offset:113664*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113664*0 + 3*256*FLEN/8, x4, x1, x2)

inst_37889:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3800007; valaddr_reg:x3; val_offset:113667*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113667*0 + 3*257*FLEN/8, x4, x1, x2)

inst_37890:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x380000f; valaddr_reg:x3; val_offset:113670*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113670*0 + 3*258*FLEN/8, x4, x1, x2)

inst_37891:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x380001f; valaddr_reg:x3; val_offset:113673*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113673*0 + 3*259*FLEN/8, x4, x1, x2)

inst_37892:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x380003f; valaddr_reg:x3; val_offset:113676*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113676*0 + 3*260*FLEN/8, x4, x1, x2)

inst_37893:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x380007f; valaddr_reg:x3; val_offset:113679*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113679*0 + 3*261*FLEN/8, x4, x1, x2)

inst_37894:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x38000ff; valaddr_reg:x3; val_offset:113682*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113682*0 + 3*262*FLEN/8, x4, x1, x2)

inst_37895:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x38001ff; valaddr_reg:x3; val_offset:113685*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113685*0 + 3*263*FLEN/8, x4, x1, x2)

inst_37896:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x38003ff; valaddr_reg:x3; val_offset:113688*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113688*0 + 3*264*FLEN/8, x4, x1, x2)

inst_37897:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x38007ff; valaddr_reg:x3; val_offset:113691*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113691*0 + 3*265*FLEN/8, x4, x1, x2)

inst_37898:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3800fff; valaddr_reg:x3; val_offset:113694*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113694*0 + 3*266*FLEN/8, x4, x1, x2)

inst_37899:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3801fff; valaddr_reg:x3; val_offset:113697*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113697*0 + 3*267*FLEN/8, x4, x1, x2)

inst_37900:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3803fff; valaddr_reg:x3; val_offset:113700*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113700*0 + 3*268*FLEN/8, x4, x1, x2)

inst_37901:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3807fff; valaddr_reg:x3; val_offset:113703*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113703*0 + 3*269*FLEN/8, x4, x1, x2)

inst_37902:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x380ffff; valaddr_reg:x3; val_offset:113706*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113706*0 + 3*270*FLEN/8, x4, x1, x2)

inst_37903:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x381ffff; valaddr_reg:x3; val_offset:113709*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113709*0 + 3*271*FLEN/8, x4, x1, x2)

inst_37904:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x383ffff; valaddr_reg:x3; val_offset:113712*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113712*0 + 3*272*FLEN/8, x4, x1, x2)

inst_37905:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x387ffff; valaddr_reg:x3; val_offset:113715*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113715*0 + 3*273*FLEN/8, x4, x1, x2)

inst_37906:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x38fffff; valaddr_reg:x3; val_offset:113718*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113718*0 + 3*274*FLEN/8, x4, x1, x2)

inst_37907:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x39fffff; valaddr_reg:x3; val_offset:113721*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113721*0 + 3*275*FLEN/8, x4, x1, x2)

inst_37908:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3bfffff; valaddr_reg:x3; val_offset:113724*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113724*0 + 3*276*FLEN/8, x4, x1, x2)

inst_37909:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3c00000; valaddr_reg:x3; val_offset:113727*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113727*0 + 3*277*FLEN/8, x4, x1, x2)

inst_37910:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3e00000; valaddr_reg:x3; val_offset:113730*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113730*0 + 3*278*FLEN/8, x4, x1, x2)

inst_37911:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3f00000; valaddr_reg:x3; val_offset:113733*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113733*0 + 3*279*FLEN/8, x4, x1, x2)

inst_37912:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3f80000; valaddr_reg:x3; val_offset:113736*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113736*0 + 3*280*FLEN/8, x4, x1, x2)

inst_37913:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fc0000; valaddr_reg:x3; val_offset:113739*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113739*0 + 3*281*FLEN/8, x4, x1, x2)

inst_37914:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fe0000; valaddr_reg:x3; val_offset:113742*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113742*0 + 3*282*FLEN/8, x4, x1, x2)

inst_37915:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ff0000; valaddr_reg:x3; val_offset:113745*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113745*0 + 3*283*FLEN/8, x4, x1, x2)

inst_37916:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ff8000; valaddr_reg:x3; val_offset:113748*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113748*0 + 3*284*FLEN/8, x4, x1, x2)

inst_37917:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffc000; valaddr_reg:x3; val_offset:113751*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113751*0 + 3*285*FLEN/8, x4, x1, x2)

inst_37918:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffe000; valaddr_reg:x3; val_offset:113754*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113754*0 + 3*286*FLEN/8, x4, x1, x2)

inst_37919:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fff000; valaddr_reg:x3; val_offset:113757*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113757*0 + 3*287*FLEN/8, x4, x1, x2)

inst_37920:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fff800; valaddr_reg:x3; val_offset:113760*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113760*0 + 3*288*FLEN/8, x4, x1, x2)

inst_37921:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffc00; valaddr_reg:x3; val_offset:113763*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113763*0 + 3*289*FLEN/8, x4, x1, x2)

inst_37922:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffe00; valaddr_reg:x3; val_offset:113766*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113766*0 + 3*290*FLEN/8, x4, x1, x2)

inst_37923:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffff00; valaddr_reg:x3; val_offset:113769*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113769*0 + 3*291*FLEN/8, x4, x1, x2)

inst_37924:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffff80; valaddr_reg:x3; val_offset:113772*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113772*0 + 3*292*FLEN/8, x4, x1, x2)

inst_37925:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffffc0; valaddr_reg:x3; val_offset:113775*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113775*0 + 3*293*FLEN/8, x4, x1, x2)

inst_37926:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffffe0; valaddr_reg:x3; val_offset:113778*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113778*0 + 3*294*FLEN/8, x4, x1, x2)

inst_37927:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffff0; valaddr_reg:x3; val_offset:113781*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113781*0 + 3*295*FLEN/8, x4, x1, x2)

inst_37928:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffff8; valaddr_reg:x3; val_offset:113784*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113784*0 + 3*296*FLEN/8, x4, x1, x2)

inst_37929:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffffc; valaddr_reg:x3; val_offset:113787*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113787*0 + 3*297*FLEN/8, x4, x1, x2)

inst_37930:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3fffffe; valaddr_reg:x3; val_offset:113790*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113790*0 + 3*298*FLEN/8, x4, x1, x2)

inst_37931:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0;
op3val:0x3ffffff; valaddr_reg:x3; val_offset:113793*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113793*0 + 3*299*FLEN/8, x4, x1, x2)

inst_37932:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:113796*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113796*0 + 3*300*FLEN/8, x4, x1, x2)

inst_37933:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:113799*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113799*0 + 3*301*FLEN/8, x4, x1, x2)

inst_37934:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:113802*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113802*0 + 3*302*FLEN/8, x4, x1, x2)

inst_37935:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:113805*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113805*0 + 3*303*FLEN/8, x4, x1, x2)

inst_37936:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:113808*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113808*0 + 3*304*FLEN/8, x4, x1, x2)

inst_37937:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:113811*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113811*0 + 3*305*FLEN/8, x4, x1, x2)

inst_37938:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:113814*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113814*0 + 3*306*FLEN/8, x4, x1, x2)

inst_37939:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113817*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113817*0 + 3*307*FLEN/8, x4, x1, x2)

inst_37940:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:113820*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113820*0 + 3*308*FLEN/8, x4, x1, x2)

inst_37941:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:113823*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113823*0 + 3*309*FLEN/8, x4, x1, x2)

inst_37942:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:113826*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113826*0 + 3*310*FLEN/8, x4, x1, x2)

inst_37943:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:113829*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113829*0 + 3*311*FLEN/8, x4, x1, x2)

inst_37944:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:113832*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113832*0 + 3*312*FLEN/8, x4, x1, x2)

inst_37945:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:113835*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113835*0 + 3*313*FLEN/8, x4, x1, x2)

inst_37946:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:113838*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113838*0 + 3*314*FLEN/8, x4, x1, x2)

inst_37947:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:113841*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113841*0 + 3*315*FLEN/8, x4, x1, x2)

inst_37948:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6800000; valaddr_reg:x3; val_offset:113844*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113844*0 + 3*316*FLEN/8, x4, x1, x2)

inst_37949:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6800001; valaddr_reg:x3; val_offset:113847*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113847*0 + 3*317*FLEN/8, x4, x1, x2)

inst_37950:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6800003; valaddr_reg:x3; val_offset:113850*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113850*0 + 3*318*FLEN/8, x4, x1, x2)

inst_37951:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6800007; valaddr_reg:x3; val_offset:113853*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113853*0 + 3*319*FLEN/8, x4, x1, x2)

inst_37952:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x680000f; valaddr_reg:x3; val_offset:113856*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113856*0 + 3*320*FLEN/8, x4, x1, x2)

inst_37953:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x680001f; valaddr_reg:x3; val_offset:113859*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113859*0 + 3*321*FLEN/8, x4, x1, x2)

inst_37954:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x680003f; valaddr_reg:x3; val_offset:113862*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113862*0 + 3*322*FLEN/8, x4, x1, x2)

inst_37955:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x680007f; valaddr_reg:x3; val_offset:113865*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113865*0 + 3*323*FLEN/8, x4, x1, x2)

inst_37956:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x68000ff; valaddr_reg:x3; val_offset:113868*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113868*0 + 3*324*FLEN/8, x4, x1, x2)

inst_37957:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x68001ff; valaddr_reg:x3; val_offset:113871*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113871*0 + 3*325*FLEN/8, x4, x1, x2)

inst_37958:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x68003ff; valaddr_reg:x3; val_offset:113874*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113874*0 + 3*326*FLEN/8, x4, x1, x2)

inst_37959:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x68007ff; valaddr_reg:x3; val_offset:113877*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113877*0 + 3*327*FLEN/8, x4, x1, x2)

inst_37960:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6800fff; valaddr_reg:x3; val_offset:113880*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113880*0 + 3*328*FLEN/8, x4, x1, x2)

inst_37961:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6801fff; valaddr_reg:x3; val_offset:113883*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113883*0 + 3*329*FLEN/8, x4, x1, x2)

inst_37962:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6803fff; valaddr_reg:x3; val_offset:113886*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113886*0 + 3*330*FLEN/8, x4, x1, x2)

inst_37963:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6807fff; valaddr_reg:x3; val_offset:113889*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113889*0 + 3*331*FLEN/8, x4, x1, x2)

inst_37964:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x680ffff; valaddr_reg:x3; val_offset:113892*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113892*0 + 3*332*FLEN/8, x4, x1, x2)

inst_37965:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x681ffff; valaddr_reg:x3; val_offset:113895*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113895*0 + 3*333*FLEN/8, x4, x1, x2)

inst_37966:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x683ffff; valaddr_reg:x3; val_offset:113898*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113898*0 + 3*334*FLEN/8, x4, x1, x2)

inst_37967:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x687ffff; valaddr_reg:x3; val_offset:113901*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113901*0 + 3*335*FLEN/8, x4, x1, x2)

inst_37968:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x68fffff; valaddr_reg:x3; val_offset:113904*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113904*0 + 3*336*FLEN/8, x4, x1, x2)

inst_37969:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x69fffff; valaddr_reg:x3; val_offset:113907*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113907*0 + 3*337*FLEN/8, x4, x1, x2)

inst_37970:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6bfffff; valaddr_reg:x3; val_offset:113910*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113910*0 + 3*338*FLEN/8, x4, x1, x2)

inst_37971:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6c00000; valaddr_reg:x3; val_offset:113913*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113913*0 + 3*339*FLEN/8, x4, x1, x2)

inst_37972:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6e00000; valaddr_reg:x3; val_offset:113916*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113916*0 + 3*340*FLEN/8, x4, x1, x2)

inst_37973:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6f00000; valaddr_reg:x3; val_offset:113919*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113919*0 + 3*341*FLEN/8, x4, x1, x2)

inst_37974:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6f80000; valaddr_reg:x3; val_offset:113922*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113922*0 + 3*342*FLEN/8, x4, x1, x2)

inst_37975:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fc0000; valaddr_reg:x3; val_offset:113925*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113925*0 + 3*343*FLEN/8, x4, x1, x2)

inst_37976:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fe0000; valaddr_reg:x3; val_offset:113928*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113928*0 + 3*344*FLEN/8, x4, x1, x2)

inst_37977:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ff0000; valaddr_reg:x3; val_offset:113931*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113931*0 + 3*345*FLEN/8, x4, x1, x2)

inst_37978:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ff8000; valaddr_reg:x3; val_offset:113934*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113934*0 + 3*346*FLEN/8, x4, x1, x2)

inst_37979:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffc000; valaddr_reg:x3; val_offset:113937*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113937*0 + 3*347*FLEN/8, x4, x1, x2)

inst_37980:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffe000; valaddr_reg:x3; val_offset:113940*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113940*0 + 3*348*FLEN/8, x4, x1, x2)

inst_37981:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fff000; valaddr_reg:x3; val_offset:113943*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113943*0 + 3*349*FLEN/8, x4, x1, x2)

inst_37982:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fff800; valaddr_reg:x3; val_offset:113946*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113946*0 + 3*350*FLEN/8, x4, x1, x2)

inst_37983:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffc00; valaddr_reg:x3; val_offset:113949*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113949*0 + 3*351*FLEN/8, x4, x1, x2)

inst_37984:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffe00; valaddr_reg:x3; val_offset:113952*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113952*0 + 3*352*FLEN/8, x4, x1, x2)

inst_37985:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffff00; valaddr_reg:x3; val_offset:113955*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113955*0 + 3*353*FLEN/8, x4, x1, x2)

inst_37986:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffff80; valaddr_reg:x3; val_offset:113958*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113958*0 + 3*354*FLEN/8, x4, x1, x2)

inst_37987:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffffc0; valaddr_reg:x3; val_offset:113961*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113961*0 + 3*355*FLEN/8, x4, x1, x2)

inst_37988:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffffe0; valaddr_reg:x3; val_offset:113964*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113964*0 + 3*356*FLEN/8, x4, x1, x2)

inst_37989:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffff0; valaddr_reg:x3; val_offset:113967*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113967*0 + 3*357*FLEN/8, x4, x1, x2)

inst_37990:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffff8; valaddr_reg:x3; val_offset:113970*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113970*0 + 3*358*FLEN/8, x4, x1, x2)

inst_37991:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffffc; valaddr_reg:x3; val_offset:113973*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113973*0 + 3*359*FLEN/8, x4, x1, x2)

inst_37992:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6fffffe; valaddr_reg:x3; val_offset:113976*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113976*0 + 3*360*FLEN/8, x4, x1, x2)

inst_37993:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0;
op3val:0x6ffffff; valaddr_reg:x3; val_offset:113979*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113979*0 + 3*361*FLEN/8, x4, x1, x2)

inst_37994:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:113982*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113982*0 + 3*362*FLEN/8, x4, x1, x2)

inst_37995:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:113985*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113985*0 + 3*363*FLEN/8, x4, x1, x2)

inst_37996:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:113988*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113988*0 + 3*364*FLEN/8, x4, x1, x2)

inst_37997:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:113991*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113991*0 + 3*365*FLEN/8, x4, x1, x2)

inst_37998:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:113994*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113994*0 + 3*366*FLEN/8, x4, x1, x2)

inst_37999:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:113997*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113997*0 + 3*367*FLEN/8, x4, x1, x2)

inst_38000:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:114000*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114000*0 + 3*368*FLEN/8, x4, x1, x2)

inst_38001:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114003*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114003*0 + 3*369*FLEN/8, x4, x1, x2)

inst_38002:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:114006*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114006*0 + 3*370*FLEN/8, x4, x1, x2)

inst_38003:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:114009*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114009*0 + 3*371*FLEN/8, x4, x1, x2)

inst_38004:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:114012*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114012*0 + 3*372*FLEN/8, x4, x1, x2)

inst_38005:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:114015*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114015*0 + 3*373*FLEN/8, x4, x1, x2)

inst_38006:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:114018*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114018*0 + 3*374*FLEN/8, x4, x1, x2)

inst_38007:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:114021*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114021*0 + 3*375*FLEN/8, x4, x1, x2)

inst_38008:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:114024*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114024*0 + 3*376*FLEN/8, x4, x1, x2)

inst_38009:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:114027*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114027*0 + 3*377*FLEN/8, x4, x1, x2)

inst_38010:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000000; valaddr_reg:x3; val_offset:114030*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114030*0 + 3*378*FLEN/8, x4, x1, x2)

inst_38011:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000001; valaddr_reg:x3; val_offset:114033*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114033*0 + 3*379*FLEN/8, x4, x1, x2)

inst_38012:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000003; valaddr_reg:x3; val_offset:114036*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114036*0 + 3*380*FLEN/8, x4, x1, x2)

inst_38013:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000007; valaddr_reg:x3; val_offset:114039*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114039*0 + 3*381*FLEN/8, x4, x1, x2)

inst_38014:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00000f; valaddr_reg:x3; val_offset:114042*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114042*0 + 3*382*FLEN/8, x4, x1, x2)

inst_38015:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00001f; valaddr_reg:x3; val_offset:114045*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114045*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_38016:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00003f; valaddr_reg:x3; val_offset:114048*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114048*0 + 3*384*FLEN/8, x4, x1, x2)

inst_38017:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00007f; valaddr_reg:x3; val_offset:114051*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114051*0 + 3*385*FLEN/8, x4, x1, x2)

inst_38018:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0000ff; valaddr_reg:x3; val_offset:114054*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114054*0 + 3*386*FLEN/8, x4, x1, x2)

inst_38019:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0001ff; valaddr_reg:x3; val_offset:114057*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114057*0 + 3*387*FLEN/8, x4, x1, x2)

inst_38020:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0003ff; valaddr_reg:x3; val_offset:114060*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114060*0 + 3*388*FLEN/8, x4, x1, x2)

inst_38021:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0007ff; valaddr_reg:x3; val_offset:114063*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114063*0 + 3*389*FLEN/8, x4, x1, x2)

inst_38022:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b000fff; valaddr_reg:x3; val_offset:114066*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114066*0 + 3*390*FLEN/8, x4, x1, x2)

inst_38023:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b001fff; valaddr_reg:x3; val_offset:114069*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114069*0 + 3*391*FLEN/8, x4, x1, x2)

inst_38024:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b003fff; valaddr_reg:x3; val_offset:114072*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114072*0 + 3*392*FLEN/8, x4, x1, x2)

inst_38025:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b007fff; valaddr_reg:x3; val_offset:114075*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114075*0 + 3*393*FLEN/8, x4, x1, x2)

inst_38026:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b00ffff; valaddr_reg:x3; val_offset:114078*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114078*0 + 3*394*FLEN/8, x4, x1, x2)

inst_38027:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b01ffff; valaddr_reg:x3; val_offset:114081*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114081*0 + 3*395*FLEN/8, x4, x1, x2)

inst_38028:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b03ffff; valaddr_reg:x3; val_offset:114084*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114084*0 + 3*396*FLEN/8, x4, x1, x2)

inst_38029:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b07ffff; valaddr_reg:x3; val_offset:114087*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114087*0 + 3*397*FLEN/8, x4, x1, x2)

inst_38030:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b0fffff; valaddr_reg:x3; val_offset:114090*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114090*0 + 3*398*FLEN/8, x4, x1, x2)

inst_38031:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b1fffff; valaddr_reg:x3; val_offset:114093*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114093*0 + 3*399*FLEN/8, x4, x1, x2)

inst_38032:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b3fffff; valaddr_reg:x3; val_offset:114096*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114096*0 + 3*400*FLEN/8, x4, x1, x2)

inst_38033:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b400000; valaddr_reg:x3; val_offset:114099*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114099*0 + 3*401*FLEN/8, x4, x1, x2)

inst_38034:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b600000; valaddr_reg:x3; val_offset:114102*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114102*0 + 3*402*FLEN/8, x4, x1, x2)

inst_38035:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b700000; valaddr_reg:x3; val_offset:114105*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114105*0 + 3*403*FLEN/8, x4, x1, x2)

inst_38036:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b780000; valaddr_reg:x3; val_offset:114108*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114108*0 + 3*404*FLEN/8, x4, x1, x2)

inst_38037:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7c0000; valaddr_reg:x3; val_offset:114111*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114111*0 + 3*405*FLEN/8, x4, x1, x2)

inst_38038:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7e0000; valaddr_reg:x3; val_offset:114114*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114114*0 + 3*406*FLEN/8, x4, x1, x2)

inst_38039:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7f0000; valaddr_reg:x3; val_offset:114117*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114117*0 + 3*407*FLEN/8, x4, x1, x2)

inst_38040:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7f8000; valaddr_reg:x3; val_offset:114120*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114120*0 + 3*408*FLEN/8, x4, x1, x2)

inst_38041:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fc000; valaddr_reg:x3; val_offset:114123*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114123*0 + 3*409*FLEN/8, x4, x1, x2)

inst_38042:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fe000; valaddr_reg:x3; val_offset:114126*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114126*0 + 3*410*FLEN/8, x4, x1, x2)

inst_38043:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ff000; valaddr_reg:x3; val_offset:114129*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114129*0 + 3*411*FLEN/8, x4, x1, x2)

inst_38044:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ff800; valaddr_reg:x3; val_offset:114132*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114132*0 + 3*412*FLEN/8, x4, x1, x2)

inst_38045:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:114135*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114135*0 + 3*413*FLEN/8, x4, x1, x2)

inst_38046:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:114138*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114138*0 + 3*414*FLEN/8, x4, x1, x2)

inst_38047:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fff00; valaddr_reg:x3; val_offset:114141*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114141*0 + 3*415*FLEN/8, x4, x1, x2)

inst_38048:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fff80; valaddr_reg:x3; val_offset:114144*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114144*0 + 3*416*FLEN/8, x4, x1, x2)

inst_38049:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:114147*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114147*0 + 3*417*FLEN/8, x4, x1, x2)

inst_38050:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:114150*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114150*0 + 3*418*FLEN/8, x4, x1, x2)

inst_38051:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:114153*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114153*0 + 3*419*FLEN/8, x4, x1, x2)

inst_38052:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:114156*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114156*0 + 3*420*FLEN/8, x4, x1, x2)

inst_38053:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:114159*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114159*0 + 3*421*FLEN/8, x4, x1, x2)

inst_38054:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:114162*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114162*0 + 3*422*FLEN/8, x4, x1, x2)

inst_38055:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000;
op3val:0x8b7fffff; valaddr_reg:x3; val_offset:114165*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114165*0 + 3*423*FLEN/8, x4, x1, x2)

inst_38056:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:114168*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114168*0 + 3*424*FLEN/8, x4, x1, x2)

inst_38057:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:114171*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114171*0 + 3*425*FLEN/8, x4, x1, x2)

inst_38058:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:114174*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114174*0 + 3*426*FLEN/8, x4, x1, x2)

inst_38059:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:114177*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114177*0 + 3*427*FLEN/8, x4, x1, x2)

inst_38060:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:114180*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114180*0 + 3*428*FLEN/8, x4, x1, x2)

inst_38061:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:114183*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114183*0 + 3*429*FLEN/8, x4, x1, x2)

inst_38062:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:114186*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114186*0 + 3*430*FLEN/8, x4, x1, x2)

inst_38063:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114189*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114189*0 + 3*431*FLEN/8, x4, x1, x2)

inst_38064:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:114192*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114192*0 + 3*432*FLEN/8, x4, x1, x2)

inst_38065:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:114195*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114195*0 + 3*433*FLEN/8, x4, x1, x2)

inst_38066:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:114198*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114198*0 + 3*434*FLEN/8, x4, x1, x2)

inst_38067:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:114201*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114201*0 + 3*435*FLEN/8, x4, x1, x2)

inst_38068:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:114204*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114204*0 + 3*436*FLEN/8, x4, x1, x2)

inst_38069:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:114207*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114207*0 + 3*437*FLEN/8, x4, x1, x2)

inst_38070:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:114210*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114210*0 + 3*438*FLEN/8, x4, x1, x2)

inst_38071:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:114213*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114213*0 + 3*439*FLEN/8, x4, x1, x2)

inst_38072:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84000000; valaddr_reg:x3; val_offset:114216*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114216*0 + 3*440*FLEN/8, x4, x1, x2)

inst_38073:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84000001; valaddr_reg:x3; val_offset:114219*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114219*0 + 3*441*FLEN/8, x4, x1, x2)

inst_38074:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84000003; valaddr_reg:x3; val_offset:114222*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114222*0 + 3*442*FLEN/8, x4, x1, x2)

inst_38075:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84000007; valaddr_reg:x3; val_offset:114225*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114225*0 + 3*443*FLEN/8, x4, x1, x2)

inst_38076:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8400000f; valaddr_reg:x3; val_offset:114228*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114228*0 + 3*444*FLEN/8, x4, x1, x2)

inst_38077:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8400001f; valaddr_reg:x3; val_offset:114231*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114231*0 + 3*445*FLEN/8, x4, x1, x2)

inst_38078:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8400003f; valaddr_reg:x3; val_offset:114234*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114234*0 + 3*446*FLEN/8, x4, x1, x2)

inst_38079:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8400007f; valaddr_reg:x3; val_offset:114237*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114237*0 + 3*447*FLEN/8, x4, x1, x2)

inst_38080:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x840000ff; valaddr_reg:x3; val_offset:114240*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114240*0 + 3*448*FLEN/8, x4, x1, x2)

inst_38081:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x840001ff; valaddr_reg:x3; val_offset:114243*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114243*0 + 3*449*FLEN/8, x4, x1, x2)

inst_38082:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x840003ff; valaddr_reg:x3; val_offset:114246*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114246*0 + 3*450*FLEN/8, x4, x1, x2)

inst_38083:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x840007ff; valaddr_reg:x3; val_offset:114249*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114249*0 + 3*451*FLEN/8, x4, x1, x2)

inst_38084:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84000fff; valaddr_reg:x3; val_offset:114252*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114252*0 + 3*452*FLEN/8, x4, x1, x2)

inst_38085:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84001fff; valaddr_reg:x3; val_offset:114255*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114255*0 + 3*453*FLEN/8, x4, x1, x2)

inst_38086:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84003fff; valaddr_reg:x3; val_offset:114258*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114258*0 + 3*454*FLEN/8, x4, x1, x2)

inst_38087:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84007fff; valaddr_reg:x3; val_offset:114261*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114261*0 + 3*455*FLEN/8, x4, x1, x2)

inst_38088:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8400ffff; valaddr_reg:x3; val_offset:114264*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114264*0 + 3*456*FLEN/8, x4, x1, x2)

inst_38089:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8401ffff; valaddr_reg:x3; val_offset:114267*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114267*0 + 3*457*FLEN/8, x4, x1, x2)

inst_38090:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8403ffff; valaddr_reg:x3; val_offset:114270*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114270*0 + 3*458*FLEN/8, x4, x1, x2)

inst_38091:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x8407ffff; valaddr_reg:x3; val_offset:114273*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114273*0 + 3*459*FLEN/8, x4, x1, x2)

inst_38092:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x840fffff; valaddr_reg:x3; val_offset:114276*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114276*0 + 3*460*FLEN/8, x4, x1, x2)

inst_38093:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x841fffff; valaddr_reg:x3; val_offset:114279*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114279*0 + 3*461*FLEN/8, x4, x1, x2)

inst_38094:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x843fffff; valaddr_reg:x3; val_offset:114282*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114282*0 + 3*462*FLEN/8, x4, x1, x2)

inst_38095:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84400000; valaddr_reg:x3; val_offset:114285*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114285*0 + 3*463*FLEN/8, x4, x1, x2)

inst_38096:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84600000; valaddr_reg:x3; val_offset:114288*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114288*0 + 3*464*FLEN/8, x4, x1, x2)

inst_38097:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84700000; valaddr_reg:x3; val_offset:114291*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114291*0 + 3*465*FLEN/8, x4, x1, x2)

inst_38098:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x84780000; valaddr_reg:x3; val_offset:114294*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114294*0 + 3*466*FLEN/8, x4, x1, x2)

inst_38099:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847c0000; valaddr_reg:x3; val_offset:114297*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114297*0 + 3*467*FLEN/8, x4, x1, x2)

inst_38100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847e0000; valaddr_reg:x3; val_offset:114300*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114300*0 + 3*468*FLEN/8, x4, x1, x2)

inst_38101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847f0000; valaddr_reg:x3; val_offset:114303*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114303*0 + 3*469*FLEN/8, x4, x1, x2)

inst_38102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847f8000; valaddr_reg:x3; val_offset:114306*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114306*0 + 3*470*FLEN/8, x4, x1, x2)

inst_38103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fc000; valaddr_reg:x3; val_offset:114309*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114309*0 + 3*471*FLEN/8, x4, x1, x2)

inst_38104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fe000; valaddr_reg:x3; val_offset:114312*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114312*0 + 3*472*FLEN/8, x4, x1, x2)

inst_38105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ff000; valaddr_reg:x3; val_offset:114315*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114315*0 + 3*473*FLEN/8, x4, x1, x2)

inst_38106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ff800; valaddr_reg:x3; val_offset:114318*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114318*0 + 3*474*FLEN/8, x4, x1, x2)

inst_38107:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffc00; valaddr_reg:x3; val_offset:114321*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114321*0 + 3*475*FLEN/8, x4, x1, x2)

inst_38108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffe00; valaddr_reg:x3; val_offset:114324*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114324*0 + 3*476*FLEN/8, x4, x1, x2)

inst_38109:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fff00; valaddr_reg:x3; val_offset:114327*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114327*0 + 3*477*FLEN/8, x4, x1, x2)

inst_38110:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fff80; valaddr_reg:x3; val_offset:114330*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114330*0 + 3*478*FLEN/8, x4, x1, x2)

inst_38111:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fffc0; valaddr_reg:x3; val_offset:114333*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114333*0 + 3*479*FLEN/8, x4, x1, x2)

inst_38112:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fffe0; valaddr_reg:x3; val_offset:114336*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114336*0 + 3*480*FLEN/8, x4, x1, x2)

inst_38113:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffff0; valaddr_reg:x3; val_offset:114339*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114339*0 + 3*481*FLEN/8, x4, x1, x2)

inst_38114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffff8; valaddr_reg:x3; val_offset:114342*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114342*0 + 3*482*FLEN/8, x4, x1, x2)

inst_38115:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffffc; valaddr_reg:x3; val_offset:114345*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114345*0 + 3*483*FLEN/8, x4, x1, x2)

inst_38116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847ffffe; valaddr_reg:x3; val_offset:114348*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114348*0 + 3*484*FLEN/8, x4, x1, x2)

inst_38117:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000;
op3val:0x847fffff; valaddr_reg:x3; val_offset:114351*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114351*0 + 3*485*FLEN/8, x4, x1, x2)

inst_38118:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae800000; valaddr_reg:x3; val_offset:114354*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114354*0 + 3*486*FLEN/8, x4, x1, x2)

inst_38119:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae800001; valaddr_reg:x3; val_offset:114357*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114357*0 + 3*487*FLEN/8, x4, x1, x2)

inst_38120:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae800003; valaddr_reg:x3; val_offset:114360*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114360*0 + 3*488*FLEN/8, x4, x1, x2)

inst_38121:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae80000f; valaddr_reg:x3; val_offset:114363*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114363*0 + 3*489*FLEN/8, x4, x1, x2)

inst_38122:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae80001f; valaddr_reg:x3; val_offset:114366*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114366*0 + 3*490*FLEN/8, x4, x1, x2)

inst_38123:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae80003f; valaddr_reg:x3; val_offset:114369*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114369*0 + 3*491*FLEN/8, x4, x1, x2)

inst_38124:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae80007f; valaddr_reg:x3; val_offset:114372*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114372*0 + 3*492*FLEN/8, x4, x1, x2)

inst_38125:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae8000ff; valaddr_reg:x3; val_offset:114375*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114375*0 + 3*493*FLEN/8, x4, x1, x2)

inst_38126:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae8001ff; valaddr_reg:x3; val_offset:114378*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114378*0 + 3*494*FLEN/8, x4, x1, x2)

inst_38127:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae8003ff; valaddr_reg:x3; val_offset:114381*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114381*0 + 3*495*FLEN/8, x4, x1, x2)

inst_38128:
// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55;
op3val:0xae8007ff; valaddr_reg:x3; val_offset:114384*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114384*0 + 3*496*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb80003ff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb80007ff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8000fff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8001fff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8003fff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8007fff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb800ffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb801ffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb803ffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb807ffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb80fffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb81fffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb83fffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8400000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8600000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8700000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb8780000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87c0000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87e0000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87f0000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87f8000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fc000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fe000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ff000,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ff800,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffc00,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffe00,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fff00,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fff80,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fffc0,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fffe0,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffff0,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffff8,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffffc,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87ffffe,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xb87fffff,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7f3c34fb,32,FLEN)
NAN_BOXED(0x802b86cc,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23800000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23800001,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23800003,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23800007,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2380000f,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2380001f,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2380003f,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2380007f,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x238000ff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x238001ff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x238003ff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x238007ff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23800fff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23801fff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23803fff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23807fff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2380ffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2381ffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2383ffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x2387ffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x238fffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x239fffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23bfffff,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23c00000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23e00000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23f00000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23f80000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fc0000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fe0000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ff0000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ff8000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffc000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffe000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fff000,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fff800,32,FLEN)
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NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffc00,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffe00,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffff00,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffff80,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffffc0,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffffe0,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffff0,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffff8,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffffc,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23fffffe,32,FLEN)
NAN_BOXED(0x7f3c8709,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x23ffffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29800000,32,FLEN)
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NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29800001,32,FLEN)
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NAN_BOXED(0x29800003,32,FLEN)
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NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2980000f,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2980001f,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2980003f,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
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NAN_BOXED(0x298001ff,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29800fff,32,FLEN)
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NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29801fff,32,FLEN)
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NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29803fff,32,FLEN)
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NAN_BOXED(0x29807fff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2980ffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2981ffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2983ffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x2987ffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x298fffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x299fffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29bfffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29c00000,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29e00000,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29f00000,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x29ff8000,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29fffff8,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29fffffc,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x7f3ca1e4,32,FLEN)
NAN_BOXED(0x2b6daa,32,FLEN)
NAN_BOXED(0x29ffffff,32,FLEN)
NAN_BOXED(0x7f3ca1e4,32,FLEN)
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NAN_BOXED(0x3f800001,32,FLEN)
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NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
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NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xf27fffff,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7f3cee4f,32,FLEN)
NAN_BOXED(0xbfad7066,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800001,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800003,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800007,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380000f,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380001f,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380003f,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380007f,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38000ff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38001ff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38003ff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38007ff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800fff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3801fff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3803fff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3807fff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380ffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x381ffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x383ffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x387ffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38fffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x39fffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bfffff,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3c00000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3e00000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f00000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f80000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fc0000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fe0000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff0000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff8000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffc000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffe000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff000,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff800,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffc00,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffe00,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff00,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff80,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffc0,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffe0,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff0,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff8,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffc,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffe,32,FLEN)
NAN_BOXED(0x7f3d7291,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6800000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6800001,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6800003,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6800007,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x680000f,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x680001f,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x680003f,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x680007f,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x68000ff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x68001ff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x68003ff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x68007ff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6800fff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6801fff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6803fff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6807fff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x680ffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x681ffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x683ffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x687ffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x68fffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x69fffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6bfffff,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6c00000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6e00000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6f00000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6f80000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fc0000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fe0000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ff0000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ff8000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffc000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffe000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fff000,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fff800,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffc00,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffe00,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffff00,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffff80,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffffc0,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffffe0,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffff0,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffff8,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffffc,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6fffffe,32,FLEN)
NAN_BOXED(0x7f3d8dc3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6ffffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b000000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b000001,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b000003,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b000007,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b00000f,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b00001f,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b00003f,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b00007f,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b0000ff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b0001ff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b0003ff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b0007ff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b000fff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b001fff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b003fff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b007fff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b00ffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b01ffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b03ffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b07ffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b0fffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b1fffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b3fffff,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b400000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b600000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b700000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b780000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7c0000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7e0000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7f0000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7f8000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fc000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fe000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ff000,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ff800,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffc00,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffe00,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fff00,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fff80,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fffc0,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fffe0,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffff0,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffff8,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffffc,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7ffffe,32,FLEN)
NAN_BOXED(0x7f3f6e88,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8b7fffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000001,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000003,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000007,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400000f,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400001f,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400003f,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400007f,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840000ff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840001ff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840003ff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840007ff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84000fff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84001fff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84003fff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84007fff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8400ffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8401ffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8403ffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8407ffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x840fffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x841fffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x843fffff,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84400000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84600000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84700000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x84780000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847c0000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847e0000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f0000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847f8000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fc000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fe000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff000,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ff800,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffc00,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffe00,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff00,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fff80,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffc0,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffe0,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff0,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffff8,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffc,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847ffffe,32,FLEN)
NAN_BOXED(0x7f3fd416,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x847fffff,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae800000,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae800001,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae800003,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae80000f,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae80001f,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae80003f,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae80007f,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae8000ff,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae8001ff,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae8003ff,32,FLEN)
NAN_BOXED(0x7859914d,32,FLEN)
NAN_BOXED(0x86969c55,32,FLEN)
NAN_BOXED(0xae8007ff,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
