
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:17:59 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_23040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8007fff; valaddr_reg:x3; val_offset:69120*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69120*0 + 3*0*FLEN/8, x4, x1, x2)

inst_23041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x800ffff; valaddr_reg:x3; val_offset:69123*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69123*0 + 3*1*FLEN/8, x4, x1, x2)

inst_23042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x801ffff; valaddr_reg:x3; val_offset:69126*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69126*0 + 3*2*FLEN/8, x4, x1, x2)

inst_23043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x803ffff; valaddr_reg:x3; val_offset:69129*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69129*0 + 3*3*FLEN/8, x4, x1, x2)

inst_23044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x807ffff; valaddr_reg:x3; val_offset:69132*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69132*0 + 3*4*FLEN/8, x4, x1, x2)

inst_23045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x80fffff; valaddr_reg:x3; val_offset:69135*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69135*0 + 3*5*FLEN/8, x4, x1, x2)

inst_23046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x81fffff; valaddr_reg:x3; val_offset:69138*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69138*0 + 3*6*FLEN/8, x4, x1, x2)

inst_23047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x83fffff; valaddr_reg:x3; val_offset:69141*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69141*0 + 3*7*FLEN/8, x4, x1, x2)

inst_23048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8400000; valaddr_reg:x3; val_offset:69144*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69144*0 + 3*8*FLEN/8, x4, x1, x2)

inst_23049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8600000; valaddr_reg:x3; val_offset:69147*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69147*0 + 3*9*FLEN/8, x4, x1, x2)

inst_23050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8700000; valaddr_reg:x3; val_offset:69150*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69150*0 + 3*10*FLEN/8, x4, x1, x2)

inst_23051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x8780000; valaddr_reg:x3; val_offset:69153*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69153*0 + 3*11*FLEN/8, x4, x1, x2)

inst_23052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87c0000; valaddr_reg:x3; val_offset:69156*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69156*0 + 3*12*FLEN/8, x4, x1, x2)

inst_23053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87e0000; valaddr_reg:x3; val_offset:69159*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69159*0 + 3*13*FLEN/8, x4, x1, x2)

inst_23054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87f0000; valaddr_reg:x3; val_offset:69162*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69162*0 + 3*14*FLEN/8, x4, x1, x2)

inst_23055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87f8000; valaddr_reg:x3; val_offset:69165*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69165*0 + 3*15*FLEN/8, x4, x1, x2)

inst_23056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fc000; valaddr_reg:x3; val_offset:69168*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69168*0 + 3*16*FLEN/8, x4, x1, x2)

inst_23057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fe000; valaddr_reg:x3; val_offset:69171*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69171*0 + 3*17*FLEN/8, x4, x1, x2)

inst_23058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ff000; valaddr_reg:x3; val_offset:69174*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69174*0 + 3*18*FLEN/8, x4, x1, x2)

inst_23059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ff800; valaddr_reg:x3; val_offset:69177*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69177*0 + 3*19*FLEN/8, x4, x1, x2)

inst_23060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffc00; valaddr_reg:x3; val_offset:69180*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69180*0 + 3*20*FLEN/8, x4, x1, x2)

inst_23061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffe00; valaddr_reg:x3; val_offset:69183*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69183*0 + 3*21*FLEN/8, x4, x1, x2)

inst_23062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fff00; valaddr_reg:x3; val_offset:69186*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69186*0 + 3*22*FLEN/8, x4, x1, x2)

inst_23063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fff80; valaddr_reg:x3; val_offset:69189*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69189*0 + 3*23*FLEN/8, x4, x1, x2)

inst_23064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fffc0; valaddr_reg:x3; val_offset:69192*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69192*0 + 3*24*FLEN/8, x4, x1, x2)

inst_23065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fffe0; valaddr_reg:x3; val_offset:69195*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69195*0 + 3*25*FLEN/8, x4, x1, x2)

inst_23066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffff0; valaddr_reg:x3; val_offset:69198*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69198*0 + 3*26*FLEN/8, x4, x1, x2)

inst_23067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffff8; valaddr_reg:x3; val_offset:69201*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69201*0 + 3*27*FLEN/8, x4, x1, x2)

inst_23068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffffc; valaddr_reg:x3; val_offset:69204*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69204*0 + 3*28*FLEN/8, x4, x1, x2)

inst_23069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87ffffe; valaddr_reg:x3; val_offset:69207*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69207*0 + 3*29*FLEN/8, x4, x1, x2)

inst_23070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0;
op3val:0x87fffff; valaddr_reg:x3; val_offset:69210*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69210*0 + 3*30*FLEN/8, x4, x1, x2)

inst_23071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33800000; valaddr_reg:x3; val_offset:69213*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69213*0 + 3*31*FLEN/8, x4, x1, x2)

inst_23072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33800001; valaddr_reg:x3; val_offset:69216*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69216*0 + 3*32*FLEN/8, x4, x1, x2)

inst_23073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33800003; valaddr_reg:x3; val_offset:69219*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69219*0 + 3*33*FLEN/8, x4, x1, x2)

inst_23074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33800007; valaddr_reg:x3; val_offset:69222*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69222*0 + 3*34*FLEN/8, x4, x1, x2)

inst_23075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3380000f; valaddr_reg:x3; val_offset:69225*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69225*0 + 3*35*FLEN/8, x4, x1, x2)

inst_23076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3380001f; valaddr_reg:x3; val_offset:69228*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69228*0 + 3*36*FLEN/8, x4, x1, x2)

inst_23077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3380003f; valaddr_reg:x3; val_offset:69231*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69231*0 + 3*37*FLEN/8, x4, x1, x2)

inst_23078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3380007f; valaddr_reg:x3; val_offset:69234*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69234*0 + 3*38*FLEN/8, x4, x1, x2)

inst_23079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x338000ff; valaddr_reg:x3; val_offset:69237*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69237*0 + 3*39*FLEN/8, x4, x1, x2)

inst_23080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x338001ff; valaddr_reg:x3; val_offset:69240*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69240*0 + 3*40*FLEN/8, x4, x1, x2)

inst_23081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x338003ff; valaddr_reg:x3; val_offset:69243*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69243*0 + 3*41*FLEN/8, x4, x1, x2)

inst_23082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x338007ff; valaddr_reg:x3; val_offset:69246*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69246*0 + 3*42*FLEN/8, x4, x1, x2)

inst_23083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33800fff; valaddr_reg:x3; val_offset:69249*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69249*0 + 3*43*FLEN/8, x4, x1, x2)

inst_23084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33801fff; valaddr_reg:x3; val_offset:69252*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69252*0 + 3*44*FLEN/8, x4, x1, x2)

inst_23085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33803fff; valaddr_reg:x3; val_offset:69255*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69255*0 + 3*45*FLEN/8, x4, x1, x2)

inst_23086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33807fff; valaddr_reg:x3; val_offset:69258*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69258*0 + 3*46*FLEN/8, x4, x1, x2)

inst_23087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3380ffff; valaddr_reg:x3; val_offset:69261*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69261*0 + 3*47*FLEN/8, x4, x1, x2)

inst_23088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3381ffff; valaddr_reg:x3; val_offset:69264*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69264*0 + 3*48*FLEN/8, x4, x1, x2)

inst_23089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3383ffff; valaddr_reg:x3; val_offset:69267*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69267*0 + 3*49*FLEN/8, x4, x1, x2)

inst_23090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3387ffff; valaddr_reg:x3; val_offset:69270*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69270*0 + 3*50*FLEN/8, x4, x1, x2)

inst_23091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x338fffff; valaddr_reg:x3; val_offset:69273*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69273*0 + 3*51*FLEN/8, x4, x1, x2)

inst_23092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x339fffff; valaddr_reg:x3; val_offset:69276*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69276*0 + 3*52*FLEN/8, x4, x1, x2)

inst_23093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33bfffff; valaddr_reg:x3; val_offset:69279*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69279*0 + 3*53*FLEN/8, x4, x1, x2)

inst_23094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33c00000; valaddr_reg:x3; val_offset:69282*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69282*0 + 3*54*FLEN/8, x4, x1, x2)

inst_23095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33e00000; valaddr_reg:x3; val_offset:69285*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69285*0 + 3*55*FLEN/8, x4, x1, x2)

inst_23096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33f00000; valaddr_reg:x3; val_offset:69288*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69288*0 + 3*56*FLEN/8, x4, x1, x2)

inst_23097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33f80000; valaddr_reg:x3; val_offset:69291*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69291*0 + 3*57*FLEN/8, x4, x1, x2)

inst_23098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fc0000; valaddr_reg:x3; val_offset:69294*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69294*0 + 3*58*FLEN/8, x4, x1, x2)

inst_23099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fe0000; valaddr_reg:x3; val_offset:69297*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69297*0 + 3*59*FLEN/8, x4, x1, x2)

inst_23100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ff0000; valaddr_reg:x3; val_offset:69300*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69300*0 + 3*60*FLEN/8, x4, x1, x2)

inst_23101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ff8000; valaddr_reg:x3; val_offset:69303*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69303*0 + 3*61*FLEN/8, x4, x1, x2)

inst_23102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffc000; valaddr_reg:x3; val_offset:69306*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69306*0 + 3*62*FLEN/8, x4, x1, x2)

inst_23103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffe000; valaddr_reg:x3; val_offset:69309*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69309*0 + 3*63*FLEN/8, x4, x1, x2)

inst_23104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fff000; valaddr_reg:x3; val_offset:69312*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69312*0 + 3*64*FLEN/8, x4, x1, x2)

inst_23105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fff800; valaddr_reg:x3; val_offset:69315*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69315*0 + 3*65*FLEN/8, x4, x1, x2)

inst_23106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffc00; valaddr_reg:x3; val_offset:69318*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69318*0 + 3*66*FLEN/8, x4, x1, x2)

inst_23107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffe00; valaddr_reg:x3; val_offset:69321*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69321*0 + 3*67*FLEN/8, x4, x1, x2)

inst_23108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffff00; valaddr_reg:x3; val_offset:69324*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69324*0 + 3*68*FLEN/8, x4, x1, x2)

inst_23109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffff80; valaddr_reg:x3; val_offset:69327*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69327*0 + 3*69*FLEN/8, x4, x1, x2)

inst_23110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffffc0; valaddr_reg:x3; val_offset:69330*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69330*0 + 3*70*FLEN/8, x4, x1, x2)

inst_23111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffffe0; valaddr_reg:x3; val_offset:69333*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69333*0 + 3*71*FLEN/8, x4, x1, x2)

inst_23112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffff0; valaddr_reg:x3; val_offset:69336*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69336*0 + 3*72*FLEN/8, x4, x1, x2)

inst_23113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffff8; valaddr_reg:x3; val_offset:69339*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69339*0 + 3*73*FLEN/8, x4, x1, x2)

inst_23114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffffc; valaddr_reg:x3; val_offset:69342*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69342*0 + 3*74*FLEN/8, x4, x1, x2)

inst_23115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33fffffe; valaddr_reg:x3; val_offset:69345*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69345*0 + 3*75*FLEN/8, x4, x1, x2)

inst_23116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x33ffffff; valaddr_reg:x3; val_offset:69348*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69348*0 + 3*76*FLEN/8, x4, x1, x2)

inst_23117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3f800001; valaddr_reg:x3; val_offset:69351*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69351*0 + 3*77*FLEN/8, x4, x1, x2)

inst_23118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3f800003; valaddr_reg:x3; val_offset:69354*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69354*0 + 3*78*FLEN/8, x4, x1, x2)

inst_23119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3f800007; valaddr_reg:x3; val_offset:69357*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69357*0 + 3*79*FLEN/8, x4, x1, x2)

inst_23120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3f999999; valaddr_reg:x3; val_offset:69360*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69360*0 + 3*80*FLEN/8, x4, x1, x2)

inst_23121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:69363*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69363*0 + 3*81*FLEN/8, x4, x1, x2)

inst_23122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:69366*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69366*0 + 3*82*FLEN/8, x4, x1, x2)

inst_23123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69369*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69369*0 + 3*83*FLEN/8, x4, x1, x2)

inst_23124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69372*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69372*0 + 3*84*FLEN/8, x4, x1, x2)

inst_23125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:69375*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69375*0 + 3*85*FLEN/8, x4, x1, x2)

inst_23126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69378*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69378*0 + 3*86*FLEN/8, x4, x1, x2)

inst_23127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69381*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69381*0 + 3*87*FLEN/8, x4, x1, x2)

inst_23128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:69384*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69384*0 + 3*88*FLEN/8, x4, x1, x2)

inst_23129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69387*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69387*0 + 3*89*FLEN/8, x4, x1, x2)

inst_23130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69390*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69390*0 + 3*90*FLEN/8, x4, x1, x2)

inst_23131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69393*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69393*0 + 3*91*FLEN/8, x4, x1, x2)

inst_23132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69396*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69396*0 + 3*92*FLEN/8, x4, x1, x2)

inst_23133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:69399*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69399*0 + 3*93*FLEN/8, x4, x1, x2)

inst_23134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:69402*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69402*0 + 3*94*FLEN/8, x4, x1, x2)

inst_23135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:69405*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69405*0 + 3*95*FLEN/8, x4, x1, x2)

inst_23136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:69408*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69408*0 + 3*96*FLEN/8, x4, x1, x2)

inst_23137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:69411*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69411*0 + 3*97*FLEN/8, x4, x1, x2)

inst_23138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:69414*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69414*0 + 3*98*FLEN/8, x4, x1, x2)

inst_23139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:69417*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69417*0 + 3*99*FLEN/8, x4, x1, x2)

inst_23140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69420*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69420*0 + 3*100*FLEN/8, x4, x1, x2)

inst_23141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:69423*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69423*0 + 3*101*FLEN/8, x4, x1, x2)

inst_23142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:69426*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69426*0 + 3*102*FLEN/8, x4, x1, x2)

inst_23143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:69429*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69429*0 + 3*103*FLEN/8, x4, x1, x2)

inst_23144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:69432*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69432*0 + 3*104*FLEN/8, x4, x1, x2)

inst_23145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:69435*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69435*0 + 3*105*FLEN/8, x4, x1, x2)

inst_23146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:69438*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69438*0 + 3*106*FLEN/8, x4, x1, x2)

inst_23147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:69441*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69441*0 + 3*107*FLEN/8, x4, x1, x2)

inst_23148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:69444*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69444*0 + 3*108*FLEN/8, x4, x1, x2)

inst_23149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c800000; valaddr_reg:x3; val_offset:69447*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69447*0 + 3*109*FLEN/8, x4, x1, x2)

inst_23150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c800001; valaddr_reg:x3; val_offset:69450*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69450*0 + 3*110*FLEN/8, x4, x1, x2)

inst_23151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c800003; valaddr_reg:x3; val_offset:69453*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69453*0 + 3*111*FLEN/8, x4, x1, x2)

inst_23152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c800007; valaddr_reg:x3; val_offset:69456*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69456*0 + 3*112*FLEN/8, x4, x1, x2)

inst_23153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c80000f; valaddr_reg:x3; val_offset:69459*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69459*0 + 3*113*FLEN/8, x4, x1, x2)

inst_23154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c80001f; valaddr_reg:x3; val_offset:69462*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69462*0 + 3*114*FLEN/8, x4, x1, x2)

inst_23155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c80003f; valaddr_reg:x3; val_offset:69465*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69465*0 + 3*115*FLEN/8, x4, x1, x2)

inst_23156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c80007f; valaddr_reg:x3; val_offset:69468*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69468*0 + 3*116*FLEN/8, x4, x1, x2)

inst_23157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c8000ff; valaddr_reg:x3; val_offset:69471*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69471*0 + 3*117*FLEN/8, x4, x1, x2)

inst_23158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c8001ff; valaddr_reg:x3; val_offset:69474*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69474*0 + 3*118*FLEN/8, x4, x1, x2)

inst_23159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c8003ff; valaddr_reg:x3; val_offset:69477*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69477*0 + 3*119*FLEN/8, x4, x1, x2)

inst_23160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c8007ff; valaddr_reg:x3; val_offset:69480*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69480*0 + 3*120*FLEN/8, x4, x1, x2)

inst_23161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c800fff; valaddr_reg:x3; val_offset:69483*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69483*0 + 3*121*FLEN/8, x4, x1, x2)

inst_23162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c801fff; valaddr_reg:x3; val_offset:69486*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69486*0 + 3*122*FLEN/8, x4, x1, x2)

inst_23163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c803fff; valaddr_reg:x3; val_offset:69489*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69489*0 + 3*123*FLEN/8, x4, x1, x2)

inst_23164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c807fff; valaddr_reg:x3; val_offset:69492*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69492*0 + 3*124*FLEN/8, x4, x1, x2)

inst_23165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c80ffff; valaddr_reg:x3; val_offset:69495*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69495*0 + 3*125*FLEN/8, x4, x1, x2)

inst_23166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c81ffff; valaddr_reg:x3; val_offset:69498*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69498*0 + 3*126*FLEN/8, x4, x1, x2)

inst_23167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c83ffff; valaddr_reg:x3; val_offset:69501*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69501*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_23168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c87ffff; valaddr_reg:x3; val_offset:69504*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69504*0 + 3*128*FLEN/8, x4, x1, x2)

inst_23169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c8fffff; valaddr_reg:x3; val_offset:69507*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69507*0 + 3*129*FLEN/8, x4, x1, x2)

inst_23170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8c9fffff; valaddr_reg:x3; val_offset:69510*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69510*0 + 3*130*FLEN/8, x4, x1, x2)

inst_23171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cbfffff; valaddr_reg:x3; val_offset:69513*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69513*0 + 3*131*FLEN/8, x4, x1, x2)

inst_23172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cc00000; valaddr_reg:x3; val_offset:69516*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69516*0 + 3*132*FLEN/8, x4, x1, x2)

inst_23173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8ce00000; valaddr_reg:x3; val_offset:69519*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69519*0 + 3*133*FLEN/8, x4, x1, x2)

inst_23174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cf00000; valaddr_reg:x3; val_offset:69522*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69522*0 + 3*134*FLEN/8, x4, x1, x2)

inst_23175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cf80000; valaddr_reg:x3; val_offset:69525*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69525*0 + 3*135*FLEN/8, x4, x1, x2)

inst_23176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfc0000; valaddr_reg:x3; val_offset:69528*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69528*0 + 3*136*FLEN/8, x4, x1, x2)

inst_23177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfe0000; valaddr_reg:x3; val_offset:69531*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69531*0 + 3*137*FLEN/8, x4, x1, x2)

inst_23178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cff0000; valaddr_reg:x3; val_offset:69534*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69534*0 + 3*138*FLEN/8, x4, x1, x2)

inst_23179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cff8000; valaddr_reg:x3; val_offset:69537*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69537*0 + 3*139*FLEN/8, x4, x1, x2)

inst_23180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffc000; valaddr_reg:x3; val_offset:69540*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69540*0 + 3*140*FLEN/8, x4, x1, x2)

inst_23181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffe000; valaddr_reg:x3; val_offset:69543*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69543*0 + 3*141*FLEN/8, x4, x1, x2)

inst_23182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfff000; valaddr_reg:x3; val_offset:69546*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69546*0 + 3*142*FLEN/8, x4, x1, x2)

inst_23183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfff800; valaddr_reg:x3; val_offset:69549*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69549*0 + 3*143*FLEN/8, x4, x1, x2)

inst_23184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffc00; valaddr_reg:x3; val_offset:69552*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69552*0 + 3*144*FLEN/8, x4, x1, x2)

inst_23185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffe00; valaddr_reg:x3; val_offset:69555*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69555*0 + 3*145*FLEN/8, x4, x1, x2)

inst_23186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffff00; valaddr_reg:x3; val_offset:69558*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69558*0 + 3*146*FLEN/8, x4, x1, x2)

inst_23187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffff80; valaddr_reg:x3; val_offset:69561*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69561*0 + 3*147*FLEN/8, x4, x1, x2)

inst_23188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffffc0; valaddr_reg:x3; val_offset:69564*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69564*0 + 3*148*FLEN/8, x4, x1, x2)

inst_23189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffffe0; valaddr_reg:x3; val_offset:69567*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69567*0 + 3*149*FLEN/8, x4, x1, x2)

inst_23190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffff0; valaddr_reg:x3; val_offset:69570*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69570*0 + 3*150*FLEN/8, x4, x1, x2)

inst_23191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffff8; valaddr_reg:x3; val_offset:69573*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69573*0 + 3*151*FLEN/8, x4, x1, x2)

inst_23192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffffc; valaddr_reg:x3; val_offset:69576*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69576*0 + 3*152*FLEN/8, x4, x1, x2)

inst_23193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cfffffe; valaddr_reg:x3; val_offset:69579*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69579*0 + 3*153*FLEN/8, x4, x1, x2)

inst_23194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000;
op3val:0x8cffffff; valaddr_reg:x3; val_offset:69582*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69582*0 + 3*154*FLEN/8, x4, x1, x2)

inst_23195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae000000; valaddr_reg:x3; val_offset:69585*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69585*0 + 3*155*FLEN/8, x4, x1, x2)

inst_23196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae000001; valaddr_reg:x3; val_offset:69588*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69588*0 + 3*156*FLEN/8, x4, x1, x2)

inst_23197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae000003; valaddr_reg:x3; val_offset:69591*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69591*0 + 3*157*FLEN/8, x4, x1, x2)

inst_23198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae000007; valaddr_reg:x3; val_offset:69594*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69594*0 + 3*158*FLEN/8, x4, x1, x2)

inst_23199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae00000f; valaddr_reg:x3; val_offset:69597*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69597*0 + 3*159*FLEN/8, x4, x1, x2)

inst_23200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae00001f; valaddr_reg:x3; val_offset:69600*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69600*0 + 3*160*FLEN/8, x4, x1, x2)

inst_23201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae00003f; valaddr_reg:x3; val_offset:69603*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69603*0 + 3*161*FLEN/8, x4, x1, x2)

inst_23202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae00007f; valaddr_reg:x3; val_offset:69606*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69606*0 + 3*162*FLEN/8, x4, x1, x2)

inst_23203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae0000ff; valaddr_reg:x3; val_offset:69609*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69609*0 + 3*163*FLEN/8, x4, x1, x2)

inst_23204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae0001ff; valaddr_reg:x3; val_offset:69612*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69612*0 + 3*164*FLEN/8, x4, x1, x2)

inst_23205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae0003ff; valaddr_reg:x3; val_offset:69615*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69615*0 + 3*165*FLEN/8, x4, x1, x2)

inst_23206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae0007ff; valaddr_reg:x3; val_offset:69618*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69618*0 + 3*166*FLEN/8, x4, x1, x2)

inst_23207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae000fff; valaddr_reg:x3; val_offset:69621*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69621*0 + 3*167*FLEN/8, x4, x1, x2)

inst_23208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae001fff; valaddr_reg:x3; val_offset:69624*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69624*0 + 3*168*FLEN/8, x4, x1, x2)

inst_23209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae003fff; valaddr_reg:x3; val_offset:69627*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69627*0 + 3*169*FLEN/8, x4, x1, x2)

inst_23210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae007fff; valaddr_reg:x3; val_offset:69630*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69630*0 + 3*170*FLEN/8, x4, x1, x2)

inst_23211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae00ffff; valaddr_reg:x3; val_offset:69633*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69633*0 + 3*171*FLEN/8, x4, x1, x2)

inst_23212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae01ffff; valaddr_reg:x3; val_offset:69636*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69636*0 + 3*172*FLEN/8, x4, x1, x2)

inst_23213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae03ffff; valaddr_reg:x3; val_offset:69639*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69639*0 + 3*173*FLEN/8, x4, x1, x2)

inst_23214:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae07ffff; valaddr_reg:x3; val_offset:69642*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69642*0 + 3*174*FLEN/8, x4, x1, x2)

inst_23215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae0fffff; valaddr_reg:x3; val_offset:69645*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69645*0 + 3*175*FLEN/8, x4, x1, x2)

inst_23216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae1fffff; valaddr_reg:x3; val_offset:69648*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69648*0 + 3*176*FLEN/8, x4, x1, x2)

inst_23217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae3fffff; valaddr_reg:x3; val_offset:69651*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69651*0 + 3*177*FLEN/8, x4, x1, x2)

inst_23218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae400000; valaddr_reg:x3; val_offset:69654*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69654*0 + 3*178*FLEN/8, x4, x1, x2)

inst_23219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae600000; valaddr_reg:x3; val_offset:69657*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69657*0 + 3*179*FLEN/8, x4, x1, x2)

inst_23220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae700000; valaddr_reg:x3; val_offset:69660*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69660*0 + 3*180*FLEN/8, x4, x1, x2)

inst_23221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae780000; valaddr_reg:x3; val_offset:69663*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69663*0 + 3*181*FLEN/8, x4, x1, x2)

inst_23222:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7c0000; valaddr_reg:x3; val_offset:69666*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69666*0 + 3*182*FLEN/8, x4, x1, x2)

inst_23223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7e0000; valaddr_reg:x3; val_offset:69669*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69669*0 + 3*183*FLEN/8, x4, x1, x2)

inst_23224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7f0000; valaddr_reg:x3; val_offset:69672*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69672*0 + 3*184*FLEN/8, x4, x1, x2)

inst_23225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7f8000; valaddr_reg:x3; val_offset:69675*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69675*0 + 3*185*FLEN/8, x4, x1, x2)

inst_23226:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fc000; valaddr_reg:x3; val_offset:69678*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69678*0 + 3*186*FLEN/8, x4, x1, x2)

inst_23227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fe000; valaddr_reg:x3; val_offset:69681*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69681*0 + 3*187*FLEN/8, x4, x1, x2)

inst_23228:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ff000; valaddr_reg:x3; val_offset:69684*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69684*0 + 3*188*FLEN/8, x4, x1, x2)

inst_23229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ff800; valaddr_reg:x3; val_offset:69687*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69687*0 + 3*189*FLEN/8, x4, x1, x2)

inst_23230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffc00; valaddr_reg:x3; val_offset:69690*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69690*0 + 3*190*FLEN/8, x4, x1, x2)

inst_23231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffe00; valaddr_reg:x3; val_offset:69693*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69693*0 + 3*191*FLEN/8, x4, x1, x2)

inst_23232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fff00; valaddr_reg:x3; val_offset:69696*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69696*0 + 3*192*FLEN/8, x4, x1, x2)

inst_23233:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fff80; valaddr_reg:x3; val_offset:69699*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69699*0 + 3*193*FLEN/8, x4, x1, x2)

inst_23234:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fffc0; valaddr_reg:x3; val_offset:69702*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69702*0 + 3*194*FLEN/8, x4, x1, x2)

inst_23235:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fffe0; valaddr_reg:x3; val_offset:69705*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69705*0 + 3*195*FLEN/8, x4, x1, x2)

inst_23236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffff0; valaddr_reg:x3; val_offset:69708*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69708*0 + 3*196*FLEN/8, x4, x1, x2)

inst_23237:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffff8; valaddr_reg:x3; val_offset:69711*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69711*0 + 3*197*FLEN/8, x4, x1, x2)

inst_23238:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffffc; valaddr_reg:x3; val_offset:69714*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69714*0 + 3*198*FLEN/8, x4, x1, x2)

inst_23239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7ffffe; valaddr_reg:x3; val_offset:69717*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69717*0 + 3*199*FLEN/8, x4, x1, x2)

inst_23240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xae7fffff; valaddr_reg:x3; val_offset:69720*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69720*0 + 3*200*FLEN/8, x4, x1, x2)

inst_23241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbf800001; valaddr_reg:x3; val_offset:69723*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69723*0 + 3*201*FLEN/8, x4, x1, x2)

inst_23242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbf800003; valaddr_reg:x3; val_offset:69726*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69726*0 + 3*202*FLEN/8, x4, x1, x2)

inst_23243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbf800007; valaddr_reg:x3; val_offset:69729*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69729*0 + 3*203*FLEN/8, x4, x1, x2)

inst_23244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbf999999; valaddr_reg:x3; val_offset:69732*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69732*0 + 3*204*FLEN/8, x4, x1, x2)

inst_23245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:69735*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69735*0 + 3*205*FLEN/8, x4, x1, x2)

inst_23246:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:69738*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69738*0 + 3*206*FLEN/8, x4, x1, x2)

inst_23247:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:69741*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69741*0 + 3*207*FLEN/8, x4, x1, x2)

inst_23248:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:69744*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69744*0 + 3*208*FLEN/8, x4, x1, x2)

inst_23249:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:69747*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69747*0 + 3*209*FLEN/8, x4, x1, x2)

inst_23250:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:69750*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69750*0 + 3*210*FLEN/8, x4, x1, x2)

inst_23251:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:69753*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69753*0 + 3*211*FLEN/8, x4, x1, x2)

inst_23252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:69756*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69756*0 + 3*212*FLEN/8, x4, x1, x2)

inst_23253:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:69759*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69759*0 + 3*213*FLEN/8, x4, x1, x2)

inst_23254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:69762*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69762*0 + 3*214*FLEN/8, x4, x1, x2)

inst_23255:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:69765*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69765*0 + 3*215*FLEN/8, x4, x1, x2)

inst_23256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:69768*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69768*0 + 3*216*FLEN/8, x4, x1, x2)

inst_23257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38000000; valaddr_reg:x3; val_offset:69771*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69771*0 + 3*217*FLEN/8, x4, x1, x2)

inst_23258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38000001; valaddr_reg:x3; val_offset:69774*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69774*0 + 3*218*FLEN/8, x4, x1, x2)

inst_23259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38000003; valaddr_reg:x3; val_offset:69777*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69777*0 + 3*219*FLEN/8, x4, x1, x2)

inst_23260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38000007; valaddr_reg:x3; val_offset:69780*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69780*0 + 3*220*FLEN/8, x4, x1, x2)

inst_23261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3800000f; valaddr_reg:x3; val_offset:69783*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69783*0 + 3*221*FLEN/8, x4, x1, x2)

inst_23262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3800001f; valaddr_reg:x3; val_offset:69786*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69786*0 + 3*222*FLEN/8, x4, x1, x2)

inst_23263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3800003f; valaddr_reg:x3; val_offset:69789*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69789*0 + 3*223*FLEN/8, x4, x1, x2)

inst_23264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3800007f; valaddr_reg:x3; val_offset:69792*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69792*0 + 3*224*FLEN/8, x4, x1, x2)

inst_23265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x380000ff; valaddr_reg:x3; val_offset:69795*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69795*0 + 3*225*FLEN/8, x4, x1, x2)

inst_23266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x380001ff; valaddr_reg:x3; val_offset:69798*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69798*0 + 3*226*FLEN/8, x4, x1, x2)

inst_23267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x380003ff; valaddr_reg:x3; val_offset:69801*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69801*0 + 3*227*FLEN/8, x4, x1, x2)

inst_23268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x380007ff; valaddr_reg:x3; val_offset:69804*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69804*0 + 3*228*FLEN/8, x4, x1, x2)

inst_23269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38000fff; valaddr_reg:x3; val_offset:69807*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69807*0 + 3*229*FLEN/8, x4, x1, x2)

inst_23270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38001fff; valaddr_reg:x3; val_offset:69810*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69810*0 + 3*230*FLEN/8, x4, x1, x2)

inst_23271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38003fff; valaddr_reg:x3; val_offset:69813*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69813*0 + 3*231*FLEN/8, x4, x1, x2)

inst_23272:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38007fff; valaddr_reg:x3; val_offset:69816*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69816*0 + 3*232*FLEN/8, x4, x1, x2)

inst_23273:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3800ffff; valaddr_reg:x3; val_offset:69819*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69819*0 + 3*233*FLEN/8, x4, x1, x2)

inst_23274:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3801ffff; valaddr_reg:x3; val_offset:69822*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69822*0 + 3*234*FLEN/8, x4, x1, x2)

inst_23275:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3803ffff; valaddr_reg:x3; val_offset:69825*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69825*0 + 3*235*FLEN/8, x4, x1, x2)

inst_23276:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3807ffff; valaddr_reg:x3; val_offset:69828*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69828*0 + 3*236*FLEN/8, x4, x1, x2)

inst_23277:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x380fffff; valaddr_reg:x3; val_offset:69831*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69831*0 + 3*237*FLEN/8, x4, x1, x2)

inst_23278:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x381fffff; valaddr_reg:x3; val_offset:69834*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69834*0 + 3*238*FLEN/8, x4, x1, x2)

inst_23279:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x383fffff; valaddr_reg:x3; val_offset:69837*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69837*0 + 3*239*FLEN/8, x4, x1, x2)

inst_23280:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38400000; valaddr_reg:x3; val_offset:69840*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69840*0 + 3*240*FLEN/8, x4, x1, x2)

inst_23281:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38600000; valaddr_reg:x3; val_offset:69843*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69843*0 + 3*241*FLEN/8, x4, x1, x2)

inst_23282:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38700000; valaddr_reg:x3; val_offset:69846*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69846*0 + 3*242*FLEN/8, x4, x1, x2)

inst_23283:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x38780000; valaddr_reg:x3; val_offset:69849*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69849*0 + 3*243*FLEN/8, x4, x1, x2)

inst_23284:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387c0000; valaddr_reg:x3; val_offset:69852*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69852*0 + 3*244*FLEN/8, x4, x1, x2)

inst_23285:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387e0000; valaddr_reg:x3; val_offset:69855*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69855*0 + 3*245*FLEN/8, x4, x1, x2)

inst_23286:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387f0000; valaddr_reg:x3; val_offset:69858*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69858*0 + 3*246*FLEN/8, x4, x1, x2)

inst_23287:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387f8000; valaddr_reg:x3; val_offset:69861*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69861*0 + 3*247*FLEN/8, x4, x1, x2)

inst_23288:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fc000; valaddr_reg:x3; val_offset:69864*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69864*0 + 3*248*FLEN/8, x4, x1, x2)

inst_23289:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fe000; valaddr_reg:x3; val_offset:69867*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69867*0 + 3*249*FLEN/8, x4, x1, x2)

inst_23290:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ff000; valaddr_reg:x3; val_offset:69870*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69870*0 + 3*250*FLEN/8, x4, x1, x2)

inst_23291:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ff800; valaddr_reg:x3; val_offset:69873*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69873*0 + 3*251*FLEN/8, x4, x1, x2)

inst_23292:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffc00; valaddr_reg:x3; val_offset:69876*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69876*0 + 3*252*FLEN/8, x4, x1, x2)

inst_23293:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffe00; valaddr_reg:x3; val_offset:69879*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69879*0 + 3*253*FLEN/8, x4, x1, x2)

inst_23294:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fff00; valaddr_reg:x3; val_offset:69882*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69882*0 + 3*254*FLEN/8, x4, x1, x2)

inst_23295:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fff80; valaddr_reg:x3; val_offset:69885*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69885*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_23296:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fffc0; valaddr_reg:x3; val_offset:69888*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69888*0 + 3*256*FLEN/8, x4, x1, x2)

inst_23297:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fffe0; valaddr_reg:x3; val_offset:69891*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69891*0 + 3*257*FLEN/8, x4, x1, x2)

inst_23298:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffff0; valaddr_reg:x3; val_offset:69894*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69894*0 + 3*258*FLEN/8, x4, x1, x2)

inst_23299:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffff8; valaddr_reg:x3; val_offset:69897*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69897*0 + 3*259*FLEN/8, x4, x1, x2)

inst_23300:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffffc; valaddr_reg:x3; val_offset:69900*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69900*0 + 3*260*FLEN/8, x4, x1, x2)

inst_23301:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387ffffe; valaddr_reg:x3; val_offset:69903*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69903*0 + 3*261*FLEN/8, x4, x1, x2)

inst_23302:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x387fffff; valaddr_reg:x3; val_offset:69906*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69906*0 + 3*262*FLEN/8, x4, x1, x2)

inst_23303:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3f800001; valaddr_reg:x3; val_offset:69909*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69909*0 + 3*263*FLEN/8, x4, x1, x2)

inst_23304:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3f800003; valaddr_reg:x3; val_offset:69912*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69912*0 + 3*264*FLEN/8, x4, x1, x2)

inst_23305:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3f800007; valaddr_reg:x3; val_offset:69915*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69915*0 + 3*265*FLEN/8, x4, x1, x2)

inst_23306:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3f999999; valaddr_reg:x3; val_offset:69918*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69918*0 + 3*266*FLEN/8, x4, x1, x2)

inst_23307:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fa49249; valaddr_reg:x3; val_offset:69921*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69921*0 + 3*267*FLEN/8, x4, x1, x2)

inst_23308:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fb33333; valaddr_reg:x3; val_offset:69924*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69924*0 + 3*268*FLEN/8, x4, x1, x2)

inst_23309:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69927*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69927*0 + 3*269*FLEN/8, x4, x1, x2)

inst_23310:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69930*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69930*0 + 3*270*FLEN/8, x4, x1, x2)

inst_23311:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fc44444; valaddr_reg:x3; val_offset:69933*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69933*0 + 3*271*FLEN/8, x4, x1, x2)

inst_23312:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69936*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69936*0 + 3*272*FLEN/8, x4, x1, x2)

inst_23313:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69939*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69939*0 + 3*273*FLEN/8, x4, x1, x2)

inst_23314:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fe66666; valaddr_reg:x3; val_offset:69942*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69942*0 + 3*274*FLEN/8, x4, x1, x2)

inst_23315:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69945*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69945*0 + 3*275*FLEN/8, x4, x1, x2)

inst_23316:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69948*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69948*0 + 3*276*FLEN/8, x4, x1, x2)

inst_23317:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69951*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69951*0 + 3*277*FLEN/8, x4, x1, x2)

inst_23318:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6;
op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69954*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69954*0 + 3*278*FLEN/8, x4, x1, x2)

inst_23319:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80000001; valaddr_reg:x3; val_offset:69957*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69957*0 + 3*279*FLEN/8, x4, x1, x2)

inst_23320:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80000003; valaddr_reg:x3; val_offset:69960*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69960*0 + 3*280*FLEN/8, x4, x1, x2)

inst_23321:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80000007; valaddr_reg:x3; val_offset:69963*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69963*0 + 3*281*FLEN/8, x4, x1, x2)

inst_23322:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80199999; valaddr_reg:x3; val_offset:69966*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69966*0 + 3*282*FLEN/8, x4, x1, x2)

inst_23323:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80249249; valaddr_reg:x3; val_offset:69969*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69969*0 + 3*283*FLEN/8, x4, x1, x2)

inst_23324:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80333333; valaddr_reg:x3; val_offset:69972*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69972*0 + 3*284*FLEN/8, x4, x1, x2)

inst_23325:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8036db6d; valaddr_reg:x3; val_offset:69975*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69975*0 + 3*285*FLEN/8, x4, x1, x2)

inst_23326:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69978*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69978*0 + 3*286*FLEN/8, x4, x1, x2)

inst_23327:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80444444; valaddr_reg:x3; val_offset:69981*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69981*0 + 3*287*FLEN/8, x4, x1, x2)

inst_23328:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x804ccccc; valaddr_reg:x3; val_offset:69984*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69984*0 + 3*288*FLEN/8, x4, x1, x2)

inst_23329:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x805b6db6; valaddr_reg:x3; val_offset:69987*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69987*0 + 3*289*FLEN/8, x4, x1, x2)

inst_23330:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x80666666; valaddr_reg:x3; val_offset:69990*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69990*0 + 3*290*FLEN/8, x4, x1, x2)

inst_23331:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x806db6db; valaddr_reg:x3; val_offset:69993*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69993*0 + 3*291*FLEN/8, x4, x1, x2)

inst_23332:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x807ffff8; valaddr_reg:x3; val_offset:69996*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69996*0 + 3*292*FLEN/8, x4, x1, x2)

inst_23333:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x807ffffc; valaddr_reg:x3; val_offset:69999*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69999*0 + 3*293*FLEN/8, x4, x1, x2)

inst_23334:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x807ffffe; valaddr_reg:x3; val_offset:70002*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70002*0 + 3*294*FLEN/8, x4, x1, x2)

inst_23335:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87800000; valaddr_reg:x3; val_offset:70005*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70005*0 + 3*295*FLEN/8, x4, x1, x2)

inst_23336:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87800001; valaddr_reg:x3; val_offset:70008*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70008*0 + 3*296*FLEN/8, x4, x1, x2)

inst_23337:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87800003; valaddr_reg:x3; val_offset:70011*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70011*0 + 3*297*FLEN/8, x4, x1, x2)

inst_23338:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87800007; valaddr_reg:x3; val_offset:70014*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70014*0 + 3*298*FLEN/8, x4, x1, x2)

inst_23339:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8780000f; valaddr_reg:x3; val_offset:70017*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70017*0 + 3*299*FLEN/8, x4, x1, x2)

inst_23340:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8780001f; valaddr_reg:x3; val_offset:70020*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70020*0 + 3*300*FLEN/8, x4, x1, x2)

inst_23341:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8780003f; valaddr_reg:x3; val_offset:70023*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70023*0 + 3*301*FLEN/8, x4, x1, x2)

inst_23342:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8780007f; valaddr_reg:x3; val_offset:70026*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70026*0 + 3*302*FLEN/8, x4, x1, x2)

inst_23343:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x878000ff; valaddr_reg:x3; val_offset:70029*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70029*0 + 3*303*FLEN/8, x4, x1, x2)

inst_23344:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x878001ff; valaddr_reg:x3; val_offset:70032*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70032*0 + 3*304*FLEN/8, x4, x1, x2)

inst_23345:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x878003ff; valaddr_reg:x3; val_offset:70035*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70035*0 + 3*305*FLEN/8, x4, x1, x2)

inst_23346:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x878007ff; valaddr_reg:x3; val_offset:70038*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70038*0 + 3*306*FLEN/8, x4, x1, x2)

inst_23347:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87800fff; valaddr_reg:x3; val_offset:70041*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70041*0 + 3*307*FLEN/8, x4, x1, x2)

inst_23348:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87801fff; valaddr_reg:x3; val_offset:70044*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70044*0 + 3*308*FLEN/8, x4, x1, x2)

inst_23349:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87803fff; valaddr_reg:x3; val_offset:70047*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70047*0 + 3*309*FLEN/8, x4, x1, x2)

inst_23350:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87807fff; valaddr_reg:x3; val_offset:70050*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70050*0 + 3*310*FLEN/8, x4, x1, x2)

inst_23351:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8780ffff; valaddr_reg:x3; val_offset:70053*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70053*0 + 3*311*FLEN/8, x4, x1, x2)

inst_23352:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8781ffff; valaddr_reg:x3; val_offset:70056*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70056*0 + 3*312*FLEN/8, x4, x1, x2)

inst_23353:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8783ffff; valaddr_reg:x3; val_offset:70059*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70059*0 + 3*313*FLEN/8, x4, x1, x2)

inst_23354:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x8787ffff; valaddr_reg:x3; val_offset:70062*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70062*0 + 3*314*FLEN/8, x4, x1, x2)

inst_23355:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x878fffff; valaddr_reg:x3; val_offset:70065*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70065*0 + 3*315*FLEN/8, x4, x1, x2)

inst_23356:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x879fffff; valaddr_reg:x3; val_offset:70068*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70068*0 + 3*316*FLEN/8, x4, x1, x2)

inst_23357:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87bfffff; valaddr_reg:x3; val_offset:70071*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70071*0 + 3*317*FLEN/8, x4, x1, x2)

inst_23358:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87c00000; valaddr_reg:x3; val_offset:70074*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70074*0 + 3*318*FLEN/8, x4, x1, x2)

inst_23359:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87e00000; valaddr_reg:x3; val_offset:70077*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70077*0 + 3*319*FLEN/8, x4, x1, x2)

inst_23360:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87f00000; valaddr_reg:x3; val_offset:70080*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70080*0 + 3*320*FLEN/8, x4, x1, x2)

inst_23361:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87f80000; valaddr_reg:x3; val_offset:70083*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70083*0 + 3*321*FLEN/8, x4, x1, x2)

inst_23362:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fc0000; valaddr_reg:x3; val_offset:70086*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70086*0 + 3*322*FLEN/8, x4, x1, x2)

inst_23363:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fe0000; valaddr_reg:x3; val_offset:70089*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70089*0 + 3*323*FLEN/8, x4, x1, x2)

inst_23364:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ff0000; valaddr_reg:x3; val_offset:70092*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70092*0 + 3*324*FLEN/8, x4, x1, x2)

inst_23365:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ff8000; valaddr_reg:x3; val_offset:70095*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70095*0 + 3*325*FLEN/8, x4, x1, x2)

inst_23366:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffc000; valaddr_reg:x3; val_offset:70098*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70098*0 + 3*326*FLEN/8, x4, x1, x2)

inst_23367:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffe000; valaddr_reg:x3; val_offset:70101*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70101*0 + 3*327*FLEN/8, x4, x1, x2)

inst_23368:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fff000; valaddr_reg:x3; val_offset:70104*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70104*0 + 3*328*FLEN/8, x4, x1, x2)

inst_23369:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fff800; valaddr_reg:x3; val_offset:70107*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70107*0 + 3*329*FLEN/8, x4, x1, x2)

inst_23370:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffc00; valaddr_reg:x3; val_offset:70110*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70110*0 + 3*330*FLEN/8, x4, x1, x2)

inst_23371:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffe00; valaddr_reg:x3; val_offset:70113*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70113*0 + 3*331*FLEN/8, x4, x1, x2)

inst_23372:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffff00; valaddr_reg:x3; val_offset:70116*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70116*0 + 3*332*FLEN/8, x4, x1, x2)

inst_23373:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffff80; valaddr_reg:x3; val_offset:70119*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70119*0 + 3*333*FLEN/8, x4, x1, x2)

inst_23374:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffffc0; valaddr_reg:x3; val_offset:70122*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70122*0 + 3*334*FLEN/8, x4, x1, x2)

inst_23375:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffffe0; valaddr_reg:x3; val_offset:70125*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70125*0 + 3*335*FLEN/8, x4, x1, x2)

inst_23376:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffff0; valaddr_reg:x3; val_offset:70128*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70128*0 + 3*336*FLEN/8, x4, x1, x2)

inst_23377:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffff8; valaddr_reg:x3; val_offset:70131*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70131*0 + 3*337*FLEN/8, x4, x1, x2)

inst_23378:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffffc; valaddr_reg:x3; val_offset:70134*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70134*0 + 3*338*FLEN/8, x4, x1, x2)

inst_23379:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87fffffe; valaddr_reg:x3; val_offset:70137*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70137*0 + 3*339*FLEN/8, x4, x1, x2)

inst_23380:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000;
op3val:0x87ffffff; valaddr_reg:x3; val_offset:70140*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70140*0 + 3*340*FLEN/8, x4, x1, x2)

inst_23381:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbf800001; valaddr_reg:x3; val_offset:70143*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70143*0 + 3*341*FLEN/8, x4, x1, x2)

inst_23382:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbf800003; valaddr_reg:x3; val_offset:70146*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70146*0 + 3*342*FLEN/8, x4, x1, x2)

inst_23383:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbf800007; valaddr_reg:x3; val_offset:70149*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70149*0 + 3*343*FLEN/8, x4, x1, x2)

inst_23384:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbf999999; valaddr_reg:x3; val_offset:70152*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70152*0 + 3*344*FLEN/8, x4, x1, x2)

inst_23385:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:70155*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70155*0 + 3*345*FLEN/8, x4, x1, x2)

inst_23386:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:70158*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70158*0 + 3*346*FLEN/8, x4, x1, x2)

inst_23387:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70161*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70161*0 + 3*347*FLEN/8, x4, x1, x2)

inst_23388:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70164*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70164*0 + 3*348*FLEN/8, x4, x1, x2)

inst_23389:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:70167*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70167*0 + 3*349*FLEN/8, x4, x1, x2)

inst_23390:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70170*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70170*0 + 3*350*FLEN/8, x4, x1, x2)

inst_23391:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70173*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70173*0 + 3*351*FLEN/8, x4, x1, x2)

inst_23392:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:70176*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70176*0 + 3*352*FLEN/8, x4, x1, x2)

inst_23393:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70179*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70179*0 + 3*353*FLEN/8, x4, x1, x2)

inst_23394:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:70182*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70182*0 + 3*354*FLEN/8, x4, x1, x2)

inst_23395:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:70185*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70185*0 + 3*355*FLEN/8, x4, x1, x2)

inst_23396:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:70188*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70188*0 + 3*356*FLEN/8, x4, x1, x2)

inst_23397:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8000000; valaddr_reg:x3; val_offset:70191*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70191*0 + 3*357*FLEN/8, x4, x1, x2)

inst_23398:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8000001; valaddr_reg:x3; val_offset:70194*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70194*0 + 3*358*FLEN/8, x4, x1, x2)

inst_23399:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8000003; valaddr_reg:x3; val_offset:70197*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70197*0 + 3*359*FLEN/8, x4, x1, x2)

inst_23400:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8000007; valaddr_reg:x3; val_offset:70200*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70200*0 + 3*360*FLEN/8, x4, x1, x2)

inst_23401:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc800000f; valaddr_reg:x3; val_offset:70203*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70203*0 + 3*361*FLEN/8, x4, x1, x2)

inst_23402:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc800001f; valaddr_reg:x3; val_offset:70206*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70206*0 + 3*362*FLEN/8, x4, x1, x2)

inst_23403:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc800003f; valaddr_reg:x3; val_offset:70209*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70209*0 + 3*363*FLEN/8, x4, x1, x2)

inst_23404:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc800007f; valaddr_reg:x3; val_offset:70212*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70212*0 + 3*364*FLEN/8, x4, x1, x2)

inst_23405:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc80000ff; valaddr_reg:x3; val_offset:70215*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70215*0 + 3*365*FLEN/8, x4, x1, x2)

inst_23406:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc80001ff; valaddr_reg:x3; val_offset:70218*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70218*0 + 3*366*FLEN/8, x4, x1, x2)

inst_23407:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc80003ff; valaddr_reg:x3; val_offset:70221*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70221*0 + 3*367*FLEN/8, x4, x1, x2)

inst_23408:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc80007ff; valaddr_reg:x3; val_offset:70224*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70224*0 + 3*368*FLEN/8, x4, x1, x2)

inst_23409:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8000fff; valaddr_reg:x3; val_offset:70227*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70227*0 + 3*369*FLEN/8, x4, x1, x2)

inst_23410:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8001fff; valaddr_reg:x3; val_offset:70230*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70230*0 + 3*370*FLEN/8, x4, x1, x2)

inst_23411:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8003fff; valaddr_reg:x3; val_offset:70233*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70233*0 + 3*371*FLEN/8, x4, x1, x2)

inst_23412:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8007fff; valaddr_reg:x3; val_offset:70236*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70236*0 + 3*372*FLEN/8, x4, x1, x2)

inst_23413:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc800ffff; valaddr_reg:x3; val_offset:70239*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70239*0 + 3*373*FLEN/8, x4, x1, x2)

inst_23414:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc801ffff; valaddr_reg:x3; val_offset:70242*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70242*0 + 3*374*FLEN/8, x4, x1, x2)

inst_23415:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc803ffff; valaddr_reg:x3; val_offset:70245*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70245*0 + 3*375*FLEN/8, x4, x1, x2)

inst_23416:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc807ffff; valaddr_reg:x3; val_offset:70248*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70248*0 + 3*376*FLEN/8, x4, x1, x2)

inst_23417:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc80fffff; valaddr_reg:x3; val_offset:70251*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70251*0 + 3*377*FLEN/8, x4, x1, x2)

inst_23418:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc81fffff; valaddr_reg:x3; val_offset:70254*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70254*0 + 3*378*FLEN/8, x4, x1, x2)

inst_23419:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc83fffff; valaddr_reg:x3; val_offset:70257*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70257*0 + 3*379*FLEN/8, x4, x1, x2)

inst_23420:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8400000; valaddr_reg:x3; val_offset:70260*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70260*0 + 3*380*FLEN/8, x4, x1, x2)

inst_23421:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8600000; valaddr_reg:x3; val_offset:70263*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70263*0 + 3*381*FLEN/8, x4, x1, x2)

inst_23422:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8700000; valaddr_reg:x3; val_offset:70266*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70266*0 + 3*382*FLEN/8, x4, x1, x2)

inst_23423:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc8780000; valaddr_reg:x3; val_offset:70269*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70269*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_23424:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87c0000; valaddr_reg:x3; val_offset:70272*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70272*0 + 3*384*FLEN/8, x4, x1, x2)

inst_23425:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87e0000; valaddr_reg:x3; val_offset:70275*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70275*0 + 3*385*FLEN/8, x4, x1, x2)

inst_23426:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87f0000; valaddr_reg:x3; val_offset:70278*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70278*0 + 3*386*FLEN/8, x4, x1, x2)

inst_23427:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87f8000; valaddr_reg:x3; val_offset:70281*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70281*0 + 3*387*FLEN/8, x4, x1, x2)

inst_23428:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fc000; valaddr_reg:x3; val_offset:70284*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70284*0 + 3*388*FLEN/8, x4, x1, x2)

inst_23429:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fe000; valaddr_reg:x3; val_offset:70287*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70287*0 + 3*389*FLEN/8, x4, x1, x2)

inst_23430:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ff000; valaddr_reg:x3; val_offset:70290*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70290*0 + 3*390*FLEN/8, x4, x1, x2)

inst_23431:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ff800; valaddr_reg:x3; val_offset:70293*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70293*0 + 3*391*FLEN/8, x4, x1, x2)

inst_23432:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffc00; valaddr_reg:x3; val_offset:70296*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70296*0 + 3*392*FLEN/8, x4, x1, x2)

inst_23433:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffe00; valaddr_reg:x3; val_offset:70299*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70299*0 + 3*393*FLEN/8, x4, x1, x2)

inst_23434:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fff00; valaddr_reg:x3; val_offset:70302*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70302*0 + 3*394*FLEN/8, x4, x1, x2)

inst_23435:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fff80; valaddr_reg:x3; val_offset:70305*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70305*0 + 3*395*FLEN/8, x4, x1, x2)

inst_23436:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fffc0; valaddr_reg:x3; val_offset:70308*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70308*0 + 3*396*FLEN/8, x4, x1, x2)

inst_23437:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fffe0; valaddr_reg:x3; val_offset:70311*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70311*0 + 3*397*FLEN/8, x4, x1, x2)

inst_23438:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffff0; valaddr_reg:x3; val_offset:70314*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70314*0 + 3*398*FLEN/8, x4, x1, x2)

inst_23439:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffff8; valaddr_reg:x3; val_offset:70317*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70317*0 + 3*399*FLEN/8, x4, x1, x2)

inst_23440:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffffc; valaddr_reg:x3; val_offset:70320*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70320*0 + 3*400*FLEN/8, x4, x1, x2)

inst_23441:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87ffffe; valaddr_reg:x3; val_offset:70323*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70323*0 + 3*401*FLEN/8, x4, x1, x2)

inst_23442:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7;
op3val:0xc87fffff; valaddr_reg:x3; val_offset:70326*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70326*0 + 3*402*FLEN/8, x4, x1, x2)

inst_23443:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba000000; valaddr_reg:x3; val_offset:70329*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70329*0 + 3*403*FLEN/8, x4, x1, x2)

inst_23444:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba000001; valaddr_reg:x3; val_offset:70332*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70332*0 + 3*404*FLEN/8, x4, x1, x2)

inst_23445:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba000003; valaddr_reg:x3; val_offset:70335*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70335*0 + 3*405*FLEN/8, x4, x1, x2)

inst_23446:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba000007; valaddr_reg:x3; val_offset:70338*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70338*0 + 3*406*FLEN/8, x4, x1, x2)

inst_23447:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba00000f; valaddr_reg:x3; val_offset:70341*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70341*0 + 3*407*FLEN/8, x4, x1, x2)

inst_23448:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba00001f; valaddr_reg:x3; val_offset:70344*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70344*0 + 3*408*FLEN/8, x4, x1, x2)

inst_23449:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba00003f; valaddr_reg:x3; val_offset:70347*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70347*0 + 3*409*FLEN/8, x4, x1, x2)

inst_23450:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba00007f; valaddr_reg:x3; val_offset:70350*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70350*0 + 3*410*FLEN/8, x4, x1, x2)

inst_23451:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba0000ff; valaddr_reg:x3; val_offset:70353*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70353*0 + 3*411*FLEN/8, x4, x1, x2)

inst_23452:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba0001ff; valaddr_reg:x3; val_offset:70356*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70356*0 + 3*412*FLEN/8, x4, x1, x2)

inst_23453:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba0003ff; valaddr_reg:x3; val_offset:70359*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70359*0 + 3*413*FLEN/8, x4, x1, x2)

inst_23454:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba0007ff; valaddr_reg:x3; val_offset:70362*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70362*0 + 3*414*FLEN/8, x4, x1, x2)

inst_23455:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba000fff; valaddr_reg:x3; val_offset:70365*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70365*0 + 3*415*FLEN/8, x4, x1, x2)

inst_23456:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba001fff; valaddr_reg:x3; val_offset:70368*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70368*0 + 3*416*FLEN/8, x4, x1, x2)

inst_23457:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba003fff; valaddr_reg:x3; val_offset:70371*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70371*0 + 3*417*FLEN/8, x4, x1, x2)

inst_23458:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba007fff; valaddr_reg:x3; val_offset:70374*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70374*0 + 3*418*FLEN/8, x4, x1, x2)

inst_23459:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba00ffff; valaddr_reg:x3; val_offset:70377*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70377*0 + 3*419*FLEN/8, x4, x1, x2)

inst_23460:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba01ffff; valaddr_reg:x3; val_offset:70380*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70380*0 + 3*420*FLEN/8, x4, x1, x2)

inst_23461:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba03ffff; valaddr_reg:x3; val_offset:70383*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70383*0 + 3*421*FLEN/8, x4, x1, x2)

inst_23462:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba07ffff; valaddr_reg:x3; val_offset:70386*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70386*0 + 3*422*FLEN/8, x4, x1, x2)

inst_23463:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba0fffff; valaddr_reg:x3; val_offset:70389*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70389*0 + 3*423*FLEN/8, x4, x1, x2)

inst_23464:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba1fffff; valaddr_reg:x3; val_offset:70392*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70392*0 + 3*424*FLEN/8, x4, x1, x2)

inst_23465:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba3fffff; valaddr_reg:x3; val_offset:70395*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70395*0 + 3*425*FLEN/8, x4, x1, x2)

inst_23466:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba400000; valaddr_reg:x3; val_offset:70398*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70398*0 + 3*426*FLEN/8, x4, x1, x2)

inst_23467:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba600000; valaddr_reg:x3; val_offset:70401*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70401*0 + 3*427*FLEN/8, x4, x1, x2)

inst_23468:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba700000; valaddr_reg:x3; val_offset:70404*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70404*0 + 3*428*FLEN/8, x4, x1, x2)

inst_23469:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba780000; valaddr_reg:x3; val_offset:70407*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70407*0 + 3*429*FLEN/8, x4, x1, x2)

inst_23470:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7c0000; valaddr_reg:x3; val_offset:70410*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70410*0 + 3*430*FLEN/8, x4, x1, x2)

inst_23471:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7e0000; valaddr_reg:x3; val_offset:70413*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70413*0 + 3*431*FLEN/8, x4, x1, x2)

inst_23472:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7f0000; valaddr_reg:x3; val_offset:70416*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70416*0 + 3*432*FLEN/8, x4, x1, x2)

inst_23473:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7f8000; valaddr_reg:x3; val_offset:70419*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70419*0 + 3*433*FLEN/8, x4, x1, x2)

inst_23474:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fc000; valaddr_reg:x3; val_offset:70422*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70422*0 + 3*434*FLEN/8, x4, x1, x2)

inst_23475:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fe000; valaddr_reg:x3; val_offset:70425*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70425*0 + 3*435*FLEN/8, x4, x1, x2)

inst_23476:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ff000; valaddr_reg:x3; val_offset:70428*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70428*0 + 3*436*FLEN/8, x4, x1, x2)

inst_23477:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ff800; valaddr_reg:x3; val_offset:70431*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70431*0 + 3*437*FLEN/8, x4, x1, x2)

inst_23478:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffc00; valaddr_reg:x3; val_offset:70434*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70434*0 + 3*438*FLEN/8, x4, x1, x2)

inst_23479:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffe00; valaddr_reg:x3; val_offset:70437*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70437*0 + 3*439*FLEN/8, x4, x1, x2)

inst_23480:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fff00; valaddr_reg:x3; val_offset:70440*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70440*0 + 3*440*FLEN/8, x4, x1, x2)

inst_23481:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fff80; valaddr_reg:x3; val_offset:70443*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70443*0 + 3*441*FLEN/8, x4, x1, x2)

inst_23482:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fffc0; valaddr_reg:x3; val_offset:70446*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70446*0 + 3*442*FLEN/8, x4, x1, x2)

inst_23483:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fffe0; valaddr_reg:x3; val_offset:70449*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70449*0 + 3*443*FLEN/8, x4, x1, x2)

inst_23484:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffff0; valaddr_reg:x3; val_offset:70452*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70452*0 + 3*444*FLEN/8, x4, x1, x2)

inst_23485:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffff8; valaddr_reg:x3; val_offset:70455*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70455*0 + 3*445*FLEN/8, x4, x1, x2)

inst_23486:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffffc; valaddr_reg:x3; val_offset:70458*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70458*0 + 3*446*FLEN/8, x4, x1, x2)

inst_23487:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7ffffe; valaddr_reg:x3; val_offset:70461*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70461*0 + 3*447*FLEN/8, x4, x1, x2)

inst_23488:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xba7fffff; valaddr_reg:x3; val_offset:70464*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70464*0 + 3*448*FLEN/8, x4, x1, x2)

inst_23489:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbf800001; valaddr_reg:x3; val_offset:70467*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70467*0 + 3*449*FLEN/8, x4, x1, x2)

inst_23490:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbf800003; valaddr_reg:x3; val_offset:70470*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70470*0 + 3*450*FLEN/8, x4, x1, x2)

inst_23491:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbf800007; valaddr_reg:x3; val_offset:70473*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70473*0 + 3*451*FLEN/8, x4, x1, x2)

inst_23492:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbf999999; valaddr_reg:x3; val_offset:70476*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70476*0 + 3*452*FLEN/8, x4, x1, x2)

inst_23493:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:70479*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70479*0 + 3*453*FLEN/8, x4, x1, x2)

inst_23494:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:70482*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70482*0 + 3*454*FLEN/8, x4, x1, x2)

inst_23495:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70485*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70485*0 + 3*455*FLEN/8, x4, x1, x2)

inst_23496:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70488*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70488*0 + 3*456*FLEN/8, x4, x1, x2)

inst_23497:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:70491*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70491*0 + 3*457*FLEN/8, x4, x1, x2)

inst_23498:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70494*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70494*0 + 3*458*FLEN/8, x4, x1, x2)

inst_23499:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70497*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70497*0 + 3*459*FLEN/8, x4, x1, x2)

inst_23500:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:70500*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70500*0 + 3*460*FLEN/8, x4, x1, x2)

inst_23501:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70503*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70503*0 + 3*461*FLEN/8, x4, x1, x2)

inst_23502:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:70506*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70506*0 + 3*462*FLEN/8, x4, x1, x2)

inst_23503:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:70509*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70509*0 + 3*463*FLEN/8, x4, x1, x2)

inst_23504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:70512*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70512*0 + 3*464*FLEN/8, x4, x1, x2)

inst_23505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:70515*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70515*0 + 3*465*FLEN/8, x4, x1, x2)

inst_23506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:70518*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70518*0 + 3*466*FLEN/8, x4, x1, x2)

inst_23507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:70521*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70521*0 + 3*467*FLEN/8, x4, x1, x2)

inst_23508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:70524*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70524*0 + 3*468*FLEN/8, x4, x1, x2)

inst_23509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:70527*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70527*0 + 3*469*FLEN/8, x4, x1, x2)

inst_23510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:70530*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70530*0 + 3*470*FLEN/8, x4, x1, x2)

inst_23511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:70533*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70533*0 + 3*471*FLEN/8, x4, x1, x2)

inst_23512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:70536*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70536*0 + 3*472*FLEN/8, x4, x1, x2)

inst_23513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:70539*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70539*0 + 3*473*FLEN/8, x4, x1, x2)

inst_23514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:70542*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70542*0 + 3*474*FLEN/8, x4, x1, x2)

inst_23515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:70545*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70545*0 + 3*475*FLEN/8, x4, x1, x2)

inst_23516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:70548*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70548*0 + 3*476*FLEN/8, x4, x1, x2)

inst_23517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:70551*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70551*0 + 3*477*FLEN/8, x4, x1, x2)

inst_23518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:70554*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70554*0 + 3*478*FLEN/8, x4, x1, x2)

inst_23519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:70557*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70557*0 + 3*479*FLEN/8, x4, x1, x2)

inst_23520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:70560*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70560*0 + 3*480*FLEN/8, x4, x1, x2)

inst_23521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3800000; valaddr_reg:x3; val_offset:70563*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70563*0 + 3*481*FLEN/8, x4, x1, x2)

inst_23522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3800001; valaddr_reg:x3; val_offset:70566*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70566*0 + 3*482*FLEN/8, x4, x1, x2)

inst_23523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3800003; valaddr_reg:x3; val_offset:70569*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70569*0 + 3*483*FLEN/8, x4, x1, x2)

inst_23524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3800007; valaddr_reg:x3; val_offset:70572*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70572*0 + 3*484*FLEN/8, x4, x1, x2)

inst_23525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x380000f; valaddr_reg:x3; val_offset:70575*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70575*0 + 3*485*FLEN/8, x4, x1, x2)

inst_23526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x380001f; valaddr_reg:x3; val_offset:70578*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70578*0 + 3*486*FLEN/8, x4, x1, x2)

inst_23527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x380003f; valaddr_reg:x3; val_offset:70581*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70581*0 + 3*487*FLEN/8, x4, x1, x2)

inst_23528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x380007f; valaddr_reg:x3; val_offset:70584*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70584*0 + 3*488*FLEN/8, x4, x1, x2)

inst_23529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x38000ff; valaddr_reg:x3; val_offset:70587*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70587*0 + 3*489*FLEN/8, x4, x1, x2)

inst_23530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x38001ff; valaddr_reg:x3; val_offset:70590*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70590*0 + 3*490*FLEN/8, x4, x1, x2)

inst_23531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x38003ff; valaddr_reg:x3; val_offset:70593*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70593*0 + 3*491*FLEN/8, x4, x1, x2)

inst_23532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x38007ff; valaddr_reg:x3; val_offset:70596*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70596*0 + 3*492*FLEN/8, x4, x1, x2)

inst_23533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3800fff; valaddr_reg:x3; val_offset:70599*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70599*0 + 3*493*FLEN/8, x4, x1, x2)

inst_23534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3801fff; valaddr_reg:x3; val_offset:70602*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70602*0 + 3*494*FLEN/8, x4, x1, x2)

inst_23535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3803fff; valaddr_reg:x3; val_offset:70605*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70605*0 + 3*495*FLEN/8, x4, x1, x2)

inst_23536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3807fff; valaddr_reg:x3; val_offset:70608*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70608*0 + 3*496*FLEN/8, x4, x1, x2)

inst_23537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x380ffff; valaddr_reg:x3; val_offset:70611*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70611*0 + 3*497*FLEN/8, x4, x1, x2)

inst_23538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x381ffff; valaddr_reg:x3; val_offset:70614*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70614*0 + 3*498*FLEN/8, x4, x1, x2)

inst_23539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x383ffff; valaddr_reg:x3; val_offset:70617*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70617*0 + 3*499*FLEN/8, x4, x1, x2)

inst_23540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x387ffff; valaddr_reg:x3; val_offset:70620*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70620*0 + 3*500*FLEN/8, x4, x1, x2)

inst_23541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x38fffff; valaddr_reg:x3; val_offset:70623*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70623*0 + 3*501*FLEN/8, x4, x1, x2)

inst_23542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x39fffff; valaddr_reg:x3; val_offset:70626*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70626*0 + 3*502*FLEN/8, x4, x1, x2)

inst_23543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3bfffff; valaddr_reg:x3; val_offset:70629*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70629*0 + 3*503*FLEN/8, x4, x1, x2)

inst_23544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3c00000; valaddr_reg:x3; val_offset:70632*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70632*0 + 3*504*FLEN/8, x4, x1, x2)

inst_23545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3e00000; valaddr_reg:x3; val_offset:70635*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70635*0 + 3*505*FLEN/8, x4, x1, x2)

inst_23546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3f00000; valaddr_reg:x3; val_offset:70638*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70638*0 + 3*506*FLEN/8, x4, x1, x2)

inst_23547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3f80000; valaddr_reg:x3; val_offset:70641*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70641*0 + 3*507*FLEN/8, x4, x1, x2)

inst_23548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fc0000; valaddr_reg:x3; val_offset:70644*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70644*0 + 3*508*FLEN/8, x4, x1, x2)

inst_23549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fe0000; valaddr_reg:x3; val_offset:70647*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70647*0 + 3*509*FLEN/8, x4, x1, x2)

inst_23550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ff0000; valaddr_reg:x3; val_offset:70650*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70650*0 + 3*510*FLEN/8, x4, x1, x2)

inst_23551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ff8000; valaddr_reg:x3; val_offset:70653*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70653*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_23552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffc000; valaddr_reg:x3; val_offset:70656*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70656*0 + 3*512*FLEN/8, x4, x1, x2)

inst_23553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffe000; valaddr_reg:x3; val_offset:70659*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70659*0 + 3*513*FLEN/8, x4, x1, x2)

inst_23554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fff000; valaddr_reg:x3; val_offset:70662*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70662*0 + 3*514*FLEN/8, x4, x1, x2)

inst_23555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fff800; valaddr_reg:x3; val_offset:70665*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70665*0 + 3*515*FLEN/8, x4, x1, x2)

inst_23556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffc00; valaddr_reg:x3; val_offset:70668*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70668*0 + 3*516*FLEN/8, x4, x1, x2)

inst_23557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffe00; valaddr_reg:x3; val_offset:70671*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70671*0 + 3*517*FLEN/8, x4, x1, x2)

inst_23558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffff00; valaddr_reg:x3; val_offset:70674*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70674*0 + 3*518*FLEN/8, x4, x1, x2)

inst_23559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffff80; valaddr_reg:x3; val_offset:70677*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70677*0 + 3*519*FLEN/8, x4, x1, x2)

inst_23560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffffc0; valaddr_reg:x3; val_offset:70680*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70680*0 + 3*520*FLEN/8, x4, x1, x2)

inst_23561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffffe0; valaddr_reg:x3; val_offset:70683*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70683*0 + 3*521*FLEN/8, x4, x1, x2)

inst_23562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffff0; valaddr_reg:x3; val_offset:70686*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70686*0 + 3*522*FLEN/8, x4, x1, x2)

inst_23563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffff8; valaddr_reg:x3; val_offset:70689*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70689*0 + 3*523*FLEN/8, x4, x1, x2)

inst_23564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffffc; valaddr_reg:x3; val_offset:70692*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70692*0 + 3*524*FLEN/8, x4, x1, x2)

inst_23565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3fffffe; valaddr_reg:x3; val_offset:70695*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70695*0 + 3*525*FLEN/8, x4, x1, x2)

inst_23566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0;
op3val:0x3ffffff; valaddr_reg:x3; val_offset:70698*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70698*0 + 3*526*FLEN/8, x4, x1, x2)

inst_23567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:70701*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70701*0 + 3*527*FLEN/8, x4, x1, x2)

inst_23568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:70704*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70704*0 + 3*528*FLEN/8, x4, x1, x2)

inst_23569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:70707*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70707*0 + 3*529*FLEN/8, x4, x1, x2)

inst_23570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:70710*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70710*0 + 3*530*FLEN/8, x4, x1, x2)

inst_23571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:70713*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70713*0 + 3*531*FLEN/8, x4, x1, x2)

inst_23572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:70716*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70716*0 + 3*532*FLEN/8, x4, x1, x2)

inst_23573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:70719*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70719*0 + 3*533*FLEN/8, x4, x1, x2)

inst_23574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:70722*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70722*0 + 3*534*FLEN/8, x4, x1, x2)

inst_23575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:70725*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70725*0 + 3*535*FLEN/8, x4, x1, x2)

inst_23576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:70728*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70728*0 + 3*536*FLEN/8, x4, x1, x2)

inst_23577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:70731*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70731*0 + 3*537*FLEN/8, x4, x1, x2)

inst_23578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:70734*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70734*0 + 3*538*FLEN/8, x4, x1, x2)

inst_23579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:70737*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70737*0 + 3*539*FLEN/8, x4, x1, x2)

inst_23580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:70740*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70740*0 + 3*540*FLEN/8, x4, x1, x2)

inst_23581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:70743*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70743*0 + 3*541*FLEN/8, x4, x1, x2)

inst_23582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:70746*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70746*0 + 3*542*FLEN/8, x4, x1, x2)

inst_23583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc000000; valaddr_reg:x3; val_offset:70749*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70749*0 + 3*543*FLEN/8, x4, x1, x2)

inst_23584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc000001; valaddr_reg:x3; val_offset:70752*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70752*0 + 3*544*FLEN/8, x4, x1, x2)

inst_23585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc000003; valaddr_reg:x3; val_offset:70755*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70755*0 + 3*545*FLEN/8, x4, x1, x2)

inst_23586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc000007; valaddr_reg:x3; val_offset:70758*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70758*0 + 3*546*FLEN/8, x4, x1, x2)

inst_23587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc00000f; valaddr_reg:x3; val_offset:70761*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70761*0 + 3*547*FLEN/8, x4, x1, x2)

inst_23588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc00001f; valaddr_reg:x3; val_offset:70764*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70764*0 + 3*548*FLEN/8, x4, x1, x2)

inst_23589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc00003f; valaddr_reg:x3; val_offset:70767*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70767*0 + 3*549*FLEN/8, x4, x1, x2)

inst_23590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc00007f; valaddr_reg:x3; val_offset:70770*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70770*0 + 3*550*FLEN/8, x4, x1, x2)

inst_23591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc0000ff; valaddr_reg:x3; val_offset:70773*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70773*0 + 3*551*FLEN/8, x4, x1, x2)

inst_23592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc0001ff; valaddr_reg:x3; val_offset:70776*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70776*0 + 3*552*FLEN/8, x4, x1, x2)

inst_23593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc0003ff; valaddr_reg:x3; val_offset:70779*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70779*0 + 3*553*FLEN/8, x4, x1, x2)

inst_23594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc0007ff; valaddr_reg:x3; val_offset:70782*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70782*0 + 3*554*FLEN/8, x4, x1, x2)

inst_23595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc000fff; valaddr_reg:x3; val_offset:70785*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70785*0 + 3*555*FLEN/8, x4, x1, x2)

inst_23596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc001fff; valaddr_reg:x3; val_offset:70788*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70788*0 + 3*556*FLEN/8, x4, x1, x2)

inst_23597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc003fff; valaddr_reg:x3; val_offset:70791*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70791*0 + 3*557*FLEN/8, x4, x1, x2)

inst_23598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc007fff; valaddr_reg:x3; val_offset:70794*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70794*0 + 3*558*FLEN/8, x4, x1, x2)

inst_23599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc00ffff; valaddr_reg:x3; val_offset:70797*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70797*0 + 3*559*FLEN/8, x4, x1, x2)

inst_23600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc01ffff; valaddr_reg:x3; val_offset:70800*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70800*0 + 3*560*FLEN/8, x4, x1, x2)

inst_23601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc03ffff; valaddr_reg:x3; val_offset:70803*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70803*0 + 3*561*FLEN/8, x4, x1, x2)

inst_23602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc07ffff; valaddr_reg:x3; val_offset:70806*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70806*0 + 3*562*FLEN/8, x4, x1, x2)

inst_23603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc0fffff; valaddr_reg:x3; val_offset:70809*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70809*0 + 3*563*FLEN/8, x4, x1, x2)

inst_23604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc1fffff; valaddr_reg:x3; val_offset:70812*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70812*0 + 3*564*FLEN/8, x4, x1, x2)

inst_23605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc3fffff; valaddr_reg:x3; val_offset:70815*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70815*0 + 3*565*FLEN/8, x4, x1, x2)

inst_23606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc400000; valaddr_reg:x3; val_offset:70818*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70818*0 + 3*566*FLEN/8, x4, x1, x2)

inst_23607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc600000; valaddr_reg:x3; val_offset:70821*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70821*0 + 3*567*FLEN/8, x4, x1, x2)

inst_23608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc700000; valaddr_reg:x3; val_offset:70824*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70824*0 + 3*568*FLEN/8, x4, x1, x2)

inst_23609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc780000; valaddr_reg:x3; val_offset:70827*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70827*0 + 3*569*FLEN/8, x4, x1, x2)

inst_23610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7c0000; valaddr_reg:x3; val_offset:70830*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70830*0 + 3*570*FLEN/8, x4, x1, x2)

inst_23611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7e0000; valaddr_reg:x3; val_offset:70833*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70833*0 + 3*571*FLEN/8, x4, x1, x2)

inst_23612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7f0000; valaddr_reg:x3; val_offset:70836*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70836*0 + 3*572*FLEN/8, x4, x1, x2)

inst_23613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7f8000; valaddr_reg:x3; val_offset:70839*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70839*0 + 3*573*FLEN/8, x4, x1, x2)

inst_23614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fc000; valaddr_reg:x3; val_offset:70842*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70842*0 + 3*574*FLEN/8, x4, x1, x2)

inst_23615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fe000; valaddr_reg:x3; val_offset:70845*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70845*0 + 3*575*FLEN/8, x4, x1, x2)

inst_23616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ff000; valaddr_reg:x3; val_offset:70848*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70848*0 + 3*576*FLEN/8, x4, x1, x2)

inst_23617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ff800; valaddr_reg:x3; val_offset:70851*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70851*0 + 3*577*FLEN/8, x4, x1, x2)

inst_23618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffc00; valaddr_reg:x3; val_offset:70854*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70854*0 + 3*578*FLEN/8, x4, x1, x2)

inst_23619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffe00; valaddr_reg:x3; val_offset:70857*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70857*0 + 3*579*FLEN/8, x4, x1, x2)

inst_23620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fff00; valaddr_reg:x3; val_offset:70860*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70860*0 + 3*580*FLEN/8, x4, x1, x2)

inst_23621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fff80; valaddr_reg:x3; val_offset:70863*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70863*0 + 3*581*FLEN/8, x4, x1, x2)

inst_23622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fffc0; valaddr_reg:x3; val_offset:70866*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70866*0 + 3*582*FLEN/8, x4, x1, x2)

inst_23623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fffe0; valaddr_reg:x3; val_offset:70869*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70869*0 + 3*583*FLEN/8, x4, x1, x2)

inst_23624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffff0; valaddr_reg:x3; val_offset:70872*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70872*0 + 3*584*FLEN/8, x4, x1, x2)

inst_23625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffff8; valaddr_reg:x3; val_offset:70875*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70875*0 + 3*585*FLEN/8, x4, x1, x2)

inst_23626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffffc; valaddr_reg:x3; val_offset:70878*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70878*0 + 3*586*FLEN/8, x4, x1, x2)

inst_23627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7ffffe; valaddr_reg:x3; val_offset:70881*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70881*0 + 3*587*FLEN/8, x4, x1, x2)

inst_23628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0;
op3val:0xc7fffff; valaddr_reg:x3; val_offset:70884*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70884*0 + 3*588*FLEN/8, x4, x1, x2)

inst_23629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f800000; valaddr_reg:x3; val_offset:70887*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70887*0 + 3*589*FLEN/8, x4, x1, x2)

inst_23630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f800001; valaddr_reg:x3; val_offset:70890*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70890*0 + 3*590*FLEN/8, x4, x1, x2)

inst_23631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f800003; valaddr_reg:x3; val_offset:70893*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70893*0 + 3*591*FLEN/8, x4, x1, x2)

inst_23632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f800007; valaddr_reg:x3; val_offset:70896*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70896*0 + 3*592*FLEN/8, x4, x1, x2)

inst_23633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f80000f; valaddr_reg:x3; val_offset:70899*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70899*0 + 3*593*FLEN/8, x4, x1, x2)

inst_23634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f80001f; valaddr_reg:x3; val_offset:70902*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70902*0 + 3*594*FLEN/8, x4, x1, x2)

inst_23635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f80003f; valaddr_reg:x3; val_offset:70905*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70905*0 + 3*595*FLEN/8, x4, x1, x2)

inst_23636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f80007f; valaddr_reg:x3; val_offset:70908*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70908*0 + 3*596*FLEN/8, x4, x1, x2)

inst_23637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f8000ff; valaddr_reg:x3; val_offset:70911*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70911*0 + 3*597*FLEN/8, x4, x1, x2)

inst_23638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f8001ff; valaddr_reg:x3; val_offset:70914*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70914*0 + 3*598*FLEN/8, x4, x1, x2)

inst_23639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f8003ff; valaddr_reg:x3; val_offset:70917*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70917*0 + 3*599*FLEN/8, x4, x1, x2)

inst_23640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f8007ff; valaddr_reg:x3; val_offset:70920*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70920*0 + 3*600*FLEN/8, x4, x1, x2)

inst_23641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f800fff; valaddr_reg:x3; val_offset:70923*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70923*0 + 3*601*FLEN/8, x4, x1, x2)

inst_23642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f801fff; valaddr_reg:x3; val_offset:70926*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70926*0 + 3*602*FLEN/8, x4, x1, x2)

inst_23643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f803fff; valaddr_reg:x3; val_offset:70929*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70929*0 + 3*603*FLEN/8, x4, x1, x2)

inst_23644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f807fff; valaddr_reg:x3; val_offset:70932*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70932*0 + 3*604*FLEN/8, x4, x1, x2)

inst_23645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f80ffff; valaddr_reg:x3; val_offset:70935*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70935*0 + 3*605*FLEN/8, x4, x1, x2)

inst_23646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f81ffff; valaddr_reg:x3; val_offset:70938*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70938*0 + 3*606*FLEN/8, x4, x1, x2)

inst_23647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f83ffff; valaddr_reg:x3; val_offset:70941*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70941*0 + 3*607*FLEN/8, x4, x1, x2)

inst_23648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f87ffff; valaddr_reg:x3; val_offset:70944*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70944*0 + 3*608*FLEN/8, x4, x1, x2)

inst_23649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f8fffff; valaddr_reg:x3; val_offset:70947*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70947*0 + 3*609*FLEN/8, x4, x1, x2)

inst_23650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9f9fffff; valaddr_reg:x3; val_offset:70950*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70950*0 + 3*610*FLEN/8, x4, x1, x2)

inst_23651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fbfffff; valaddr_reg:x3; val_offset:70953*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70953*0 + 3*611*FLEN/8, x4, x1, x2)

inst_23652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fc00000; valaddr_reg:x3; val_offset:70956*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70956*0 + 3*612*FLEN/8, x4, x1, x2)

inst_23653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fe00000; valaddr_reg:x3; val_offset:70959*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70959*0 + 3*613*FLEN/8, x4, x1, x2)

inst_23654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ff00000; valaddr_reg:x3; val_offset:70962*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70962*0 + 3*614*FLEN/8, x4, x1, x2)

inst_23655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ff80000; valaddr_reg:x3; val_offset:70965*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70965*0 + 3*615*FLEN/8, x4, x1, x2)

inst_23656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffc0000; valaddr_reg:x3; val_offset:70968*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70968*0 + 3*616*FLEN/8, x4, x1, x2)

inst_23657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffe0000; valaddr_reg:x3; val_offset:70971*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70971*0 + 3*617*FLEN/8, x4, x1, x2)

inst_23658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fff0000; valaddr_reg:x3; val_offset:70974*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70974*0 + 3*618*FLEN/8, x4, x1, x2)

inst_23659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fff8000; valaddr_reg:x3; val_offset:70977*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70977*0 + 3*619*FLEN/8, x4, x1, x2)

inst_23660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffc000; valaddr_reg:x3; val_offset:70980*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70980*0 + 3*620*FLEN/8, x4, x1, x2)

inst_23661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffe000; valaddr_reg:x3; val_offset:70983*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70983*0 + 3*621*FLEN/8, x4, x1, x2)

inst_23662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffff000; valaddr_reg:x3; val_offset:70986*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70986*0 + 3*622*FLEN/8, x4, x1, x2)

inst_23663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffff800; valaddr_reg:x3; val_offset:70989*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70989*0 + 3*623*FLEN/8, x4, x1, x2)

inst_23664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffc00; valaddr_reg:x3; val_offset:70992*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70992*0 + 3*624*FLEN/8, x4, x1, x2)

inst_23665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffe00; valaddr_reg:x3; val_offset:70995*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70995*0 + 3*625*FLEN/8, x4, x1, x2)

inst_23666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffff00; valaddr_reg:x3; val_offset:70998*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70998*0 + 3*626*FLEN/8, x4, x1, x2)

inst_23667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffff80; valaddr_reg:x3; val_offset:71001*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71001*0 + 3*627*FLEN/8, x4, x1, x2)

inst_23668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffffc0; valaddr_reg:x3; val_offset:71004*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71004*0 + 3*628*FLEN/8, x4, x1, x2)

inst_23669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffffe0; valaddr_reg:x3; val_offset:71007*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71007*0 + 3*629*FLEN/8, x4, x1, x2)

inst_23670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffff0; valaddr_reg:x3; val_offset:71010*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71010*0 + 3*630*FLEN/8, x4, x1, x2)

inst_23671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffff8; valaddr_reg:x3; val_offset:71013*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71013*0 + 3*631*FLEN/8, x4, x1, x2)

inst_23672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffffc; valaddr_reg:x3; val_offset:71016*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71016*0 + 3*632*FLEN/8, x4, x1, x2)

inst_23673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9ffffffe; valaddr_reg:x3; val_offset:71019*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71019*0 + 3*633*FLEN/8, x4, x1, x2)

inst_23674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0x9fffffff; valaddr_reg:x3; val_offset:71022*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71022*0 + 3*634*FLEN/8, x4, x1, x2)

inst_23675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbf800001; valaddr_reg:x3; val_offset:71025*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71025*0 + 3*635*FLEN/8, x4, x1, x2)

inst_23676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbf800003; valaddr_reg:x3; val_offset:71028*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71028*0 + 3*636*FLEN/8, x4, x1, x2)

inst_23677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbf800007; valaddr_reg:x3; val_offset:71031*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71031*0 + 3*637*FLEN/8, x4, x1, x2)

inst_23678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbf999999; valaddr_reg:x3; val_offset:71034*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71034*0 + 3*638*FLEN/8, x4, x1, x2)

inst_23679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:71037*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71037*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_23680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:71040*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71040*0 + 3*640*FLEN/8, x4, x1, x2)

inst_23681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71043*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71043*0 + 3*641*FLEN/8, x4, x1, x2)

inst_23682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71046*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71046*0 + 3*642*FLEN/8, x4, x1, x2)

inst_23683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:71049*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71049*0 + 3*643*FLEN/8, x4, x1, x2)

inst_23684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:71052*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71052*0 + 3*644*FLEN/8, x4, x1, x2)

inst_23685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:71055*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71055*0 + 3*645*FLEN/8, x4, x1, x2)

inst_23686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:71058*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71058*0 + 3*646*FLEN/8, x4, x1, x2)

inst_23687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:71061*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71061*0 + 3*647*FLEN/8, x4, x1, x2)

inst_23688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:71064*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71064*0 + 3*648*FLEN/8, x4, x1, x2)

inst_23689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:71067*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71067*0 + 3*649*FLEN/8, x4, x1, x2)

inst_23690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:71070*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71070*0 + 3*650*FLEN/8, x4, x1, x2)

inst_23691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:71073*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71073*0 + 3*651*FLEN/8, x4, x1, x2)

inst_23692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:71076*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71076*0 + 3*652*FLEN/8, x4, x1, x2)

inst_23693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:71079*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71079*0 + 3*653*FLEN/8, x4, x1, x2)

inst_23694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:71082*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71082*0 + 3*654*FLEN/8, x4, x1, x2)

inst_23695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:71085*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71085*0 + 3*655*FLEN/8, x4, x1, x2)

inst_23696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:71088*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71088*0 + 3*656*FLEN/8, x4, x1, x2)

inst_23697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:71091*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71091*0 + 3*657*FLEN/8, x4, x1, x2)

inst_23698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:71094*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71094*0 + 3*658*FLEN/8, x4, x1, x2)

inst_23699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:71097*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71097*0 + 3*659*FLEN/8, x4, x1, x2)

inst_23700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:71100*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71100*0 + 3*660*FLEN/8, x4, x1, x2)

inst_23701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:71103*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71103*0 + 3*661*FLEN/8, x4, x1, x2)

inst_23702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:71106*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71106*0 + 3*662*FLEN/8, x4, x1, x2)

inst_23703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:71109*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71109*0 + 3*663*FLEN/8, x4, x1, x2)

inst_23704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:71112*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71112*0 + 3*664*FLEN/8, x4, x1, x2)

inst_23705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:71115*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71115*0 + 3*665*FLEN/8, x4, x1, x2)

inst_23706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:71118*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71118*0 + 3*666*FLEN/8, x4, x1, x2)

inst_23707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4800000; valaddr_reg:x3; val_offset:71121*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71121*0 + 3*667*FLEN/8, x4, x1, x2)

inst_23708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4800001; valaddr_reg:x3; val_offset:71124*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71124*0 + 3*668*FLEN/8, x4, x1, x2)

inst_23709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4800003; valaddr_reg:x3; val_offset:71127*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71127*0 + 3*669*FLEN/8, x4, x1, x2)

inst_23710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4800007; valaddr_reg:x3; val_offset:71130*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71130*0 + 3*670*FLEN/8, x4, x1, x2)

inst_23711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x480000f; valaddr_reg:x3; val_offset:71133*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71133*0 + 3*671*FLEN/8, x4, x1, x2)

inst_23712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x480001f; valaddr_reg:x3; val_offset:71136*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71136*0 + 3*672*FLEN/8, x4, x1, x2)

inst_23713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x480003f; valaddr_reg:x3; val_offset:71139*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71139*0 + 3*673*FLEN/8, x4, x1, x2)

inst_23714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x480007f; valaddr_reg:x3; val_offset:71142*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71142*0 + 3*674*FLEN/8, x4, x1, x2)

inst_23715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x48000ff; valaddr_reg:x3; val_offset:71145*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71145*0 + 3*675*FLEN/8, x4, x1, x2)

inst_23716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x48001ff; valaddr_reg:x3; val_offset:71148*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71148*0 + 3*676*FLEN/8, x4, x1, x2)

inst_23717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x48003ff; valaddr_reg:x3; val_offset:71151*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71151*0 + 3*677*FLEN/8, x4, x1, x2)

inst_23718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x48007ff; valaddr_reg:x3; val_offset:71154*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71154*0 + 3*678*FLEN/8, x4, x1, x2)

inst_23719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4800fff; valaddr_reg:x3; val_offset:71157*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71157*0 + 3*679*FLEN/8, x4, x1, x2)

inst_23720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4801fff; valaddr_reg:x3; val_offset:71160*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71160*0 + 3*680*FLEN/8, x4, x1, x2)

inst_23721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4803fff; valaddr_reg:x3; val_offset:71163*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71163*0 + 3*681*FLEN/8, x4, x1, x2)

inst_23722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4807fff; valaddr_reg:x3; val_offset:71166*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71166*0 + 3*682*FLEN/8, x4, x1, x2)

inst_23723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x480ffff; valaddr_reg:x3; val_offset:71169*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71169*0 + 3*683*FLEN/8, x4, x1, x2)

inst_23724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x481ffff; valaddr_reg:x3; val_offset:71172*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71172*0 + 3*684*FLEN/8, x4, x1, x2)

inst_23725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x483ffff; valaddr_reg:x3; val_offset:71175*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71175*0 + 3*685*FLEN/8, x4, x1, x2)

inst_23726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x487ffff; valaddr_reg:x3; val_offset:71178*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71178*0 + 3*686*FLEN/8, x4, x1, x2)

inst_23727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x48fffff; valaddr_reg:x3; val_offset:71181*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71181*0 + 3*687*FLEN/8, x4, x1, x2)

inst_23728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x49fffff; valaddr_reg:x3; val_offset:71184*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71184*0 + 3*688*FLEN/8, x4, x1, x2)

inst_23729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4bfffff; valaddr_reg:x3; val_offset:71187*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71187*0 + 3*689*FLEN/8, x4, x1, x2)

inst_23730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4c00000; valaddr_reg:x3; val_offset:71190*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71190*0 + 3*690*FLEN/8, x4, x1, x2)

inst_23731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4e00000; valaddr_reg:x3; val_offset:71193*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71193*0 + 3*691*FLEN/8, x4, x1, x2)

inst_23732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4f00000; valaddr_reg:x3; val_offset:71196*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71196*0 + 3*692*FLEN/8, x4, x1, x2)

inst_23733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4f80000; valaddr_reg:x3; val_offset:71199*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71199*0 + 3*693*FLEN/8, x4, x1, x2)

inst_23734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fc0000; valaddr_reg:x3; val_offset:71202*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71202*0 + 3*694*FLEN/8, x4, x1, x2)

inst_23735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fe0000; valaddr_reg:x3; val_offset:71205*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71205*0 + 3*695*FLEN/8, x4, x1, x2)

inst_23736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ff0000; valaddr_reg:x3; val_offset:71208*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71208*0 + 3*696*FLEN/8, x4, x1, x2)

inst_23737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ff8000; valaddr_reg:x3; val_offset:71211*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71211*0 + 3*697*FLEN/8, x4, x1, x2)

inst_23738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffc000; valaddr_reg:x3; val_offset:71214*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71214*0 + 3*698*FLEN/8, x4, x1, x2)

inst_23739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffe000; valaddr_reg:x3; val_offset:71217*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71217*0 + 3*699*FLEN/8, x4, x1, x2)

inst_23740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fff000; valaddr_reg:x3; val_offset:71220*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71220*0 + 3*700*FLEN/8, x4, x1, x2)

inst_23741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fff800; valaddr_reg:x3; val_offset:71223*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71223*0 + 3*701*FLEN/8, x4, x1, x2)

inst_23742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffc00; valaddr_reg:x3; val_offset:71226*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71226*0 + 3*702*FLEN/8, x4, x1, x2)

inst_23743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffe00; valaddr_reg:x3; val_offset:71229*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71229*0 + 3*703*FLEN/8, x4, x1, x2)

inst_23744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffff00; valaddr_reg:x3; val_offset:71232*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71232*0 + 3*704*FLEN/8, x4, x1, x2)

inst_23745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffff80; valaddr_reg:x3; val_offset:71235*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71235*0 + 3*705*FLEN/8, x4, x1, x2)

inst_23746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffffc0; valaddr_reg:x3; val_offset:71238*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71238*0 + 3*706*FLEN/8, x4, x1, x2)

inst_23747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffffe0; valaddr_reg:x3; val_offset:71241*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71241*0 + 3*707*FLEN/8, x4, x1, x2)

inst_23748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffff0; valaddr_reg:x3; val_offset:71244*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71244*0 + 3*708*FLEN/8, x4, x1, x2)

inst_23749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffff8; valaddr_reg:x3; val_offset:71247*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71247*0 + 3*709*FLEN/8, x4, x1, x2)

inst_23750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffffc; valaddr_reg:x3; val_offset:71250*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71250*0 + 3*710*FLEN/8, x4, x1, x2)

inst_23751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4fffffe; valaddr_reg:x3; val_offset:71253*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71253*0 + 3*711*FLEN/8, x4, x1, x2)

inst_23752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0;
op3val:0x4ffffff; valaddr_reg:x3; val_offset:71256*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71256*0 + 3*712*FLEN/8, x4, x1, x2)

inst_23753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9000000; valaddr_reg:x3; val_offset:71259*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71259*0 + 3*713*FLEN/8, x4, x1, x2)

inst_23754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9000001; valaddr_reg:x3; val_offset:71262*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71262*0 + 3*714*FLEN/8, x4, x1, x2)

inst_23755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9000003; valaddr_reg:x3; val_offset:71265*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71265*0 + 3*715*FLEN/8, x4, x1, x2)

inst_23756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9000007; valaddr_reg:x3; val_offset:71268*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71268*0 + 3*716*FLEN/8, x4, x1, x2)

inst_23757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb900000f; valaddr_reg:x3; val_offset:71271*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71271*0 + 3*717*FLEN/8, x4, x1, x2)

inst_23758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb900001f; valaddr_reg:x3; val_offset:71274*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71274*0 + 3*718*FLEN/8, x4, x1, x2)

inst_23759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb900003f; valaddr_reg:x3; val_offset:71277*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71277*0 + 3*719*FLEN/8, x4, x1, x2)

inst_23760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb900007f; valaddr_reg:x3; val_offset:71280*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71280*0 + 3*720*FLEN/8, x4, x1, x2)

inst_23761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb90000ff; valaddr_reg:x3; val_offset:71283*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71283*0 + 3*721*FLEN/8, x4, x1, x2)

inst_23762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb90001ff; valaddr_reg:x3; val_offset:71286*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71286*0 + 3*722*FLEN/8, x4, x1, x2)

inst_23763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb90003ff; valaddr_reg:x3; val_offset:71289*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71289*0 + 3*723*FLEN/8, x4, x1, x2)

inst_23764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb90007ff; valaddr_reg:x3; val_offset:71292*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71292*0 + 3*724*FLEN/8, x4, x1, x2)

inst_23765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9000fff; valaddr_reg:x3; val_offset:71295*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71295*0 + 3*725*FLEN/8, x4, x1, x2)

inst_23766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9001fff; valaddr_reg:x3; val_offset:71298*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71298*0 + 3*726*FLEN/8, x4, x1, x2)

inst_23767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9003fff; valaddr_reg:x3; val_offset:71301*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71301*0 + 3*727*FLEN/8, x4, x1, x2)

inst_23768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9007fff; valaddr_reg:x3; val_offset:71304*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71304*0 + 3*728*FLEN/8, x4, x1, x2)

inst_23769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb900ffff; valaddr_reg:x3; val_offset:71307*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71307*0 + 3*729*FLEN/8, x4, x1, x2)

inst_23770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb901ffff; valaddr_reg:x3; val_offset:71310*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71310*0 + 3*730*FLEN/8, x4, x1, x2)

inst_23771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb903ffff; valaddr_reg:x3; val_offset:71313*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71313*0 + 3*731*FLEN/8, x4, x1, x2)

inst_23772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb907ffff; valaddr_reg:x3; val_offset:71316*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71316*0 + 3*732*FLEN/8, x4, x1, x2)

inst_23773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb90fffff; valaddr_reg:x3; val_offset:71319*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71319*0 + 3*733*FLEN/8, x4, x1, x2)

inst_23774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb91fffff; valaddr_reg:x3; val_offset:71322*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71322*0 + 3*734*FLEN/8, x4, x1, x2)

inst_23775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb93fffff; valaddr_reg:x3; val_offset:71325*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71325*0 + 3*735*FLEN/8, x4, x1, x2)

inst_23776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9400000; valaddr_reg:x3; val_offset:71328*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71328*0 + 3*736*FLEN/8, x4, x1, x2)

inst_23777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9600000; valaddr_reg:x3; val_offset:71331*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71331*0 + 3*737*FLEN/8, x4, x1, x2)

inst_23778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9700000; valaddr_reg:x3; val_offset:71334*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71334*0 + 3*738*FLEN/8, x4, x1, x2)

inst_23779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb9780000; valaddr_reg:x3; val_offset:71337*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71337*0 + 3*739*FLEN/8, x4, x1, x2)

inst_23780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97c0000; valaddr_reg:x3; val_offset:71340*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71340*0 + 3*740*FLEN/8, x4, x1, x2)

inst_23781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97e0000; valaddr_reg:x3; val_offset:71343*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71343*0 + 3*741*FLEN/8, x4, x1, x2)

inst_23782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97f0000; valaddr_reg:x3; val_offset:71346*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71346*0 + 3*742*FLEN/8, x4, x1, x2)

inst_23783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97f8000; valaddr_reg:x3; val_offset:71349*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71349*0 + 3*743*FLEN/8, x4, x1, x2)

inst_23784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fc000; valaddr_reg:x3; val_offset:71352*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71352*0 + 3*744*FLEN/8, x4, x1, x2)

inst_23785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fe000; valaddr_reg:x3; val_offset:71355*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71355*0 + 3*745*FLEN/8, x4, x1, x2)

inst_23786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ff000; valaddr_reg:x3; val_offset:71358*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71358*0 + 3*746*FLEN/8, x4, x1, x2)

inst_23787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ff800; valaddr_reg:x3; val_offset:71361*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71361*0 + 3*747*FLEN/8, x4, x1, x2)

inst_23788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffc00; valaddr_reg:x3; val_offset:71364*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71364*0 + 3*748*FLEN/8, x4, x1, x2)

inst_23789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffe00; valaddr_reg:x3; val_offset:71367*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71367*0 + 3*749*FLEN/8, x4, x1, x2)

inst_23790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fff00; valaddr_reg:x3; val_offset:71370*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71370*0 + 3*750*FLEN/8, x4, x1, x2)

inst_23791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fff80; valaddr_reg:x3; val_offset:71373*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71373*0 + 3*751*FLEN/8, x4, x1, x2)

inst_23792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fffc0; valaddr_reg:x3; val_offset:71376*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71376*0 + 3*752*FLEN/8, x4, x1, x2)

inst_23793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fffe0; valaddr_reg:x3; val_offset:71379*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71379*0 + 3*753*FLEN/8, x4, x1, x2)

inst_23794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffff0; valaddr_reg:x3; val_offset:71382*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71382*0 + 3*754*FLEN/8, x4, x1, x2)

inst_23795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffff8; valaddr_reg:x3; val_offset:71385*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71385*0 + 3*755*FLEN/8, x4, x1, x2)

inst_23796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffffc; valaddr_reg:x3; val_offset:71388*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71388*0 + 3*756*FLEN/8, x4, x1, x2)

inst_23797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97ffffe; valaddr_reg:x3; val_offset:71391*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71391*0 + 3*757*FLEN/8, x4, x1, x2)

inst_23798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xb97fffff; valaddr_reg:x3; val_offset:71394*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71394*0 + 3*758*FLEN/8, x4, x1, x2)

inst_23799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbf800001; valaddr_reg:x3; val_offset:71397*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71397*0 + 3*759*FLEN/8, x4, x1, x2)

inst_23800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbf800003; valaddr_reg:x3; val_offset:71400*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71400*0 + 3*760*FLEN/8, x4, x1, x2)

inst_23801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbf800007; valaddr_reg:x3; val_offset:71403*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71403*0 + 3*761*FLEN/8, x4, x1, x2)

inst_23802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbf999999; valaddr_reg:x3; val_offset:71406*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71406*0 + 3*762*FLEN/8, x4, x1, x2)

inst_23803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:71409*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71409*0 + 3*763*FLEN/8, x4, x1, x2)

inst_23804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:71412*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71412*0 + 3*764*FLEN/8, x4, x1, x2)

inst_23805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71415*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71415*0 + 3*765*FLEN/8, x4, x1, x2)

inst_23806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71418*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71418*0 + 3*766*FLEN/8, x4, x1, x2)

inst_23807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:71421*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71421*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8007fff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800ffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x801ffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x803ffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x807ffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x80fffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x81fffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x83fffff,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8400000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8600000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8700000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x8780000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87c0000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87e0000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87f0000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87f8000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fc000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fe000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ff000,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ff800,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffc00,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffe00,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fff00,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fff80,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffc0,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffe0,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffff0,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffff8,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffffc,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87ffffe,32,FLEN)
NAN_BOXED(0x7ee72161,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x87fffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33800000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33800001,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33800003,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33800007,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3380000f,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3380001f,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3380003f,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3380007f,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x338000ff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x338001ff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x338003ff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x338007ff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33800fff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33801fff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33803fff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33807fff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3380ffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3381ffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3383ffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3387ffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x338fffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x339fffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33bfffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33c00000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33e00000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33f00000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33f80000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fc0000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fe0000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ff0000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ff8000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffc000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffe000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fff000,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fff800,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffc00,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffe00,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffff00,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffff80,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffffc0,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffffe0,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffff0,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffff8,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffffc,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33fffffe,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x33ffffff,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7ee73bc3,32,FLEN)
NAN_BOXED(0x46dad4,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c800000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c800001,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c800003,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c800007,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c80000f,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c80001f,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c80003f,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c80007f,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c8000ff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c8001ff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c8003ff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c8007ff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c800fff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c801fff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c803fff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c807fff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c80ffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c81ffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c83ffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c87ffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c8fffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8c9fffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cbfffff,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cc00000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8ce00000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cf00000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cf80000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfc0000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfe0000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cff0000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cff8000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffc000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffe000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfff000,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfff800,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffc00,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffe00,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffff00,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffff80,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffffc0,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffffe0,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffff0,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffff8,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffffc,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cfffffe,32,FLEN)
NAN_BOXED(0x7ee79f8e,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8cffffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae000000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae000001,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae000003,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae000007,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae00000f,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae00001f,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae00003f,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae00007f,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae0000ff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae0001ff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae0003ff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae0007ff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae000fff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae001fff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae003fff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae007fff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae00ffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae01ffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae03ffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae07ffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae0fffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae1fffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae3fffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae400000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae600000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae700000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae780000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7c0000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7e0000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7f0000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7f8000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fc000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fe000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ff000,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ff800,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffc00,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffe00,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fff00,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fff80,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fffc0,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fffe0,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffff0,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffff8,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffffc,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7ffffe,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xae7fffff,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee7ed64,32,FLEN)
NAN_BOXED(0x8046a490,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38000000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38000001,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38000003,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38000007,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3800000f,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3800001f,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3800003f,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3800007f,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x380000ff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x380001ff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x380003ff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x380007ff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38000fff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38001fff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38003fff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38007fff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3800ffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3801ffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3803ffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3807ffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x380fffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x381fffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x383fffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38400000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38600000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38700000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x38780000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387c0000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387e0000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387f0000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387f8000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fc000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fe000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ff000,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ff800,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffc00,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffe00,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fff00,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fff80,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fffc0,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fffe0,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffff0,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffff8,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffffc,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387ffffe,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x387fffff,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3f800001,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3f800003,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3f800007,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3f999999,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fa49249,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fb33333,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fb6db6d,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fbbbbbb,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fc44444,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fcccccc,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fdb6db6,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fe66666,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3fedb6db,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3ffffff8,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3ffffffc,32,FLEN)
NAN_BOXED(0x7ee8837a,32,FLEN)
NAN_BOXED(0x4676f6,32,FLEN)
NAN_BOXED(0x3ffffffe,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000001,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000003,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80000007,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80199999,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80249249,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80333333,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8036db6d,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x803bbbbb,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80444444,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x804ccccc,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x805b6db6,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x80666666,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x806db6db,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffff8,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffc,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x807ffffe,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800001,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800003,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800007,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780000f,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780001f,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780003f,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780007f,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878000ff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878001ff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878003ff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878007ff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87800fff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87801fff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87803fff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87807fff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8780ffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8781ffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8783ffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x8787ffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x878fffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x879fffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87bfffff,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87c00000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87e00000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87f00000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87f80000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fc0000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fe0000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ff0000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ff8000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffc000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffe000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fff000,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fff800,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffc00,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffe00,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffff00,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffff80,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffc0,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffe0,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffff0,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffff8,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffffc,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87fffffe,32,FLEN)
NAN_BOXED(0x7ee940c9,32,FLEN)
NAN_BOXED(0x80000000,32,FLEN)
NAN_BOXED(0x87ffffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8000000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8000001,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8000003,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8000007,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc800000f,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc800001f,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc800003f,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc800007f,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc80000ff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc80001ff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc80003ff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc80007ff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8000fff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8001fff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8003fff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8007fff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc800ffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc801ffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc803ffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc807ffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc80fffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc81fffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc83fffff,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8400000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8600000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8700000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc8780000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87c0000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87e0000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87f0000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87f8000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fc000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fe000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ff000,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ff800,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffc00,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffe00,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fff00,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fff80,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fffc0,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fffe0,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffff0,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffff8,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffffc,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87ffffe,32,FLEN)
NAN_BOXED(0x7ee95129,32,FLEN)
NAN_BOXED(0x804638d7,32,FLEN)
NAN_BOXED(0xc87fffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba000000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba000001,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba000003,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba000007,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba00000f,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba00001f,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba00003f,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba00007f,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba0000ff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba0001ff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba0003ff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba0007ff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba000fff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba001fff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba003fff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba007fff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba00ffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba01ffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba03ffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba07ffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba0fffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba1fffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba3fffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba400000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba600000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba700000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba780000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7c0000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7e0000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7f0000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7f8000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fc000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fe000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ff000,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ff800,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffc00,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffe00,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fff00,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fff80,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fffc0,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fffe0,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffff0,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffff8,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffffc,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7ffffe,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xba7fffff,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee99c2f,32,FLEN)
NAN_BOXED(0x8046224a,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800001,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800003,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800007,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380000f,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380001f,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380003f,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380007f,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38000ff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38001ff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38003ff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38007ff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3800fff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3801fff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3803fff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3807fff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x380ffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x381ffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x383ffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x387ffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x38fffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x39fffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bfffff,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3c00000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3e00000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f00000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3f80000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fc0000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fe0000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff0000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ff8000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffc000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffe000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff000,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fff800,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffc00,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffe00,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff00,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffff80,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffc0,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffe0,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff0,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffff8,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffc,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3fffffe,32,FLEN)
NAN_BOXED(0x7eea26e3,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3ffffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000001,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000003,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000007,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00000f,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00001f,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00003f,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00007f,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0000ff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0001ff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0003ff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0007ff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc000fff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc001fff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc003fff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc007fff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc00ffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc01ffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc03ffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc07ffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc0fffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc1fffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc3fffff,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc400000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc600000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc700000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc780000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7c0000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7e0000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7f0000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7f8000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fc000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fe000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ff000,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ff800,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffc00,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffe00,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fff00,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fff80,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffc0,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffe0,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffff0,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffff8,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffffc,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7ffffe,32,FLEN)
NAN_BOXED(0x7eea4935,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc7fffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f800000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f800001,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f800003,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f800007,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f80000f,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f80001f,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f80003f,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f80007f,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f8000ff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f8001ff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f8003ff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f8007ff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f800fff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f801fff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f803fff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f807fff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f80ffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f81ffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f83ffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f87ffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f8fffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9f9fffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fbfffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fc00000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fe00000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ff00000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ff80000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffc0000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffe0000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fff0000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fff8000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffc000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffe000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffff000,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffff800,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffc00,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffe00,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffff00,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffff80,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffffc0,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffffe0,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffff0,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffff8,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffffc,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9ffffffe,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0x9fffffff,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7eea4ac5,32,FLEN)
NAN_BOXED(0x8045ee07,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800001,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800003,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800007,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480000f,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480001f,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480003f,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480007f,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48000ff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48001ff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48003ff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48007ff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4800fff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4801fff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4803fff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4807fff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x480ffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x481ffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x483ffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x487ffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x48fffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x49fffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4bfffff,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4e00000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4f00000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4f80000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fc0000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fe0000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ff0000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ff8000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffc000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffe000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fff000,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fff800,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffc00,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffe00,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffff00,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffff80,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffc0,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffe0,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffff0,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffff8,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffffc,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4fffffe,32,FLEN)
NAN_BOXED(0x7eeaeb85,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ffffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9000000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9000001,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9000003,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9000007,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb900000f,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb900001f,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb900003f,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb900007f,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb90000ff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb90001ff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb90003ff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb90007ff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9000fff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9001fff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9003fff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9007fff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb900ffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb901ffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb903ffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb907ffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb90fffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb91fffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb93fffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9400000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9600000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9700000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb9780000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97c0000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97e0000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97f0000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97f8000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fc000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fe000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ff000,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ff800,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffc00,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffe00,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fff00,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fff80,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fffc0,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fffe0,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffff0,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffff8,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffffc,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97ffffe,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xb97fffff,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7eeb0823,32,FLEN)
NAN_BOXED(0x8045b5b0,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
