
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.7.1
// timestamp : Fri Jun 17 14:18:09 2022 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /scratch/pawan/work/normalised/RV32F/fnmadd.s.cgf \
 \
//                  -- xlen 32  \
//                  --randomize \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fnmadd_b15 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fnmadd_b15)
RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmadd_b15)
RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_21504:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8800001; valaddr_reg:x3; val_offset:64512*0 + 3*-1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64512*0 + 3*0*FLEN/8, x4, x1, x2)

inst_21505:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8800003; valaddr_reg:x3; val_offset:64515*0 + 3*0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64515*0 + 3*1*FLEN/8, x4, x1, x2)

inst_21506:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8800007; valaddr_reg:x3; val_offset:64518*0 + 3*1*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64518*0 + 3*2*FLEN/8, x4, x1, x2)

inst_21507:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf880000f; valaddr_reg:x3; val_offset:64521*0 + 3*2*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64521*0 + 3*3*FLEN/8, x4, x1, x2)

inst_21508:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf880001f; valaddr_reg:x3; val_offset:64524*0 + 3*3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64524*0 + 3*4*FLEN/8, x4, x1, x2)

inst_21509:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf880003f; valaddr_reg:x3; val_offset:64527*0 + 3*4*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64527*0 + 3*5*FLEN/8, x4, x1, x2)

inst_21510:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf880007f; valaddr_reg:x3; val_offset:64530*0 + 3*5*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64530*0 + 3*6*FLEN/8, x4, x1, x2)

inst_21511:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf88000ff; valaddr_reg:x3; val_offset:64533*0 + 3*6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64533*0 + 3*7*FLEN/8, x4, x1, x2)

inst_21512:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf88001ff; valaddr_reg:x3; val_offset:64536*0 + 3*7*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64536*0 + 3*8*FLEN/8, x4, x1, x2)

inst_21513:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf88003ff; valaddr_reg:x3; val_offset:64539*0 + 3*8*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64539*0 + 3*9*FLEN/8, x4, x1, x2)

inst_21514:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf88007ff; valaddr_reg:x3; val_offset:64542*0 + 3*9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64542*0 + 3*10*FLEN/8, x4, x1, x2)

inst_21515:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8800fff; valaddr_reg:x3; val_offset:64545*0 + 3*10*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64545*0 + 3*11*FLEN/8, x4, x1, x2)

inst_21516:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8801fff; valaddr_reg:x3; val_offset:64548*0 + 3*11*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64548*0 + 3*12*FLEN/8, x4, x1, x2)

inst_21517:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8803fff; valaddr_reg:x3; val_offset:64551*0 + 3*12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64551*0 + 3*13*FLEN/8, x4, x1, x2)

inst_21518:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8807fff; valaddr_reg:x3; val_offset:64554*0 + 3*13*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64554*0 + 3*14*FLEN/8, x4, x1, x2)

inst_21519:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf880ffff; valaddr_reg:x3; val_offset:64557*0 + 3*14*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64557*0 + 3*15*FLEN/8, x4, x1, x2)

inst_21520:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf881ffff; valaddr_reg:x3; val_offset:64560*0 + 3*15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64560*0 + 3*16*FLEN/8, x4, x1, x2)

inst_21521:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf883ffff; valaddr_reg:x3; val_offset:64563*0 + 3*16*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64563*0 + 3*17*FLEN/8, x4, x1, x2)

inst_21522:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf887ffff; valaddr_reg:x3; val_offset:64566*0 + 3*17*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64566*0 + 3*18*FLEN/8, x4, x1, x2)

inst_21523:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf88fffff; valaddr_reg:x3; val_offset:64569*0 + 3*18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64569*0 + 3*19*FLEN/8, x4, x1, x2)

inst_21524:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf89fffff; valaddr_reg:x3; val_offset:64572*0 + 3*19*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64572*0 + 3*20*FLEN/8, x4, x1, x2)

inst_21525:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8bfffff; valaddr_reg:x3; val_offset:64575*0 + 3*20*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64575*0 + 3*21*FLEN/8, x4, x1, x2)

inst_21526:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8c00000; valaddr_reg:x3; val_offset:64578*0 + 3*21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64578*0 + 3*22*FLEN/8, x4, x1, x2)

inst_21527:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8e00000; valaddr_reg:x3; val_offset:64581*0 + 3*22*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64581*0 + 3*23*FLEN/8, x4, x1, x2)

inst_21528:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8f00000; valaddr_reg:x3; val_offset:64584*0 + 3*23*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64584*0 + 3*24*FLEN/8, x4, x1, x2)

inst_21529:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8f80000; valaddr_reg:x3; val_offset:64587*0 + 3*24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64587*0 + 3*25*FLEN/8, x4, x1, x2)

inst_21530:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fc0000; valaddr_reg:x3; val_offset:64590*0 + 3*25*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64590*0 + 3*26*FLEN/8, x4, x1, x2)

inst_21531:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fe0000; valaddr_reg:x3; val_offset:64593*0 + 3*26*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64593*0 + 3*27*FLEN/8, x4, x1, x2)

inst_21532:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ff0000; valaddr_reg:x3; val_offset:64596*0 + 3*27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64596*0 + 3*28*FLEN/8, x4, x1, x2)

inst_21533:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ff8000; valaddr_reg:x3; val_offset:64599*0 + 3*28*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64599*0 + 3*29*FLEN/8, x4, x1, x2)

inst_21534:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffc000; valaddr_reg:x3; val_offset:64602*0 + 3*29*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64602*0 + 3*30*FLEN/8, x4, x1, x2)

inst_21535:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffe000; valaddr_reg:x3; val_offset:64605*0 + 3*30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64605*0 + 3*31*FLEN/8, x4, x1, x2)

inst_21536:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fff000; valaddr_reg:x3; val_offset:64608*0 + 3*31*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64608*0 + 3*32*FLEN/8, x4, x1, x2)

inst_21537:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fff800; valaddr_reg:x3; val_offset:64611*0 + 3*32*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64611*0 + 3*33*FLEN/8, x4, x1, x2)

inst_21538:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffc00; valaddr_reg:x3; val_offset:64614*0 + 3*33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64614*0 + 3*34*FLEN/8, x4, x1, x2)

inst_21539:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffe00; valaddr_reg:x3; val_offset:64617*0 + 3*34*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64617*0 + 3*35*FLEN/8, x4, x1, x2)

inst_21540:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffff00; valaddr_reg:x3; val_offset:64620*0 + 3*35*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64620*0 + 3*36*FLEN/8, x4, x1, x2)

inst_21541:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffff80; valaddr_reg:x3; val_offset:64623*0 + 3*36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64623*0 + 3*37*FLEN/8, x4, x1, x2)

inst_21542:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffffc0; valaddr_reg:x3; val_offset:64626*0 + 3*37*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64626*0 + 3*38*FLEN/8, x4, x1, x2)

inst_21543:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffffe0; valaddr_reg:x3; val_offset:64629*0 + 3*38*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64629*0 + 3*39*FLEN/8, x4, x1, x2)

inst_21544:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffff0; valaddr_reg:x3; val_offset:64632*0 + 3*39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64632*0 + 3*40*FLEN/8, x4, x1, x2)

inst_21545:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffff8; valaddr_reg:x3; val_offset:64635*0 + 3*40*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64635*0 + 3*41*FLEN/8, x4, x1, x2)

inst_21546:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffffc; valaddr_reg:x3; val_offset:64638*0 + 3*41*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64638*0 + 3*42*FLEN/8, x4, x1, x2)

inst_21547:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8fffffe; valaddr_reg:x3; val_offset:64641*0 + 3*42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64641*0 + 3*43*FLEN/8, x4, x1, x2)

inst_21548:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xf8ffffff; valaddr_reg:x3; val_offset:64644*0 + 3*43*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64644*0 + 3*44*FLEN/8, x4, x1, x2)

inst_21549:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff000001; valaddr_reg:x3; val_offset:64647*0 + 3*44*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64647*0 + 3*45*FLEN/8, x4, x1, x2)

inst_21550:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff000003; valaddr_reg:x3; val_offset:64650*0 + 3*45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64650*0 + 3*46*FLEN/8, x4, x1, x2)

inst_21551:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff000007; valaddr_reg:x3; val_offset:64653*0 + 3*46*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64653*0 + 3*47*FLEN/8, x4, x1, x2)

inst_21552:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff199999; valaddr_reg:x3; val_offset:64656*0 + 3*47*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64656*0 + 3*48*FLEN/8, x4, x1, x2)

inst_21553:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff249249; valaddr_reg:x3; val_offset:64659*0 + 3*48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64659*0 + 3*49*FLEN/8, x4, x1, x2)

inst_21554:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff333333; valaddr_reg:x3; val_offset:64662*0 + 3*49*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64662*0 + 3*50*FLEN/8, x4, x1, x2)

inst_21555:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:64665*0 + 3*50*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64665*0 + 3*51*FLEN/8, x4, x1, x2)

inst_21556:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:64668*0 + 3*51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64668*0 + 3*52*FLEN/8, x4, x1, x2)

inst_21557:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff444444; valaddr_reg:x3; val_offset:64671*0 + 3*52*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64671*0 + 3*53*FLEN/8, x4, x1, x2)

inst_21558:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:64674*0 + 3*53*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64674*0 + 3*54*FLEN/8, x4, x1, x2)

inst_21559:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:64677*0 + 3*54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64677*0 + 3*55*FLEN/8, x4, x1, x2)

inst_21560:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff666666; valaddr_reg:x3; val_offset:64680*0 + 3*55*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64680*0 + 3*56*FLEN/8, x4, x1, x2)

inst_21561:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:64683*0 + 3*56*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64683*0 + 3*57*FLEN/8, x4, x1, x2)

inst_21562:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:64686*0 + 3*57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64686*0 + 3*58*FLEN/8, x4, x1, x2)

inst_21563:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:64689*0 + 3*58*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64689*0 + 3*59*FLEN/8, x4, x1, x2)

inst_21564:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5e646c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1357de and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ede646c; op2val:0xc01357de;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:64692*0 + 3*59*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64692*0 + 3*60*FLEN/8, x4, x1, x2)

inst_21565:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc800000; valaddr_reg:x3; val_offset:64695*0 + 3*60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64695*0 + 3*61*FLEN/8, x4, x1, x2)

inst_21566:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc800001; valaddr_reg:x3; val_offset:64698*0 + 3*61*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64698*0 + 3*62*FLEN/8, x4, x1, x2)

inst_21567:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc800003; valaddr_reg:x3; val_offset:64701*0 + 3*62*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64701*0 + 3*63*FLEN/8, x4, x1, x2)

inst_21568:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc800007; valaddr_reg:x3; val_offset:64704*0 + 3*63*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64704*0 + 3*64*FLEN/8, x4, x1, x2)

inst_21569:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc80000f; valaddr_reg:x3; val_offset:64707*0 + 3*64*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64707*0 + 3*65*FLEN/8, x4, x1, x2)

inst_21570:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc80001f; valaddr_reg:x3; val_offset:64710*0 + 3*65*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64710*0 + 3*66*FLEN/8, x4, x1, x2)

inst_21571:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc80003f; valaddr_reg:x3; val_offset:64713*0 + 3*66*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64713*0 + 3*67*FLEN/8, x4, x1, x2)

inst_21572:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc80007f; valaddr_reg:x3; val_offset:64716*0 + 3*67*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64716*0 + 3*68*FLEN/8, x4, x1, x2)

inst_21573:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc8000ff; valaddr_reg:x3; val_offset:64719*0 + 3*68*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64719*0 + 3*69*FLEN/8, x4, x1, x2)

inst_21574:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc8001ff; valaddr_reg:x3; val_offset:64722*0 + 3*69*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64722*0 + 3*70*FLEN/8, x4, x1, x2)

inst_21575:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc8003ff; valaddr_reg:x3; val_offset:64725*0 + 3*70*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64725*0 + 3*71*FLEN/8, x4, x1, x2)

inst_21576:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc8007ff; valaddr_reg:x3; val_offset:64728*0 + 3*71*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64728*0 + 3*72*FLEN/8, x4, x1, x2)

inst_21577:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc800fff; valaddr_reg:x3; val_offset:64731*0 + 3*72*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64731*0 + 3*73*FLEN/8, x4, x1, x2)

inst_21578:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc801fff; valaddr_reg:x3; val_offset:64734*0 + 3*73*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64734*0 + 3*74*FLEN/8, x4, x1, x2)

inst_21579:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc803fff; valaddr_reg:x3; val_offset:64737*0 + 3*74*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64737*0 + 3*75*FLEN/8, x4, x1, x2)

inst_21580:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc807fff; valaddr_reg:x3; val_offset:64740*0 + 3*75*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64740*0 + 3*76*FLEN/8, x4, x1, x2)

inst_21581:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc80ffff; valaddr_reg:x3; val_offset:64743*0 + 3*76*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64743*0 + 3*77*FLEN/8, x4, x1, x2)

inst_21582:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc81ffff; valaddr_reg:x3; val_offset:64746*0 + 3*77*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64746*0 + 3*78*FLEN/8, x4, x1, x2)

inst_21583:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc83ffff; valaddr_reg:x3; val_offset:64749*0 + 3*78*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64749*0 + 3*79*FLEN/8, x4, x1, x2)

inst_21584:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc87ffff; valaddr_reg:x3; val_offset:64752*0 + 3*79*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64752*0 + 3*80*FLEN/8, x4, x1, x2)

inst_21585:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc8fffff; valaddr_reg:x3; val_offset:64755*0 + 3*80*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64755*0 + 3*81*FLEN/8, x4, x1, x2)

inst_21586:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbc9fffff; valaddr_reg:x3; val_offset:64758*0 + 3*81*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64758*0 + 3*82*FLEN/8, x4, x1, x2)

inst_21587:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcbfffff; valaddr_reg:x3; val_offset:64761*0 + 3*82*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64761*0 + 3*83*FLEN/8, x4, x1, x2)

inst_21588:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcc00000; valaddr_reg:x3; val_offset:64764*0 + 3*83*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64764*0 + 3*84*FLEN/8, x4, x1, x2)

inst_21589:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbce00000; valaddr_reg:x3; val_offset:64767*0 + 3*84*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64767*0 + 3*85*FLEN/8, x4, x1, x2)

inst_21590:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcf00000; valaddr_reg:x3; val_offset:64770*0 + 3*85*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64770*0 + 3*86*FLEN/8, x4, x1, x2)

inst_21591:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcf80000; valaddr_reg:x3; val_offset:64773*0 + 3*86*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64773*0 + 3*87*FLEN/8, x4, x1, x2)

inst_21592:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfc0000; valaddr_reg:x3; val_offset:64776*0 + 3*87*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64776*0 + 3*88*FLEN/8, x4, x1, x2)

inst_21593:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfe0000; valaddr_reg:x3; val_offset:64779*0 + 3*88*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64779*0 + 3*89*FLEN/8, x4, x1, x2)

inst_21594:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcff0000; valaddr_reg:x3; val_offset:64782*0 + 3*89*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64782*0 + 3*90*FLEN/8, x4, x1, x2)

inst_21595:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcff8000; valaddr_reg:x3; val_offset:64785*0 + 3*90*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64785*0 + 3*91*FLEN/8, x4, x1, x2)

inst_21596:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffc000; valaddr_reg:x3; val_offset:64788*0 + 3*91*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64788*0 + 3*92*FLEN/8, x4, x1, x2)

inst_21597:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffe000; valaddr_reg:x3; val_offset:64791*0 + 3*92*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64791*0 + 3*93*FLEN/8, x4, x1, x2)

inst_21598:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfff000; valaddr_reg:x3; val_offset:64794*0 + 3*93*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64794*0 + 3*94*FLEN/8, x4, x1, x2)

inst_21599:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfff800; valaddr_reg:x3; val_offset:64797*0 + 3*94*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64797*0 + 3*95*FLEN/8, x4, x1, x2)

inst_21600:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffc00; valaddr_reg:x3; val_offset:64800*0 + 3*95*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64800*0 + 3*96*FLEN/8, x4, x1, x2)

inst_21601:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffe00; valaddr_reg:x3; val_offset:64803*0 + 3*96*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64803*0 + 3*97*FLEN/8, x4, x1, x2)

inst_21602:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffff00; valaddr_reg:x3; val_offset:64806*0 + 3*97*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64806*0 + 3*98*FLEN/8, x4, x1, x2)

inst_21603:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffff80; valaddr_reg:x3; val_offset:64809*0 + 3*98*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64809*0 + 3*99*FLEN/8, x4, x1, x2)

inst_21604:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffffc0; valaddr_reg:x3; val_offset:64812*0 + 3*99*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64812*0 + 3*100*FLEN/8, x4, x1, x2)

inst_21605:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffffe0; valaddr_reg:x3; val_offset:64815*0 + 3*100*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64815*0 + 3*101*FLEN/8, x4, x1, x2)

inst_21606:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffff0; valaddr_reg:x3; val_offset:64818*0 + 3*101*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64818*0 + 3*102*FLEN/8, x4, x1, x2)

inst_21607:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffff8; valaddr_reg:x3; val_offset:64821*0 + 3*102*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64821*0 + 3*103*FLEN/8, x4, x1, x2)

inst_21608:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffffc; valaddr_reg:x3; val_offset:64824*0 + 3*103*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64824*0 + 3*104*FLEN/8, x4, x1, x2)

inst_21609:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcfffffe; valaddr_reg:x3; val_offset:64827*0 + 3*104*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64827*0 + 3*105*FLEN/8, x4, x1, x2)

inst_21610:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbcffffff; valaddr_reg:x3; val_offset:64830*0 + 3*105*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64830*0 + 3*106*FLEN/8, x4, x1, x2)

inst_21611:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbf800001; valaddr_reg:x3; val_offset:64833*0 + 3*106*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64833*0 + 3*107*FLEN/8, x4, x1, x2)

inst_21612:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbf800003; valaddr_reg:x3; val_offset:64836*0 + 3*107*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64836*0 + 3*108*FLEN/8, x4, x1, x2)

inst_21613:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbf800007; valaddr_reg:x3; val_offset:64839*0 + 3*108*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64839*0 + 3*109*FLEN/8, x4, x1, x2)

inst_21614:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbf999999; valaddr_reg:x3; val_offset:64842*0 + 3*109*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64842*0 + 3*110*FLEN/8, x4, x1, x2)

inst_21615:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:64845*0 + 3*110*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64845*0 + 3*111*FLEN/8, x4, x1, x2)

inst_21616:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:64848*0 + 3*111*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64848*0 + 3*112*FLEN/8, x4, x1, x2)

inst_21617:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:64851*0 + 3*112*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64851*0 + 3*113*FLEN/8, x4, x1, x2)

inst_21618:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:64854*0 + 3*113*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64854*0 + 3*114*FLEN/8, x4, x1, x2)

inst_21619:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:64857*0 + 3*114*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64857*0 + 3*115*FLEN/8, x4, x1, x2)

inst_21620:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:64860*0 + 3*115*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64860*0 + 3*116*FLEN/8, x4, x1, x2)

inst_21621:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:64863*0 + 3*116*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64863*0 + 3*117*FLEN/8, x4, x1, x2)

inst_21622:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:64866*0 + 3*117*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64866*0 + 3*118*FLEN/8, x4, x1, x2)

inst_21623:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:64869*0 + 3*118*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64869*0 + 3*119*FLEN/8, x4, x1, x2)

inst_21624:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:64872*0 + 3*119*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64872*0 + 3*120*FLEN/8, x4, x1, x2)

inst_21625:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:64875*0 + 3*120*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64875*0 + 3*121*FLEN/8, x4, x1, x2)

inst_21626:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5eb418 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x499194 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edeb418; op2val:0x80499194;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:64878*0 + 3*121*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64878*0 + 3*122*FLEN/8, x4, x1, x2)

inst_21627:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9000000; valaddr_reg:x3; val_offset:64881*0 + 3*122*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64881*0 + 3*123*FLEN/8, x4, x1, x2)

inst_21628:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9000001; valaddr_reg:x3; val_offset:64884*0 + 3*123*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64884*0 + 3*124*FLEN/8, x4, x1, x2)

inst_21629:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9000003; valaddr_reg:x3; val_offset:64887*0 + 3*124*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64887*0 + 3*125*FLEN/8, x4, x1, x2)

inst_21630:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9000007; valaddr_reg:x3; val_offset:64890*0 + 3*125*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64890*0 + 3*126*FLEN/8, x4, x1, x2)

inst_21631:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf900000f; valaddr_reg:x3; val_offset:64893*0 + 3*126*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64893*0 + 3*127*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_2)

inst_21632:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf900001f; valaddr_reg:x3; val_offset:64896*0 + 3*127*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64896*0 + 3*128*FLEN/8, x4, x1, x2)

inst_21633:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf900003f; valaddr_reg:x3; val_offset:64899*0 + 3*128*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64899*0 + 3*129*FLEN/8, x4, x1, x2)

inst_21634:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf900007f; valaddr_reg:x3; val_offset:64902*0 + 3*129*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64902*0 + 3*130*FLEN/8, x4, x1, x2)

inst_21635:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf90000ff; valaddr_reg:x3; val_offset:64905*0 + 3*130*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64905*0 + 3*131*FLEN/8, x4, x1, x2)

inst_21636:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf90001ff; valaddr_reg:x3; val_offset:64908*0 + 3*131*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64908*0 + 3*132*FLEN/8, x4, x1, x2)

inst_21637:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf90003ff; valaddr_reg:x3; val_offset:64911*0 + 3*132*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64911*0 + 3*133*FLEN/8, x4, x1, x2)

inst_21638:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf90007ff; valaddr_reg:x3; val_offset:64914*0 + 3*133*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64914*0 + 3*134*FLEN/8, x4, x1, x2)

inst_21639:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9000fff; valaddr_reg:x3; val_offset:64917*0 + 3*134*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64917*0 + 3*135*FLEN/8, x4, x1, x2)

inst_21640:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9001fff; valaddr_reg:x3; val_offset:64920*0 + 3*135*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64920*0 + 3*136*FLEN/8, x4, x1, x2)

inst_21641:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9003fff; valaddr_reg:x3; val_offset:64923*0 + 3*136*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64923*0 + 3*137*FLEN/8, x4, x1, x2)

inst_21642:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9007fff; valaddr_reg:x3; val_offset:64926*0 + 3*137*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64926*0 + 3*138*FLEN/8, x4, x1, x2)

inst_21643:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf900ffff; valaddr_reg:x3; val_offset:64929*0 + 3*138*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64929*0 + 3*139*FLEN/8, x4, x1, x2)

inst_21644:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf901ffff; valaddr_reg:x3; val_offset:64932*0 + 3*139*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64932*0 + 3*140*FLEN/8, x4, x1, x2)

inst_21645:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf903ffff; valaddr_reg:x3; val_offset:64935*0 + 3*140*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64935*0 + 3*141*FLEN/8, x4, x1, x2)

inst_21646:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf907ffff; valaddr_reg:x3; val_offset:64938*0 + 3*141*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64938*0 + 3*142*FLEN/8, x4, x1, x2)

inst_21647:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf90fffff; valaddr_reg:x3; val_offset:64941*0 + 3*142*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64941*0 + 3*143*FLEN/8, x4, x1, x2)

inst_21648:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf91fffff; valaddr_reg:x3; val_offset:64944*0 + 3*143*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64944*0 + 3*144*FLEN/8, x4, x1, x2)

inst_21649:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf93fffff; valaddr_reg:x3; val_offset:64947*0 + 3*144*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64947*0 + 3*145*FLEN/8, x4, x1, x2)

inst_21650:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9400000; valaddr_reg:x3; val_offset:64950*0 + 3*145*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64950*0 + 3*146*FLEN/8, x4, x1, x2)

inst_21651:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9600000; valaddr_reg:x3; val_offset:64953*0 + 3*146*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64953*0 + 3*147*FLEN/8, x4, x1, x2)

inst_21652:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9700000; valaddr_reg:x3; val_offset:64956*0 + 3*147*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64956*0 + 3*148*FLEN/8, x4, x1, x2)

inst_21653:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf9780000; valaddr_reg:x3; val_offset:64959*0 + 3*148*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64959*0 + 3*149*FLEN/8, x4, x1, x2)

inst_21654:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97c0000; valaddr_reg:x3; val_offset:64962*0 + 3*149*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64962*0 + 3*150*FLEN/8, x4, x1, x2)

inst_21655:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97e0000; valaddr_reg:x3; val_offset:64965*0 + 3*150*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64965*0 + 3*151*FLEN/8, x4, x1, x2)

inst_21656:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97f0000; valaddr_reg:x3; val_offset:64968*0 + 3*151*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64968*0 + 3*152*FLEN/8, x4, x1, x2)

inst_21657:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97f8000; valaddr_reg:x3; val_offset:64971*0 + 3*152*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64971*0 + 3*153*FLEN/8, x4, x1, x2)

inst_21658:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fc000; valaddr_reg:x3; val_offset:64974*0 + 3*153*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64974*0 + 3*154*FLEN/8, x4, x1, x2)

inst_21659:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fe000; valaddr_reg:x3; val_offset:64977*0 + 3*154*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64977*0 + 3*155*FLEN/8, x4, x1, x2)

inst_21660:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ff000; valaddr_reg:x3; val_offset:64980*0 + 3*155*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64980*0 + 3*156*FLEN/8, x4, x1, x2)

inst_21661:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ff800; valaddr_reg:x3; val_offset:64983*0 + 3*156*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64983*0 + 3*157*FLEN/8, x4, x1, x2)

inst_21662:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffc00; valaddr_reg:x3; val_offset:64986*0 + 3*157*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64986*0 + 3*158*FLEN/8, x4, x1, x2)

inst_21663:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffe00; valaddr_reg:x3; val_offset:64989*0 + 3*158*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64989*0 + 3*159*FLEN/8, x4, x1, x2)

inst_21664:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fff00; valaddr_reg:x3; val_offset:64992*0 + 3*159*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64992*0 + 3*160*FLEN/8, x4, x1, x2)

inst_21665:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fff80; valaddr_reg:x3; val_offset:64995*0 + 3*160*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64995*0 + 3*161*FLEN/8, x4, x1, x2)

inst_21666:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fffc0; valaddr_reg:x3; val_offset:64998*0 + 3*161*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64998*0 + 3*162*FLEN/8, x4, x1, x2)

inst_21667:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fffe0; valaddr_reg:x3; val_offset:65001*0 + 3*162*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65001*0 + 3*163*FLEN/8, x4, x1, x2)

inst_21668:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffff0; valaddr_reg:x3; val_offset:65004*0 + 3*163*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65004*0 + 3*164*FLEN/8, x4, x1, x2)

inst_21669:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffff8; valaddr_reg:x3; val_offset:65007*0 + 3*164*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65007*0 + 3*165*FLEN/8, x4, x1, x2)

inst_21670:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffffc; valaddr_reg:x3; val_offset:65010*0 + 3*165*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65010*0 + 3*166*FLEN/8, x4, x1, x2)

inst_21671:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97ffffe; valaddr_reg:x3; val_offset:65013*0 + 3*166*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65013*0 + 3*167*FLEN/8, x4, x1, x2)

inst_21672:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xf97fffff; valaddr_reg:x3; val_offset:65016*0 + 3*167*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65016*0 + 3*168*FLEN/8, x4, x1, x2)

inst_21673:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff000001; valaddr_reg:x3; val_offset:65019*0 + 3*168*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65019*0 + 3*169*FLEN/8, x4, x1, x2)

inst_21674:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff000003; valaddr_reg:x3; val_offset:65022*0 + 3*169*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65022*0 + 3*170*FLEN/8, x4, x1, x2)

inst_21675:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff000007; valaddr_reg:x3; val_offset:65025*0 + 3*170*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65025*0 + 3*171*FLEN/8, x4, x1, x2)

inst_21676:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff199999; valaddr_reg:x3; val_offset:65028*0 + 3*171*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65028*0 + 3*172*FLEN/8, x4, x1, x2)

inst_21677:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff249249; valaddr_reg:x3; val_offset:65031*0 + 3*172*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65031*0 + 3*173*FLEN/8, x4, x1, x2)

inst_21678:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff333333; valaddr_reg:x3; val_offset:65034*0 + 3*173*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65034*0 + 3*174*FLEN/8, x4, x1, x2)

inst_21679:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:65037*0 + 3*174*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65037*0 + 3*175*FLEN/8, x4, x1, x2)

inst_21680:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:65040*0 + 3*175*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65040*0 + 3*176*FLEN/8, x4, x1, x2)

inst_21681:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff444444; valaddr_reg:x3; val_offset:65043*0 + 3*176*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65043*0 + 3*177*FLEN/8, x4, x1, x2)

inst_21682:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:65046*0 + 3*177*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65046*0 + 3*178*FLEN/8, x4, x1, x2)

inst_21683:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:65049*0 + 3*178*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65049*0 + 3*179*FLEN/8, x4, x1, x2)

inst_21684:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff666666; valaddr_reg:x3; val_offset:65052*0 + 3*179*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65052*0 + 3*180*FLEN/8, x4, x1, x2)

inst_21685:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:65055*0 + 3*180*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65055*0 + 3*181*FLEN/8, x4, x1, x2)

inst_21686:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:65058*0 + 3*181*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65058*0 + 3*182*FLEN/8, x4, x1, x2)

inst_21687:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:65061*0 + 3*182*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65061*0 + 3*183*FLEN/8, x4, x1, x2)

inst_21688:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f4533 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12c387 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf4533; op2val:0xc012c387;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:65064*0 + 3*183*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65064*0 + 3*184*FLEN/8, x4, x1, x2)

inst_21689:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74800000; valaddr_reg:x3; val_offset:65067*0 + 3*184*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65067*0 + 3*185*FLEN/8, x4, x1, x2)

inst_21690:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74800001; valaddr_reg:x3; val_offset:65070*0 + 3*185*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65070*0 + 3*186*FLEN/8, x4, x1, x2)

inst_21691:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74800003; valaddr_reg:x3; val_offset:65073*0 + 3*186*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65073*0 + 3*187*FLEN/8, x4, x1, x2)

inst_21692:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74800007; valaddr_reg:x3; val_offset:65076*0 + 3*187*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65076*0 + 3*188*FLEN/8, x4, x1, x2)

inst_21693:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7480000f; valaddr_reg:x3; val_offset:65079*0 + 3*188*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65079*0 + 3*189*FLEN/8, x4, x1, x2)

inst_21694:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7480001f; valaddr_reg:x3; val_offset:65082*0 + 3*189*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65082*0 + 3*190*FLEN/8, x4, x1, x2)

inst_21695:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7480003f; valaddr_reg:x3; val_offset:65085*0 + 3*190*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65085*0 + 3*191*FLEN/8, x4, x1, x2)

inst_21696:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7480007f; valaddr_reg:x3; val_offset:65088*0 + 3*191*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65088*0 + 3*192*FLEN/8, x4, x1, x2)

inst_21697:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x748000ff; valaddr_reg:x3; val_offset:65091*0 + 3*192*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65091*0 + 3*193*FLEN/8, x4, x1, x2)

inst_21698:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x748001ff; valaddr_reg:x3; val_offset:65094*0 + 3*193*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65094*0 + 3*194*FLEN/8, x4, x1, x2)

inst_21699:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x748003ff; valaddr_reg:x3; val_offset:65097*0 + 3*194*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65097*0 + 3*195*FLEN/8, x4, x1, x2)

inst_21700:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x748007ff; valaddr_reg:x3; val_offset:65100*0 + 3*195*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65100*0 + 3*196*FLEN/8, x4, x1, x2)

inst_21701:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74800fff; valaddr_reg:x3; val_offset:65103*0 + 3*196*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65103*0 + 3*197*FLEN/8, x4, x1, x2)

inst_21702:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74801fff; valaddr_reg:x3; val_offset:65106*0 + 3*197*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65106*0 + 3*198*FLEN/8, x4, x1, x2)

inst_21703:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74803fff; valaddr_reg:x3; val_offset:65109*0 + 3*198*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65109*0 + 3*199*FLEN/8, x4, x1, x2)

inst_21704:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74807fff; valaddr_reg:x3; val_offset:65112*0 + 3*199*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65112*0 + 3*200*FLEN/8, x4, x1, x2)

inst_21705:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7480ffff; valaddr_reg:x3; val_offset:65115*0 + 3*200*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65115*0 + 3*201*FLEN/8, x4, x1, x2)

inst_21706:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7481ffff; valaddr_reg:x3; val_offset:65118*0 + 3*201*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65118*0 + 3*202*FLEN/8, x4, x1, x2)

inst_21707:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7483ffff; valaddr_reg:x3; val_offset:65121*0 + 3*202*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65121*0 + 3*203*FLEN/8, x4, x1, x2)

inst_21708:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7487ffff; valaddr_reg:x3; val_offset:65124*0 + 3*203*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65124*0 + 3*204*FLEN/8, x4, x1, x2)

inst_21709:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x748fffff; valaddr_reg:x3; val_offset:65127*0 + 3*204*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65127*0 + 3*205*FLEN/8, x4, x1, x2)

inst_21710:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x749fffff; valaddr_reg:x3; val_offset:65130*0 + 3*205*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65130*0 + 3*206*FLEN/8, x4, x1, x2)

inst_21711:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74bfffff; valaddr_reg:x3; val_offset:65133*0 + 3*206*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65133*0 + 3*207*FLEN/8, x4, x1, x2)

inst_21712:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74c00000; valaddr_reg:x3; val_offset:65136*0 + 3*207*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65136*0 + 3*208*FLEN/8, x4, x1, x2)

inst_21713:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74e00000; valaddr_reg:x3; val_offset:65139*0 + 3*208*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65139*0 + 3*209*FLEN/8, x4, x1, x2)

inst_21714:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74f00000; valaddr_reg:x3; val_offset:65142*0 + 3*209*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65142*0 + 3*210*FLEN/8, x4, x1, x2)

inst_21715:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74f80000; valaddr_reg:x3; val_offset:65145*0 + 3*210*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65145*0 + 3*211*FLEN/8, x4, x1, x2)

inst_21716:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fc0000; valaddr_reg:x3; val_offset:65148*0 + 3*211*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65148*0 + 3*212*FLEN/8, x4, x1, x2)

inst_21717:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fe0000; valaddr_reg:x3; val_offset:65151*0 + 3*212*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65151*0 + 3*213*FLEN/8, x4, x1, x2)

inst_21718:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ff0000; valaddr_reg:x3; val_offset:65154*0 + 3*213*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65154*0 + 3*214*FLEN/8, x4, x1, x2)

inst_21719:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ff8000; valaddr_reg:x3; val_offset:65157*0 + 3*214*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65157*0 + 3*215*FLEN/8, x4, x1, x2)

inst_21720:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffc000; valaddr_reg:x3; val_offset:65160*0 + 3*215*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65160*0 + 3*216*FLEN/8, x4, x1, x2)

inst_21721:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffe000; valaddr_reg:x3; val_offset:65163*0 + 3*216*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65163*0 + 3*217*FLEN/8, x4, x1, x2)

inst_21722:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fff000; valaddr_reg:x3; val_offset:65166*0 + 3*217*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65166*0 + 3*218*FLEN/8, x4, x1, x2)

inst_21723:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fff800; valaddr_reg:x3; val_offset:65169*0 + 3*218*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65169*0 + 3*219*FLEN/8, x4, x1, x2)

inst_21724:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffc00; valaddr_reg:x3; val_offset:65172*0 + 3*219*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65172*0 + 3*220*FLEN/8, x4, x1, x2)

inst_21725:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffe00; valaddr_reg:x3; val_offset:65175*0 + 3*220*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65175*0 + 3*221*FLEN/8, x4, x1, x2)

inst_21726:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffff00; valaddr_reg:x3; val_offset:65178*0 + 3*221*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65178*0 + 3*222*FLEN/8, x4, x1, x2)

inst_21727:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffff80; valaddr_reg:x3; val_offset:65181*0 + 3*222*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65181*0 + 3*223*FLEN/8, x4, x1, x2)

inst_21728:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffffc0; valaddr_reg:x3; val_offset:65184*0 + 3*223*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65184*0 + 3*224*FLEN/8, x4, x1, x2)

inst_21729:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffffe0; valaddr_reg:x3; val_offset:65187*0 + 3*224*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65187*0 + 3*225*FLEN/8, x4, x1, x2)

inst_21730:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffff0; valaddr_reg:x3; val_offset:65190*0 + 3*225*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65190*0 + 3*226*FLEN/8, x4, x1, x2)

inst_21731:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffff8; valaddr_reg:x3; val_offset:65193*0 + 3*226*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65193*0 + 3*227*FLEN/8, x4, x1, x2)

inst_21732:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffffc; valaddr_reg:x3; val_offset:65196*0 + 3*227*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65196*0 + 3*228*FLEN/8, x4, x1, x2)

inst_21733:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74fffffe; valaddr_reg:x3; val_offset:65199*0 + 3*228*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65199*0 + 3*229*FLEN/8, x4, x1, x2)

inst_21734:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x74ffffff; valaddr_reg:x3; val_offset:65202*0 + 3*229*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65202*0 + 3*230*FLEN/8, x4, x1, x2)

inst_21735:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f000001; valaddr_reg:x3; val_offset:65205*0 + 3*230*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65205*0 + 3*231*FLEN/8, x4, x1, x2)

inst_21736:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f000003; valaddr_reg:x3; val_offset:65208*0 + 3*231*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65208*0 + 3*232*FLEN/8, x4, x1, x2)

inst_21737:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f000007; valaddr_reg:x3; val_offset:65211*0 + 3*232*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65211*0 + 3*233*FLEN/8, x4, x1, x2)

inst_21738:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f199999; valaddr_reg:x3; val_offset:65214*0 + 3*233*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65214*0 + 3*234*FLEN/8, x4, x1, x2)

inst_21739:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f249249; valaddr_reg:x3; val_offset:65217*0 + 3*234*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65217*0 + 3*235*FLEN/8, x4, x1, x2)

inst_21740:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f333333; valaddr_reg:x3; val_offset:65220*0 + 3*235*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65220*0 + 3*236*FLEN/8, x4, x1, x2)

inst_21741:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f36db6d; valaddr_reg:x3; val_offset:65223*0 + 3*236*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65223*0 + 3*237*FLEN/8, x4, x1, x2)

inst_21742:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:65226*0 + 3*237*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65226*0 + 3*238*FLEN/8, x4, x1, x2)

inst_21743:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f444444; valaddr_reg:x3; val_offset:65229*0 + 3*238*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65229*0 + 3*239*FLEN/8, x4, x1, x2)

inst_21744:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:65232*0 + 3*239*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65232*0 + 3*240*FLEN/8, x4, x1, x2)

inst_21745:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:65235*0 + 3*240*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65235*0 + 3*241*FLEN/8, x4, x1, x2)

inst_21746:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f666666; valaddr_reg:x3; val_offset:65238*0 + 3*241*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65238*0 + 3*242*FLEN/8, x4, x1, x2)

inst_21747:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f6db6db; valaddr_reg:x3; val_offset:65241*0 + 3*242*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65241*0 + 3*243*FLEN/8, x4, x1, x2)

inst_21748:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:65244*0 + 3*243*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65244*0 + 3*244*FLEN/8, x4, x1, x2)

inst_21749:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:65247*0 + 3*244*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65247*0 + 3*245*FLEN/8, x4, x1, x2)

inst_21750:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x606b9c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1202fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee06b9c; op2val:0x401202fe;
op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:65250*0 + 3*245*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65250*0 + 3*246*FLEN/8, x4, x1, x2)

inst_21751:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbf800001; valaddr_reg:x3; val_offset:65253*0 + 3*246*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65253*0 + 3*247*FLEN/8, x4, x1, x2)

inst_21752:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbf800003; valaddr_reg:x3; val_offset:65256*0 + 3*247*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65256*0 + 3*248*FLEN/8, x4, x1, x2)

inst_21753:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbf800007; valaddr_reg:x3; val_offset:65259*0 + 3*248*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65259*0 + 3*249*FLEN/8, x4, x1, x2)

inst_21754:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbf999999; valaddr_reg:x3; val_offset:65262*0 + 3*249*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65262*0 + 3*250*FLEN/8, x4, x1, x2)

inst_21755:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:65265*0 + 3*250*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65265*0 + 3*251*FLEN/8, x4, x1, x2)

inst_21756:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:65268*0 + 3*251*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65268*0 + 3*252*FLEN/8, x4, x1, x2)

inst_21757:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:65271*0 + 3*252*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65271*0 + 3*253*FLEN/8, x4, x1, x2)

inst_21758:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:65274*0 + 3*253*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65274*0 + 3*254*FLEN/8, x4, x1, x2)

inst_21759:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:65277*0 + 3*254*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65277*0 + 3*255*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_3)

inst_21760:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:65280*0 + 3*256*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65280*0 + 3*256*FLEN/8, x4, x1, x2)

inst_21761:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:65283*0 + 3*257*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65283*0 + 3*257*FLEN/8, x4, x1, x2)

inst_21762:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:65286*0 + 3*258*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65286*0 + 3*258*FLEN/8, x4, x1, x2)

inst_21763:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:65289*0 + 3*259*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65289*0 + 3*259*FLEN/8, x4, x1, x2)

inst_21764:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:65292*0 + 3*260*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65292*0 + 3*260*FLEN/8, x4, x1, x2)

inst_21765:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:65295*0 + 3*261*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65295*0 + 3*261*FLEN/8, x4, x1, x2)

inst_21766:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:65298*0 + 3*262*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65298*0 + 3*262*FLEN/8, x4, x1, x2)

inst_21767:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb800000; valaddr_reg:x3; val_offset:65301*0 + 3*263*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65301*0 + 3*263*FLEN/8, x4, x1, x2)

inst_21768:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb800001; valaddr_reg:x3; val_offset:65304*0 + 3*264*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65304*0 + 3*264*FLEN/8, x4, x1, x2)

inst_21769:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb800003; valaddr_reg:x3; val_offset:65307*0 + 3*265*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65307*0 + 3*265*FLEN/8, x4, x1, x2)

inst_21770:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb800007; valaddr_reg:x3; val_offset:65310*0 + 3*266*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65310*0 + 3*266*FLEN/8, x4, x1, x2)

inst_21771:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb80000f; valaddr_reg:x3; val_offset:65313*0 + 3*267*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65313*0 + 3*267*FLEN/8, x4, x1, x2)

inst_21772:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb80001f; valaddr_reg:x3; val_offset:65316*0 + 3*268*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65316*0 + 3*268*FLEN/8, x4, x1, x2)

inst_21773:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb80003f; valaddr_reg:x3; val_offset:65319*0 + 3*269*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65319*0 + 3*269*FLEN/8, x4, x1, x2)

inst_21774:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb80007f; valaddr_reg:x3; val_offset:65322*0 + 3*270*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65322*0 + 3*270*FLEN/8, x4, x1, x2)

inst_21775:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb8000ff; valaddr_reg:x3; val_offset:65325*0 + 3*271*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65325*0 + 3*271*FLEN/8, x4, x1, x2)

inst_21776:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb8001ff; valaddr_reg:x3; val_offset:65328*0 + 3*272*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65328*0 + 3*272*FLEN/8, x4, x1, x2)

inst_21777:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb8003ff; valaddr_reg:x3; val_offset:65331*0 + 3*273*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65331*0 + 3*273*FLEN/8, x4, x1, x2)

inst_21778:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb8007ff; valaddr_reg:x3; val_offset:65334*0 + 3*274*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65334*0 + 3*274*FLEN/8, x4, x1, x2)

inst_21779:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb800fff; valaddr_reg:x3; val_offset:65337*0 + 3*275*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65337*0 + 3*275*FLEN/8, x4, x1, x2)

inst_21780:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb801fff; valaddr_reg:x3; val_offset:65340*0 + 3*276*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65340*0 + 3*276*FLEN/8, x4, x1, x2)

inst_21781:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb803fff; valaddr_reg:x3; val_offset:65343*0 + 3*277*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65343*0 + 3*277*FLEN/8, x4, x1, x2)

inst_21782:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb807fff; valaddr_reg:x3; val_offset:65346*0 + 3*278*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65346*0 + 3*278*FLEN/8, x4, x1, x2)

inst_21783:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb80ffff; valaddr_reg:x3; val_offset:65349*0 + 3*279*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65349*0 + 3*279*FLEN/8, x4, x1, x2)

inst_21784:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb81ffff; valaddr_reg:x3; val_offset:65352*0 + 3*280*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65352*0 + 3*280*FLEN/8, x4, x1, x2)

inst_21785:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb83ffff; valaddr_reg:x3; val_offset:65355*0 + 3*281*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65355*0 + 3*281*FLEN/8, x4, x1, x2)

inst_21786:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb87ffff; valaddr_reg:x3; val_offset:65358*0 + 3*282*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65358*0 + 3*282*FLEN/8, x4, x1, x2)

inst_21787:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb8fffff; valaddr_reg:x3; val_offset:65361*0 + 3*283*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65361*0 + 3*283*FLEN/8, x4, x1, x2)

inst_21788:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcb9fffff; valaddr_reg:x3; val_offset:65364*0 + 3*284*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65364*0 + 3*284*FLEN/8, x4, x1, x2)

inst_21789:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbbfffff; valaddr_reg:x3; val_offset:65367*0 + 3*285*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65367*0 + 3*285*FLEN/8, x4, x1, x2)

inst_21790:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbc00000; valaddr_reg:x3; val_offset:65370*0 + 3*286*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65370*0 + 3*286*FLEN/8, x4, x1, x2)

inst_21791:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbe00000; valaddr_reg:x3; val_offset:65373*0 + 3*287*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65373*0 + 3*287*FLEN/8, x4, x1, x2)

inst_21792:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbf00000; valaddr_reg:x3; val_offset:65376*0 + 3*288*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65376*0 + 3*288*FLEN/8, x4, x1, x2)

inst_21793:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbf80000; valaddr_reg:x3; val_offset:65379*0 + 3*289*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65379*0 + 3*289*FLEN/8, x4, x1, x2)

inst_21794:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfc0000; valaddr_reg:x3; val_offset:65382*0 + 3*290*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65382*0 + 3*290*FLEN/8, x4, x1, x2)

inst_21795:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfe0000; valaddr_reg:x3; val_offset:65385*0 + 3*291*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65385*0 + 3*291*FLEN/8, x4, x1, x2)

inst_21796:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbff0000; valaddr_reg:x3; val_offset:65388*0 + 3*292*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65388*0 + 3*292*FLEN/8, x4, x1, x2)

inst_21797:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbff8000; valaddr_reg:x3; val_offset:65391*0 + 3*293*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65391*0 + 3*293*FLEN/8, x4, x1, x2)

inst_21798:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffc000; valaddr_reg:x3; val_offset:65394*0 + 3*294*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65394*0 + 3*294*FLEN/8, x4, x1, x2)

inst_21799:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffe000; valaddr_reg:x3; val_offset:65397*0 + 3*295*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65397*0 + 3*295*FLEN/8, x4, x1, x2)

inst_21800:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfff000; valaddr_reg:x3; val_offset:65400*0 + 3*296*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65400*0 + 3*296*FLEN/8, x4, x1, x2)

inst_21801:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfff800; valaddr_reg:x3; val_offset:65403*0 + 3*297*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65403*0 + 3*297*FLEN/8, x4, x1, x2)

inst_21802:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffc00; valaddr_reg:x3; val_offset:65406*0 + 3*298*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65406*0 + 3*298*FLEN/8, x4, x1, x2)

inst_21803:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffe00; valaddr_reg:x3; val_offset:65409*0 + 3*299*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65409*0 + 3*299*FLEN/8, x4, x1, x2)

inst_21804:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffff00; valaddr_reg:x3; val_offset:65412*0 + 3*300*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65412*0 + 3*300*FLEN/8, x4, x1, x2)

inst_21805:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffff80; valaddr_reg:x3; val_offset:65415*0 + 3*301*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65415*0 + 3*301*FLEN/8, x4, x1, x2)

inst_21806:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffffc0; valaddr_reg:x3; val_offset:65418*0 + 3*302*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65418*0 + 3*302*FLEN/8, x4, x1, x2)

inst_21807:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffffe0; valaddr_reg:x3; val_offset:65421*0 + 3*303*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65421*0 + 3*303*FLEN/8, x4, x1, x2)

inst_21808:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffff0; valaddr_reg:x3; val_offset:65424*0 + 3*304*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65424*0 + 3*304*FLEN/8, x4, x1, x2)

inst_21809:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffff8; valaddr_reg:x3; val_offset:65427*0 + 3*305*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65427*0 + 3*305*FLEN/8, x4, x1, x2)

inst_21810:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffffc; valaddr_reg:x3; val_offset:65430*0 + 3*306*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65430*0 + 3*306*FLEN/8, x4, x1, x2)

inst_21811:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbfffffe; valaddr_reg:x3; val_offset:65433*0 + 3*307*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65433*0 + 3*307*FLEN/8, x4, x1, x2)

inst_21812:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x615415 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48b62d and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee15415; op2val:0x8048b62d;
op3val:0xcbffffff; valaddr_reg:x3; val_offset:65436*0 + 3*308*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65436*0 + 3*308*FLEN/8, x4, x1, x2)

inst_21813:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbf800001; valaddr_reg:x3; val_offset:65439*0 + 3*309*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65439*0 + 3*309*FLEN/8, x4, x1, x2)

inst_21814:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbf800003; valaddr_reg:x3; val_offset:65442*0 + 3*310*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65442*0 + 3*310*FLEN/8, x4, x1, x2)

inst_21815:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbf800007; valaddr_reg:x3; val_offset:65445*0 + 3*311*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65445*0 + 3*311*FLEN/8, x4, x1, x2)

inst_21816:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbf999999; valaddr_reg:x3; val_offset:65448*0 + 3*312*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65448*0 + 3*312*FLEN/8, x4, x1, x2)

inst_21817:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:65451*0 + 3*313*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65451*0 + 3*313*FLEN/8, x4, x1, x2)

inst_21818:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:65454*0 + 3*314*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65454*0 + 3*314*FLEN/8, x4, x1, x2)

inst_21819:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:65457*0 + 3*315*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65457*0 + 3*315*FLEN/8, x4, x1, x2)

inst_21820:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:65460*0 + 3*316*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65460*0 + 3*316*FLEN/8, x4, x1, x2)

inst_21821:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:65463*0 + 3*317*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65463*0 + 3*317*FLEN/8, x4, x1, x2)

inst_21822:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:65466*0 + 3*318*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65466*0 + 3*318*FLEN/8, x4, x1, x2)

inst_21823:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:65469*0 + 3*319*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65469*0 + 3*319*FLEN/8, x4, x1, x2)

inst_21824:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:65472*0 + 3*320*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65472*0 + 3*320*FLEN/8, x4, x1, x2)

inst_21825:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:65475*0 + 3*321*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65475*0 + 3*321*FLEN/8, x4, x1, x2)

inst_21826:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:65478*0 + 3*322*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65478*0 + 3*322*FLEN/8, x4, x1, x2)

inst_21827:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:65481*0 + 3*323*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65481*0 + 3*323*FLEN/8, x4, x1, x2)

inst_21828:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:65484*0 + 3*324*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65484*0 + 3*324*FLEN/8, x4, x1, x2)

inst_21829:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1000000; valaddr_reg:x3; val_offset:65487*0 + 3*325*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65487*0 + 3*325*FLEN/8, x4, x1, x2)

inst_21830:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1000001; valaddr_reg:x3; val_offset:65490*0 + 3*326*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65490*0 + 3*326*FLEN/8, x4, x1, x2)

inst_21831:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1000003; valaddr_reg:x3; val_offset:65493*0 + 3*327*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65493*0 + 3*327*FLEN/8, x4, x1, x2)

inst_21832:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1000007; valaddr_reg:x3; val_offset:65496*0 + 3*328*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65496*0 + 3*328*FLEN/8, x4, x1, x2)

inst_21833:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc100000f; valaddr_reg:x3; val_offset:65499*0 + 3*329*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65499*0 + 3*329*FLEN/8, x4, x1, x2)

inst_21834:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc100001f; valaddr_reg:x3; val_offset:65502*0 + 3*330*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65502*0 + 3*330*FLEN/8, x4, x1, x2)

inst_21835:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc100003f; valaddr_reg:x3; val_offset:65505*0 + 3*331*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65505*0 + 3*331*FLEN/8, x4, x1, x2)

inst_21836:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc100007f; valaddr_reg:x3; val_offset:65508*0 + 3*332*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65508*0 + 3*332*FLEN/8, x4, x1, x2)

inst_21837:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc10000ff; valaddr_reg:x3; val_offset:65511*0 + 3*333*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65511*0 + 3*333*FLEN/8, x4, x1, x2)

inst_21838:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc10001ff; valaddr_reg:x3; val_offset:65514*0 + 3*334*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65514*0 + 3*334*FLEN/8, x4, x1, x2)

inst_21839:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc10003ff; valaddr_reg:x3; val_offset:65517*0 + 3*335*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65517*0 + 3*335*FLEN/8, x4, x1, x2)

inst_21840:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc10007ff; valaddr_reg:x3; val_offset:65520*0 + 3*336*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65520*0 + 3*336*FLEN/8, x4, x1, x2)

inst_21841:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1000fff; valaddr_reg:x3; val_offset:65523*0 + 3*337*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65523*0 + 3*337*FLEN/8, x4, x1, x2)

inst_21842:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1001fff; valaddr_reg:x3; val_offset:65526*0 + 3*338*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65526*0 + 3*338*FLEN/8, x4, x1, x2)

inst_21843:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1003fff; valaddr_reg:x3; val_offset:65529*0 + 3*339*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65529*0 + 3*339*FLEN/8, x4, x1, x2)

inst_21844:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1007fff; valaddr_reg:x3; val_offset:65532*0 + 3*340*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65532*0 + 3*340*FLEN/8, x4, x1, x2)

inst_21845:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc100ffff; valaddr_reg:x3; val_offset:65535*0 + 3*341*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65535*0 + 3*341*FLEN/8, x4, x1, x2)

inst_21846:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc101ffff; valaddr_reg:x3; val_offset:65538*0 + 3*342*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65538*0 + 3*342*FLEN/8, x4, x1, x2)

inst_21847:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc103ffff; valaddr_reg:x3; val_offset:65541*0 + 3*343*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65541*0 + 3*343*FLEN/8, x4, x1, x2)

inst_21848:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc107ffff; valaddr_reg:x3; val_offset:65544*0 + 3*344*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65544*0 + 3*344*FLEN/8, x4, x1, x2)

inst_21849:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc10fffff; valaddr_reg:x3; val_offset:65547*0 + 3*345*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65547*0 + 3*345*FLEN/8, x4, x1, x2)

inst_21850:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc11fffff; valaddr_reg:x3; val_offset:65550*0 + 3*346*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65550*0 + 3*346*FLEN/8, x4, x1, x2)

inst_21851:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc13fffff; valaddr_reg:x3; val_offset:65553*0 + 3*347*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65553*0 + 3*347*FLEN/8, x4, x1, x2)

inst_21852:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1400000; valaddr_reg:x3; val_offset:65556*0 + 3*348*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65556*0 + 3*348*FLEN/8, x4, x1, x2)

inst_21853:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1600000; valaddr_reg:x3; val_offset:65559*0 + 3*349*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65559*0 + 3*349*FLEN/8, x4, x1, x2)

inst_21854:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1700000; valaddr_reg:x3; val_offset:65562*0 + 3*350*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65562*0 + 3*350*FLEN/8, x4, x1, x2)

inst_21855:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc1780000; valaddr_reg:x3; val_offset:65565*0 + 3*351*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65565*0 + 3*351*FLEN/8, x4, x1, x2)

inst_21856:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17c0000; valaddr_reg:x3; val_offset:65568*0 + 3*352*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65568*0 + 3*352*FLEN/8, x4, x1, x2)

inst_21857:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17e0000; valaddr_reg:x3; val_offset:65571*0 + 3*353*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65571*0 + 3*353*FLEN/8, x4, x1, x2)

inst_21858:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17f0000; valaddr_reg:x3; val_offset:65574*0 + 3*354*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65574*0 + 3*354*FLEN/8, x4, x1, x2)

inst_21859:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17f8000; valaddr_reg:x3; val_offset:65577*0 + 3*355*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65577*0 + 3*355*FLEN/8, x4, x1, x2)

inst_21860:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fc000; valaddr_reg:x3; val_offset:65580*0 + 3*356*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65580*0 + 3*356*FLEN/8, x4, x1, x2)

inst_21861:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fe000; valaddr_reg:x3; val_offset:65583*0 + 3*357*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65583*0 + 3*357*FLEN/8, x4, x1, x2)

inst_21862:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ff000; valaddr_reg:x3; val_offset:65586*0 + 3*358*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65586*0 + 3*358*FLEN/8, x4, x1, x2)

inst_21863:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ff800; valaddr_reg:x3; val_offset:65589*0 + 3*359*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65589*0 + 3*359*FLEN/8, x4, x1, x2)

inst_21864:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffc00; valaddr_reg:x3; val_offset:65592*0 + 3*360*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65592*0 + 3*360*FLEN/8, x4, x1, x2)

inst_21865:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffe00; valaddr_reg:x3; val_offset:65595*0 + 3*361*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65595*0 + 3*361*FLEN/8, x4, x1, x2)

inst_21866:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fff00; valaddr_reg:x3; val_offset:65598*0 + 3*362*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65598*0 + 3*362*FLEN/8, x4, x1, x2)

inst_21867:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fff80; valaddr_reg:x3; val_offset:65601*0 + 3*363*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65601*0 + 3*363*FLEN/8, x4, x1, x2)

inst_21868:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fffc0; valaddr_reg:x3; val_offset:65604*0 + 3*364*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65604*0 + 3*364*FLEN/8, x4, x1, x2)

inst_21869:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fffe0; valaddr_reg:x3; val_offset:65607*0 + 3*365*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65607*0 + 3*365*FLEN/8, x4, x1, x2)

inst_21870:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffff0; valaddr_reg:x3; val_offset:65610*0 + 3*366*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65610*0 + 3*366*FLEN/8, x4, x1, x2)

inst_21871:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffff8; valaddr_reg:x3; val_offset:65613*0 + 3*367*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65613*0 + 3*367*FLEN/8, x4, x1, x2)

inst_21872:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffffc; valaddr_reg:x3; val_offset:65616*0 + 3*368*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65616*0 + 3*368*FLEN/8, x4, x1, x2)

inst_21873:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17ffffe; valaddr_reg:x3; val_offset:65619*0 + 3*369*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65619*0 + 3*369*FLEN/8, x4, x1, x2)

inst_21874:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61908b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x48a2b0 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1908b; op2val:0x8048a2b0;
op3val:0xc17fffff; valaddr_reg:x3; val_offset:65622*0 + 3*370*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65622*0 + 3*370*FLEN/8, x4, x1, x2)

inst_21875:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2000000; valaddr_reg:x3; val_offset:65625*0 + 3*371*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65625*0 + 3*371*FLEN/8, x4, x1, x2)

inst_21876:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2000001; valaddr_reg:x3; val_offset:65628*0 + 3*372*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65628*0 + 3*372*FLEN/8, x4, x1, x2)

inst_21877:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2000003; valaddr_reg:x3; val_offset:65631*0 + 3*373*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65631*0 + 3*373*FLEN/8, x4, x1, x2)

inst_21878:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2000007; valaddr_reg:x3; val_offset:65634*0 + 3*374*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65634*0 + 3*374*FLEN/8, x4, x1, x2)

inst_21879:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa200000f; valaddr_reg:x3; val_offset:65637*0 + 3*375*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65637*0 + 3*375*FLEN/8, x4, x1, x2)

inst_21880:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa200001f; valaddr_reg:x3; val_offset:65640*0 + 3*376*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65640*0 + 3*376*FLEN/8, x4, x1, x2)

inst_21881:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa200003f; valaddr_reg:x3; val_offset:65643*0 + 3*377*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65643*0 + 3*377*FLEN/8, x4, x1, x2)

inst_21882:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa200007f; valaddr_reg:x3; val_offset:65646*0 + 3*378*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65646*0 + 3*378*FLEN/8, x4, x1, x2)

inst_21883:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa20000ff; valaddr_reg:x3; val_offset:65649*0 + 3*379*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65649*0 + 3*379*FLEN/8, x4, x1, x2)

inst_21884:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa20001ff; valaddr_reg:x3; val_offset:65652*0 + 3*380*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65652*0 + 3*380*FLEN/8, x4, x1, x2)

inst_21885:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa20003ff; valaddr_reg:x3; val_offset:65655*0 + 3*381*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65655*0 + 3*381*FLEN/8, x4, x1, x2)

inst_21886:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa20007ff; valaddr_reg:x3; val_offset:65658*0 + 3*382*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65658*0 + 3*382*FLEN/8, x4, x1, x2)

inst_21887:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2000fff; valaddr_reg:x3; val_offset:65661*0 + 3*383*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65661*0 + 3*383*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_4)

inst_21888:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2001fff; valaddr_reg:x3; val_offset:65664*0 + 3*384*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65664*0 + 3*384*FLEN/8, x4, x1, x2)

inst_21889:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2003fff; valaddr_reg:x3; val_offset:65667*0 + 3*385*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65667*0 + 3*385*FLEN/8, x4, x1, x2)

inst_21890:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2007fff; valaddr_reg:x3; val_offset:65670*0 + 3*386*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65670*0 + 3*386*FLEN/8, x4, x1, x2)

inst_21891:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa200ffff; valaddr_reg:x3; val_offset:65673*0 + 3*387*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65673*0 + 3*387*FLEN/8, x4, x1, x2)

inst_21892:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa201ffff; valaddr_reg:x3; val_offset:65676*0 + 3*388*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65676*0 + 3*388*FLEN/8, x4, x1, x2)

inst_21893:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa203ffff; valaddr_reg:x3; val_offset:65679*0 + 3*389*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65679*0 + 3*389*FLEN/8, x4, x1, x2)

inst_21894:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa207ffff; valaddr_reg:x3; val_offset:65682*0 + 3*390*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65682*0 + 3*390*FLEN/8, x4, x1, x2)

inst_21895:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa20fffff; valaddr_reg:x3; val_offset:65685*0 + 3*391*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65685*0 + 3*391*FLEN/8, x4, x1, x2)

inst_21896:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa21fffff; valaddr_reg:x3; val_offset:65688*0 + 3*392*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65688*0 + 3*392*FLEN/8, x4, x1, x2)

inst_21897:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa23fffff; valaddr_reg:x3; val_offset:65691*0 + 3*393*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65691*0 + 3*393*FLEN/8, x4, x1, x2)

inst_21898:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2400000; valaddr_reg:x3; val_offset:65694*0 + 3*394*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65694*0 + 3*394*FLEN/8, x4, x1, x2)

inst_21899:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2600000; valaddr_reg:x3; val_offset:65697*0 + 3*395*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65697*0 + 3*395*FLEN/8, x4, x1, x2)

inst_21900:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2700000; valaddr_reg:x3; val_offset:65700*0 + 3*396*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65700*0 + 3*396*FLEN/8, x4, x1, x2)

inst_21901:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa2780000; valaddr_reg:x3; val_offset:65703*0 + 3*397*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65703*0 + 3*397*FLEN/8, x4, x1, x2)

inst_21902:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27c0000; valaddr_reg:x3; val_offset:65706*0 + 3*398*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65706*0 + 3*398*FLEN/8, x4, x1, x2)

inst_21903:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27e0000; valaddr_reg:x3; val_offset:65709*0 + 3*399*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65709*0 + 3*399*FLEN/8, x4, x1, x2)

inst_21904:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27f0000; valaddr_reg:x3; val_offset:65712*0 + 3*400*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65712*0 + 3*400*FLEN/8, x4, x1, x2)

inst_21905:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27f8000; valaddr_reg:x3; val_offset:65715*0 + 3*401*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65715*0 + 3*401*FLEN/8, x4, x1, x2)

inst_21906:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fc000; valaddr_reg:x3; val_offset:65718*0 + 3*402*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65718*0 + 3*402*FLEN/8, x4, x1, x2)

inst_21907:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fe000; valaddr_reg:x3; val_offset:65721*0 + 3*403*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65721*0 + 3*403*FLEN/8, x4, x1, x2)

inst_21908:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ff000; valaddr_reg:x3; val_offset:65724*0 + 3*404*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65724*0 + 3*404*FLEN/8, x4, x1, x2)

inst_21909:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ff800; valaddr_reg:x3; val_offset:65727*0 + 3*405*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65727*0 + 3*405*FLEN/8, x4, x1, x2)

inst_21910:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffc00; valaddr_reg:x3; val_offset:65730*0 + 3*406*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65730*0 + 3*406*FLEN/8, x4, x1, x2)

inst_21911:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffe00; valaddr_reg:x3; val_offset:65733*0 + 3*407*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65733*0 + 3*407*FLEN/8, x4, x1, x2)

inst_21912:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fff00; valaddr_reg:x3; val_offset:65736*0 + 3*408*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65736*0 + 3*408*FLEN/8, x4, x1, x2)

inst_21913:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fff80; valaddr_reg:x3; val_offset:65739*0 + 3*409*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65739*0 + 3*409*FLEN/8, x4, x1, x2)

inst_21914:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fffc0; valaddr_reg:x3; val_offset:65742*0 + 3*410*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65742*0 + 3*410*FLEN/8, x4, x1, x2)

inst_21915:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fffe0; valaddr_reg:x3; val_offset:65745*0 + 3*411*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65745*0 + 3*411*FLEN/8, x4, x1, x2)

inst_21916:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffff0; valaddr_reg:x3; val_offset:65748*0 + 3*412*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65748*0 + 3*412*FLEN/8, x4, x1, x2)

inst_21917:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffff8; valaddr_reg:x3; val_offset:65751*0 + 3*413*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65751*0 + 3*413*FLEN/8, x4, x1, x2)

inst_21918:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffffc; valaddr_reg:x3; val_offset:65754*0 + 3*414*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65754*0 + 3*414*FLEN/8, x4, x1, x2)

inst_21919:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27ffffe; valaddr_reg:x3; val_offset:65757*0 + 3*415*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65757*0 + 3*415*FLEN/8, x4, x1, x2)

inst_21920:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xa27fffff; valaddr_reg:x3; val_offset:65760*0 + 3*416*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65760*0 + 3*416*FLEN/8, x4, x1, x2)

inst_21921:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbf800001; valaddr_reg:x3; val_offset:65763*0 + 3*417*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65763*0 + 3*417*FLEN/8, x4, x1, x2)

inst_21922:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbf800003; valaddr_reg:x3; val_offset:65766*0 + 3*418*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65766*0 + 3*418*FLEN/8, x4, x1, x2)

inst_21923:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbf800007; valaddr_reg:x3; val_offset:65769*0 + 3*419*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65769*0 + 3*419*FLEN/8, x4, x1, x2)

inst_21924:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbf999999; valaddr_reg:x3; val_offset:65772*0 + 3*420*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65772*0 + 3*420*FLEN/8, x4, x1, x2)

inst_21925:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:65775*0 + 3*421*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65775*0 + 3*421*FLEN/8, x4, x1, x2)

inst_21926:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:65778*0 + 3*422*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65778*0 + 3*422*FLEN/8, x4, x1, x2)

inst_21927:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:65781*0 + 3*423*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65781*0 + 3*423*FLEN/8, x4, x1, x2)

inst_21928:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:65784*0 + 3*424*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65784*0 + 3*424*FLEN/8, x4, x1, x2)

inst_21929:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:65787*0 + 3*425*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65787*0 + 3*425*FLEN/8, x4, x1, x2)

inst_21930:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:65790*0 + 3*426*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65790*0 + 3*426*FLEN/8, x4, x1, x2)

inst_21931:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:65793*0 + 3*427*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65793*0 + 3*427*FLEN/8, x4, x1, x2)

inst_21932:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:65796*0 + 3*428*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65796*0 + 3*428*FLEN/8, x4, x1, x2)

inst_21933:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:65799*0 + 3*429*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65799*0 + 3*429*FLEN/8, x4, x1, x2)

inst_21934:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:65802*0 + 3*430*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65802*0 + 3*430*FLEN/8, x4, x1, x2)

inst_21935:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:65805*0 + 3*431*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65805*0 + 3*431*FLEN/8, x4, x1, x2)

inst_21936:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62c8c3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x483eb0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2c8c3; op2val:0x80483eb0;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:65808*0 + 3*432*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65808*0 + 3*432*FLEN/8, x4, x1, x2)

inst_21937:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1000000; valaddr_reg:x3; val_offset:65811*0 + 3*433*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65811*0 + 3*433*FLEN/8, x4, x1, x2)

inst_21938:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1000001; valaddr_reg:x3; val_offset:65814*0 + 3*434*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65814*0 + 3*434*FLEN/8, x4, x1, x2)

inst_21939:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1000003; valaddr_reg:x3; val_offset:65817*0 + 3*435*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65817*0 + 3*435*FLEN/8, x4, x1, x2)

inst_21940:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1000007; valaddr_reg:x3; val_offset:65820*0 + 3*436*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65820*0 + 3*436*FLEN/8, x4, x1, x2)

inst_21941:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe100000f; valaddr_reg:x3; val_offset:65823*0 + 3*437*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65823*0 + 3*437*FLEN/8, x4, x1, x2)

inst_21942:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe100001f; valaddr_reg:x3; val_offset:65826*0 + 3*438*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65826*0 + 3*438*FLEN/8, x4, x1, x2)

inst_21943:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe100003f; valaddr_reg:x3; val_offset:65829*0 + 3*439*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65829*0 + 3*439*FLEN/8, x4, x1, x2)

inst_21944:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe100007f; valaddr_reg:x3; val_offset:65832*0 + 3*440*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65832*0 + 3*440*FLEN/8, x4, x1, x2)

inst_21945:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe10000ff; valaddr_reg:x3; val_offset:65835*0 + 3*441*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65835*0 + 3*441*FLEN/8, x4, x1, x2)

inst_21946:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe10001ff; valaddr_reg:x3; val_offset:65838*0 + 3*442*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65838*0 + 3*442*FLEN/8, x4, x1, x2)

inst_21947:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe10003ff; valaddr_reg:x3; val_offset:65841*0 + 3*443*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65841*0 + 3*443*FLEN/8, x4, x1, x2)

inst_21948:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe10007ff; valaddr_reg:x3; val_offset:65844*0 + 3*444*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65844*0 + 3*444*FLEN/8, x4, x1, x2)

inst_21949:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1000fff; valaddr_reg:x3; val_offset:65847*0 + 3*445*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65847*0 + 3*445*FLEN/8, x4, x1, x2)

inst_21950:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1001fff; valaddr_reg:x3; val_offset:65850*0 + 3*446*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65850*0 + 3*446*FLEN/8, x4, x1, x2)

inst_21951:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1003fff; valaddr_reg:x3; val_offset:65853*0 + 3*447*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65853*0 + 3*447*FLEN/8, x4, x1, x2)

inst_21952:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1007fff; valaddr_reg:x3; val_offset:65856*0 + 3*448*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65856*0 + 3*448*FLEN/8, x4, x1, x2)

inst_21953:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe100ffff; valaddr_reg:x3; val_offset:65859*0 + 3*449*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65859*0 + 3*449*FLEN/8, x4, x1, x2)

inst_21954:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe101ffff; valaddr_reg:x3; val_offset:65862*0 + 3*450*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65862*0 + 3*450*FLEN/8, x4, x1, x2)

inst_21955:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe103ffff; valaddr_reg:x3; val_offset:65865*0 + 3*451*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65865*0 + 3*451*FLEN/8, x4, x1, x2)

inst_21956:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe107ffff; valaddr_reg:x3; val_offset:65868*0 + 3*452*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65868*0 + 3*452*FLEN/8, x4, x1, x2)

inst_21957:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe10fffff; valaddr_reg:x3; val_offset:65871*0 + 3*453*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65871*0 + 3*453*FLEN/8, x4, x1, x2)

inst_21958:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe11fffff; valaddr_reg:x3; val_offset:65874*0 + 3*454*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65874*0 + 3*454*FLEN/8, x4, x1, x2)

inst_21959:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe13fffff; valaddr_reg:x3; val_offset:65877*0 + 3*455*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65877*0 + 3*455*FLEN/8, x4, x1, x2)

inst_21960:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1400000; valaddr_reg:x3; val_offset:65880*0 + 3*456*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65880*0 + 3*456*FLEN/8, x4, x1, x2)

inst_21961:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1600000; valaddr_reg:x3; val_offset:65883*0 + 3*457*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65883*0 + 3*457*FLEN/8, x4, x1, x2)

inst_21962:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1700000; valaddr_reg:x3; val_offset:65886*0 + 3*458*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65886*0 + 3*458*FLEN/8, x4, x1, x2)

inst_21963:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe1780000; valaddr_reg:x3; val_offset:65889*0 + 3*459*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65889*0 + 3*459*FLEN/8, x4, x1, x2)

inst_21964:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17c0000; valaddr_reg:x3; val_offset:65892*0 + 3*460*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65892*0 + 3*460*FLEN/8, x4, x1, x2)

inst_21965:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17e0000; valaddr_reg:x3; val_offset:65895*0 + 3*461*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65895*0 + 3*461*FLEN/8, x4, x1, x2)

inst_21966:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17f0000; valaddr_reg:x3; val_offset:65898*0 + 3*462*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65898*0 + 3*462*FLEN/8, x4, x1, x2)

inst_21967:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17f8000; valaddr_reg:x3; val_offset:65901*0 + 3*463*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65901*0 + 3*463*FLEN/8, x4, x1, x2)

inst_21968:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fc000; valaddr_reg:x3; val_offset:65904*0 + 3*464*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65904*0 + 3*464*FLEN/8, x4, x1, x2)

inst_21969:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fe000; valaddr_reg:x3; val_offset:65907*0 + 3*465*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65907*0 + 3*465*FLEN/8, x4, x1, x2)

inst_21970:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ff000; valaddr_reg:x3; val_offset:65910*0 + 3*466*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65910*0 + 3*466*FLEN/8, x4, x1, x2)

inst_21971:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ff800; valaddr_reg:x3; val_offset:65913*0 + 3*467*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65913*0 + 3*467*FLEN/8, x4, x1, x2)

inst_21972:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffc00; valaddr_reg:x3; val_offset:65916*0 + 3*468*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65916*0 + 3*468*FLEN/8, x4, x1, x2)

inst_21973:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffe00; valaddr_reg:x3; val_offset:65919*0 + 3*469*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65919*0 + 3*469*FLEN/8, x4, x1, x2)

inst_21974:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fff00; valaddr_reg:x3; val_offset:65922*0 + 3*470*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65922*0 + 3*470*FLEN/8, x4, x1, x2)

inst_21975:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fff80; valaddr_reg:x3; val_offset:65925*0 + 3*471*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65925*0 + 3*471*FLEN/8, x4, x1, x2)

inst_21976:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fffc0; valaddr_reg:x3; val_offset:65928*0 + 3*472*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65928*0 + 3*472*FLEN/8, x4, x1, x2)

inst_21977:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fffe0; valaddr_reg:x3; val_offset:65931*0 + 3*473*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65931*0 + 3*473*FLEN/8, x4, x1, x2)

inst_21978:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffff0; valaddr_reg:x3; val_offset:65934*0 + 3*474*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65934*0 + 3*474*FLEN/8, x4, x1, x2)

inst_21979:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffff8; valaddr_reg:x3; val_offset:65937*0 + 3*475*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65937*0 + 3*475*FLEN/8, x4, x1, x2)

inst_21980:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffffc; valaddr_reg:x3; val_offset:65940*0 + 3*476*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65940*0 + 3*476*FLEN/8, x4, x1, x2)

inst_21981:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17ffffe; valaddr_reg:x3; val_offset:65943*0 + 3*477*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65943*0 + 3*477*FLEN/8, x4, x1, x2)

inst_21982:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xe17fffff; valaddr_reg:x3; val_offset:65946*0 + 3*478*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65946*0 + 3*478*FLEN/8, x4, x1, x2)

inst_21983:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff000001; valaddr_reg:x3; val_offset:65949*0 + 3*479*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65949*0 + 3*479*FLEN/8, x4, x1, x2)

inst_21984:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff000003; valaddr_reg:x3; val_offset:65952*0 + 3*480*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65952*0 + 3*480*FLEN/8, x4, x1, x2)

inst_21985:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff000007; valaddr_reg:x3; val_offset:65955*0 + 3*481*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65955*0 + 3*481*FLEN/8, x4, x1, x2)

inst_21986:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff199999; valaddr_reg:x3; val_offset:65958*0 + 3*482*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65958*0 + 3*482*FLEN/8, x4, x1, x2)

inst_21987:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff249249; valaddr_reg:x3; val_offset:65961*0 + 3*483*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65961*0 + 3*483*FLEN/8, x4, x1, x2)

inst_21988:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff333333; valaddr_reg:x3; val_offset:65964*0 + 3*484*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65964*0 + 3*484*FLEN/8, x4, x1, x2)

inst_21989:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff36db6d; valaddr_reg:x3; val_offset:65967*0 + 3*485*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65967*0 + 3*485*FLEN/8, x4, x1, x2)

inst_21990:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:65970*0 + 3*486*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65970*0 + 3*486*FLEN/8, x4, x1, x2)

inst_21991:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff444444; valaddr_reg:x3; val_offset:65973*0 + 3*487*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65973*0 + 3*487*FLEN/8, x4, x1, x2)

inst_21992:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff4ccccc; valaddr_reg:x3; val_offset:65976*0 + 3*488*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65976*0 + 3*488*FLEN/8, x4, x1, x2)

inst_21993:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff5b6db6; valaddr_reg:x3; val_offset:65979*0 + 3*489*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65979*0 + 3*489*FLEN/8, x4, x1, x2)

inst_21994:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff666666; valaddr_reg:x3; val_offset:65982*0 + 3*490*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65982*0 + 3*490*FLEN/8, x4, x1, x2)

inst_21995:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff6db6db; valaddr_reg:x3; val_offset:65985*0 + 3*491*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65985*0 + 3*491*FLEN/8, x4, x1, x2)

inst_21996:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff7ffff8; valaddr_reg:x3; val_offset:65988*0 + 3*492*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65988*0 + 3*492*FLEN/8, x4, x1, x2)

inst_21997:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff7ffffc; valaddr_reg:x3; val_offset:65991*0 + 3*493*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65991*0 + 3*493*FLEN/8, x4, x1, x2)

inst_21998:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62cde6 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x107a1a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2cde6; op2val:0xc0107a1a;
op3val:0xff7ffffe; valaddr_reg:x3; val_offset:65994*0 + 3*494*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65994*0 + 3*494*FLEN/8, x4, x1, x2)

inst_21999:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:65997*0 + 3*495*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65997*0 + 3*495*FLEN/8, x4, x1, x2)

inst_22000:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:66000*0 + 3*496*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66000*0 + 3*496*FLEN/8, x4, x1, x2)

inst_22001:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:66003*0 + 3*497*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66003*0 + 3*497*FLEN/8, x4, x1, x2)

inst_22002:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:66006*0 + 3*498*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66006*0 + 3*498*FLEN/8, x4, x1, x2)

inst_22003:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:66009*0 + 3*499*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66009*0 + 3*499*FLEN/8, x4, x1, x2)

inst_22004:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:66012*0 + 3*500*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66012*0 + 3*500*FLEN/8, x4, x1, x2)

inst_22005:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:66015*0 + 3*501*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66015*0 + 3*501*FLEN/8, x4, x1, x2)

inst_22006:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:66018*0 + 3*502*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66018*0 + 3*502*FLEN/8, x4, x1, x2)

inst_22007:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:66021*0 + 3*503*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66021*0 + 3*503*FLEN/8, x4, x1, x2)

inst_22008:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:66024*0 + 3*504*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66024*0 + 3*504*FLEN/8, x4, x1, x2)

inst_22009:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:66027*0 + 3*505*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66027*0 + 3*505*FLEN/8, x4, x1, x2)

inst_22010:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:66030*0 + 3*506*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66030*0 + 3*506*FLEN/8, x4, x1, x2)

inst_22011:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:66033*0 + 3*507*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66033*0 + 3*507*FLEN/8, x4, x1, x2)

inst_22012:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:66036*0 + 3*508*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66036*0 + 3*508*FLEN/8, x4, x1, x2)

inst_22013:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:66039*0 + 3*509*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66039*0 + 3*509*FLEN/8, x4, x1, x2)

inst_22014:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:66042*0 + 3*510*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66042*0 + 3*510*FLEN/8, x4, x1, x2)

inst_22015:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7000000; valaddr_reg:x3; val_offset:66045*0 + 3*511*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66045*0 + 3*511*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_5)

inst_22016:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7000001; valaddr_reg:x3; val_offset:66048*0 + 3*512*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66048*0 + 3*512*FLEN/8, x4, x1, x2)

inst_22017:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7000003; valaddr_reg:x3; val_offset:66051*0 + 3*513*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66051*0 + 3*513*FLEN/8, x4, x1, x2)

inst_22018:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7000007; valaddr_reg:x3; val_offset:66054*0 + 3*514*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66054*0 + 3*514*FLEN/8, x4, x1, x2)

inst_22019:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x700000f; valaddr_reg:x3; val_offset:66057*0 + 3*515*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66057*0 + 3*515*FLEN/8, x4, x1, x2)

inst_22020:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x700001f; valaddr_reg:x3; val_offset:66060*0 + 3*516*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66060*0 + 3*516*FLEN/8, x4, x1, x2)

inst_22021:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x700003f; valaddr_reg:x3; val_offset:66063*0 + 3*517*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66063*0 + 3*517*FLEN/8, x4, x1, x2)

inst_22022:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x700007f; valaddr_reg:x3; val_offset:66066*0 + 3*518*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66066*0 + 3*518*FLEN/8, x4, x1, x2)

inst_22023:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x70000ff; valaddr_reg:x3; val_offset:66069*0 + 3*519*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66069*0 + 3*519*FLEN/8, x4, x1, x2)

inst_22024:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x70001ff; valaddr_reg:x3; val_offset:66072*0 + 3*520*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66072*0 + 3*520*FLEN/8, x4, x1, x2)

inst_22025:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x70003ff; valaddr_reg:x3; val_offset:66075*0 + 3*521*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66075*0 + 3*521*FLEN/8, x4, x1, x2)

inst_22026:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x70007ff; valaddr_reg:x3; val_offset:66078*0 + 3*522*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66078*0 + 3*522*FLEN/8, x4, x1, x2)

inst_22027:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7000fff; valaddr_reg:x3; val_offset:66081*0 + 3*523*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66081*0 + 3*523*FLEN/8, x4, x1, x2)

inst_22028:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7001fff; valaddr_reg:x3; val_offset:66084*0 + 3*524*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66084*0 + 3*524*FLEN/8, x4, x1, x2)

inst_22029:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7003fff; valaddr_reg:x3; val_offset:66087*0 + 3*525*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66087*0 + 3*525*FLEN/8, x4, x1, x2)

inst_22030:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7007fff; valaddr_reg:x3; val_offset:66090*0 + 3*526*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66090*0 + 3*526*FLEN/8, x4, x1, x2)

inst_22031:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x700ffff; valaddr_reg:x3; val_offset:66093*0 + 3*527*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66093*0 + 3*527*FLEN/8, x4, x1, x2)

inst_22032:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x701ffff; valaddr_reg:x3; val_offset:66096*0 + 3*528*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66096*0 + 3*528*FLEN/8, x4, x1, x2)

inst_22033:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x703ffff; valaddr_reg:x3; val_offset:66099*0 + 3*529*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66099*0 + 3*529*FLEN/8, x4, x1, x2)

inst_22034:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x707ffff; valaddr_reg:x3; val_offset:66102*0 + 3*530*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66102*0 + 3*530*FLEN/8, x4, x1, x2)

inst_22035:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x70fffff; valaddr_reg:x3; val_offset:66105*0 + 3*531*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66105*0 + 3*531*FLEN/8, x4, x1, x2)

inst_22036:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x71fffff; valaddr_reg:x3; val_offset:66108*0 + 3*532*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66108*0 + 3*532*FLEN/8, x4, x1, x2)

inst_22037:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x73fffff; valaddr_reg:x3; val_offset:66111*0 + 3*533*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66111*0 + 3*533*FLEN/8, x4, x1, x2)

inst_22038:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7400000; valaddr_reg:x3; val_offset:66114*0 + 3*534*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66114*0 + 3*534*FLEN/8, x4, x1, x2)

inst_22039:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7600000; valaddr_reg:x3; val_offset:66117*0 + 3*535*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66117*0 + 3*535*FLEN/8, x4, x1, x2)

inst_22040:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7700000; valaddr_reg:x3; val_offset:66120*0 + 3*536*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66120*0 + 3*536*FLEN/8, x4, x1, x2)

inst_22041:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x7780000; valaddr_reg:x3; val_offset:66123*0 + 3*537*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66123*0 + 3*537*FLEN/8, x4, x1, x2)

inst_22042:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77c0000; valaddr_reg:x3; val_offset:66126*0 + 3*538*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66126*0 + 3*538*FLEN/8, x4, x1, x2)

inst_22043:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77e0000; valaddr_reg:x3; val_offset:66129*0 + 3*539*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66129*0 + 3*539*FLEN/8, x4, x1, x2)

inst_22044:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77f0000; valaddr_reg:x3; val_offset:66132*0 + 3*540*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66132*0 + 3*540*FLEN/8, x4, x1, x2)

inst_22045:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77f8000; valaddr_reg:x3; val_offset:66135*0 + 3*541*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66135*0 + 3*541*FLEN/8, x4, x1, x2)

inst_22046:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fc000; valaddr_reg:x3; val_offset:66138*0 + 3*542*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66138*0 + 3*542*FLEN/8, x4, x1, x2)

inst_22047:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fe000; valaddr_reg:x3; val_offset:66141*0 + 3*543*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66141*0 + 3*543*FLEN/8, x4, x1, x2)

inst_22048:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ff000; valaddr_reg:x3; val_offset:66144*0 + 3*544*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66144*0 + 3*544*FLEN/8, x4, x1, x2)

inst_22049:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ff800; valaddr_reg:x3; val_offset:66147*0 + 3*545*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66147*0 + 3*545*FLEN/8, x4, x1, x2)

inst_22050:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffc00; valaddr_reg:x3; val_offset:66150*0 + 3*546*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66150*0 + 3*546*FLEN/8, x4, x1, x2)

inst_22051:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffe00; valaddr_reg:x3; val_offset:66153*0 + 3*547*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66153*0 + 3*547*FLEN/8, x4, x1, x2)

inst_22052:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fff00; valaddr_reg:x3; val_offset:66156*0 + 3*548*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66156*0 + 3*548*FLEN/8, x4, x1, x2)

inst_22053:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fff80; valaddr_reg:x3; val_offset:66159*0 + 3*549*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66159*0 + 3*549*FLEN/8, x4, x1, x2)

inst_22054:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fffc0; valaddr_reg:x3; val_offset:66162*0 + 3*550*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66162*0 + 3*550*FLEN/8, x4, x1, x2)

inst_22055:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fffe0; valaddr_reg:x3; val_offset:66165*0 + 3*551*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66165*0 + 3*551*FLEN/8, x4, x1, x2)

inst_22056:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffff0; valaddr_reg:x3; val_offset:66168*0 + 3*552*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66168*0 + 3*552*FLEN/8, x4, x1, x2)

inst_22057:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffff8; valaddr_reg:x3; val_offset:66171*0 + 3*553*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66171*0 + 3*553*FLEN/8, x4, x1, x2)

inst_22058:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffffc; valaddr_reg:x3; val_offset:66174*0 + 3*554*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66174*0 + 3*554*FLEN/8, x4, x1, x2)

inst_22059:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77ffffe; valaddr_reg:x3; val_offset:66177*0 + 3*555*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66177*0 + 3*555*FLEN/8, x4, x1, x2)

inst_22060:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6300be and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee300be; op2val:0x0;
op3val:0x77fffff; valaddr_reg:x3; val_offset:66180*0 + 3*556*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66180*0 + 3*556*FLEN/8, x4, x1, x2)

inst_22061:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8800000; valaddr_reg:x3; val_offset:66183*0 + 3*557*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66183*0 + 3*557*FLEN/8, x4, x1, x2)

inst_22062:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8800001; valaddr_reg:x3; val_offset:66186*0 + 3*558*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66186*0 + 3*558*FLEN/8, x4, x1, x2)

inst_22063:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8800003; valaddr_reg:x3; val_offset:66189*0 + 3*559*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66189*0 + 3*559*FLEN/8, x4, x1, x2)

inst_22064:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8800007; valaddr_reg:x3; val_offset:66192*0 + 3*560*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66192*0 + 3*560*FLEN/8, x4, x1, x2)

inst_22065:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa880000f; valaddr_reg:x3; val_offset:66195*0 + 3*561*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66195*0 + 3*561*FLEN/8, x4, x1, x2)

inst_22066:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa880001f; valaddr_reg:x3; val_offset:66198*0 + 3*562*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66198*0 + 3*562*FLEN/8, x4, x1, x2)

inst_22067:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa880003f; valaddr_reg:x3; val_offset:66201*0 + 3*563*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66201*0 + 3*563*FLEN/8, x4, x1, x2)

inst_22068:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa880007f; valaddr_reg:x3; val_offset:66204*0 + 3*564*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66204*0 + 3*564*FLEN/8, x4, x1, x2)

inst_22069:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa88000ff; valaddr_reg:x3; val_offset:66207*0 + 3*565*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66207*0 + 3*565*FLEN/8, x4, x1, x2)

inst_22070:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa88001ff; valaddr_reg:x3; val_offset:66210*0 + 3*566*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66210*0 + 3*566*FLEN/8, x4, x1, x2)

inst_22071:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa88003ff; valaddr_reg:x3; val_offset:66213*0 + 3*567*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66213*0 + 3*567*FLEN/8, x4, x1, x2)

inst_22072:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa88007ff; valaddr_reg:x3; val_offset:66216*0 + 3*568*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66216*0 + 3*568*FLEN/8, x4, x1, x2)

inst_22073:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8800fff; valaddr_reg:x3; val_offset:66219*0 + 3*569*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66219*0 + 3*569*FLEN/8, x4, x1, x2)

inst_22074:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8801fff; valaddr_reg:x3; val_offset:66222*0 + 3*570*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66222*0 + 3*570*FLEN/8, x4, x1, x2)

inst_22075:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8803fff; valaddr_reg:x3; val_offset:66225*0 + 3*571*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66225*0 + 3*571*FLEN/8, x4, x1, x2)

inst_22076:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8807fff; valaddr_reg:x3; val_offset:66228*0 + 3*572*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66228*0 + 3*572*FLEN/8, x4, x1, x2)

inst_22077:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa880ffff; valaddr_reg:x3; val_offset:66231*0 + 3*573*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66231*0 + 3*573*FLEN/8, x4, x1, x2)

inst_22078:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa881ffff; valaddr_reg:x3; val_offset:66234*0 + 3*574*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66234*0 + 3*574*FLEN/8, x4, x1, x2)

inst_22079:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa883ffff; valaddr_reg:x3; val_offset:66237*0 + 3*575*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66237*0 + 3*575*FLEN/8, x4, x1, x2)

inst_22080:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa887ffff; valaddr_reg:x3; val_offset:66240*0 + 3*576*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66240*0 + 3*576*FLEN/8, x4, x1, x2)

inst_22081:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa88fffff; valaddr_reg:x3; val_offset:66243*0 + 3*577*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66243*0 + 3*577*FLEN/8, x4, x1, x2)

inst_22082:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa89fffff; valaddr_reg:x3; val_offset:66246*0 + 3*578*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66246*0 + 3*578*FLEN/8, x4, x1, x2)

inst_22083:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8bfffff; valaddr_reg:x3; val_offset:66249*0 + 3*579*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66249*0 + 3*579*FLEN/8, x4, x1, x2)

inst_22084:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8c00000; valaddr_reg:x3; val_offset:66252*0 + 3*580*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66252*0 + 3*580*FLEN/8, x4, x1, x2)

inst_22085:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8e00000; valaddr_reg:x3; val_offset:66255*0 + 3*581*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66255*0 + 3*581*FLEN/8, x4, x1, x2)

inst_22086:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8f00000; valaddr_reg:x3; val_offset:66258*0 + 3*582*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66258*0 + 3*582*FLEN/8, x4, x1, x2)

inst_22087:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8f80000; valaddr_reg:x3; val_offset:66261*0 + 3*583*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66261*0 + 3*583*FLEN/8, x4, x1, x2)

inst_22088:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fc0000; valaddr_reg:x3; val_offset:66264*0 + 3*584*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66264*0 + 3*584*FLEN/8, x4, x1, x2)

inst_22089:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fe0000; valaddr_reg:x3; val_offset:66267*0 + 3*585*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66267*0 + 3*585*FLEN/8, x4, x1, x2)

inst_22090:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ff0000; valaddr_reg:x3; val_offset:66270*0 + 3*586*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66270*0 + 3*586*FLEN/8, x4, x1, x2)

inst_22091:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ff8000; valaddr_reg:x3; val_offset:66273*0 + 3*587*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66273*0 + 3*587*FLEN/8, x4, x1, x2)

inst_22092:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffc000; valaddr_reg:x3; val_offset:66276*0 + 3*588*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66276*0 + 3*588*FLEN/8, x4, x1, x2)

inst_22093:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffe000; valaddr_reg:x3; val_offset:66279*0 + 3*589*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66279*0 + 3*589*FLEN/8, x4, x1, x2)

inst_22094:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fff000; valaddr_reg:x3; val_offset:66282*0 + 3*590*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66282*0 + 3*590*FLEN/8, x4, x1, x2)

inst_22095:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fff800; valaddr_reg:x3; val_offset:66285*0 + 3*591*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66285*0 + 3*591*FLEN/8, x4, x1, x2)

inst_22096:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffc00; valaddr_reg:x3; val_offset:66288*0 + 3*592*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66288*0 + 3*592*FLEN/8, x4, x1, x2)

inst_22097:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffe00; valaddr_reg:x3; val_offset:66291*0 + 3*593*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66291*0 + 3*593*FLEN/8, x4, x1, x2)

inst_22098:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffff00; valaddr_reg:x3; val_offset:66294*0 + 3*594*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66294*0 + 3*594*FLEN/8, x4, x1, x2)

inst_22099:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffff80; valaddr_reg:x3; val_offset:66297*0 + 3*595*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66297*0 + 3*595*FLEN/8, x4, x1, x2)

inst_22100:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffffc0; valaddr_reg:x3; val_offset:66300*0 + 3*596*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66300*0 + 3*596*FLEN/8, x4, x1, x2)

inst_22101:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffffe0; valaddr_reg:x3; val_offset:66303*0 + 3*597*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66303*0 + 3*597*FLEN/8, x4, x1, x2)

inst_22102:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffff0; valaddr_reg:x3; val_offset:66306*0 + 3*598*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66306*0 + 3*598*FLEN/8, x4, x1, x2)

inst_22103:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffff8; valaddr_reg:x3; val_offset:66309*0 + 3*599*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66309*0 + 3*599*FLEN/8, x4, x1, x2)

inst_22104:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffffc; valaddr_reg:x3; val_offset:66312*0 + 3*600*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66312*0 + 3*600*FLEN/8, x4, x1, x2)

inst_22105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8fffffe; valaddr_reg:x3; val_offset:66315*0 + 3*601*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66315*0 + 3*601*FLEN/8, x4, x1, x2)

inst_22106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xa8ffffff; valaddr_reg:x3; val_offset:66318*0 + 3*602*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66318*0 + 3*602*FLEN/8, x4, x1, x2)

inst_22107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbf800001; valaddr_reg:x3; val_offset:66321*0 + 3*603*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66321*0 + 3*603*FLEN/8, x4, x1, x2)

inst_22108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbf800003; valaddr_reg:x3; val_offset:66324*0 + 3*604*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66324*0 + 3*604*FLEN/8, x4, x1, x2)

inst_22109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbf800007; valaddr_reg:x3; val_offset:66327*0 + 3*605*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66327*0 + 3*605*FLEN/8, x4, x1, x2)

inst_22110:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbf999999; valaddr_reg:x3; val_offset:66330*0 + 3*606*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66330*0 + 3*606*FLEN/8, x4, x1, x2)

inst_22111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfa49249; valaddr_reg:x3; val_offset:66333*0 + 3*607*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66333*0 + 3*607*FLEN/8, x4, x1, x2)

inst_22112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfb33333; valaddr_reg:x3; val_offset:66336*0 + 3*608*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66336*0 + 3*608*FLEN/8, x4, x1, x2)

inst_22113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:66339*0 + 3*609*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66339*0 + 3*609*FLEN/8, x4, x1, x2)

inst_22114:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:66342*0 + 3*610*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66342*0 + 3*610*FLEN/8, x4, x1, x2)

inst_22115:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfc44444; valaddr_reg:x3; val_offset:66345*0 + 3*611*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66345*0 + 3*611*FLEN/8, x4, x1, x2)

inst_22116:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfcccccc; valaddr_reg:x3; val_offset:66348*0 + 3*612*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66348*0 + 3*612*FLEN/8, x4, x1, x2)

inst_22117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:66351*0 + 3*613*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66351*0 + 3*613*FLEN/8, x4, x1, x2)

inst_22118:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfe66666; valaddr_reg:x3; val_offset:66354*0 + 3*614*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66354*0 + 3*614*FLEN/8, x4, x1, x2)

inst_22119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbfedb6db; valaddr_reg:x3; val_offset:66357*0 + 3*615*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66357*0 + 3*615*FLEN/8, x4, x1, x2)

inst_22120:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbffffff8; valaddr_reg:x3; val_offset:66360*0 + 3*616*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66360*0 + 3*616*FLEN/8, x4, x1, x2)

inst_22121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbffffffc; valaddr_reg:x3; val_offset:66363*0 + 3*617*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66363*0 + 3*617*FLEN/8, x4, x1, x2)

inst_22122:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6319e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4824e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee319e6; op2val:0x804824e1;
op3val:0xbffffffe; valaddr_reg:x3; val_offset:66366*0 + 3*618*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66366*0 + 3*618*FLEN/8, x4, x1, x2)

inst_22123:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x800001; valaddr_reg:x3; val_offset:66369*0 + 3*619*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66369*0 + 3*619*FLEN/8, x4, x1, x2)

inst_22124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x800003; valaddr_reg:x3; val_offset:66372*0 + 3*620*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66372*0 + 3*620*FLEN/8, x4, x1, x2)

inst_22125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x800007; valaddr_reg:x3; val_offset:66375*0 + 3*621*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66375*0 + 3*621*FLEN/8, x4, x1, x2)

inst_22126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x999999; valaddr_reg:x3; val_offset:66378*0 + 3*622*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66378*0 + 3*622*FLEN/8, x4, x1, x2)

inst_22127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xa49249; valaddr_reg:x3; val_offset:66381*0 + 3*623*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66381*0 + 3*623*FLEN/8, x4, x1, x2)

inst_22128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xb33333; valaddr_reg:x3; val_offset:66384*0 + 3*624*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66384*0 + 3*624*FLEN/8, x4, x1, x2)

inst_22129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xb6db6d; valaddr_reg:x3; val_offset:66387*0 + 3*625*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66387*0 + 3*625*FLEN/8, x4, x1, x2)

inst_22130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xbbbbbb; valaddr_reg:x3; val_offset:66390*0 + 3*626*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66390*0 + 3*626*FLEN/8, x4, x1, x2)

inst_22131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xc44444; valaddr_reg:x3; val_offset:66393*0 + 3*627*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66393*0 + 3*627*FLEN/8, x4, x1, x2)

inst_22132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xcccccc; valaddr_reg:x3; val_offset:66396*0 + 3*628*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66396*0 + 3*628*FLEN/8, x4, x1, x2)

inst_22133:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xdb6db6; valaddr_reg:x3; val_offset:66399*0 + 3*629*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66399*0 + 3*629*FLEN/8, x4, x1, x2)

inst_22134:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xe66666; valaddr_reg:x3; val_offset:66402*0 + 3*630*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66402*0 + 3*630*FLEN/8, x4, x1, x2)

inst_22135:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xedb6db; valaddr_reg:x3; val_offset:66405*0 + 3*631*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66405*0 + 3*631*FLEN/8, x4, x1, x2)

inst_22136:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xfffff8; valaddr_reg:x3; val_offset:66408*0 + 3*632*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66408*0 + 3*632*FLEN/8, x4, x1, x2)

inst_22137:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xfffffc; valaddr_reg:x3; val_offset:66411*0 + 3*633*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66411*0 + 3*633*FLEN/8, x4, x1, x2)

inst_22138:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0xfffffe; valaddr_reg:x3; val_offset:66414*0 + 3*634*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66414*0 + 3*634*FLEN/8, x4, x1, x2)

inst_22139:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c000000; valaddr_reg:x3; val_offset:66417*0 + 3*635*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66417*0 + 3*635*FLEN/8, x4, x1, x2)

inst_22140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c000001; valaddr_reg:x3; val_offset:66420*0 + 3*636*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66420*0 + 3*636*FLEN/8, x4, x1, x2)

inst_22141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c000003; valaddr_reg:x3; val_offset:66423*0 + 3*637*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66423*0 + 3*637*FLEN/8, x4, x1, x2)

inst_22142:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c000007; valaddr_reg:x3; val_offset:66426*0 + 3*638*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66426*0 + 3*638*FLEN/8, x4, x1, x2)

inst_22143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c00000f; valaddr_reg:x3; val_offset:66429*0 + 3*639*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66429*0 + 3*639*FLEN/8, x4, x1, x2)
RVTEST_SIGBASE(x1,signature_x1_6)

inst_22144:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c00001f; valaddr_reg:x3; val_offset:66432*0 + 3*640*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66432*0 + 3*640*FLEN/8, x4, x1, x2)

inst_22145:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c00003f; valaddr_reg:x3; val_offset:66435*0 + 3*641*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66435*0 + 3*641*FLEN/8, x4, x1, x2)

inst_22146:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c00007f; valaddr_reg:x3; val_offset:66438*0 + 3*642*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66438*0 + 3*642*FLEN/8, x4, x1, x2)

inst_22147:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c0000ff; valaddr_reg:x3; val_offset:66441*0 + 3*643*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66441*0 + 3*643*FLEN/8, x4, x1, x2)

inst_22148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c0001ff; valaddr_reg:x3; val_offset:66444*0 + 3*644*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66444*0 + 3*644*FLEN/8, x4, x1, x2)

inst_22149:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c0003ff; valaddr_reg:x3; val_offset:66447*0 + 3*645*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66447*0 + 3*645*FLEN/8, x4, x1, x2)

inst_22150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c0007ff; valaddr_reg:x3; val_offset:66450*0 + 3*646*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66450*0 + 3*646*FLEN/8, x4, x1, x2)

inst_22151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c000fff; valaddr_reg:x3; val_offset:66453*0 + 3*647*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66453*0 + 3*647*FLEN/8, x4, x1, x2)

inst_22152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c001fff; valaddr_reg:x3; val_offset:66456*0 + 3*648*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66456*0 + 3*648*FLEN/8, x4, x1, x2)

inst_22153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c003fff; valaddr_reg:x3; val_offset:66459*0 + 3*649*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66459*0 + 3*649*FLEN/8, x4, x1, x2)

inst_22154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c007fff; valaddr_reg:x3; val_offset:66462*0 + 3*650*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66462*0 + 3*650*FLEN/8, x4, x1, x2)

inst_22155:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c00ffff; valaddr_reg:x3; val_offset:66465*0 + 3*651*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66465*0 + 3*651*FLEN/8, x4, x1, x2)

inst_22156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c01ffff; valaddr_reg:x3; val_offset:66468*0 + 3*652*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66468*0 + 3*652*FLEN/8, x4, x1, x2)

inst_22157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c03ffff; valaddr_reg:x3; val_offset:66471*0 + 3*653*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66471*0 + 3*653*FLEN/8, x4, x1, x2)

inst_22158:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c07ffff; valaddr_reg:x3; val_offset:66474*0 + 3*654*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66474*0 + 3*654*FLEN/8, x4, x1, x2)

inst_22159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c0fffff; valaddr_reg:x3; val_offset:66477*0 + 3*655*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66477*0 + 3*655*FLEN/8, x4, x1, x2)

inst_22160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c1fffff; valaddr_reg:x3; val_offset:66480*0 + 3*656*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66480*0 + 3*656*FLEN/8, x4, x1, x2)

inst_22161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c3fffff; valaddr_reg:x3; val_offset:66483*0 + 3*657*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66483*0 + 3*657*FLEN/8, x4, x1, x2)

inst_22162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c400000; valaddr_reg:x3; val_offset:66486*0 + 3*658*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66486*0 + 3*658*FLEN/8, x4, x1, x2)

inst_22163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c600000; valaddr_reg:x3; val_offset:66489*0 + 3*659*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66489*0 + 3*659*FLEN/8, x4, x1, x2)

inst_22164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c700000; valaddr_reg:x3; val_offset:66492*0 + 3*660*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66492*0 + 3*660*FLEN/8, x4, x1, x2)

inst_22165:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c780000; valaddr_reg:x3; val_offset:66495*0 + 3*661*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66495*0 + 3*661*FLEN/8, x4, x1, x2)

inst_22166:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7c0000; valaddr_reg:x3; val_offset:66498*0 + 3*662*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66498*0 + 3*662*FLEN/8, x4, x1, x2)

inst_22167:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7e0000; valaddr_reg:x3; val_offset:66501*0 + 3*663*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66501*0 + 3*663*FLEN/8, x4, x1, x2)

inst_22168:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7f0000; valaddr_reg:x3; val_offset:66504*0 + 3*664*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66504*0 + 3*664*FLEN/8, x4, x1, x2)

inst_22169:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7f8000; valaddr_reg:x3; val_offset:66507*0 + 3*665*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66507*0 + 3*665*FLEN/8, x4, x1, x2)

inst_22170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fc000; valaddr_reg:x3; val_offset:66510*0 + 3*666*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66510*0 + 3*666*FLEN/8, x4, x1, x2)

inst_22171:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fe000; valaddr_reg:x3; val_offset:66513*0 + 3*667*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66513*0 + 3*667*FLEN/8, x4, x1, x2)

inst_22172:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ff000; valaddr_reg:x3; val_offset:66516*0 + 3*668*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66516*0 + 3*668*FLEN/8, x4, x1, x2)

inst_22173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ff800; valaddr_reg:x3; val_offset:66519*0 + 3*669*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66519*0 + 3*669*FLEN/8, x4, x1, x2)

inst_22174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffc00; valaddr_reg:x3; val_offset:66522*0 + 3*670*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66522*0 + 3*670*FLEN/8, x4, x1, x2)

inst_22175:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffe00; valaddr_reg:x3; val_offset:66525*0 + 3*671*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66525*0 + 3*671*FLEN/8, x4, x1, x2)

inst_22176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fff00; valaddr_reg:x3; val_offset:66528*0 + 3*672*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66528*0 + 3*672*FLEN/8, x4, x1, x2)

inst_22177:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fff80; valaddr_reg:x3; val_offset:66531*0 + 3*673*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66531*0 + 3*673*FLEN/8, x4, x1, x2)

inst_22178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fffc0; valaddr_reg:x3; val_offset:66534*0 + 3*674*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66534*0 + 3*674*FLEN/8, x4, x1, x2)

inst_22179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fffe0; valaddr_reg:x3; val_offset:66537*0 + 3*675*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66537*0 + 3*675*FLEN/8, x4, x1, x2)

inst_22180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffff0; valaddr_reg:x3; val_offset:66540*0 + 3*676*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66540*0 + 3*676*FLEN/8, x4, x1, x2)

inst_22181:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffff8; valaddr_reg:x3; val_offset:66543*0 + 3*677*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66543*0 + 3*677*FLEN/8, x4, x1, x2)

inst_22182:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffffc; valaddr_reg:x3; val_offset:66546*0 + 3*678*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66546*0 + 3*678*FLEN/8, x4, x1, x2)

inst_22183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7ffffe; valaddr_reg:x3; val_offset:66549*0 + 3*679*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66549*0 + 3*679*FLEN/8, x4, x1, x2)

inst_22184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64515f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4515f; op2val:0x0;
op3val:0x4c7fffff; valaddr_reg:x3; val_offset:66552*0 + 3*680*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66552*0 + 3*680*FLEN/8, x4, x1, x2)

inst_22185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x1; valaddr_reg:x3; val_offset:66555*0 + 3*681*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66555*0 + 3*681*FLEN/8, x4, x1, x2)

inst_22186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x3; valaddr_reg:x3; val_offset:66558*0 + 3*682*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66558*0 + 3*682*FLEN/8, x4, x1, x2)

inst_22187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x7; valaddr_reg:x3; val_offset:66561*0 + 3*683*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66561*0 + 3*683*FLEN/8, x4, x1, x2)

inst_22188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x199999; valaddr_reg:x3; val_offset:66564*0 + 3*684*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66564*0 + 3*684*FLEN/8, x4, x1, x2)

inst_22189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x249249; valaddr_reg:x3; val_offset:66567*0 + 3*685*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66567*0 + 3*685*FLEN/8, x4, x1, x2)

inst_22190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x333333; valaddr_reg:x3; val_offset:66570*0 + 3*686*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66570*0 + 3*686*FLEN/8, x4, x1, x2)

inst_22191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x36db6d; valaddr_reg:x3; val_offset:66573*0 + 3*687*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66573*0 + 3*687*FLEN/8, x4, x1, x2)

inst_22192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x3bbbbb; valaddr_reg:x3; val_offset:66576*0 + 3*688*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66576*0 + 3*688*FLEN/8, x4, x1, x2)

inst_22193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x444444; valaddr_reg:x3; val_offset:66579*0 + 3*689*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66579*0 + 3*689*FLEN/8, x4, x1, x2)

inst_22194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4ccccc; valaddr_reg:x3; val_offset:66582*0 + 3*690*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66582*0 + 3*690*FLEN/8, x4, x1, x2)

inst_22195:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x5b6db6; valaddr_reg:x3; val_offset:66585*0 + 3*691*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66585*0 + 3*691*FLEN/8, x4, x1, x2)

inst_22196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x666666; valaddr_reg:x3; val_offset:66588*0 + 3*692*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66588*0 + 3*692*FLEN/8, x4, x1, x2)

inst_22197:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x6db6db; valaddr_reg:x3; val_offset:66591*0 + 3*693*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66591*0 + 3*693*FLEN/8, x4, x1, x2)

inst_22198:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x7ffff8; valaddr_reg:x3; val_offset:66594*0 + 3*694*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66594*0 + 3*694*FLEN/8, x4, x1, x2)

inst_22199:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x7ffffc; valaddr_reg:x3; val_offset:66597*0 + 3*695*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66597*0 + 3*695*FLEN/8, x4, x1, x2)

inst_22200:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x7ffffe; valaddr_reg:x3; val_offset:66600*0 + 3*696*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66600*0 + 3*696*FLEN/8, x4, x1, x2)

inst_22201:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4000000; valaddr_reg:x3; val_offset:66603*0 + 3*697*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66603*0 + 3*697*FLEN/8, x4, x1, x2)

inst_22202:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4000001; valaddr_reg:x3; val_offset:66606*0 + 3*698*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66606*0 + 3*698*FLEN/8, x4, x1, x2)

inst_22203:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4000003; valaddr_reg:x3; val_offset:66609*0 + 3*699*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66609*0 + 3*699*FLEN/8, x4, x1, x2)

inst_22204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4000007; valaddr_reg:x3; val_offset:66612*0 + 3*700*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66612*0 + 3*700*FLEN/8, x4, x1, x2)

inst_22205:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x400000f; valaddr_reg:x3; val_offset:66615*0 + 3*701*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66615*0 + 3*701*FLEN/8, x4, x1, x2)

inst_22206:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x400001f; valaddr_reg:x3; val_offset:66618*0 + 3*702*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66618*0 + 3*702*FLEN/8, x4, x1, x2)

inst_22207:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x400003f; valaddr_reg:x3; val_offset:66621*0 + 3*703*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66621*0 + 3*703*FLEN/8, x4, x1, x2)

inst_22208:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x400007f; valaddr_reg:x3; val_offset:66624*0 + 3*704*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66624*0 + 3*704*FLEN/8, x4, x1, x2)

inst_22209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x40000ff; valaddr_reg:x3; val_offset:66627*0 + 3*705*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66627*0 + 3*705*FLEN/8, x4, x1, x2)

inst_22210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x40001ff; valaddr_reg:x3; val_offset:66630*0 + 3*706*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66630*0 + 3*706*FLEN/8, x4, x1, x2)

inst_22211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x40003ff; valaddr_reg:x3; val_offset:66633*0 + 3*707*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66633*0 + 3*707*FLEN/8, x4, x1, x2)

inst_22212:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x40007ff; valaddr_reg:x3; val_offset:66636*0 + 3*708*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66636*0 + 3*708*FLEN/8, x4, x1, x2)

inst_22213:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4000fff; valaddr_reg:x3; val_offset:66639*0 + 3*709*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66639*0 + 3*709*FLEN/8, x4, x1, x2)

inst_22214:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4001fff; valaddr_reg:x3; val_offset:66642*0 + 3*710*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66642*0 + 3*710*FLEN/8, x4, x1, x2)

inst_22215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4003fff; valaddr_reg:x3; val_offset:66645*0 + 3*711*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66645*0 + 3*711*FLEN/8, x4, x1, x2)

inst_22216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4007fff; valaddr_reg:x3; val_offset:66648*0 + 3*712*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66648*0 + 3*712*FLEN/8, x4, x1, x2)

inst_22217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x400ffff; valaddr_reg:x3; val_offset:66651*0 + 3*713*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66651*0 + 3*713*FLEN/8, x4, x1, x2)

inst_22218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x401ffff; valaddr_reg:x3; val_offset:66654*0 + 3*714*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66654*0 + 3*714*FLEN/8, x4, x1, x2)

inst_22219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x403ffff; valaddr_reg:x3; val_offset:66657*0 + 3*715*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66657*0 + 3*715*FLEN/8, x4, x1, x2)

inst_22220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x407ffff; valaddr_reg:x3; val_offset:66660*0 + 3*716*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66660*0 + 3*716*FLEN/8, x4, x1, x2)

inst_22221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x40fffff; valaddr_reg:x3; val_offset:66663*0 + 3*717*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66663*0 + 3*717*FLEN/8, x4, x1, x2)

inst_22222:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x41fffff; valaddr_reg:x3; val_offset:66666*0 + 3*718*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66666*0 + 3*718*FLEN/8, x4, x1, x2)

inst_22223:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x43fffff; valaddr_reg:x3; val_offset:66669*0 + 3*719*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66669*0 + 3*719*FLEN/8, x4, x1, x2)

inst_22224:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4400000; valaddr_reg:x3; val_offset:66672*0 + 3*720*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66672*0 + 3*720*FLEN/8, x4, x1, x2)

inst_22225:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4600000; valaddr_reg:x3; val_offset:66675*0 + 3*721*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66675*0 + 3*721*FLEN/8, x4, x1, x2)

inst_22226:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4700000; valaddr_reg:x3; val_offset:66678*0 + 3*722*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66678*0 + 3*722*FLEN/8, x4, x1, x2)

inst_22227:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x4780000; valaddr_reg:x3; val_offset:66681*0 + 3*723*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66681*0 + 3*723*FLEN/8, x4, x1, x2)

inst_22228:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47c0000; valaddr_reg:x3; val_offset:66684*0 + 3*724*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66684*0 + 3*724*FLEN/8, x4, x1, x2)

inst_22229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47e0000; valaddr_reg:x3; val_offset:66687*0 + 3*725*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66687*0 + 3*725*FLEN/8, x4, x1, x2)

inst_22230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47f0000; valaddr_reg:x3; val_offset:66690*0 + 3*726*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66690*0 + 3*726*FLEN/8, x4, x1, x2)

inst_22231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47f8000; valaddr_reg:x3; val_offset:66693*0 + 3*727*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66693*0 + 3*727*FLEN/8, x4, x1, x2)

inst_22232:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fc000; valaddr_reg:x3; val_offset:66696*0 + 3*728*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66696*0 + 3*728*FLEN/8, x4, x1, x2)

inst_22233:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fe000; valaddr_reg:x3; val_offset:66699*0 + 3*729*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66699*0 + 3*729*FLEN/8, x4, x1, x2)

inst_22234:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ff000; valaddr_reg:x3; val_offset:66702*0 + 3*730*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66702*0 + 3*730*FLEN/8, x4, x1, x2)

inst_22235:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ff800; valaddr_reg:x3; val_offset:66705*0 + 3*731*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66705*0 + 3*731*FLEN/8, x4, x1, x2)

inst_22236:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffc00; valaddr_reg:x3; val_offset:66708*0 + 3*732*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66708*0 + 3*732*FLEN/8, x4, x1, x2)

inst_22237:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffe00; valaddr_reg:x3; val_offset:66711*0 + 3*733*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66711*0 + 3*733*FLEN/8, x4, x1, x2)

inst_22238:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fff00; valaddr_reg:x3; val_offset:66714*0 + 3*734*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66714*0 + 3*734*FLEN/8, x4, x1, x2)

inst_22239:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fff80; valaddr_reg:x3; val_offset:66717*0 + 3*735*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66717*0 + 3*735*FLEN/8, x4, x1, x2)

inst_22240:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fffc0; valaddr_reg:x3; val_offset:66720*0 + 3*736*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66720*0 + 3*736*FLEN/8, x4, x1, x2)

inst_22241:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fffe0; valaddr_reg:x3; val_offset:66723*0 + 3*737*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66723*0 + 3*737*FLEN/8, x4, x1, x2)

inst_22242:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffff0; valaddr_reg:x3; val_offset:66726*0 + 3*738*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66726*0 + 3*738*FLEN/8, x4, x1, x2)

inst_22243:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffff8; valaddr_reg:x3; val_offset:66729*0 + 3*739*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66729*0 + 3*739*FLEN/8, x4, x1, x2)

inst_22244:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffffc; valaddr_reg:x3; val_offset:66732*0 + 3*740*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66732*0 + 3*740*FLEN/8, x4, x1, x2)

inst_22245:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47ffffe; valaddr_reg:x3; val_offset:66735*0 + 3*741*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66735*0 + 3*741*FLEN/8, x4, x1, x2)

inst_22246:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651547 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51547; op2val:0x0;
op3val:0x47fffff; valaddr_reg:x3; val_offset:66738*0 + 3*742*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66738*0 + 3*742*FLEN/8, x4, x1, x2)

inst_22247:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a800000; valaddr_reg:x3; val_offset:66741*0 + 3*743*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66741*0 + 3*743*FLEN/8, x4, x1, x2)

inst_22248:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000001 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a800001; valaddr_reg:x3; val_offset:66744*0 + 3*744*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66744*0 + 3*744*FLEN/8, x4, x1, x2)

inst_22249:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000003 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a800003; valaddr_reg:x3; val_offset:66747*0 + 3*745*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66747*0 + 3*745*FLEN/8, x4, x1, x2)

inst_22250:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a800007; valaddr_reg:x3; val_offset:66750*0 + 3*746*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66750*0 + 3*746*FLEN/8, x4, x1, x2)

inst_22251:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00000f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a80000f; valaddr_reg:x3; val_offset:66753*0 + 3*747*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66753*0 + 3*747*FLEN/8, x4, x1, x2)

inst_22252:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00001f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a80001f; valaddr_reg:x3; val_offset:66756*0 + 3*748*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66756*0 + 3*748*FLEN/8, x4, x1, x2)

inst_22253:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00003f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a80003f; valaddr_reg:x3; val_offset:66759*0 + 3*749*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66759*0 + 3*749*FLEN/8, x4, x1, x2)

inst_22254:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00007f and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a80007f; valaddr_reg:x3; val_offset:66762*0 + 3*750*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66762*0 + 3*750*FLEN/8, x4, x1, x2)

inst_22255:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0000ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a8000ff; valaddr_reg:x3; val_offset:66765*0 + 3*751*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66765*0 + 3*751*FLEN/8, x4, x1, x2)

inst_22256:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0001ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a8001ff; valaddr_reg:x3; val_offset:66768*0 + 3*752*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66768*0 + 3*752*FLEN/8, x4, x1, x2)

inst_22257:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0003ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a8003ff; valaddr_reg:x3; val_offset:66771*0 + 3*753*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66771*0 + 3*753*FLEN/8, x4, x1, x2)

inst_22258:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0007ff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a8007ff; valaddr_reg:x3; val_offset:66774*0 + 3*754*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66774*0 + 3*754*FLEN/8, x4, x1, x2)

inst_22259:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a800fff; valaddr_reg:x3; val_offset:66777*0 + 3*755*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66777*0 + 3*755*FLEN/8, x4, x1, x2)

inst_22260:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x001fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a801fff; valaddr_reg:x3; val_offset:66780*0 + 3*756*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66780*0 + 3*756*FLEN/8, x4, x1, x2)

inst_22261:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x003fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a803fff; valaddr_reg:x3; val_offset:66783*0 + 3*757*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66783*0 + 3*757*FLEN/8, x4, x1, x2)

inst_22262:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x007fff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a807fff; valaddr_reg:x3; val_offset:66786*0 + 3*758*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66786*0 + 3*758*FLEN/8, x4, x1, x2)

inst_22263:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a80ffff; valaddr_reg:x3; val_offset:66789*0 + 3*759*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66789*0 + 3*759*FLEN/8, x4, x1, x2)

inst_22264:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x01ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a81ffff; valaddr_reg:x3; val_offset:66792*0 + 3*760*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66792*0 + 3*760*FLEN/8, x4, x1, x2)

inst_22265:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x03ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a83ffff; valaddr_reg:x3; val_offset:66795*0 + 3*761*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66795*0 + 3*761*FLEN/8, x4, x1, x2)

inst_22266:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x07ffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a87ffff; valaddr_reg:x3; val_offset:66798*0 + 3*762*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66798*0 + 3*762*FLEN/8, x4, x1, x2)

inst_22267:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a8fffff; valaddr_reg:x3; val_offset:66801*0 + 3*763*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66801*0 + 3*763*FLEN/8, x4, x1, x2)

inst_22268:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x1fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6a9fffff; valaddr_reg:x3; val_offset:66804*0 + 3*764*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66804*0 + 3*764*FLEN/8, x4, x1, x2)

inst_22269:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x3fffff and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6abfffff; valaddr_reg:x3; val_offset:66807*0 + 3*765*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66807*0 + 3*765*FLEN/8, x4, x1, x2)

inst_22270:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x400000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6ac00000; valaddr_reg:x3; val_offset:66810*0 + 3*766*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66810*0 + 3*766*FLEN/8, x4, x1, x2)

inst_22271:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x65b1ee and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0ea8a1 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x600000 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fnmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee5b1ee; op2val:0x400ea8a1;
op3val:0x6ae00000; valaddr_reg:x3; val_offset:66813*0 + 3*767*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66813*0 + 3*767*FLEN/8, x4, x1, x2)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8800001,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8800003,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8800007,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf880000f,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf880001f,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf880003f,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf880007f,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf88000ff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf88001ff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf88003ff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf88007ff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8800fff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8801fff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8803fff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8807fff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf880ffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf881ffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf883ffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf887ffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf88fffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf89fffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8bfffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8c00000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8e00000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8f00000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8f80000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fc0000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fe0000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ff0000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ff8000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffc000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffe000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fff000,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fff800,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffc00,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffe00,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffff00,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffff80,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffffc0,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffffe0,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffff0,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffff8,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffffc,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8fffffe,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xf8ffffff,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7ede646c,32,FLEN)
NAN_BOXED(0xc01357de,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc800000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc800001,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc800003,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc800007,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc80000f,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc80001f,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc80003f,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc80007f,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc8000ff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc8001ff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc8003ff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc8007ff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc800fff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc801fff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc803fff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc807fff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc80ffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc81ffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc83ffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc87ffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc8fffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbc9fffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcbfffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcc00000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbce00000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcf00000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcf80000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfc0000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfe0000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcff0000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcff8000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffc000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffe000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfff000,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfff800,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffc00,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffe00,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffff00,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffff80,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffffc0,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffffe0,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffff0,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffff8,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffffc,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcfffffe,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbcffffff,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7edeb418,32,FLEN)
NAN_BOXED(0x80499194,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9000000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9000001,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9000003,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9000007,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf900000f,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf900001f,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf900003f,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf900007f,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf90000ff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf90001ff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf90003ff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf90007ff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9000fff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9001fff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9003fff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9007fff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf900ffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf901ffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf903ffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf907ffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf90fffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf91fffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf93fffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9400000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9600000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9700000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf9780000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97c0000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97e0000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97f0000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97f8000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fc000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fe000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ff000,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ff800,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffc00,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffe00,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fff00,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fff80,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fffc0,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fffe0,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffff0,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffff8,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffffc,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97ffffe,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xf97fffff,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7edf4533,32,FLEN)
NAN_BOXED(0xc012c387,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74800000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74800001,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74800003,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74800007,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7480000f,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7480001f,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7480003f,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7480007f,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x748000ff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x748001ff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x748003ff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x748007ff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74800fff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74801fff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74803fff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74807fff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7480ffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7481ffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7483ffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7487ffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x748fffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x749fffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74bfffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74c00000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74e00000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74f00000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74f80000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fc0000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fe0000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ff0000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ff8000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffc000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffe000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fff000,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fff800,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffc00,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffe00,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffff00,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffff80,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffffc0,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffffe0,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffff0,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffff8,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffffc,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74fffffe,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x74ffffff,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f000001,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f000003,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f000007,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f199999,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f249249,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f333333,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f36db6d,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f3bbbbb,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f444444,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f4ccccc,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f5b6db6,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f666666,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f6db6db,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f7ffff8,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f7ffffc,32,FLEN)
NAN_BOXED(0x7ee06b9c,32,FLEN)
NAN_BOXED(0x401202fe,32,FLEN)
NAN_BOXED(0x7f7ffffe,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb800000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb800001,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb800003,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb800007,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb80000f,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb80001f,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb80003f,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb80007f,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb8000ff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb8001ff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb8003ff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb8007ff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb800fff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb801fff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb803fff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb807fff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb80ffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb81ffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb83ffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb87ffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb8fffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcb9fffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbbfffff,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbc00000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbe00000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbf00000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbf80000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfc0000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfe0000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbff0000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbff8000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffc000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffe000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfff000,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfff800,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffc00,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffe00,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffff00,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffff80,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffffc0,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffffe0,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffff0,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffff8,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffffc,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbfffffe,32,FLEN)
NAN_BOXED(0x7ee15415,32,FLEN)
NAN_BOXED(0x8048b62d,32,FLEN)
NAN_BOXED(0xcbffffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1000000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1000001,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1000003,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1000007,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc100000f,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc100001f,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc100003f,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc100007f,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc10000ff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc10001ff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc10003ff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc10007ff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1000fff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1001fff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1003fff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1007fff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc100ffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc101ffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc103ffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc107ffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc10fffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc11fffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc13fffff,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1400000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1600000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1700000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc1780000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17c0000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17e0000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17f0000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17f8000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fc000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fe000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ff000,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ff800,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffc00,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffe00,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fff00,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fff80,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fffc0,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fffe0,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffff0,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffff8,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffffc,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17ffffe,32,FLEN)
NAN_BOXED(0x7ee1908b,32,FLEN)
NAN_BOXED(0x8048a2b0,32,FLEN)
NAN_BOXED(0xc17fffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2000000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2000001,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2000003,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2000007,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa200000f,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa200001f,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa200003f,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa200007f,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa20000ff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa20001ff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa20003ff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa20007ff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2000fff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2001fff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2003fff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2007fff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa200ffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa201ffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa203ffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa207ffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa20fffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa21fffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa23fffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2400000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2600000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2700000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa2780000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27c0000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27e0000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27f0000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27f8000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fc000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fe000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ff000,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ff800,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffc00,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffe00,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fff00,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fff80,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fffc0,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fffe0,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffff0,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffff8,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffffc,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27ffffe,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xa27fffff,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee2c8c3,32,FLEN)
NAN_BOXED(0x80483eb0,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1000000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1000001,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1000003,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1000007,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe100000f,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe100001f,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe100003f,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe100007f,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe10000ff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe10001ff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe10003ff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe10007ff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1000fff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1001fff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1003fff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1007fff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe100ffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe101ffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe103ffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe107ffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe10fffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe11fffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe13fffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1400000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1600000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1700000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe1780000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17c0000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17e0000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17f0000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17f8000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fc000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fe000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ff000,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ff800,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffc00,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffe00,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fff00,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fff80,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fffc0,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fffe0,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffff0,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffff8,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffffc,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17ffffe,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xe17fffff,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff000001,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff000003,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff000007,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff199999,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff249249,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff333333,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff36db6d,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff3bbbbb,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff444444,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff4ccccc,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff5b6db6,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff666666,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff6db6db,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff7ffff8,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff7ffffc,32,FLEN)
NAN_BOXED(0x7ee2cde6,32,FLEN)
NAN_BOXED(0xc0107a1a,32,FLEN)
NAN_BOXED(0xff7ffffe,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7000000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7000001,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7000003,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7000007,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700000f,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700001f,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700003f,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700007f,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x70000ff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x70001ff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x70003ff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x70007ff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7000fff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7001fff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7003fff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7007fff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x700ffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x701ffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x703ffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x707ffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x70fffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x71fffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x73fffff,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7400000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7600000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7700000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7780000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77c0000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77e0000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77f0000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77f8000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fc000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fe000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ff000,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ff800,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffc00,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffe00,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fff00,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fff80,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fffc0,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fffe0,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffff0,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffff8,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffffc,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77ffffe,32,FLEN)
NAN_BOXED(0x7ee300be,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x77fffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8800000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8800001,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8800003,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8800007,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa880000f,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa880001f,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa880003f,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa880007f,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa88000ff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa88001ff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa88003ff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa88007ff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8800fff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8801fff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8803fff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8807fff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa880ffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa881ffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa883ffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa887ffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa88fffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa89fffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8bfffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8c00000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8e00000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8f00000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8f80000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fc0000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fe0000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ff0000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ff8000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffc000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffe000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fff000,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fff800,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffc00,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffe00,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffff00,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffff80,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffffc0,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffffe0,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffff0,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffff8,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffffc,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8fffffe,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xa8ffffff,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbf800001,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbf800003,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbf800007,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbf999999,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfa49249,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfb33333,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfb6db6d,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfbbbbbb,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfc44444,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfcccccc,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfdb6db6,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfe66666,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbfedb6db,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbffffff8,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbffffffc,32,FLEN)
NAN_BOXED(0x7ee319e6,32,FLEN)
NAN_BOXED(0x804824e1,32,FLEN)
NAN_BOXED(0xbffffffe,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800001,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800003,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x800007,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x999999,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xa49249,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb33333,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xb6db6d,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xbbbbbb,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xc44444,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xcccccc,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xdb6db6,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xe66666,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xedb6db,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffff8,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffc,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0xfffffe,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c000000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c000001,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c000003,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c000007,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00000f,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00001f,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00003f,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00007f,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c0000ff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c0001ff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c0003ff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c0007ff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c000fff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c001fff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c003fff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c007fff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c00ffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c01ffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c03ffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c07ffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c0fffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c1fffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c3fffff,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c400000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c600000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c700000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c780000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7c0000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7e0000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7f0000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7f8000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fc000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fe000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ff000,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ff800,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffc00,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffe00,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fff00,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fff80,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fffc0,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fffe0,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffff0,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffff8,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffffc,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7ffffe,32,FLEN)
NAN_BOXED(0x7ee4515f,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4c7fffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x1,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x199999,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x249249,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x333333,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x36db6d,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x3bbbbb,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x444444,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4ccccc,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x5b6db6,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x666666,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x6db6db,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffff8,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffc,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x7ffffe,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000001,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000003,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000007,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400000f,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400001f,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400003f,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400007f,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40000ff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40001ff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40003ff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40007ff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4000fff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4001fff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4003fff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4007fff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x400ffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x401ffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x403ffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x407ffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x40fffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x41fffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x43fffff,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4400000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4600000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4700000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x4780000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47c0000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47e0000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f0000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47f8000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fc000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fe000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff000,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ff800,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffc00,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffe00,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff00,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fff80,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffc0,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffe0,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff0,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffff8,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffc,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47ffffe,32,FLEN)
NAN_BOXED(0x7ee51547,32,FLEN)
NAN_BOXED(0x0,32,FLEN)
NAN_BOXED(0x47fffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a800000,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a800001,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a800003,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a800007,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a80000f,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a80001f,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a80003f,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a80007f,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a8000ff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a8001ff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a8003ff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a8007ff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a800fff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a801fff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a803fff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a807fff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a80ffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a81ffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a83ffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a87ffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a8fffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6a9fffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6abfffff,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6ac00000,32,FLEN)
NAN_BOXED(0x7ee5b1ee,32,FLEN)
NAN_BOXED(0x400ea8a1,32,FLEN)
NAN_BOXED(0x6ae00000,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;


signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_2:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_3:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_4:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_5:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_6:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

tsig_begin_canary:
CANARY;
tsig_begin_canary:
CANARY;
mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef
tsig_end_canary:
CANARY;
tsig_end_canary:
CANARY;

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif

sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
