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.gitignoreJul 5, 2026, 4:39:21 AM537 B
.gitmodulesJul 5, 2026, 4:39:21 AM95 B
build_digilent_arty_a7_100t.tclJul 5, 2026, 4:40:01 AM2.93 KiB
clockInfo.txtJul 5, 2026, 4:41:16 AM375 B
demo1.pdfJul 5, 2026, 4:39:21 AM571.17 KiB
digilent_arty_a7_100t.bitJul 5, 2026, 4:42:19 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 5, 2026, 4:41:24 AM20.75 KiB
digilent_arty_a7_control_sets.rptJul 5, 2026, 4:41:24 AM20.83 KiB
digilent_arty_a7_drc.rptJul 5, 2026, 4:41:59 AM17.11 KiB
digilent_arty_a7_io.rptJul 5, 2026, 4:41:24 AM96.81 KiB
digilent_arty_a7_power.rptJul 5, 2026, 4:42:01 AM8.83 KiB
digilent_arty_a7_route_status.rptJul 5, 2026, 4:41:58 AM651 B
digilent_arty_a7_timing.rptJul 5, 2026, 4:41:59 AM22.75 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 5, 2026, 4:41:24 AM7.67 KiB
digilent_arty_a7_utilization_place.rptJul 5, 2026, 4:41:24 AM10.74 KiB
fully-synthesized-trng.pdfJul 5, 2026, 4:39:21 AM1.02 MiB
LICENSEJul 5, 2026, 4:39:21 AM2.43 KiB
mriscv.jpgJul 5, 2026, 4:39:21 AM44.89 KiB
mriscv.pdfJul 5, 2026, 4:39:21 AM3.79 MiB
PID4063257.pdfJul 5, 2026, 4:39:21 AM297.13 KiB
processor_ci_defines.vhJul 5, 2026, 4:40:01 AM300 B
README.mdJul 5, 2026, 4:39:21 AM2.12 KiB