Skip to content
[Jenkins]Jenkins
log in

Workspace

/ Pequeno-Risco-5 /
.git
.github
.Xil
docs
fpga
software
src
tests
.gitattributesApr 12, 2026, 4:55:03 AM29 B
.gitignoreApr 12, 2026, 4:55:03 AM21 B
build_digilent_arty_a7_100t.tclApr 12, 2026, 4:55:09 AM3.07 KiB
clockInfo.txtApr 12, 2026, 4:56:06 AM375 B
digilent_arty_a7_100t.bitApr 12, 2026, 4:56:53 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptApr 12, 2026, 4:56:10 AM16.56 KiB
digilent_arty_a7_control_sets.rptApr 12, 2026, 4:56:10 AM12.95 KiB
digilent_arty_a7_drc.rptApr 12, 2026, 4:56:41 AM2.34 KiB
digilent_arty_a7_io.rptApr 12, 2026, 4:56:10 AM96.81 KiB
digilent_arty_a7_power.rptApr 12, 2026, 4:56:42 AM8.59 KiB
digilent_arty_a7_route_status.rptApr 12, 2026, 4:56:40 AM651 B
digilent_arty_a7_timing.rptApr 12, 2026, 4:56:41 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptApr 12, 2026, 4:56:09 AM3.22 KiB
digilent_arty_a7_utilization_place.rptApr 12, 2026, 4:56:09 AM10.57 KiB
LICENSEApr 12, 2026, 4:55:03 AM1.05 KiB
processor_ci_defines.vhApr 12, 2026, 4:55:09 AM300 B
README.mdApr 12, 2026, 4:55:03 AM2.08 KiB