## This file is a general .ucf for the Nexys4 rev B board
## To use it in a project:
## - uncomment the lines corresponding to used pins
## - rename the used signals according to the project

## Clock signal
NET "clk"   LOC = "E3"	| IOSTANDARD = "LVCMOS33";					#Bank = 35, Pin name = #IO_L12P_T1_MRCC_35,					Sch name = clk100mhz
NET "clk" TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 100 MHz HIGH 50%; 

NET "eth_clk" TNM_NET = eth_clk;
NET "eth_clk90" TNM_NET = eth_clk90;
TIMESPEC TS_eth_clk = PERIOD eth_clk 50 MHz HIGH 50%;

NET "clkm" TNM_NET = clkm;
TIMESPEC "TS_clkm_eth_clk90" = FROM "clkm" TO "eth_clk90" TIG;
TIMESPEC "TS_eth_clk90_clkm" = FROM "eth_clk90" TO "clkm" TIG;

## Switches
NET "sw<0>"          LOC=J15 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_RS0_15
NET "sw<1>"          LOC=L16 | IOSTANDARD=LVCMOS33; #IO_L3N_T0_DQS_EMCCLK_14
NET "sw<2>"          LOC=M13 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_D08_VREF_14
NET "sw<3>"          LOC=R15 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_14
NET "sw<4>"          LOC=R17 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_14
NET "sw<5>"          LOC=T18 | IOSTANDARD=LVCMOS33; #IO_L7N_T1_D10_14
NET "sw<6>"          LOC=U18 | IOSTANDARD=LVCMOS33; #IO_L17N_T2_A13_D29_14
NET "sw<7>"          LOC=R13 | IOSTANDARD=LVCMOS33; #IO_L5N_T0_D07_14
NET "sw<8>"          LOC=T8 | IOSTANDARD=LVCMOS18; #IO_L24N_T3_34
NET "sw<9>"          LOC=U8 | IOSTANDARD=LVCMOS18; #IO_25_34
NET "sw<10>"         LOC=R16 | IOSTANDARD=LVCMOS33; #IO_L15P_T2_DQS_RDWR_B_14
NET "sw<11>"         LOC=T13 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_A03_D19_14
NET "sw<12>"         LOC=H6 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_35
NET "sw<13>"         LOC=U12 | IOSTANDARD=LVCMOS33; #IO_L20P_T3_A08_D24_14
NET "sw<14>"         LOC=U11 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_A09_D25_VREF_14
NET "sw<15>"         LOC=V10 | IOSTANDARD=LVCMOS33; #IO_L21P_T3_DQS_14


## Buttons
NET "btnCpuResetn"   LOC=C12 | IOSTANDARD=LVCMOS33; #IO_L3P_T0_DQS_AD1P_15

NET "btnc"           LOC=N17 | IOSTANDARD=LVCMOS33; #IO_L9P_T1_DQS_14
NET "btnd"           LOC=P18 | IOSTANDARD=LVCMOS33; #IO_L9N_T1_DQS_D13_14
NET "btnl"           LOC=P17 | IOSTANDARD=LVCMOS33; #IO_L12P_T1_MRCC_14
NET "btnr"           LOC=M17 | IOSTANDARD=LVCMOS33; #IO_L10N_T1_D15_14
NET "btnu"           LOC=M18 | IOSTANDARD=LVCMOS33; #IO_L4N_T0_D05_14


## LEDs
NET "led<0>"         LOC=H17 | IOSTANDARD=LVCMOS33; #IO_L18P_T2_A24_15
NET "led<1>"         LOC=K15 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_RS1_15
NET "led<2>"         LOC=J13 | IOSTANDARD=LVCMOS33; #IO_L17N_T2_A25_15
NET "led<3>"         LOC=N14 | IOSTANDARD=LVCMOS33; #IO_L8P_T1_D11_14
NET "led<4>"         LOC=R18 | IOSTANDARD=LVCMOS33; #IO_L7P_T1_D09_14
NET "led<5>"         LOC=V17 | IOSTANDARD=LVCMOS33; #IO_L18N_T2_A11_D27_14
NET "led<6>"         LOC=U17 | IOSTANDARD=LVCMOS33; #IO_L17P_T2_A14_D30_14
NET "led<7>"         LOC=U16 | IOSTANDARD=LVCMOS33; #IO_L18P_T2_A12_D28_14
NET "led<8>"         LOC=V16 | IOSTANDARD=LVCMOS33; #IO_L16N_T2_A15_D31_14
NET "led<9>"         LOC=T15 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_14
NET "led<10>"        LOC=U14 | IOSTANDARD=LVCMOS33; #IO_L22P_T3_A05_D21_14
NET "led<11>"        LOC=T16 | IOSTANDARD=LVCMOS33; #IO_L15N_T2_DQS_DOUT_CSO_B_14
NET "led<12>"        LOC=V15 | IOSTANDARD=LVCMOS33; #IO_L16P_T2_CSI_B_14
NET "led<13>"        LOC=V14 | IOSTANDARD=LVCMOS33; #IO_L22N_T3_A04_D20_14
NET "led<14>"        LOC=V12 | IOSTANDARD=LVCMOS33; #IO_L20N_T3_A07_D23_14
NET "led<15>"        LOC=V11 | IOSTANDARD=LVCMOS33; #IO_L21N_T3_DQS_A06_D22_14


##LEDs_RGB
#NET "led16_b"        LOC=R12 | IOSTANDARD=LVCMOS33; #IO_L5P_T0_D06_14
#NET "led16_g"        LOC=M16 | IOSTANDARD=LVCMOS33; #IO_L10P_T1_D14_14
#NET "led16_r"        LOC=N15 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_14
#NET "led17_b"        LOC=G14 | IOSTANDARD=LVCMOS33; #IO_L15N_T2_DQS_ADV_B_15
#NET "led17_g"        LOC=R11 | IOSTANDARD=LVCMOS33; #IO_0_14
#NET "led17_r"        LOC=N16 | IOSTANDARD=LVCMOS33; #IO_L11N_T1_SRCC_14


## 7 segment display
#NET "ca"             LOC=T10 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_A00_D16_14
#NET "cb"             LOC=R10 | IOSTANDARD=LVCMOS33; #IO_25_14
#NET "cc"             LOC=K16 | IOSTANDARD=LVCMOS33; #IO_25_15
#NET "cd"             LOC=K13 | IOSTANDARD=LVCMOS33; #IO_L17P_T2_A26_15
#NET "ce"             LOC=P15 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_14
#NET "cf"             LOC=T11 | IOSTANDARD=LVCMOS33; #IO_L19P_T3_A10_D26_14
#NET "cg"             LOC=L18 | IOSTANDARD=LVCMOS33; #IO_L4P_T0_D04_14
#NET "dp"             LOC=H15 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_A21_VREF_15

#NET "an<0>"          LOC=J17 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_FOE_B_15
#NET "an<1>"          LOC=J18 | IOSTANDARD=LVCMOS33; #IO_L23N_T3_FWE_B_15
#NET "an<2>"          LOC=T9 | IOSTANDARD=LVCMOS33; #IO_L24P_T3_A01_D17_14
#NET "an<3>"          LOC=J14 | IOSTANDARD=LVCMOS33; #IO_L19P_T3_A22_15
#NET "an<4>"          LOC=P14 | IOSTANDARD=LVCMOS33; #IO_L8N_T1_D12_14
#NET "an<5>"          LOC=T14 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_14
#NET "an<6>"          LOC=K2 | IOSTANDARD=LVCMOS33; #IO_L23P_T3_35
#NET "an<7>"          LOC=U13 | IOSTANDARD=LVCMOS33; #IO_L23N_T3_A02_D18_14


## Pmod Header JA
#NET "ja<1>"          LOC=C17 | IOSTANDARD=LVCMOS33; #IO_L20N_T3_A19_15
#NET "ja<2>"          LOC=D18 | IOSTANDARD=LVCMOS33; #IO_L21N_T3_DQS_A18_15
#NET "ja<3>"          LOC=E18 | IOSTANDARD=LVCMOS33; #IO_L21P_T3_DQS_15
#NET "ja<4>"          LOC=G17 | IOSTANDARD=LVCMOS33; #IO_L18N_T2_A23_15
#NET "ja<7>"          LOC=D17 | IOSTANDARD=LVCMOS33; #IO_L16N_T2_A27_15
#NET "ja<8>"          LOC=E17 | IOSTANDARD=LVCMOS33; #IO_L16P_T2_A28_15
#NET "ja<9>"          LOC=F18 | IOSTANDARD=LVCMOS33; #IO_L22N_T3_A16_15
#NET "ja<10>"         LOC=G18 | IOSTANDARD=LVCMOS33; #IO_L22P_T3_A17_15

## Pmod Header JB
#NET "jb<1>"          LOC=D14 | IOSTANDARD=LVCMOS33; #IO_L1P_T0_AD0P_15
#NET "jb<2>"          LOC=F16 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_15
#NET "jb<3>"          LOC=G16 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_15
#NET "jb<4>"          LOC=H14 | IOSTANDARD=LVCMOS33; #IO_L15P_T2_DQS_15
#NET "jb<7>"          LOC=E16 | IOSTANDARD=LVCMOS33; #IO_L11N_T1_SRCC_15
#NET "jb<8>"          LOC=F13 | IOSTANDARD=LVCMOS33; #IO_L5P_T0_AD9P_15
#NET "jb<9>"          LOC=G13 | IOSTANDARD=LVCMOS33; #IO_0_15
#NET "jb<10>"         LOC=H16 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_15

## Pmod Header JC
#NET "jc<1>"          LOC=K1 | IOSTANDARD=LVCMOS33; #IO_L23N_T3_35
#NET "jc<2>"          LOC=F6 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_VREF_35
#NET "jc<3>"          LOC=J2 | IOSTANDARD=LVCMOS33; #IO_L22N_T3_35
#NET "jc<4>"          LOC=G6 | IOSTANDARD=LVCMOS33; #IO_L19P_T3_35
#NET "jc<7>"          LOC=E7 | IOSTANDARD=LVCMOS33; #IO_L6P_T0_35
#NET "jc<8>"          LOC=J3 | IOSTANDARD=LVCMOS33; #IO_L22P_T3_35
#NET "jc<9>"          LOC=J4 | IOSTANDARD=LVCMOS33; #IO_L21P_T3_DQS_35
#NET "jc<10>"         LOC=E6 | IOSTANDARD=LVCMOS33; #IO_L5P_T0_AD13P_35

## Pmod Header JD
#NET "jd<1>"          LOC=H4 | IOSTANDARD=LVCMOS33; #IO_L21N_T3_DQS_35
#NET "jd<2>"          LOC=H1 | IOSTANDARD=LVCMOS33; #IO_L17P_T2_35
#NET "jd<3>"          LOC=G1 | IOSTANDARD=LVCMOS33; #IO_L17N_T2_35
#NET "jd<4>"          LOC=G3 | IOSTANDARD=LVCMOS33; #IO_L20N_T3_35
#NET "jd<7>"          LOC=H2 | IOSTANDARD=LVCMOS33; #IO_L15P_T2_DQS_35
#NET "jd<8>"          LOC=G4 | IOSTANDARD=LVCMOS33; #IO_L20P_T3_35
#NET "jd<9>"          LOC=G2 | IOSTANDARD=LVCMOS33; #IO_L15N_T2_DQS_35
#NET "jd<10>"         LOC=F3 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_35

##Pmod Header JXADC
#NET "xa_n<1>"        LOC=A14 | IOSTANDARD=LVDS; #IO_L9N_T1_DQS_AD3N_15
#NET "xa_p<1>"        LOC=A13 | IOSTANDARD=LVDS; #IO_L9P_T1_DQS_AD3P_15
#NET "xa_n<2>"        LOC=A16 | IOSTANDARD=LVDS; #IO_L8N_T1_AD10N_15
#NET "xa_p<2>"        LOC=A15 | IOSTANDARD=LVDS; #IO_L8P_T1_AD10P_15
#NET "xa_n<3>"        LOC=B17 | IOSTANDARD=LVDS; #IO_L7N_T1_AD2N_15
#NET "xa_p<3>"        LOC=B16 | IOSTANDARD=LVDS; #IO_L7P_T1_AD2P_15
#NET "xa_n<4>"        LOC=A18 | IOSTANDARD=LVDS; #IO_L10N_T1_AD11N_15
#NET "xa_p<4>"        LOC=B18 | IOSTANDARD=LVDS; #IO_L10P_T1_AD11P_15


##VGA Connector
#NET "vga_r<0>"       LOC=A3 | IOSTANDARD=LVCMOS33; #IO_L8N_T1_AD14N_35
#NET "vga_r<1>"       LOC=B4 | IOSTANDARD=LVCMOS33; #IO_L7N_T1_AD6N_35
#NET "vga_r<2>"       LOC=C5 | IOSTANDARD=LVCMOS33; #IO_L1N_T0_AD4N_35
#NET "vga_r<3>"       LOC=A4 | IOSTANDARD=LVCMOS33; #IO_L8P_T1_AD14P_35

#NET "vga_g<0>"       LOC=C6 | IOSTANDARD=LVCMOS33; #IO_L1P_T0_AD4P_35
#NET "vga_g<1>"       LOC=A5 | IOSTANDARD=LVCMOS33; #IO_L3N_T0_DQS_AD5N_35
#NET "vga_g<2>"       LOC=B6 | IOSTANDARD=LVCMOS33; #IO_L2N_T0_AD12N_35
#NET "vga_g<3>"       LOC=A6 | IOSTANDARD=LVCMOS33; #IO_L3P_T0_DQS_AD5P_35

#NET "vga_b<0>"       LOC=B7 | IOSTANDARD=LVCMOS33; #IO_L2P_T0_AD12P_35
#NET "vga_b<1>"       LOC=C7 | IOSTANDARD=LVCMOS33; #IO_L4N_T0_35
#NET "vga_b<2>"       LOC=D7 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_VREF_35
#NET "vga_b<3>"       LOC=D8 | IOSTANDARD=LVCMOS33; #IO_L4P_T0_35

#NET "vga_hs"         LOC=B11 | IOSTANDARD=LVCMOS33; #IO_L4P_T0_15
#NET "vga_vs"         LOC=B12 | IOSTANDARD=LVCMOS33; #IO_L3N_T0_DQS_AD1N_15


##Micro SD Connector
#NET "sd_sck"         LOC=B1 | IOSTANDARD=LVCMOS33; #IO_L9P_T1_DQS_AD7P_35
#NET "sd_reset"       LOC=E2 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_35
#NET "sd_cd"          LOC=A1 | IOSTANDARD=LVCMOS33; #IO_L9N_T1_DQS_AD7N_35
#NET "sd_cmd"         LOC=C1 | IOSTANDARD=LVCMOS33; #IO_L16N_T2_35
#NET "sd_dat<0>"      LOC=C2 | IOSTANDARD=LVCMOS33; #IO_L16P_T2_35
#NET "sd_dat<1>"      LOC=E1 | IOSTANDARD=LVCMOS33; #IO_L18N_T2_35
#NET "sd_dat<2>"      LOC=F1 | IOSTANDARD=LVCMOS33; #IO_L18P_T2_35
#NET "sd_dat<3>"      LOC=D2 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_35


##PWM Audio Amplifier
#NET "aud_pwm"        LOC=A11 | IOSTANDARD=LVCMOS33; #IO_L4N_T0_15
#NET "aud_sd"         LOC=D12 | IOSTANDARD=LVCMOS33; #IO_L6P_T0_15


##Accelerometer
#NET "acl_miso"       LOC=E15 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_15
#NET "acl_mosi"       LOC=F14 | IOSTANDARD=LVCMOS33; #IO_L5N_T0_AD9N_15
#NET "acl_sclk"       LOC=F15 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_15
#NET "acl_csn"        LOC=D15 | IOSTANDARD=LVCMOS33; #IO_L12P_T1_MRCC_15
#NET "acl_int<1>"     LOC=B13 | IOSTANDARD=LVCMOS33; #IO_L2P_T0_AD8P_15
#NET "acl_int<2>"     LOC=C16 | IOSTANDARD=LVCMOS33; #IO_L20P_T3_A20_15


##Temperature Sensor
#NET "tmp_ct"         LOC=B14 | IOSTANDARD=LVCMOS33; #IO_L2N_T0_AD8N_15
#NET "tmp_int"        LOC=D13 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_VREF_15
#NET "tmp_scl"        LOC=C14 | IOSTANDARD=LVCMOS33; #IO_L1N_T0_AD0N_15
#NET "tmp_sda"        LOC=C15 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_15


##USB-RS232 Interface
#NET "uart_cts"       LOC=D3 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_35
#NET "uart_rts"       LOC=E5 | IOSTANDARD=LVCMOS33; #IO_L5N_T0_AD13N_35
NET "uart_rxd_out"   LOC=D4 | IOSTANDARD=LVCMOS33; #IO_L11N_T1_SRCC_35
NET "uart_txd_in"    LOC=C4 | IOSTANDARD=LVCMOS33; #IO_L7P_T1_AD6P_35


##Omnidirectional Microphone
#NET "m_clk"          LOC=J5 | IOSTANDARD=LVCMOS33; #IO_25_35
#NET "m_data"         LOC=H5 | IOSTANDARD=LVCMOS33; #IO_L24N_T3_35
#NET "m_lrsel"        LOC=F5 | IOSTANDARD=LVCMOS33; #IO_0_35


##USB HID (PS/2)
#NET "ps2_clk"        LOC=F4 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_35
#NET "ps2_data"       LOC=B2 | IOSTANDARD=LVCMOS33; #IO_L10N_T1_AD15N_35


##Quad SPI Flash
NET "QspiCSn"       LOC=L13 | IOSTANDARD=LVCMOS33; #IO_L6P_T0_FCS_B_14
NET "QspiDB<0>"     LOC=K17 | IOSTANDARD=LVCMOS33; #IO_L1P_T0_D00_MOSI_14
NET "QspiDB<1>"     LOC=K18 | IOSTANDARD=LVCMOS33; #IO_L1N_T0_D01_DIN_14
NET "QspiDB<2>"     LOC=L14 | IOSTANDARD=LVCMOS33; #IO_L2P_T0_D02_14
NET "QspiDB<3>"     LOC=M14 | IOSTANDARD=LVCMOS33; #IO_L2N_T0_D03_14


##SMSC Ethernet PHY
NET "eth_rxd<0>"     LOC=C11 | IOSTANDARD=LVCMOS33; #IO_L13P_T2_MRCC_16
NET "eth_rxd<1>"     LOC=D10 | IOSTANDARD=LVCMOS33; #IO_L19N_T3_VREF_16
NET "eth_txd<0>"     LOC=A10 | IOSTANDARD=LVCMOS33; #IO_L14P_T2_SRCC_16
NET "eth_txd<1>"     LOC=A8 | IOSTANDARD=LVCMOS33; #IO_L12N_T1_MRCC_16
NET "eth_crsdv"      LOC=D9 | IOSTANDARD=LVCMOS33; #IO_L6N_T0_VREF_16
NET "eth_intn"       LOC=B8 | IOSTANDARD=LVCMOS33; #IO_L12P_T1_MRCC_16
NET "eth_mdc"        LOC=C9 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_16
NET "eth_mdio"       LOC=A9 | IOSTANDARD=LVCMOS33; #IO_L14N_T2_SRCC_16
NET "eth_refclk"     LOC=D5 | IOSTANDARD=LVCMOS33; #IO_L11P_T1_SRCC_35
NET "eth_rstn"       LOC=B3 | IOSTANDARD=LVCMOS33; #IO_L10P_T1_AD15P_35
NET "eth_txen"       LOC=B9 | IOSTANDARD=LVCMOS33; #IO_L11N_T1_SRCC_16
NET "eth_rxerr"      LOC=C10 | IOSTANDARD=LVCMOS33; #IO_L13N_T2_MRCC_16


## DDR2 Memory
NET  "ddr2_dq[0]"     LOC = "R7"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L23P_T3_34
NET  "ddr2_dq[1]"     LOC = "V6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L20N_T3_34
NET  "ddr2_dq[2]"     LOC = "R8"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L24P_T3_34
NET  "ddr2_dq[3]"     LOC = "U7"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L22P_T3_34
NET  "ddr2_dq[4]"     LOC = "V7"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L20P_T3_34
NET  "ddr2_dq[5]"     LOC = "R6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L19P_T3_34
NET  "ddr2_dq[6]"     LOC = "U6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L22N_T3_34
NET  "ddr2_dq[7]"     LOC = "R5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L19N_T3_VREF_34
NET  "ddr2_dq[8]"     LOC = "T5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L12P_T1_MRCC_34
NET  "ddr2_dq[9]"     LOC = "U3"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L8N_T1_34
NET  "ddr2_dq[10]"    LOC = "V5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L10P_T1_34
NET  "ddr2_dq[11]"    LOC = "U4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L8P_T1_34
NET  "ddr2_dq[12]"    LOC = "V4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L10N_T1_34
NET  "ddr2_dq[13]"    LOC = "T4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L12N_T1_MRCC_34
NET  "ddr2_dq[14]"    LOC = "V1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L7N_T1_34
NET  "ddr2_dq[15]"    LOC = "T3"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L11N_T1_SRCC_34
NET  "ddr2_addr[12]"  LOC = "N6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L18N_T2_34
NET  "ddr2_addr[11]"  LOC = "K5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L5P_T0_34
NET  "ddr2_addr[10]"  LOC = "R2"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L15N_T2_DQS_34
NET  "ddr2_addr[9]"   LOC = "N5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L13P_T2_MRCC_34
NET  "ddr2_addr[8]"   LOC = "L4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L5N_T0_34
NET  "ddr2_addr[7]"   LOC = "N1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L3N_T0_DQS_34
NET  "ddr2_addr[6]"   LOC = "M2"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L4N_T0_34
NET  "ddr2_addr[5]"   LOC = "P5"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L13N_T2_MRCC_34
NET  "ddr2_addr[4]"   LOC = "L3"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L2N_T0_34
NET  "ddr2_addr[3]"   LOC = "T1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L17N_T2_34
NET  "ddr2_addr[2]"   LOC = "M6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L18P_T2_34
NET  "ddr2_addr[1]"   LOC = "P4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L14P_T2_SRCC_34
NET  "ddr2_addr[0]"   LOC = "M4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L16P_T2_34
NET  "ddr2_ba[2]"     LOC = "R1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L17P_T2_34
NET  "ddr2_ba[1]"     LOC = "P3"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L14N_T2_SRCC_34
NET  "ddr2_ba[0]"     LOC = "P2"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L15P_T2_DQS_34
NET  "ddr2_ras_n"     LOC = "N4"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L16N_T2_34
NET  "ddr2_cas_n"     LOC = "L1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L1P_T0_34
NET  "ddr2_we_n"      LOC = "N2"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L3P_T0_DQS_34
NET  "ddr2_cke[0]"    LOC = "M1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L1N_T0_34
NET  "ddr2_odt[0]"    LOC = "M3"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L4P_T0_34
NET  "ddr2_cs_n[0]"   LOC = "K6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_0_34
NET  "ddr2_dm[0]"     LOC = "T6"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L23N_T3_34
NET  "ddr2_dm[1]"     LOC = "U1"  | IOSTANDARD = SSTL18_II      | SLEW = FAST  ; # Pad function: IO_L7P_T1_34 
NET  "ddr2_dqs_p[0]"  LOC = "U9"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L21P_T3_DQS_34
NET  "ddr2_dqs_n[0]"  LOC = "V9"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L21N_T3_DQS_34
NET  "ddr2_dqs_p[1]"  LOC = "U2"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L9P_T1_DQS_34
NET  "ddr2_dqs_n[1]"  LOC = "V2"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  |     IN_TERM = UNTUNED_SPLIT_50   ; # Pad function: IO_L9N_T1_DQS_34
##NET  "ddr2_ck_p[0]"   LOC = "L6"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  ; # Pad function: IO_L6P_T0_34
##NET  "ddr2_ck_n[0]"   LOC = "L5"  | IOSTANDARD = DIFF_SSTL18_II | SLEW = FAST  ; # Pad function: IO_L6N_T0_VREF_34
NET  "ddr2_ck_p[0]"   LOC = "L6"  | IOSTANDARD = SSTL18_II | SLEW = FAST  ; # Pad function: IO_L6P_T0_34
NET  "ddr2_ck_n[0]"   LOC = "L5"  | IOSTANDARD = SSTL18_II | SLEW = FAST  ; # Pad function: IO_L6N_T0_VREF_34
