NET "clk48" LOC = K14;
NET "clk48" PERIOD = 20.833333 ns HIGH 50 %;

NET "reset" LOC = R3;
NET "reset" IOSTANDARD=LVTTL;
NET "reset" PULLDOWN;
NET "reset" TIG;

NET "rxd1"  LOC = "A14";
NET "txd1"  LOC = "C13" | DRIVE = 8 | SLEW = SLOW;

NET "rxd1" IOSTANDARD=LVTTL;
NET "txd1" IOSTANDARD=LVTTL;

NET "dsurx"  LOC = "D12";					# Pin A14
NET "dsutx"  LOC = "E11" | DRIVE = 8 | SLEW = SLOW;		# Pin A15
								# Pin A16 +3.3v
NET "dsubre"  LOC = "C10";					# Pin A17
NET "dsuact"  LOC = "B12";					# Pin A18

NET "dsurx" IOSTANDARD=LVTTL;
NET "dsutx" IOSTANDARD=LVTTL;
NET "dsubre" IOSTANDARD=LVTTL;
NET "dsuact" IOSTANDARD=LVTTL;

##### SD card

NET "sd_sck" LOC = "H11";
NET "sd_dat3" LOC = "H14";
NET "sd_dat" LOC = "P10";
NET "sd_cmd" LOC = "H13";

##### DDR SDRAM

CONFIG VCCAUX=2.5;
CONFIG MCB_PERFORMANCE= STANDARD;

# --- MIG37 ---
NET "mig_gen.ddrc/MCB_inst/memc?_wrapper_inst/memc?_mcb_raw_wrapper_inst/selfrefresh_mcb_mode" TIG;
NET "mig_gen.ddrc/MCB_inst/c?_pll_lock" TIG;

# --- MIG39 ---
INST "mig_gen.ddrc/MCB_inst/memc?_wrapper_inst/memc?_mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/DONE_SOFTANDHARD_CAL*" TIG;

     
############################################################################
## Memory Controller 3                               
## Memory Device: DDR_SDRAM->MT46V32M16XX-5B-IT 
## Frequency: 200 MHz
## Time Period: 5000 ps
## Supported Part Numbers: MT46V32M16BN-5B-IT
############################################################################

############################################################################	
# All the IO resources in an IO tile which contains DQSP/UDQSP are used		
# irrespective of a single-ended or differential DQS design. Any signal that	
# is connected to the free pin of the same IO tile in a single-ended design	
# will be unrouted. Hence, the IOB cannot used as general pupose IO.			
############################################################################	
CONFIG PROHIBIT = N1,H1;

############################################################################
## I/O TERMINATION                                                          
############################################################################
NET "mcb3_dram_dq[*]"                                 IN_TERM = NONE;
NET "mcb3_dram_dqs"                                   IN_TERM = NONE;
NET "mcb3_dram_udqs"                                  IN_TERM = NONE;

############################################################################
# I/O STANDARDS 
############################################################################

NET  "mcb3_dram_dq[*]"                               IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_a[*]"                                IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_ba[*]"                               IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_dqs"                                 IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_udqs"                                IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_ck"                                  IOSTANDARD = DIFF_SSTL2_II ;
NET  "mcb3_dram_ck_n"                                IOSTANDARD = DIFF_SSTL2_II ;
NET  "mcb3_dram_cke"                                 IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_ras_n"                               IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_cas_n"                               IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_we_n"                                IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_dm"                                  IOSTANDARD = SSTL2_II ;
NET  "mcb3_dram_udm"                                 IOSTANDARD = SSTL2_II ;
NET  "mcb3_rzq"                                      IOSTANDARD = SSTL2_II ;

############################################################################
# MCB 3
# Pin Location Constraints for Clock, Masks, Address, and Controls
############################################################################

NET  "mcb3_dram_a[0]"                            LOC = "K5" ;
NET  "mcb3_dram_a[10]"                           LOC = "G6" ;
NET  "mcb3_dram_a[11]"                           LOC = "E3" ;
NET  "mcb3_dram_a[12]"                           LOC = "F3" ;
NET  "mcb3_dram_a[1]"                            LOC = "K6" ;
NET  "mcb3_dram_a[2]"                            LOC = "D1" ;
NET  "mcb3_dram_a[3]"                            LOC = "L4" ;
NET  "mcb3_dram_a[4]"                            LOC = "G5" ;
NET  "mcb3_dram_a[5]"                            LOC = "H4" ;
NET  "mcb3_dram_a[6]"                            LOC = "H3" ;
NET  "mcb3_dram_a[7]"                            LOC = "D3" ;
NET  "mcb3_dram_a[8]"                            LOC = "B2" ;
NET  "mcb3_dram_a[9]"                            LOC = "A2" ;
NET  "mcb3_dram_ba[0]"                           LOC = "C3" ;
NET  "mcb3_dram_ba[1]"                           LOC = "C2" ;
NET  "mcb3_dram_cas_n"                           LOC = "H5" ;
NET  "mcb3_dram_ck"                              LOC = "E2" ;
NET  "mcb3_dram_ck_n"                            LOC = "E1" ;
NET  "mcb3_dram_cke"                             LOC = "F4" ;
NET  "mcb3_dram_dm"                              LOC = "J4" ;
NET  "mcb3_dram_dq[0]"                           LOC = "K2" ;
NET  "mcb3_dram_dq[10]"                          LOC = "M2" ;
NET  "mcb3_dram_dq[11]"                          LOC = "M1" ;
NET  "mcb3_dram_dq[12]"                          LOC = "P2" ;
NET  "mcb3_dram_dq[13]"                          LOC = "P1" ;
NET  "mcb3_dram_dq[14]"                          LOC = "R2" ;
NET  "mcb3_dram_dq[15]"                          LOC = "R1" ;
NET  "mcb3_dram_dq[1]"                           LOC = "K1" ;
NET  "mcb3_dram_dq[2]"                           LOC = "J3" ;
NET  "mcb3_dram_dq[3]"                           LOC = "J1" ;
NET  "mcb3_dram_dq[4]"                           LOC = "F2" ;
NET  "mcb3_dram_dq[5]"                           LOC = "F1" ;
NET  "mcb3_dram_dq[6]"                           LOC = "G3" ;
NET  "mcb3_dram_dq[7]"                           LOC = "G1" ;
NET  "mcb3_dram_dq[8]"                           LOC = "L3" ;
NET  "mcb3_dram_dq[9]"                           LOC = "L1" ;
NET  "mcb3_dram_dqs"                             LOC = "H2" ;
NET  "mcb3_dram_ras_n"                           LOC = "J6" ;
NET  "mcb3_dram_udm"                             LOC = "K3" ;
NET  "mcb3_dram_udqs"                            LOC = "N3" ;
NET  "mcb3_dram_we_n"                            LOC = "C1" ;

NET  "mcb3_rzq"                                  LOC = "M4" ;
