

Prompt for target technology
CONFIG_SYN_INFERRED
  Selects the target technology for memory and pads.
  The following are available:

  - Inferred: Generic FPGA or ASIC targets if your synthesis tool
    is capable of inferring RAMs and pads automatically.

  - Actel ProAsic/P/3, IGLOO/2, RTG4 and Axcelerator FPGAs
  - Aeroflex UT25CRH Rad-Hard 0.25 um CMOS
  - Altera: Most Altera FPGA families
  - Altera-CycloneIII: Altera Cyclone-III/IV FPGA family
  - Altera-Stratix: Altera Stratix FPGA family
  - Altera-StratixII: Altera Stratix/Cyclone-II FPGA families
  - Altera-StratixIII: Altera Stratix-III FPGA family
  - Altera-StratixIV: Altera Stratix-IV FPGA family
  - Altera-StratixV: Altera Stratix-V FPGA family
  - ATC18: Atmel-Nantes 0.18 um rad-hard CMOS
  - Lattice : EC/ECP/XP FPGAs
  - Quicklogic : Eclipse/E/II FPGAs
  - UMC-0.18 : UMC 0.18 um CMOS with Virtual Silicon libraries
  - Xilinx-Spartan/2/3/6: Xilinx Spartan/2/3/6 libraries
  - Xilinx-Spartan3E: Xilinx Spartan3E libraries
  - Xilinx-Virtex/E: Xilinx Virtex/E libraries
  - Xilinx-Virtex2/4/5/6/7: Xilinx Virtex2/4/5/6/7 libraries

  Note: Level of technology support depends on type of GRLIB
  distribution. A technology may be present in this list while the
  tech support files are missing from the GRLIB distribution.
  Actel support is only available in commercial and FT distributions.

  Additional target technologies are available that are not selectable
  via the xconfig tool.

Ram library
CONFIG_MEM_VIRAGE
  Select RAM generators for ASIC targets.

Transceiver type
CONFIG_TRANS_GTP0
  Select the transceiver type used in your FPGA

Infer ram
CONFIG_SYN_INFER_RAM
  Say Y here if you want the synthesis tool to infer your
  RAM automatically. Say N to directly instantiate technology-
  specific RAM cells for the selected target technology package.

Infer pads
CONFIG_SYN_INFER_PADS
  Say Y here if you want the synthesis tool to infer pads.
  Say N to directly instantiate technology-specific pads from
  the selected target technology package.

No async reset
CONFIG_SYN_NO_ASYNC
  Say Y here if you disable asynchronous reset in some of the IP cores.
  Might be necessary if the target library does not have cells with
  asynchronous set/reset.

Scan support
CONFIG_SYN_SCAN
  Say Y here to enable scan support in some cores. This will enable
  the scan support generics where available and add logic to make
  the design testable using full-scan.
