Started by user Julio Nunes Avelar
[Pipeline] Start of Pipeline
[Pipeline] node
Still waiting to schedule task
‘Rex’ is reserved for jobs with matching label expression
Running on Jenkins in /var/lib/jenkins/workspace/Risco-5
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone and Cleanup)
[Pipeline] sh
+ rm -rf Risco-5
[Pipeline] sh
+ git clone --recursive https://github.com/JN513/Risco-5.git Risco-5
Cloning into 'Risco-5'...
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Iverilog Simulation)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] sh
+ iverilog -o simulation.out -s soc_tb src/core/alu.v src/core/alu_control.v src/core/control_unit.v src/core/core.v src/core/csr_unit.v src/core/immediate_generator.v src/core/mdu.v src/core/mux.v src/core/pc.v src/core/registers.v tests/soc_test.v src/peripheral/bus.v src/peripheral/fifo.v src/peripheral/gpios.v src/peripheral/gpio.v src/peripheral/leds.v src/peripheral/memory.v src/peripheral/pwm.v src/peripheral/soc.v src/peripheral/uart_rx.v src/peripheral/uart_tx.v src/peripheral/uart.v
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Synthesis)
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_nexys4_ddr)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_nexys4_ddr)
[Pipeline] lock
Trying to acquire lock on [Resource: colorlight_i9]
The resource [colorlight_i9] is locked by build TinyRiscV #9 #9 since Oct 3, 2024, 9:58 PM.
[Resource: colorlight_i9] is not free, waiting for execution ...
[Required resources: [colorlight_i9]] added into queue at position 0
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_nexys4_ddr]
The resource [digilent_nexys4_ddr] is locked by build TinyRiscV #9 #9 since Oct 3, 2024, 10:00 PM.
[Resource: digilent_nexys4_ddr] is not free, waiting for execution ...
[Required resources: [digilent_nexys4_ddr]] added into queue at position 1
Lock acquired on [Resource: digilent_nexys4_ddr]
[Pipeline] {
[Pipeline] echo
FPGA digilent_nexys4_ddr bloqueada para síntese.
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] sh
+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p Risco-5 -b digilent_nexys4_ddr
Lock acquired on [Resource: colorlight_i9]
[Pipeline] {
[Pipeline] echo
FPGA colorlight_i9 bloqueada para síntese.
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] sh
+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p Risco-5 -b colorlight_i9
Aborted by Julio Nunes Avelar
Sending interrupt signal to process
Sending interrupt signal to process
Arquivo de configura����o final gerado em /var/lib/jenkins/workspace/Risco-5/Risco-5/build_colorlight_i9.tcl
Erro ao executar o Makefile.
make: *** [/eda/processor-ci/makefiles/colorlight_i9.mk:13: colorlight_i9.json] Terminated

Terminated
script returned exit code 143
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
Lock released on resource [Resource: colorlight_i9]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
Arquivo de configura����o final gerado em /var/lib/jenkins/workspace/Risco-5/Risco-5/build_digilent_nexys4_ddr.tcl
Erro ao executar o Makefile.
Terminated
Terminated
make: *** [/eda/processor-ci/makefiles/digilent_nexys4_ddr.mk:12: digilent_nexys4_ddr.bit] Error 143

Traceback (most recent call last):
  File "/eda/processor-ci/main.py", line 229, in <module>
    main(
  File "/eda/processor-ci/main.py", line 185, in main
    build_and_flash(build_file_path, board_name, toolchain_path)
  File "/eda/processor-ci/main.py", line 110, in build_and_flash
    raise subprocess.CalledProcessError(process.returncode, 'make')
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
script returned exit code 1
Click here to forcibly terminate running steps
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
Lock released on resource [Resource: digilent_nexys4_ddr]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_nexys4_ddr
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Run Tests)
Stage "Run Tests" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9 Tests)
[Pipeline] { (Branch: digilent_nexys4_ddr Tests)
[Pipeline] stage
[Pipeline] { (colorlight_i9 Tests)
[Pipeline] stage
[Pipeline] { (digilent_nexys4_ddr Tests)
Stage "colorlight_i9 Tests" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
Stage "digilent_nexys4_ddr Tests" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9 Tests
[Pipeline] }
Failed in branch digilent_nexys4_ddr Tests
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] sh
+ rm -rf CONTRIBUTING.md Jenkinsfile LICENSE LICENSE-CC LICENSE-MIT README.md README_pt.md build_colorlight_i9.tcl build_digilent_nexys4_ddr.tcl config.vh debug docs fpga run_test.sh simulation.out software src tests
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
org.jenkinsci.plugins.workflow.actions.ErrorAction$ErrorId: 39f39fc1-0cfd-4eeb-8d6f-4c39ff0e750d
Finished: ABORTED