Started by user Julio Nunes Avelar
Restarted from build #380, stage FPGA Build Pipeline
[Pipeline] Start of Pipeline
[Pipeline] node
Running on Jenkins in /var/lib/jenkins/workspace/Risco-5
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Git Clone)
Stage "Git Clone" skipped due to this build restarting at stage "FPGA Build Pipeline"
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Simulation)
Stage "Simulation" skipped due to this build restarting at stage "FPGA Build Pipeline"
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (FPGA Build Pipeline)
[Pipeline] parallel
[Pipeline] { (Branch: colorlight_i9)
[Pipeline] { (Branch: digilent_nexys4_ddr)
[Pipeline] stage
[Pipeline] { (colorlight_i9)
[Pipeline] stage
[Pipeline] { (digilent_nexys4_ddr)
[Pipeline] lock
Trying to acquire lock on [Resource: colorlight_i9]
Resource [colorlight_i9] did not exist. Created.
Lock acquired on [Resource: colorlight_i9]
[Pipeline] {
[Pipeline] lock
Trying to acquire lock on [Resource: digilent_nexys4_ddr]
Resource [digilent_nexys4_ddr] did not exist. Created.
Lock acquired on [Resource: digilent_nexys4_ddr]
[Pipeline] {
[Pipeline] stage
[Pipeline] { (Síntese e PnR)
[Pipeline] stage
[Pipeline] { (Síntese e PnR)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] echo
Iniciando síntese para FPGA colorlight_i9.
[Pipeline] sh
[Pipeline] echo
Iniciando síntese para FPGA digilent_nexys4_ddr.
+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p Risco-5 -b colorlight_i9
Arquivo de configura����o final gerado em /var/lib/jenkins/workspace/Risco-5/Risco-5/build_colorlight_i9.tcl
Erro ao executar o Makefile.
ERROR: TCL interpreter returned an error: Yosys command produced an error
make: *** [/eda/processor-ci/makefiles/colorlight_i9.mk:13: colorlight_i9.json] Error 1

Traceback (most recent call last):
  File "/eda/processor-ci/main.py", line 79, in <module>
    main(
  File "/eda/processor-ci/main.py", line 26, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor-ci/core/fpga.py", line 113, in build
    raise subprocess.CalledProcessError(process.returncode, "make")
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] sh
+ python3 /eda/processor-ci/main.py -c /eda/processor-ci/config.json -p Risco-5 -b digilent_nexys4_ddr
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash colorlight_i9)
Stage "Flash colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Teste colorlight_i9)
Stage "Teste colorlight_i9" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: colorlight_i9]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch colorlight_i9
Arquivo de configura����o final gerado em /var/lib/jenkins/workspace/Risco-5/Risco-5/build_digilent_nexys4_ddr.tcl
Erro ao executar o Makefile.
ERROR: [Common 17-69] Command failed: File '/var/lib/jenkins/workspace/Risco-5/Risco-5/src/core/alu.v' does not exist
make: *** [/eda/processor-ci/makefiles/digilent_nexys4_ddr.mk:12: digilent_nexys4_ddr.bit] Error 1

Traceback (most recent call last):
  File "/eda/processor-ci/main.py", line 79, in <module>
    main(
  File "/eda/processor-ci/main.py", line 26, in main
    build(build_file_path, board_name, toolchain_path)
  File "/eda/processor-ci/core/fpga.py", line 113, in build
    raise subprocess.CalledProcessError(process.returncode, "make")
subprocess.CalledProcessError: Command 'make' returned non-zero exit status 2.
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Flash digilent_nexys4_ddr)
Stage "Flash digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Teste digilent_nexys4_ddr)
Stage "Teste digilent_nexys4_ddr" skipped due to earlier failure(s)
[Pipeline] getContext
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Lock released on resource [Resource: digilent_nexys4_ddr]
[Pipeline] // lock
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
Failed in branch digilent_nexys4_ddr
[Pipeline] // parallel
[Pipeline] }
[Pipeline] // stage
[Pipeline] stage
[Pipeline] { (Declarative: Post Actions)
[Pipeline] dir
Running in /var/lib/jenkins/workspace/Risco-5/Risco-5
[Pipeline] {
[Pipeline] sh
+ rm -rf build_colorlight_i9.tcl build_digilent_nexys4_ddr.tcl
[Pipeline] }
[Pipeline] // dir
[Pipeline] }
[Pipeline] // stage
[Pipeline] }
[Pipeline] // node
[Pipeline] End of Pipeline
ERROR: script returned exit code 1
Finished: FAILURE