Skip to content
[Jenkins]Jenkins
log in

Workspace

/ SuperScalar-RISCV-CPU /
.git
.Xil
rtl
scr1
ssrv-on-scr1
testbench
wiki
.gitattributesJul 3, 2026, 5:44:17 AM378 B
.gitignoreJul 3, 2026, 5:44:17 AM315 B
build_digilent_arty_a7_100t.tclJul 3, 2026, 5:45:09 AM3.70 KiB
clockInfo.txtJul 3, 2026, 5:49:08 AM375 B
digilent_arty_a7_100t.bitJul 3, 2026, 5:51:51 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 3, 2026, 5:49:54 AM24.11 KiB
digilent_arty_a7_control_sets.rptJul 3, 2026, 5:49:51 AM25.04 KiB
digilent_arty_a7_drc.rptJul 3, 2026, 5:51:12 AM2.34 KiB
digilent_arty_a7_io.rptJul 3, 2026, 5:49:51 AM96.81 KiB
digilent_arty_a7_power.rptJul 3, 2026, 5:51:24 AM9.05 KiB
digilent_arty_a7_route_status.rptJul 3, 2026, 5:51:08 AM651 B
digilent_arty_a7_timing.rptJul 3, 2026, 5:51:13 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 3, 2026, 5:49:50 AM5.86 KiB
digilent_arty_a7_utilization_place.rptJul 3, 2026, 5:49:51 AM10.71 KiB
processor_ci_defines.vhJul 3, 2026, 5:45:09 AM300 B
README.mdJul 3, 2026, 5:44:17 AM5.95 KiB