Skip to content

Workspace

/ biriscv /
.git
.Xil
docs
src
tb
build_digilent_arty_a7_100t.tclJul 11, 2026, 3:12:10 AM5.10 KiB
clockInfo.txtJul 11, 2026, 3:18:52 AM375 B
digilent_arty_a7_100t.bitJul 11, 2026, 3:20:06 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 11, 2026, 3:19:04 AM23.67 KiB
digilent_arty_a7_control_sets.rptJul 11, 2026, 3:19:03 AM33.64 KiB
digilent_arty_a7_drc.rptJul 11, 2026, 3:19:43 AM16.84 KiB
digilent_arty_a7_io.rptJul 11, 2026, 3:19:03 AM96.81 KiB
digilent_arty_a7_power.rptJul 11, 2026, 3:19:46 AM8.74 KiB
digilent_arty_a7_route_status.rptJul 11, 2026, 3:19:42 AM651 B
digilent_arty_a7_timing.rptJul 11, 2026, 3:19:44 AM22.74 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 11, 2026, 3:19:02 AM7.02 KiB
digilent_arty_a7_utilization_place.rptJul 11, 2026, 3:19:03 AM10.78 KiB
LICENSEJul 11, 2026, 3:12:03 AM11.09 KiB
processor_ci_defines.vhJul 11, 2026, 3:12:10 AM300 B
README.mdJul 11, 2026, 3:12:03 AM6.30 KiB