Skip to content

Workspace

/ cv32e40p /
.git
.github
.Xil
bhv
ci
constraints
docs
example_tb
rtl
scripts
sva
util
.dir-locals.elJul 15, 2026, 4:01:06 AM422 B
.gitignoreJul 15, 2026, 4:01:06 AM262 B
.gitlab-ci.ymlJul 15, 2026, 4:01:06 AM257 B
.readthedocs.yamlJul 15, 2026, 4:01:06 AM499 B
.travis.ymlJul 15, 2026, 4:01:06 AM3.12 KiB
Bender.ymlJul 15, 2026, 4:01:06 AM1.95 KiB
build_digilent_arty_a7_100t.tclJul 15, 2026, 4:01:17 AM4.97 KiB
CITATION.cffJul 15, 2026, 4:01:06 AM1.39 KiB
clockInfo.txtJul 15, 2026, 4:02:35 AM375 B
CONTRIBUTING.mdJul 15, 2026, 4:01:06 AM3.80 KiB
cv32e40p_fpu_manifest.flistJul 15, 2026, 4:01:06 AM4.83 KiB
cv32e40p_manifest.flistJul 15, 2026, 4:01:06 AM2.46 KiB
digilent_arty_a7_100t.bitJul 15, 2026, 4:03:34 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptJul 15, 2026, 4:02:41 AM17.81 KiB
digilent_arty_a7_control_sets.rptJul 15, 2026, 4:02:41 AM13.74 KiB
digilent_arty_a7_drc.rptJul 15, 2026, 4:03:14 AM2.34 KiB
digilent_arty_a7_io.rptJul 15, 2026, 4:02:41 AM96.81 KiB
digilent_arty_a7_power.rptJul 15, 2026, 4:03:15 AM8.59 KiB
digilent_arty_a7_route_status.rptJul 15, 2026, 4:03:13 AM651 B
digilent_arty_a7_timing.rptJul 15, 2026, 4:03:15 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptJul 15, 2026, 4:02:41 AM3.50 KiB
digilent_arty_a7_utilization_place.rptJul 15, 2026, 4:02:41 AM10.57 KiB
LICENSEJul 15, 2026, 4:01:06 AM10.09 KiB
processor_ci_defines.vhJul 15, 2026, 4:01:17 AM300 B
python-requirements.txtJul 15, 2026, 4:01:06 AM164 B
README.mdJul 15, 2026, 4:01:06 AM5.64 KiB
src_files.ymlJul 15, 2026, 4:01:06 AM2.48 KiB