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.Xil
bhv
constraints
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rtl
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tb
yaml
.dir-locals.elMay 19, 2026, 4:26:12 AM422 B
.gitignoreMay 19, 2026, 4:26:12 AM14 B
.readthedocs.yamlMay 19, 2026, 4:26:12 AM497 B
build_digilent_arty_a7_100t.tclMay 19, 2026, 4:28:29 AM6.87 KiB
clockInfo.txtMay 19, 2026, 4:31:52 AM375 B
CONTRIBUTING.mdMay 19, 2026, 4:26:12 AM1.22 KiB
cv32e40s_manifest.flistMay 19, 2026, 4:26:12 AM3.63 KiB
digilent_arty_a7_100t.bitMay 19, 2026, 4:33:14 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptMay 19, 2026, 4:32:07 AM32.40 KiB
digilent_arty_a7_control_sets.rptMay 19, 2026, 4:32:06 AM47.61 KiB
digilent_arty_a7_drc.rptMay 19, 2026, 4:32:51 AM25.78 KiB
digilent_arty_a7_io.rptMay 19, 2026, 4:32:06 AM96.81 KiB
digilent_arty_a7_power.rptMay 19, 2026, 4:32:53 AM9.04 KiB
digilent_arty_a7_route_status.rptMay 19, 2026, 4:32:49 AM651 B
digilent_arty_a7_timing.rptMay 19, 2026, 4:32:52 AM24.66 KiB
digilent_arty_a7_utilization_hierarchical_place.rptMay 19, 2026, 4:32:06 AM54.52 KiB
digilent_arty_a7_utilization_place.rptMay 19, 2026, 4:32:06 AM10.82 KiB
LICENSEMay 19, 2026, 4:26:12 AM10.09 KiB
processor_ci_defines.vhMay 19, 2026, 4:28:29 AM300 B
README.mdMay 19, 2026, 4:26:12 AM2.88 KiB