//FROM ## 2.4 Integer Computational Instructions
//### Integer Register-Immediate Instructions
//

[wavedrom, ,svg]
....
{reg: [
  {bits: 7,  name: 'opcode',    attr: ['7', 'OP-IMM', 'OP-IMM', 'OP-IMM']},
  {bits: 5,  name: 'rd',        attr: ['5', 'dest', 'dest', 'dest']},
  {bits: 3,  name: 'funct3',     attr: ['3', 'SLLI', 'SRLI', 'SRAI']},
  {bits: 5,  name: 'rs1',       attr: ['5', 'src', 'src', 'src']},
  {bits: 5,  name: 'imm[4:0]',  attr: ['5', 'shamt[4:0]', 'shamt[4:0]', 'shamt[4:0]']},
  {bits: 7,  name: 'imm[11:5]', attr: ['7', 0, 0, 32]}
]}
....


