Skip to content
[Jenkins]Jenkins
log in

Workspace

/ e200_opensource /
.git
.Xil
boards
doc
fpga
prebuilt_tools
riscv-tools
rtl/e203
sirv-e-sdk
tb
vsim
.gitignoreApr 13, 2026, 4:33:31 AM216 B
book2pic.jpgApr 13, 2026, 4:33:32 AM69.45 KiB
bookpic.jpgApr 13, 2026, 4:33:32 AM71.73 KiB
build_digilent_arty_a7_100t.tclApr 13, 2026, 4:37:13 AM6.48 KiB
clockInfo.txtApr 13, 2026, 4:38:11 AM375 B
digilent_arty_a7_100t.bitApr 13, 2026, 4:38:59 AM3.65 MiB
digilent_arty_a7_clock_utilization.rptApr 13, 2026, 4:38:16 AM16.56 KiB
digilent_arty_a7_control_sets.rptApr 13, 2026, 4:38:16 AM12.95 KiB
digilent_arty_a7_drc.rptApr 13, 2026, 4:38:47 AM2.34 KiB
digilent_arty_a7_io.rptApr 13, 2026, 4:38:16 AM96.81 KiB
digilent_arty_a7_power.rptApr 13, 2026, 4:38:48 AM8.59 KiB
digilent_arty_a7_route_status.rptApr 13, 2026, 4:38:47 AM651 B
digilent_arty_a7_timing.rptApr 13, 2026, 4:38:48 AM18.47 KiB
digilent_arty_a7_utilization_hierarchical_place.rptApr 13, 2026, 4:38:16 AM3.22 KiB
digilent_arty_a7_utilization_place.rptApr 13, 2026, 4:38:16 AM10.57 KiB
LICENSEApr 13, 2026, 4:33:31 AM11.09 KiB
processor_ci_defines.vhApr 13, 2026, 4:37:13 AM300 B
README.mdApr 13, 2026, 4:33:31 AM8.75 KiB