| .git |
| .Xil |
| boards |
| doc |
| fpga |
| prebuilt_tools |
| riscv-tools |
| rtl/e203 |
| sirv-e-sdk |
| tb |
| vsim |
| .gitignore | May 13, 2026, 4:34:06 AM | 216 B | |
| book2pic.jpg | May 13, 2026, 4:34:07 AM | 69.45 KiB | |
| bookpic.jpg | May 13, 2026, 4:34:07 AM | 71.73 KiB | |
| build_digilent_arty_a7_100t.tcl | May 13, 2026, 4:37:52 AM | 6.48 KiB | |
| clockInfo.txt | May 13, 2026, 4:38:50 AM | 375 B | |
| digilent_arty_a7_100t.bit | May 13, 2026, 4:39:44 AM | 3.65 MiB | |
| digilent_arty_a7_clock_utilization.rpt | May 13, 2026, 4:38:54 AM | 16.56 KiB | |
| digilent_arty_a7_control_sets.rpt | May 13, 2026, 4:38:54 AM | 12.95 KiB | |
| digilent_arty_a7_drc.rpt | May 13, 2026, 4:39:25 AM | 2.34 KiB | |
| digilent_arty_a7_io.rpt | May 13, 2026, 4:38:54 AM | 96.81 KiB | |
| digilent_arty_a7_power.rpt | May 13, 2026, 4:39:26 AM | 8.59 KiB | |
| digilent_arty_a7_route_status.rpt | May 13, 2026, 4:39:24 AM | 651 B | |
| digilent_arty_a7_timing.rpt | May 13, 2026, 4:39:26 AM | 18.47 KiB | |
| digilent_arty_a7_utilization_hierarchical_place.rpt | May 13, 2026, 4:38:53 AM | 3.22 KiB | |
| digilent_arty_a7_utilization_place.rpt | May 13, 2026, 4:38:53 AM | 10.57 KiB | |
| LICENSE | May 13, 2026, 4:34:06 AM | 11.09 KiB | |
| processor_ci_defines.vh | May 13, 2026, 4:37:52 AM | 300 B | |
| README.md | May 13, 2026, 4:34:06 AM | 8.75 KiB | |
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