-- Copyright (C) 2018  Intel Corporation. All rights reserved.
-- Your use of Intel Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Intel Program License 
-- Subscription Agreement, the Intel Quartus Prime License Agreement,
-- the Intel FPGA IP License Agreement, or other applicable license
-- agreement, including, without limitation, that your use is for
-- the sole purpose of programming logic devices manufactured by
-- Intel and sold by Intel or its authorized distributors.  Please
-- refer to the applicable agreement for further details.

-- Quartus Prime generated Memory Initialization File (.mif)

WIDTH=32;
DEPTH=256;

ADDRESS_RADIX=UNS;
DATA_RADIX=BIN;

CONTENT BEGIN
	0    :   00000000000000000000000000000000;
	1    :   00000000000100000000000100010011;
	2    :   00000000001000000000111110110011;
	3    :   00000000001000001000000010110011;
	4    :   00000000000100000000111110110011;
	5    :   00000000000100010000000100110011;
	6    :   00000000001000000000111110110011;
	7    :   00000000100000000000000001100111;
	[8..255]  :   00000000000000000000000000000000;
END;
