vendor_name = ModelSim
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/progmem.mif
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/datamem.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/mux_5_1.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/jump_target_unit.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/flushing_unit.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/adder.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg32b_falling_edge.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/IF_ID_DIV.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/forwarding_unit.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg4b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg3b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg2b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg1b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/MEM_WB_DIV.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/ID_EX_DIV.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/EX_MEM_DIV.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/register_file.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg32b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/program_counter.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/progmem_interface.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/mux_32_1.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/mux_2_1.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/microcontroller.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/datapath.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/datamem_interface.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/controller.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/ALU.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/microcontroller.vwf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/mux_3_1.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Project/Components/reg5b.vhd
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/progmem.qip
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/progmem.vhd
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/prmtvs_b.vhd
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/prmtvs_p.vhd
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/timing_b.vhd
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/vhdl/ieee/timing_p.vhd
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/altsyncram.tdf
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/stratix_ram_block.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/lpm_mux.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/lpm_decode.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/aglobal181.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/a_rdenreg.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/altrom.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/altram.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, d:/programs/intelfpga_lite/18.1/quartus/libraries/megafunctions/cbx.lst
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/altsyncram_5gs3.tdf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/decode_eca.tdf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/mux_isb.tdf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/altsyncram_0ed1.tdf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/decode_l0b.tdf
source_file = 1, E:/Documents-bkp/UFRN/TCC - with debug signals - Copy/Quartus/riscv_microcontroller/db/mux_5rb.tdf
design_name = microcontroller
instance = comp, \debug_pc_output[0]~output\, debug_pc_output[0]~output, microcontroller, 1
instance = comp, \debug_pc_output[1]~output\, debug_pc_output[1]~output, microcontroller, 1
instance = comp, \debug_pc_output[2]~output\, debug_pc_output[2]~output, microcontroller, 1
instance = comp, \debug_pc_output[3]~output\, debug_pc_output[3]~output, microcontroller, 1
instance = comp, \debug_pc_output[4]~output\, debug_pc_output[4]~output, microcontroller, 1
instance = comp, \debug_pc_output[5]~output\, debug_pc_output[5]~output, microcontroller, 1
instance = comp, \debug_pc_output[6]~output\, debug_pc_output[6]~output, microcontroller, 1
instance = comp, \debug_pc_output[7]~output\, debug_pc_output[7]~output, microcontroller, 1
instance = comp, \debug_pc_output[8]~output\, debug_pc_output[8]~output, microcontroller, 1
instance = comp, \debug_pc_output[9]~output\, debug_pc_output[9]~output, microcontroller, 1
instance = comp, \debug_pc_output[10]~output\, debug_pc_output[10]~output, microcontroller, 1
instance = comp, \debug_pc_output[11]~output\, debug_pc_output[11]~output, microcontroller, 1
instance = comp, \debug_pc_output[12]~output\, debug_pc_output[12]~output, microcontroller, 1
instance = comp, \debug_pc_output[13]~output\, debug_pc_output[13]~output, microcontroller, 1
instance = comp, \debug_pc_output[14]~output\, debug_pc_output[14]~output, microcontroller, 1
instance = comp, \debug_pc_output[15]~output\, debug_pc_output[15]~output, microcontroller, 1
instance = comp, \debug_pc_output[16]~output\, debug_pc_output[16]~output, microcontroller, 1
instance = comp, \debug_pc_output[17]~output\, debug_pc_output[17]~output, microcontroller, 1
instance = comp, \debug_pc_output[18]~output\, debug_pc_output[18]~output, microcontroller, 1
instance = comp, \debug_pc_output[19]~output\, debug_pc_output[19]~output, microcontroller, 1
instance = comp, \debug_pc_output[20]~output\, debug_pc_output[20]~output, microcontroller, 1
instance = comp, \debug_pc_output[21]~output\, debug_pc_output[21]~output, microcontroller, 1
instance = comp, \debug_pc_output[22]~output\, debug_pc_output[22]~output, microcontroller, 1
instance = comp, \debug_pc_output[23]~output\, debug_pc_output[23]~output, microcontroller, 1
instance = comp, \debug_pc_output[24]~output\, debug_pc_output[24]~output, microcontroller, 1
instance = comp, \debug_pc_output[25]~output\, debug_pc_output[25]~output, microcontroller, 1
instance = comp, \debug_pc_output[26]~output\, debug_pc_output[26]~output, microcontroller, 1
instance = comp, \debug_pc_output[27]~output\, debug_pc_output[27]~output, microcontroller, 1
instance = comp, \debug_pc_output[28]~output\, debug_pc_output[28]~output, microcontroller, 1
instance = comp, \debug_pc_output[29]~output\, debug_pc_output[29]~output, microcontroller, 1
instance = comp, \debug_pc_output[30]~output\, debug_pc_output[30]~output, microcontroller, 1
instance = comp, \debug_pc_output[31]~output\, debug_pc_output[31]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[0]~output\, debug_regfile_x31_output[0]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[1]~output\, debug_regfile_x31_output[1]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[2]~output\, debug_regfile_x31_output[2]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[3]~output\, debug_regfile_x31_output[3]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[4]~output\, debug_regfile_x31_output[4]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[5]~output\, debug_regfile_x31_output[5]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[6]~output\, debug_regfile_x31_output[6]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[7]~output\, debug_regfile_x31_output[7]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[8]~output\, debug_regfile_x31_output[8]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[9]~output\, debug_regfile_x31_output[9]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[10]~output\, debug_regfile_x31_output[10]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[11]~output\, debug_regfile_x31_output[11]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[12]~output\, debug_regfile_x31_output[12]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[13]~output\, debug_regfile_x31_output[13]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[14]~output\, debug_regfile_x31_output[14]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[15]~output\, debug_regfile_x31_output[15]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[16]~output\, debug_regfile_x31_output[16]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[17]~output\, debug_regfile_x31_output[17]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[18]~output\, debug_regfile_x31_output[18]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[19]~output\, debug_regfile_x31_output[19]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[20]~output\, debug_regfile_x31_output[20]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[21]~output\, debug_regfile_x31_output[21]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[22]~output\, debug_regfile_x31_output[22]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[23]~output\, debug_regfile_x31_output[23]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[24]~output\, debug_regfile_x31_output[24]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[25]~output\, debug_regfile_x31_output[25]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[26]~output\, debug_regfile_x31_output[26]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[27]~output\, debug_regfile_x31_output[27]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[28]~output\, debug_regfile_x31_output[28]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[29]~output\, debug_regfile_x31_output[29]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[30]~output\, debug_regfile_x31_output[30]~output, microcontroller, 1
instance = comp, \debug_regfile_x31_output[31]~output\, debug_regfile_x31_output[31]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[0]~output\, debug_regfile_x1_output[0]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[1]~output\, debug_regfile_x1_output[1]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[2]~output\, debug_regfile_x1_output[2]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[3]~output\, debug_regfile_x1_output[3]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[4]~output\, debug_regfile_x1_output[4]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[5]~output\, debug_regfile_x1_output[5]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[6]~output\, debug_regfile_x1_output[6]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[7]~output\, debug_regfile_x1_output[7]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[8]~output\, debug_regfile_x1_output[8]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[9]~output\, debug_regfile_x1_output[9]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[10]~output\, debug_regfile_x1_output[10]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[11]~output\, debug_regfile_x1_output[11]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[12]~output\, debug_regfile_x1_output[12]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[13]~output\, debug_regfile_x1_output[13]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[14]~output\, debug_regfile_x1_output[14]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[15]~output\, debug_regfile_x1_output[15]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[16]~output\, debug_regfile_x1_output[16]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[17]~output\, debug_regfile_x1_output[17]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[18]~output\, debug_regfile_x1_output[18]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[19]~output\, debug_regfile_x1_output[19]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[20]~output\, debug_regfile_x1_output[20]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[21]~output\, debug_regfile_x1_output[21]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[22]~output\, debug_regfile_x1_output[22]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[23]~output\, debug_regfile_x1_output[23]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[24]~output\, debug_regfile_x1_output[24]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[25]~output\, debug_regfile_x1_output[25]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[26]~output\, debug_regfile_x1_output[26]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[27]~output\, debug_regfile_x1_output[27]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[28]~output\, debug_regfile_x1_output[28]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[29]~output\, debug_regfile_x1_output[29]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[30]~output\, debug_regfile_x1_output[30]~output, microcontroller, 1
instance = comp, \debug_regfile_x1_output[31]~output\, debug_regfile_x1_output[31]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[0]~output\, debug_regfile_x2_output[0]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[1]~output\, debug_regfile_x2_output[1]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[2]~output\, debug_regfile_x2_output[2]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[3]~output\, debug_regfile_x2_output[3]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[4]~output\, debug_regfile_x2_output[4]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[5]~output\, debug_regfile_x2_output[5]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[6]~output\, debug_regfile_x2_output[6]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[7]~output\, debug_regfile_x2_output[7]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[8]~output\, debug_regfile_x2_output[8]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[9]~output\, debug_regfile_x2_output[9]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[10]~output\, debug_regfile_x2_output[10]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[11]~output\, debug_regfile_x2_output[11]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[12]~output\, debug_regfile_x2_output[12]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[13]~output\, debug_regfile_x2_output[13]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[14]~output\, debug_regfile_x2_output[14]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[15]~output\, debug_regfile_x2_output[15]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[16]~output\, debug_regfile_x2_output[16]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[17]~output\, debug_regfile_x2_output[17]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[18]~output\, debug_regfile_x2_output[18]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[19]~output\, debug_regfile_x2_output[19]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[20]~output\, debug_regfile_x2_output[20]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[21]~output\, debug_regfile_x2_output[21]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[22]~output\, debug_regfile_x2_output[22]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[23]~output\, debug_regfile_x2_output[23]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[24]~output\, debug_regfile_x2_output[24]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[25]~output\, debug_regfile_x2_output[25]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[26]~output\, debug_regfile_x2_output[26]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[27]~output\, debug_regfile_x2_output[27]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[28]~output\, debug_regfile_x2_output[28]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[29]~output\, debug_regfile_x2_output[29]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[30]~output\, debug_regfile_x2_output[30]~output, microcontroller, 1
instance = comp, \debug_regfile_x2_output[31]~output\, debug_regfile_x2_output[31]~output, microcontroller, 1
instance = comp, \debug_ALU_output[0]~output\, debug_ALU_output[0]~output, microcontroller, 1
instance = comp, \debug_ALU_output[1]~output\, debug_ALU_output[1]~output, microcontroller, 1
instance = comp, \debug_ALU_output[2]~output\, debug_ALU_output[2]~output, microcontroller, 1
instance = comp, \debug_ALU_output[3]~output\, debug_ALU_output[3]~output, microcontroller, 1
instance = comp, \debug_ALU_output[4]~output\, debug_ALU_output[4]~output, microcontroller, 1
instance = comp, \debug_ALU_output[5]~output\, debug_ALU_output[5]~output, microcontroller, 1
instance = comp, \debug_ALU_output[6]~output\, debug_ALU_output[6]~output, microcontroller, 1
instance = comp, \debug_ALU_output[7]~output\, debug_ALU_output[7]~output, microcontroller, 1
instance = comp, \debug_ALU_output[8]~output\, debug_ALU_output[8]~output, microcontroller, 1
instance = comp, \debug_ALU_output[9]~output\, debug_ALU_output[9]~output, microcontroller, 1
instance = comp, \debug_ALU_output[10]~output\, debug_ALU_output[10]~output, microcontroller, 1
instance = comp, \debug_ALU_output[11]~output\, debug_ALU_output[11]~output, microcontroller, 1
instance = comp, \debug_ALU_output[12]~output\, debug_ALU_output[12]~output, microcontroller, 1
instance = comp, \debug_ALU_output[13]~output\, debug_ALU_output[13]~output, microcontroller, 1
instance = comp, \debug_ALU_output[14]~output\, debug_ALU_output[14]~output, microcontroller, 1
instance = comp, \debug_ALU_output[15]~output\, debug_ALU_output[15]~output, microcontroller, 1
instance = comp, \debug_ALU_output[16]~output\, debug_ALU_output[16]~output, microcontroller, 1
instance = comp, \debug_ALU_output[17]~output\, debug_ALU_output[17]~output, microcontroller, 1
instance = comp, \debug_ALU_output[18]~output\, debug_ALU_output[18]~output, microcontroller, 1
instance = comp, \debug_ALU_output[19]~output\, debug_ALU_output[19]~output, microcontroller, 1
instance = comp, \debug_ALU_output[20]~output\, debug_ALU_output[20]~output, microcontroller, 1
instance = comp, \debug_ALU_output[21]~output\, debug_ALU_output[21]~output, microcontroller, 1
instance = comp, \debug_ALU_output[22]~output\, debug_ALU_output[22]~output, microcontroller, 1
instance = comp, \debug_ALU_output[23]~output\, debug_ALU_output[23]~output, microcontroller, 1
instance = comp, \debug_ALU_output[24]~output\, debug_ALU_output[24]~output, microcontroller, 1
instance = comp, \debug_ALU_output[25]~output\, debug_ALU_output[25]~output, microcontroller, 1
instance = comp, \debug_ALU_output[26]~output\, debug_ALU_output[26]~output, microcontroller, 1
instance = comp, \debug_ALU_output[27]~output\, debug_ALU_output[27]~output, microcontroller, 1
instance = comp, \debug_ALU_output[28]~output\, debug_ALU_output[28]~output, microcontroller, 1
instance = comp, \debug_ALU_output[29]~output\, debug_ALU_output[29]~output, microcontroller, 1
instance = comp, \debug_ALU_output[30]~output\, debug_ALU_output[30]~output, microcontroller, 1
instance = comp, \debug_ALU_output[31]~output\, debug_ALU_output[31]~output, microcontroller, 1
instance = comp, \debug_regfile_write~output\, debug_regfile_write~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[0]~output\, debug_ALU_input_0[0]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[1]~output\, debug_ALU_input_0[1]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[2]~output\, debug_ALU_input_0[2]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[3]~output\, debug_ALU_input_0[3]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[4]~output\, debug_ALU_input_0[4]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[5]~output\, debug_ALU_input_0[5]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[6]~output\, debug_ALU_input_0[6]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[7]~output\, debug_ALU_input_0[7]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[8]~output\, debug_ALU_input_0[8]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[9]~output\, debug_ALU_input_0[9]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[10]~output\, debug_ALU_input_0[10]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[11]~output\, debug_ALU_input_0[11]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[12]~output\, debug_ALU_input_0[12]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[13]~output\, debug_ALU_input_0[13]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[14]~output\, debug_ALU_input_0[14]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[15]~output\, debug_ALU_input_0[15]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[16]~output\, debug_ALU_input_0[16]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[17]~output\, debug_ALU_input_0[17]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[18]~output\, debug_ALU_input_0[18]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[19]~output\, debug_ALU_input_0[19]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[20]~output\, debug_ALU_input_0[20]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[21]~output\, debug_ALU_input_0[21]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[22]~output\, debug_ALU_input_0[22]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[23]~output\, debug_ALU_input_0[23]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[24]~output\, debug_ALU_input_0[24]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[25]~output\, debug_ALU_input_0[25]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[26]~output\, debug_ALU_input_0[26]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[27]~output\, debug_ALU_input_0[27]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[28]~output\, debug_ALU_input_0[28]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[29]~output\, debug_ALU_input_0[29]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[30]~output\, debug_ALU_input_0[30]~output, microcontroller, 1
instance = comp, \debug_ALU_input_0[31]~output\, debug_ALU_input_0[31]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[0]~output\, debug_ALU_input_1[0]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[1]~output\, debug_ALU_input_1[1]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[2]~output\, debug_ALU_input_1[2]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[3]~output\, debug_ALU_input_1[3]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[4]~output\, debug_ALU_input_1[4]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[5]~output\, debug_ALU_input_1[5]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[6]~output\, debug_ALU_input_1[6]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[7]~output\, debug_ALU_input_1[7]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[8]~output\, debug_ALU_input_1[8]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[9]~output\, debug_ALU_input_1[9]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[10]~output\, debug_ALU_input_1[10]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[11]~output\, debug_ALU_input_1[11]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[12]~output\, debug_ALU_input_1[12]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[13]~output\, debug_ALU_input_1[13]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[14]~output\, debug_ALU_input_1[14]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[15]~output\, debug_ALU_input_1[15]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[16]~output\, debug_ALU_input_1[16]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[17]~output\, debug_ALU_input_1[17]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[18]~output\, debug_ALU_input_1[18]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[19]~output\, debug_ALU_input_1[19]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[20]~output\, debug_ALU_input_1[20]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[21]~output\, debug_ALU_input_1[21]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[22]~output\, debug_ALU_input_1[22]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[23]~output\, debug_ALU_input_1[23]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[24]~output\, debug_ALU_input_1[24]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[25]~output\, debug_ALU_input_1[25]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[26]~output\, debug_ALU_input_1[26]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[27]~output\, debug_ALU_input_1[27]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[28]~output\, debug_ALU_input_1[28]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[29]~output\, debug_ALU_input_1[29]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[30]~output\, debug_ALU_input_1[30]~output, microcontroller, 1
instance = comp, \debug_ALU_input_1[31]~output\, debug_ALU_input_1[31]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0[0]~output\, debug_reg_file_read_address_0[0]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0[1]~output\, debug_reg_file_read_address_0[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0[2]~output\, debug_reg_file_read_address_0[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0[3]~output\, debug_reg_file_read_address_0[3]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0[4]~output\, debug_reg_file_read_address_0[4]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_1[0]~output\, debug_reg_file_read_address_1[0]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_1[1]~output\, debug_reg_file_read_address_1[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_1[2]~output\, debug_reg_file_read_address_1[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_1[3]~output\, debug_reg_file_read_address_1[3]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_1[4]~output\, debug_reg_file_read_address_1[4]~output, microcontroller, 1
instance = comp, \debug_mux0_sel[0]~output\, debug_mux0_sel[0]~output, microcontroller, 1
instance = comp, \debug_mux0_sel[1]~output\, debug_mux0_sel[1]~output, microcontroller, 1
instance = comp, \debug_immediate[0]~output\, debug_immediate[0]~output, microcontroller, 1
instance = comp, \debug_immediate[1]~output\, debug_immediate[1]~output, microcontroller, 1
instance = comp, \debug_immediate[2]~output\, debug_immediate[2]~output, microcontroller, 1
instance = comp, \debug_immediate[3]~output\, debug_immediate[3]~output, microcontroller, 1
instance = comp, \debug_immediate[4]~output\, debug_immediate[4]~output, microcontroller, 1
instance = comp, \debug_immediate[5]~output\, debug_immediate[5]~output, microcontroller, 1
instance = comp, \debug_immediate[6]~output\, debug_immediate[6]~output, microcontroller, 1
instance = comp, \debug_immediate[7]~output\, debug_immediate[7]~output, microcontroller, 1
instance = comp, \debug_immediate[8]~output\, debug_immediate[8]~output, microcontroller, 1
instance = comp, \debug_immediate[9]~output\, debug_immediate[9]~output, microcontroller, 1
instance = comp, \debug_immediate[10]~output\, debug_immediate[10]~output, microcontroller, 1
instance = comp, \debug_immediate[11]~output\, debug_immediate[11]~output, microcontroller, 1
instance = comp, \debug_immediate[12]~output\, debug_immediate[12]~output, microcontroller, 1
instance = comp, \debug_immediate[13]~output\, debug_immediate[13]~output, microcontroller, 1
instance = comp, \debug_immediate[14]~output\, debug_immediate[14]~output, microcontroller, 1
instance = comp, \debug_immediate[15]~output\, debug_immediate[15]~output, microcontroller, 1
instance = comp, \debug_immediate[16]~output\, debug_immediate[16]~output, microcontroller, 1
instance = comp, \debug_immediate[17]~output\, debug_immediate[17]~output, microcontroller, 1
instance = comp, \debug_immediate[18]~output\, debug_immediate[18]~output, microcontroller, 1
instance = comp, \debug_immediate[19]~output\, debug_immediate[19]~output, microcontroller, 1
instance = comp, \debug_immediate[20]~output\, debug_immediate[20]~output, microcontroller, 1
instance = comp, \debug_immediate[21]~output\, debug_immediate[21]~output, microcontroller, 1
instance = comp, \debug_immediate[22]~output\, debug_immediate[22]~output, microcontroller, 1
instance = comp, \debug_immediate[23]~output\, debug_immediate[23]~output, microcontroller, 1
instance = comp, \debug_immediate[24]~output\, debug_immediate[24]~output, microcontroller, 1
instance = comp, \debug_immediate[25]~output\, debug_immediate[25]~output, microcontroller, 1
instance = comp, \debug_immediate[26]~output\, debug_immediate[26]~output, microcontroller, 1
instance = comp, \debug_immediate[27]~output\, debug_immediate[27]~output, microcontroller, 1
instance = comp, \debug_immediate[28]~output\, debug_immediate[28]~output, microcontroller, 1
instance = comp, \debug_immediate[29]~output\, debug_immediate[29]~output, microcontroller, 1
instance = comp, \debug_immediate[30]~output\, debug_immediate[30]~output, microcontroller, 1
instance = comp, \debug_immediate[31]~output\, debug_immediate[31]~output, microcontroller, 1
instance = comp, \debug_ALU_operation[0]~output\, debug_ALU_operation[0]~output, microcontroller, 1
instance = comp, \debug_ALU_operation[1]~output\, debug_ALU_operation[1]~output, microcontroller, 1
instance = comp, \debug_ALU_operation[2]~output\, debug_ALU_operation[2]~output, microcontroller, 1
instance = comp, \debug_ALU_operation[3]~output\, debug_ALU_operation[3]~output, microcontroller, 1
instance = comp, \debug_forward_mux_0[0]~output\, debug_forward_mux_0[0]~output, microcontroller, 1
instance = comp, \debug_forward_mux_0[1]~output\, debug_forward_mux_0[1]~output, microcontroller, 1
instance = comp, \debug_forward_mux_0[2]~output\, debug_forward_mux_0[2]~output, microcontroller, 1
instance = comp, \debug_forward_mux_1[0]~output\, debug_forward_mux_1[0]~output, microcontroller, 1
instance = comp, \debug_forward_mux_1[1]~output\, debug_forward_mux_1[1]~output, microcontroller, 1
instance = comp, \debug_forward_mux_1[2]~output\, debug_forward_mux_1[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0_ID_EXE[0]~output\, debug_reg_file_read_address_0_ID_EXE[0]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0_ID_EXE[1]~output\, debug_reg_file_read_address_0_ID_EXE[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0_ID_EXE[2]~output\, debug_reg_file_read_address_0_ID_EXE[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0_ID_EXE[3]~output\, debug_reg_file_read_address_0_ID_EXE[3]~output, microcontroller, 1
instance = comp, \debug_reg_file_read_address_0_ID_EXE[4]~output\, debug_reg_file_read_address_0_ID_EXE[4]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_EX_MEM[0]~output\, debug_reg_file_write_address_EX_MEM[0]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_EX_MEM[1]~output\, debug_reg_file_write_address_EX_MEM[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_EX_MEM[2]~output\, debug_reg_file_write_address_EX_MEM[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_EX_MEM[3]~output\, debug_reg_file_write_address_EX_MEM[3]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_EX_MEM[4]~output\, debug_reg_file_write_address_EX_MEM[4]~output, microcontroller, 1
instance = comp, \debug_mux0_sel_MEM_WB[0]~output\, debug_mux0_sel_MEM_WB[0]~output, microcontroller, 1
instance = comp, \debug_mux0_sel_MEM_WB[1]~output\, debug_mux0_sel_MEM_WB[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_MEM_WB~output\, debug_reg_file_write_MEM_WB~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_MEM_WB[0]~output\, debug_reg_file_write_address_MEM_WB[0]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_MEM_WB[1]~output\, debug_reg_file_write_address_MEM_WB[1]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_MEM_WB[2]~output\, debug_reg_file_write_address_MEM_WB[2]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_MEM_WB[3]~output\, debug_reg_file_write_address_MEM_WB[3]~output, microcontroller, 1
instance = comp, \debug_reg_file_write_address_MEM_WB[4]~output\, debug_reg_file_write_address_MEM_WB[4]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[0]~output\, debug_ALU_output_MEM_WB[0]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[1]~output\, debug_ALU_output_MEM_WB[1]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[2]~output\, debug_ALU_output_MEM_WB[2]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[3]~output\, debug_ALU_output_MEM_WB[3]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[4]~output\, debug_ALU_output_MEM_WB[4]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[5]~output\, debug_ALU_output_MEM_WB[5]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[6]~output\, debug_ALU_output_MEM_WB[6]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[7]~output\, debug_ALU_output_MEM_WB[7]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[8]~output\, debug_ALU_output_MEM_WB[8]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[9]~output\, debug_ALU_output_MEM_WB[9]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[10]~output\, debug_ALU_output_MEM_WB[10]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[11]~output\, debug_ALU_output_MEM_WB[11]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[12]~output\, debug_ALU_output_MEM_WB[12]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[13]~output\, debug_ALU_output_MEM_WB[13]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[14]~output\, debug_ALU_output_MEM_WB[14]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[15]~output\, debug_ALU_output_MEM_WB[15]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[16]~output\, debug_ALU_output_MEM_WB[16]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[17]~output\, debug_ALU_output_MEM_WB[17]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[18]~output\, debug_ALU_output_MEM_WB[18]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[19]~output\, debug_ALU_output_MEM_WB[19]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[20]~output\, debug_ALU_output_MEM_WB[20]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[21]~output\, debug_ALU_output_MEM_WB[21]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[22]~output\, debug_ALU_output_MEM_WB[22]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[23]~output\, debug_ALU_output_MEM_WB[23]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[24]~output\, debug_ALU_output_MEM_WB[24]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[25]~output\, debug_ALU_output_MEM_WB[25]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[26]~output\, debug_ALU_output_MEM_WB[26]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[27]~output\, debug_ALU_output_MEM_WB[27]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[28]~output\, debug_ALU_output_MEM_WB[28]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[29]~output\, debug_ALU_output_MEM_WB[29]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[30]~output\, debug_ALU_output_MEM_WB[30]~output, microcontroller, 1
instance = comp, \debug_ALU_output_MEM_WB[31]~output\, debug_ALU_output_MEM_WB[31]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[0]~output\, debug_ALU_output_EX_MEM[0]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[1]~output\, debug_ALU_output_EX_MEM[1]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[2]~output\, debug_ALU_output_EX_MEM[2]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[3]~output\, debug_ALU_output_EX_MEM[3]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[4]~output\, debug_ALU_output_EX_MEM[4]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[5]~output\, debug_ALU_output_EX_MEM[5]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[6]~output\, debug_ALU_output_EX_MEM[6]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[7]~output\, debug_ALU_output_EX_MEM[7]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[8]~output\, debug_ALU_output_EX_MEM[8]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[9]~output\, debug_ALU_output_EX_MEM[9]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[10]~output\, debug_ALU_output_EX_MEM[10]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[11]~output\, debug_ALU_output_EX_MEM[11]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[12]~output\, debug_ALU_output_EX_MEM[12]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[13]~output\, debug_ALU_output_EX_MEM[13]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[14]~output\, debug_ALU_output_EX_MEM[14]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[15]~output\, debug_ALU_output_EX_MEM[15]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[16]~output\, debug_ALU_output_EX_MEM[16]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[17]~output\, debug_ALU_output_EX_MEM[17]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[18]~output\, debug_ALU_output_EX_MEM[18]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[19]~output\, debug_ALU_output_EX_MEM[19]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[20]~output\, debug_ALU_output_EX_MEM[20]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[21]~output\, debug_ALU_output_EX_MEM[21]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[22]~output\, debug_ALU_output_EX_MEM[22]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[23]~output\, debug_ALU_output_EX_MEM[23]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[24]~output\, debug_ALU_output_EX_MEM[24]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[25]~output\, debug_ALU_output_EX_MEM[25]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[26]~output\, debug_ALU_output_EX_MEM[26]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[27]~output\, debug_ALU_output_EX_MEM[27]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[28]~output\, debug_ALU_output_EX_MEM[28]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[29]~output\, debug_ALU_output_EX_MEM[29]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[30]~output\, debug_ALU_output_EX_MEM[30]~output, microcontroller, 1
instance = comp, \debug_ALU_output_EX_MEM[31]~output\, debug_ALU_output_EX_MEM[31]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[0]~output\, debug_register_file_output_0[0]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[1]~output\, debug_register_file_output_0[1]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[2]~output\, debug_register_file_output_0[2]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[3]~output\, debug_register_file_output_0[3]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[4]~output\, debug_register_file_output_0[4]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[5]~output\, debug_register_file_output_0[5]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[6]~output\, debug_register_file_output_0[6]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[7]~output\, debug_register_file_output_0[7]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[8]~output\, debug_register_file_output_0[8]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[9]~output\, debug_register_file_output_0[9]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[10]~output\, debug_register_file_output_0[10]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[11]~output\, debug_register_file_output_0[11]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[12]~output\, debug_register_file_output_0[12]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[13]~output\, debug_register_file_output_0[13]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[14]~output\, debug_register_file_output_0[14]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[15]~output\, debug_register_file_output_0[15]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[16]~output\, debug_register_file_output_0[16]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[17]~output\, debug_register_file_output_0[17]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[18]~output\, debug_register_file_output_0[18]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[19]~output\, debug_register_file_output_0[19]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[20]~output\, debug_register_file_output_0[20]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[21]~output\, debug_register_file_output_0[21]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[22]~output\, debug_register_file_output_0[22]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[23]~output\, debug_register_file_output_0[23]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[24]~output\, debug_register_file_output_0[24]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[25]~output\, debug_register_file_output_0[25]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[26]~output\, debug_register_file_output_0[26]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[27]~output\, debug_register_file_output_0[27]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[28]~output\, debug_register_file_output_0[28]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[29]~output\, debug_register_file_output_0[29]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[30]~output\, debug_register_file_output_0[30]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0[31]~output\, debug_register_file_output_0[31]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[0]~output\, debug_register_file_output_1[0]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[1]~output\, debug_register_file_output_1[1]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[2]~output\, debug_register_file_output_1[2]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[3]~output\, debug_register_file_output_1[3]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[4]~output\, debug_register_file_output_1[4]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[5]~output\, debug_register_file_output_1[5]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[6]~output\, debug_register_file_output_1[6]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[7]~output\, debug_register_file_output_1[7]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[8]~output\, debug_register_file_output_1[8]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[9]~output\, debug_register_file_output_1[9]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[10]~output\, debug_register_file_output_1[10]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[11]~output\, debug_register_file_output_1[11]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[12]~output\, debug_register_file_output_1[12]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[13]~output\, debug_register_file_output_1[13]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[14]~output\, debug_register_file_output_1[14]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[15]~output\, debug_register_file_output_1[15]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[16]~output\, debug_register_file_output_1[16]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[17]~output\, debug_register_file_output_1[17]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[18]~output\, debug_register_file_output_1[18]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[19]~output\, debug_register_file_output_1[19]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[20]~output\, debug_register_file_output_1[20]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[21]~output\, debug_register_file_output_1[21]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[22]~output\, debug_register_file_output_1[22]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[23]~output\, debug_register_file_output_1[23]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[24]~output\, debug_register_file_output_1[24]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[25]~output\, debug_register_file_output_1[25]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[26]~output\, debug_register_file_output_1[26]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[27]~output\, debug_register_file_output_1[27]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[28]~output\, debug_register_file_output_1[28]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[29]~output\, debug_register_file_output_1[29]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[30]~output\, debug_register_file_output_1[30]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1[31]~output\, debug_register_file_output_1[31]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[0]~output\, debug_register_file_output_0_ID_EX[0]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[1]~output\, debug_register_file_output_0_ID_EX[1]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[2]~output\, debug_register_file_output_0_ID_EX[2]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[3]~output\, debug_register_file_output_0_ID_EX[3]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[4]~output\, debug_register_file_output_0_ID_EX[4]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[5]~output\, debug_register_file_output_0_ID_EX[5]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[6]~output\, debug_register_file_output_0_ID_EX[6]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[7]~output\, debug_register_file_output_0_ID_EX[7]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[8]~output\, debug_register_file_output_0_ID_EX[8]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[9]~output\, debug_register_file_output_0_ID_EX[9]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[10]~output\, debug_register_file_output_0_ID_EX[10]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[11]~output\, debug_register_file_output_0_ID_EX[11]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[12]~output\, debug_register_file_output_0_ID_EX[12]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[13]~output\, debug_register_file_output_0_ID_EX[13]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[14]~output\, debug_register_file_output_0_ID_EX[14]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[15]~output\, debug_register_file_output_0_ID_EX[15]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[16]~output\, debug_register_file_output_0_ID_EX[16]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[17]~output\, debug_register_file_output_0_ID_EX[17]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[18]~output\, debug_register_file_output_0_ID_EX[18]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[19]~output\, debug_register_file_output_0_ID_EX[19]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[20]~output\, debug_register_file_output_0_ID_EX[20]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[21]~output\, debug_register_file_output_0_ID_EX[21]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[22]~output\, debug_register_file_output_0_ID_EX[22]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[23]~output\, debug_register_file_output_0_ID_EX[23]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[24]~output\, debug_register_file_output_0_ID_EX[24]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[25]~output\, debug_register_file_output_0_ID_EX[25]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[26]~output\, debug_register_file_output_0_ID_EX[26]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[27]~output\, debug_register_file_output_0_ID_EX[27]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[28]~output\, debug_register_file_output_0_ID_EX[28]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[29]~output\, debug_register_file_output_0_ID_EX[29]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[30]~output\, debug_register_file_output_0_ID_EX[30]~output, microcontroller, 1
instance = comp, \debug_register_file_output_0_ID_EX[31]~output\, debug_register_file_output_0_ID_EX[31]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[0]~output\, debug_register_file_output_1_ID_EX[0]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[1]~output\, debug_register_file_output_1_ID_EX[1]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[2]~output\, debug_register_file_output_1_ID_EX[2]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[3]~output\, debug_register_file_output_1_ID_EX[3]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[4]~output\, debug_register_file_output_1_ID_EX[4]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[5]~output\, debug_register_file_output_1_ID_EX[5]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[6]~output\, debug_register_file_output_1_ID_EX[6]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[7]~output\, debug_register_file_output_1_ID_EX[7]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[8]~output\, debug_register_file_output_1_ID_EX[8]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[9]~output\, debug_register_file_output_1_ID_EX[9]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[10]~output\, debug_register_file_output_1_ID_EX[10]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[11]~output\, debug_register_file_output_1_ID_EX[11]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[12]~output\, debug_register_file_output_1_ID_EX[12]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[13]~output\, debug_register_file_output_1_ID_EX[13]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[14]~output\, debug_register_file_output_1_ID_EX[14]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[15]~output\, debug_register_file_output_1_ID_EX[15]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[16]~output\, debug_register_file_output_1_ID_EX[16]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[17]~output\, debug_register_file_output_1_ID_EX[17]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[18]~output\, debug_register_file_output_1_ID_EX[18]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[19]~output\, debug_register_file_output_1_ID_EX[19]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[20]~output\, debug_register_file_output_1_ID_EX[20]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[21]~output\, debug_register_file_output_1_ID_EX[21]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[22]~output\, debug_register_file_output_1_ID_EX[22]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[23]~output\, debug_register_file_output_1_ID_EX[23]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[24]~output\, debug_register_file_output_1_ID_EX[24]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[25]~output\, debug_register_file_output_1_ID_EX[25]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[26]~output\, debug_register_file_output_1_ID_EX[26]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[27]~output\, debug_register_file_output_1_ID_EX[27]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[28]~output\, debug_register_file_output_1_ID_EX[28]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[29]~output\, debug_register_file_output_1_ID_EX[29]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[30]~output\, debug_register_file_output_1_ID_EX[30]~output, microcontroller, 1
instance = comp, \debug_register_file_output_1_ID_EX[31]~output\, debug_register_file_output_1_ID_EX[31]~output, microcontroller, 1
instance = comp, \debug_instruction[0]~output\, debug_instruction[0]~output, microcontroller, 1
instance = comp, \debug_instruction[1]~output\, debug_instruction[1]~output, microcontroller, 1
instance = comp, \debug_instruction[2]~output\, debug_instruction[2]~output, microcontroller, 1
instance = comp, \debug_instruction[3]~output\, debug_instruction[3]~output, microcontroller, 1
instance = comp, \debug_instruction[4]~output\, debug_instruction[4]~output, microcontroller, 1
instance = comp, \debug_instruction[5]~output\, debug_instruction[5]~output, microcontroller, 1
instance = comp, \debug_instruction[6]~output\, debug_instruction[6]~output, microcontroller, 1
instance = comp, \debug_instruction[7]~output\, debug_instruction[7]~output, microcontroller, 1
instance = comp, \debug_instruction[8]~output\, debug_instruction[8]~output, microcontroller, 1
instance = comp, \debug_instruction[9]~output\, debug_instruction[9]~output, microcontroller, 1
instance = comp, \debug_instruction[10]~output\, debug_instruction[10]~output, microcontroller, 1
instance = comp, \debug_instruction[11]~output\, debug_instruction[11]~output, microcontroller, 1
instance = comp, \debug_instruction[12]~output\, debug_instruction[12]~output, microcontroller, 1
instance = comp, \debug_instruction[13]~output\, debug_instruction[13]~output, microcontroller, 1
instance = comp, \debug_instruction[14]~output\, debug_instruction[14]~output, microcontroller, 1
instance = comp, \debug_instruction[15]~output\, debug_instruction[15]~output, microcontroller, 1
instance = comp, \debug_instruction[16]~output\, debug_instruction[16]~output, microcontroller, 1
instance = comp, \debug_instruction[17]~output\, debug_instruction[17]~output, microcontroller, 1
instance = comp, \debug_instruction[18]~output\, debug_instruction[18]~output, microcontroller, 1
instance = comp, \debug_instruction[19]~output\, debug_instruction[19]~output, microcontroller, 1
instance = comp, \debug_instruction[20]~output\, debug_instruction[20]~output, microcontroller, 1
instance = comp, \debug_instruction[21]~output\, debug_instruction[21]~output, microcontroller, 1
instance = comp, \debug_instruction[22]~output\, debug_instruction[22]~output, microcontroller, 1
instance = comp, \debug_instruction[23]~output\, debug_instruction[23]~output, microcontroller, 1
instance = comp, \debug_instruction[24]~output\, debug_instruction[24]~output, microcontroller, 1
instance = comp, \debug_instruction[25]~output\, debug_instruction[25]~output, microcontroller, 1
instance = comp, \debug_instruction[26]~output\, debug_instruction[26]~output, microcontroller, 1
instance = comp, \debug_instruction[27]~output\, debug_instruction[27]~output, microcontroller, 1
instance = comp, \debug_instruction[28]~output\, debug_instruction[28]~output, microcontroller, 1
instance = comp, \debug_instruction[29]~output\, debug_instruction[29]~output, microcontroller, 1
instance = comp, \debug_instruction[30]~output\, debug_instruction[30]~output, microcontroller, 1
instance = comp, \debug_instruction[31]~output\, debug_instruction[31]~output, microcontroller, 1
instance = comp, \clock~input\, clock~input, microcontroller, 1
instance = comp, \reset~input\, reset~input, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~26\, datapath_0|datamem_module_0|datamem_0|RAM~26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux62~0\, datapath_0|datamem_module_0|Mux62~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux69~0\, datapath_0|datamem_module_0|Mux69~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux46~0\, datapath_0|datamem_module_0|Mux46~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux12~3\, datapath_0|datamem_module_0|Mux12~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux19~0\, datapath_0|datamem_module_0|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux11~1\, datapath_0|datamem_module_0|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux19~1\, datapath_0|datamem_module_0|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux12~0\, datapath_0|datamem_module_0|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux39~0\, datapath_0|datamem_module_0|Mux39~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[1]\, datapath_0|datamem_module_0|memory_input_0[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux62~1\, datapath_0|datamem_module_0|Mux62~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux20~2\, datapath_0|datamem_module_0|Mux20~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux33~0\, datapath_0|datamem_module_0|Mux33~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[29]\, datapath_0|datamem_module_0|output_data[29], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[29]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux34~0\, datapath_0|datamem_module_0|Mux34~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[30]\, datapath_0|datamem_module_0|output_data[30], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[30]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a207\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a207, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[1]\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[1], microcontroller, 1
instance = comp, \controller_0|Mux23~4\, controller_0|Mux23~4, microcontroller, 1
instance = comp, \controller_0|Mux24~0\, controller_0|Mux24~0, microcontroller, 1
instance = comp, \controller_0|Mux42~0\, controller_0|Mux42~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a193\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a193, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a161\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a161, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[0]\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~1\, datapath_0|datamem_module_0|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux54~2\, datapath_0|datamem_module_0|Mux54~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux32~0\, datapath_0|datamem_module_0|Mux32~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[28]\, datapath_0|datamem_module_0|output_data[28], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[28]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a212\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a212, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a180\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a180, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a148\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a148, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~100\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~100, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1130w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1130w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a244\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a244, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~101\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~101, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1064w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1064w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a52\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a52, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1075w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1075w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a84\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a84, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1046w[3]\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1046w[3], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a20\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a20, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~102\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~102, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1086w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1086w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a116\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a116, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~103\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~103, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[2]\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|address_reg_a[2], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~104\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~104, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|jump_flag_reg|reg_out\, datapath_0|ID_EX_PLR|jump_flag_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|jump_flag_reg|reg_out\, datapath_0|EX_MEM_PLR|jump_flag_reg|reg_out, microcontroller, 1
instance = comp, \controller_0|Mux29~0\, controller_0|Mux29~0, microcontroller, 1
instance = comp, \controller_0|Mux29~1\, controller_0|Mux29~1, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.INVALID_1924\, controller_0|decoded_cluster.INVALID_1924, microcontroller, 1
instance = comp, \controller_0|WideNor1\, controller_0|WideNor1, microcontroller, 1
instance = comp, \controller_0|internal_ALU_branch\, controller_0|internal_ALU_branch, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_branch_reg|reg_out\, datapath_0|ID_EX_PLR|ALU_branch_reg|reg_out, microcontroller, 1
instance = comp, \controller_0|Selector15~0\, controller_0|Selector15~0, microcontroller, 1
instance = comp, \controller_0|internal_ALU_branch_control[1]\, controller_0|internal_ALU_branch_control[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[1]\, datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[1], microcontroller, 1
instance = comp, \controller_0|Selector16~0\, controller_0|Selector16~0, microcontroller, 1
instance = comp, \controller_0|internal_ALU_branch_control[2]\, controller_0|internal_ALU_branch_control[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[2]\, datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[2], microcontroller, 1
instance = comp, \controller_0|Mux33~0\, controller_0|Mux33~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.AUIPC_1816\, controller_0|decoded_cluster.AUIPC_1816, microcontroller, 1
instance = comp, \controller_0|WideOr14~0\, controller_0|WideOr14~0, microcontroller, 1
instance = comp, \controller_0|WideOr6~0\, controller_0|WideOr6~0, microcontroller, 1
instance = comp, \controller_0|WideOr21\, controller_0|WideOr21, microcontroller, 1
instance = comp, \controller_0|Selector21~0\, controller_0|Selector21~0, microcontroller, 1
instance = comp, \controller_0|Mux41~0\, controller_0|Mux41~0, microcontroller, 1
instance = comp, \controller_0|Mux41~1\, controller_0|Mux41~1, microcontroller, 1
instance = comp, \controller_0|Mux36~0\, controller_0|Mux36~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.SLTIU_1666\, controller_0|decoded_opcode.SLTIU_1666, microcontroller, 1
instance = comp, \controller_0|Mux35~0\, controller_0|Mux35~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.SLTI_1672\, controller_0|decoded_opcode.SLTI_1672, microcontroller, 1
instance = comp, \controller_0|Mux34~0\, controller_0|Mux34~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.ADDI_1678\, controller_0|decoded_opcode.ADDI_1678, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.OP_IMM_1840\, controller_0|decoded_cluster.OP_IMM_1840, microcontroller, 1
instance = comp, \controller_0|Selector28~0\, controller_0|Selector28~0, microcontroller, 1
instance = comp, \controller_0|Mux39~0\, controller_0|Mux39~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.ANDI_1648\, controller_0|decoded_opcode.ANDI_1648, microcontroller, 1
instance = comp, \controller_0|Mux40~0\, controller_0|Mux40~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.SLLI_1642\, controller_0|decoded_opcode.SLLI_1642, microcontroller, 1
instance = comp, \controller_0|Mux41~2\, controller_0|Mux41~2, microcontroller, 1
instance = comp, \controller_0|Mux41~3\, controller_0|Mux41~3, microcontroller, 1
instance = comp, \controller_0|Mux28~0\, controller_0|Mux28~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.SRAI_1630\, controller_0|decoded_opcode.SRAI_1630, microcontroller, 1
instance = comp, \controller_0|Mux41~4\, controller_0|Mux41~4, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.SRLI_1636\, controller_0|decoded_opcode.SRLI_1636, microcontroller, 1
instance = comp, \controller_0|Selector74~0\, controller_0|Selector74~0, microcontroller, 1
instance = comp, \controller_0|Mux38~0\, controller_0|Mux38~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.ORI_1654\, controller_0|decoded_opcode.ORI_1654, microcontroller, 1
instance = comp, \controller_0|Mux37~0\, controller_0|Mux37~0, microcontroller, 1
instance = comp, \controller_0|decoded_opcode.XORI_1660\, controller_0|decoded_opcode.XORI_1660, microcontroller, 1
instance = comp, \controller_0|Selector74~1\, controller_0|Selector74~1, microcontroller, 1
instance = comp, \controller_0|Selector28~1\, controller_0|Selector28~1, microcontroller, 1
instance = comp, \controller_0|internal_ALU_operation[2]\, controller_0|internal_ALU_operation[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[2]\, datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a223\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a223, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a191\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a191, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a159\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a159, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~155\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~155, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a255\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a255, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~156\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~156, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a63\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a63, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a95\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a95, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a31\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a31, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~157\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~157, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a127\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a127, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~158\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~158, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~159\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~159, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[31]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[31], microcontroller, 1
instance = comp, \controller_0|Selector74~2\, controller_0|Selector74~2, microcontroller, 1
instance = comp, \controller_0|Selector76~1\, controller_0|Selector76~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[31]\, controller_0|internal_immediate[31], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[31]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[31], microcontroller, 1
instance = comp, \controller_0|Selector19~0\, controller_0|Selector19~0, microcontroller, 1
instance = comp, \controller_0|internal_ALU_operation[0]\, controller_0|internal_ALU_operation[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[0]\, datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[0], microcontroller, 1
instance = comp, \controller_0|Selector20~0\, controller_0|Selector20~0, microcontroller, 1
instance = comp, \controller_0|internal_ALU_operation[1]\, controller_0|internal_ALU_operation[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[1]\, datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~9\, datapath_0|ALU_0|Mux96~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~7\, datapath_0|ALU_0|Add0~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~8\, datapath_0|ALU_0|Add0~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~9\, datapath_0|ALU_0|Add0~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[4]~1\, datapath_0|ALU_0|result_temp[4]~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~10\, datapath_0|ALU_0|Add0~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~4\, datapath_0|ALU_0|Add0~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~11\, datapath_0|ALU_0|Add0~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[32]~0\, datapath_0|ALU_0|result_temp[32]~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~12\, datapath_0|ALU_0|Add0~12, microcontroller, 1
instance = comp, \controller_0|Selector62~0\, controller_0|Selector62~0, microcontroller, 1
instance = comp, \controller_0|Selector72~0\, controller_0|Selector72~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[30]\, controller_0|internal_immediate[30], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[30]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~13\, datapath_0|ALU_0|Add0~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~14\, datapath_0|ALU_0|Add0~14, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a221\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a221, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a189\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a189, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a157\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a157, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~145\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~145, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a253\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a253, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~146\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~146, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a61\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a61, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a93\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a93, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a29\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a29, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~147\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~147, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a125\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a125, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~148\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~148, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~149\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~149, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[29]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[29], microcontroller, 1
instance = comp, \controller_0|Selector71~0\, controller_0|Selector71~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[29]\, controller_0|internal_immediate[29], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[29]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~15\, datapath_0|ALU_0|Add0~15, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a211\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a211, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a179\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a179, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a147\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a147, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~95\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~95, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a243\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a243, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~96\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~96, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a51\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a51, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a83\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a83, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a19\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a19, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~97\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~97, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a115\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a115, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~98\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~98, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~99\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~99, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[19]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[19], microcontroller, 1
instance = comp, \controller_0|Mux26~0\, controller_0|Mux26~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.OP_1834\, controller_0|decoded_cluster.OP_1834, microcontroller, 1
instance = comp, \controller_0|Selector35~0\, controller_0|Selector35~0, microcontroller, 1
instance = comp, \controller_0|Selector96~0\, controller_0|Selector96~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_0[4]\, controller_0|internal_reg_file_read_address_0[4], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[4]\, datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a203\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a203, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a171\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a171, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a139\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a139, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~55\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~55, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a235\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a235, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~56\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~56, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a43\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a43, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a75\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a75, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a11\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a11, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~57\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~57, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a107\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a107, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~58\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~58, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~59\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~59, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[11]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[11], microcontroller, 1
instance = comp, \controller_0|Selector82~0\, controller_0|Selector82~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write_address[4]\, controller_0|internal_reg_file_write_address[4], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[4]\, datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[4]\, datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[4]\, datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|mux0_sel_reg|internal_value[1]\, datapath_0|MEM_WB_PLR|mux0_sel_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~0\, datapath_0|FU_0|forward_0~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a208\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a208, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a176\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a176, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a144\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a144, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~80\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~80, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a240\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a240, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~81\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~81, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a48\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a48, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a80\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a80, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a16\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a16, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~82\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~82, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a112\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a112, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~83\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~83, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~84\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~84, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[16]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[16], microcontroller, 1
instance = comp, \controller_0|Selector93~0\, controller_0|Selector93~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_0[1]\, controller_0|internal_reg_file_read_address_0[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[1]\, datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[1], microcontroller, 1
instance = comp, \controller_0|Selector79~0\, controller_0|Selector79~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write_address[1]\, controller_0|internal_reg_file_write_address[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[1]\, datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[1]\, datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[1], microcontroller, 1
instance = comp, \controller_0|Selector78~0\, controller_0|Selector78~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write_address[0]\, controller_0|internal_reg_file_write_address[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[0]\, datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[0]\, datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~1\, datapath_0|FU_0|forward_0~1, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a210\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a210, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a178\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a178, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a146\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a146, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~90\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~90, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a242\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a242, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~91\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~91, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a50\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a50, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a82\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a82, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a18\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a18, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~92\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~92, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a114\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a114, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~93\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~93, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~94\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~94, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[18]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[18], microcontroller, 1
instance = comp, \controller_0|Selector95~0\, controller_0|Selector95~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_0[3]\, controller_0|internal_reg_file_read_address_0[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[3]\, datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a209\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a209, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a177\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a177, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a145\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a145, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~85\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~85, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a241\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a241, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~86\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~86, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a49\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a49, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a81\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a81, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a17\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a17, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~87\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~87, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a113\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a113, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~88\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~88, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~89\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~89, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[17]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[17], microcontroller, 1
instance = comp, \controller_0|Selector94~0\, controller_0|Selector94~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_0[2]\, controller_0|internal_reg_file_read_address_0[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[2]\, datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a201\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a201, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a169\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a169, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a137\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a137, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~45\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~45, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a233\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a233, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~46\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~46, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a41\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a41, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a73\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a73, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a9\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a9, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~47\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~47, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a105\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a105, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~48\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~48, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~49\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~49, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[9]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[9], microcontroller, 1
instance = comp, \controller_0|Selector80~0\, controller_0|Selector80~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write_address[2]\, controller_0|internal_reg_file_write_address[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[2]\, datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[2]\, datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[2]\, datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[2], microcontroller, 1
instance = comp, \controller_0|Selector81~0\, controller_0|Selector81~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write_address[3]\, controller_0|internal_reg_file_write_address[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[3]\, datapath_0|ID_EX_PLR|reg_file_write_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[3]\, datapath_0|EX_MEM_PLR|reg_file_write_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[3]\, datapath_0|MEM_WB_PLR|reg_file_write_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~2\, datapath_0|FU_0|forward_0~2, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~3\, datapath_0|FU_0|forward_0~3, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal2~0\, datapath_0|FU_0|Equal2~0, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal2~1\, datapath_0|FU_0|Equal2~1, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal2~2\, datapath_0|FU_0|Equal2~2, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~5\, datapath_0|FU_0|forward_0~5, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_0_control[0]~1\, datapath_0|FU_0|forward_mux_0_control[0]~1, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[29]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux2~0\, datapath_0|mux_0|Mux2~0, microcontroller, 1
instance = comp, \controller_0|internal_JTU_mux_sel\, controller_0|internal_JTU_mux_sel, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|JTU_mux_sel_reg|reg_out\, datapath_0|ID_EX_PLR|JTU_mux_sel_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[29]~29\, datapath_0|JTU_0|internal_mux|output_0[29]~29, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[28]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux3~0\, datapath_0|mux_0|Mux3~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a220\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a220, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a188\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a188, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a156\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a156, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~140\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~140, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a252\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a252, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~141\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~141, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a60\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a60, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a92\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a92, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a28\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a28, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~142\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~142, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a124\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a124, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~143\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~143, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~144\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~144, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[28]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[28], microcontroller, 1
instance = comp, \controller_0|Selector70~0\, controller_0|Selector70~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[28]\, controller_0|internal_immediate[28], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[28]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux31~0\, datapath_0|datamem_module_0|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[27]\, datapath_0|datamem_module_0|output_data[27], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[27]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[27], microcontroller, 1
instance = comp, \controller_0|Selector29~0\, controller_0|Selector29~0, microcontroller, 1
instance = comp, \controller_0|Selector29~1\, controller_0|Selector29~1, microcontroller, 1
instance = comp, \controller_0|Selector29~2\, controller_0|Selector29~2, microcontroller, 1
instance = comp, \controller_0|Selector29~3\, controller_0|Selector29~3, microcontroller, 1
instance = comp, \controller_0|internal_immediate[1]\, controller_0|internal_immediate[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[1]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[1]~1\, datapath_0|mux_1|output_0[1]~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~32\, datapath_0|ALU_0|ShiftRight1~32, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux4~0\, datapath_0|forward_mux_0|Mux4~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux4~1\, datapath_0|forward_mux_0|Mux4~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux4~2\, datapath_0|forward_mux_0|Mux4~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~16\, datapath_0|ALU_0|ShiftRight1~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~33\, datapath_0|ALU_0|ShiftRight1~33, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[2]~2\, datapath_0|mux_1|output_0[2]~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[3]~3\, datapath_0|mux_1|output_0[3]~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~52\, datapath_0|ALU_0|ShiftRight1~52, microcontroller, 1
instance = comp, \controller_0|Selector62~1\, controller_0|Selector62~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[20]\, controller_0|internal_immediate[20], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[20]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~24\, datapath_0|ALU_0|Add0~24, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[19]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux55~2\, datapath_0|datamem_module_0|Mux55~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux57~3\, datapath_0|datamem_module_0|Mux57~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux57~2\, datapath_0|datamem_module_0|Mux57~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[3]\, datapath_0|datamem_module_0|memory_input_2[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[2]~8\, datapath_0|datamem_module_0|internal_load[2]~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[2]~4\, datapath_0|datamem_module_0|internal_load[2]~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~96\, datapath_0|datamem_module_0|datamem_2|RAM~96, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~95\, datapath_0|datamem_module_0|datamem_2|RAM~95, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~30\, datapath_0|datamem_module_0|datamem_2|RAM~30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~26\, datapath_0|datamem_module_0|datamem_2|RAM~26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[31]~3\, datapath_0|datamem_module_0|output_data[31]~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[2]~5\, datapath_0|datamem_module_0|internal_load[2]~5, microcontroller, 1
instance = comp, \controller_0|Selector63~0\, controller_0|Selector63~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[21]\, controller_0|internal_immediate[21], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[21]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[21]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux59~3\, datapath_0|datamem_module_0|Mux59~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux59~2\, datapath_0|datamem_module_0|Mux59~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[5]\, datapath_0|datamem_module_0|memory_input_2[5], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~32\, datapath_0|datamem_module_0|datamem_2|RAM~32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1064w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1064w[3]~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~41\, datapath_0|ALU_0|Add0~41, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux28~0\, datapath_0|forward_mux_0|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[3]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux28~1\, datapath_0|forward_mux_0|Mux28~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux28~2\, datapath_0|forward_mux_0|Mux28~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~43\, datapath_0|ALU_0|Add0~43, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[1]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux30~0\, datapath_0|mux_0|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[1]~1\, datapath_0|JTU_0|internal_mux|output_0[1]~1, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~0\, datapath_0|JTU_0|internal_adder|Add0~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~2\, datapath_0|JTU_0|internal_adder|Add0~2, microcontroller, 1
instance = comp, \datapath_0|comb~0\, datapath_0|comb~0, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[1]\, datapath_0|program_counter_0|internal_register|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[1]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[1]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[1]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux30~1\, datapath_0|mux_0|Mux30~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~3\, datapath_0|register_file_0|Ram0~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[10]~19\, datapath_0|register_file_0|internal_reg_load[10]~19, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[1]\, datapath_0|register_file_0|reg_x10|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~7\, datapath_0|register_file_0|Ram0~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[9]~18\, datapath_0|register_file_0|internal_reg_load[9]~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[1]\, datapath_0|register_file_0|reg_x9|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~9\, datapath_0|register_file_0|Ram0~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[8]~20\, datapath_0|register_file_0|internal_reg_load[8]~20, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[1]\, datapath_0|register_file_0|reg_x8|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~0\, datapath_0|register_file_0|output_1_mux|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~13\, datapath_0|register_file_0|Ram0~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[11]~21\, datapath_0|register_file_0|internal_reg_load[11]~21, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[1]\, datapath_0|register_file_0|reg_x11|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~1\, datapath_0|register_file_0|output_1_mux|Mux30~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~1\, datapath_0|register_file_0|output_1_mux|Mux23~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~6\, datapath_0|register_file_0|Ram0~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[21]~7\, datapath_0|register_file_0|internal_reg_load[21]~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[1]\, datapath_0|register_file_0|reg_x21|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[25]~8\, datapath_0|register_file_0|internal_reg_load[25]~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[1]\, datapath_0|register_file_0|reg_x25|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~1\, datapath_0|register_file_0|Ram0~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[17]~9\, datapath_0|register_file_0|internal_reg_load[17]~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[1]\, datapath_0|register_file_0|reg_x17|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~2\, datapath_0|register_file_0|output_1_mux|Mux30~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~8\, datapath_0|register_file_0|Ram0~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[29]~10\, datapath_0|register_file_0|internal_reg_load[29]~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[1]\, datapath_0|register_file_0|reg_x29|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~3\, datapath_0|register_file_0|output_1_mux|Mux30~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[26]~3\, datapath_0|register_file_0|internal_reg_load[26]~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[1]\, datapath_0|register_file_0|reg_x26|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~4\, datapath_0|register_file_0|Ram0~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[22]~4\, datapath_0|register_file_0|internal_reg_load[22]~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[1]\, datapath_0|register_file_0|reg_x22|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~2\, datapath_0|register_file_0|Ram0~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[18]~5\, datapath_0|register_file_0|internal_reg_load[18]~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[1]\, datapath_0|register_file_0|reg_x18|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~4\, datapath_0|register_file_0|output_1_mux|Mux30~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~5\, datapath_0|register_file_0|Ram0~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[30]~6\, datapath_0|register_file_0|internal_reg_load[30]~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[1]\, datapath_0|register_file_0|reg_x30|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~5\, datapath_0|register_file_0|output_1_mux|Mux30~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~10\, datapath_0|register_file_0|Ram0~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[20]~12\, datapath_0|register_file_0|internal_reg_load[20]~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[1]\, datapath_0|register_file_0|reg_x20|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[24]~11\, datapath_0|register_file_0|internal_reg_load[24]~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[1]\, datapath_0|register_file_0|reg_x24|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~11\, datapath_0|register_file_0|Ram0~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[16]~13\, datapath_0|register_file_0|internal_reg_load[16]~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[1]\, datapath_0|register_file_0|reg_x16|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~6\, datapath_0|register_file_0|output_1_mux|Mux30~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~12\, datapath_0|register_file_0|Ram0~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[28]~14\, datapath_0|register_file_0|internal_reg_load[28]~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[1]\, datapath_0|register_file_0|reg_x28|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~7\, datapath_0|register_file_0|output_1_mux|Mux30~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~8\, datapath_0|register_file_0|output_1_mux|Mux30~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[27]~15\, datapath_0|register_file_0|internal_reg_load[27]~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[1]\, datapath_0|register_file_0|reg_x27|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~14\, datapath_0|register_file_0|Ram0~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[23]~16\, datapath_0|register_file_0|internal_reg_load[23]~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[1]\, datapath_0|register_file_0|reg_x23|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~15\, datapath_0|register_file_0|Ram0~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[19]~17\, datapath_0|register_file_0|internal_reg_load[19]~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[1]\, datapath_0|register_file_0|reg_x19|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~9\, datapath_0|register_file_0|output_1_mux|Mux30~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|Ram0~0\, datapath_0|register_file_0|Ram0~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[31]~0\, datapath_0|register_file_0|internal_reg_load[31]~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[1]\, datapath_0|register_file_0|reg_x31|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~10\, datapath_0|register_file_0|output_1_mux|Mux30~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~11\, datapath_0|register_file_0|output_1_mux|Mux30~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~0\, datapath_0|register_file_0|output_1_mux|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[2]~2\, datapath_0|register_file_0|internal_reg_load[2]~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[1]\, datapath_0|register_file_0|reg_x2|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[3]~22\, datapath_0|register_file_0|internal_reg_load[3]~22, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[1]\, datapath_0|register_file_0|reg_x3|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~2\, datapath_0|register_file_0|output_1_mux|Mux23~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[1]~1\, datapath_0|register_file_0|internal_reg_load[1]~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[1]\, datapath_0|register_file_0|reg_x1|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[5]~24\, datapath_0|register_file_0|internal_reg_load[5]~24, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[1]\, datapath_0|register_file_0|reg_x5|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[6]~25\, datapath_0|register_file_0|internal_reg_load[6]~25, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[1]\, datapath_0|register_file_0|reg_x6|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[4]~26\, datapath_0|register_file_0|internal_reg_load[4]~26, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[1]\, datapath_0|register_file_0|reg_x4|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~12\, datapath_0|register_file_0|output_1_mux|Mux30~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[7]~23\, datapath_0|register_file_0|internal_reg_load[7]~23, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[1]\, datapath_0|register_file_0|reg_x7|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~13\, datapath_0|register_file_0|output_1_mux|Mux30~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~3\, datapath_0|register_file_0|output_1_mux|Mux23~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~4\, datapath_0|register_file_0|output_1_mux|Mux23~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~14\, datapath_0|register_file_0|output_1_mux|Mux30~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~15\, datapath_0|register_file_0|output_1_mux|Mux30~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~16\, datapath_0|register_file_0|output_1_mux|Mux30~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[13]~28\, datapath_0|register_file_0|internal_reg_load[13]~28, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[1]\, datapath_0|register_file_0|reg_x13|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[14]~27\, datapath_0|register_file_0|internal_reg_load[14]~27, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[1]\, datapath_0|register_file_0|reg_x14|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[12]~29\, datapath_0|register_file_0|internal_reg_load[12]~29, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[1]\, datapath_0|register_file_0|reg_x12|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~17\, datapath_0|register_file_0|output_1_mux|Mux30~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|internal_reg_load[15]~30\, datapath_0|register_file_0|internal_reg_load[15]~30, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[1]\, datapath_0|register_file_0|reg_x15|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~18\, datapath_0|register_file_0|output_1_mux|Mux30~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux30~19\, datapath_0|register_file_0|output_1_mux|Mux30~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[1]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux30~0\, datapath_0|forward_mux_0|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux30~1\, datapath_0|forward_mux_0|Mux30~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux30~2\, datapath_0|forward_mux_0|Mux30~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~44\, datapath_0|ALU_0|Add0~44, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[0]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux31~0\, datapath_0|forward_mux_0|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux31~1\, datapath_0|forward_mux_0|Mux31~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux31~2\, datapath_0|forward_mux_0|Mux31~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~45\, datapath_0|ALU_0|Add0~45, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~47\, datapath_0|ALU_0|Add0~47, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~48\, datapath_0|ALU_0|Add0~48, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~50\, datapath_0|ALU_0|Add0~50, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~52\, datapath_0|ALU_0|Add0~52, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~54\, datapath_0|ALU_0|Add0~54, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~10\, datapath_0|ALU_0|Mux96~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~11\, datapath_0|ALU_0|Mux96~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~12\, datapath_0|ALU_0|Mux96~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~34\, datapath_0|ALU_0|ShiftRight1~34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux30~0\, datapath_0|datamem_module_0|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[26]\, datapath_0|datamem_module_0|output_data[26], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[26]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~17\, datapath_0|ALU_0|ShiftRight1~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~13\, datapath_0|ALU_0|ShiftRight1~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~47\, datapath_0|ALU_0|ShiftRight0~47, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~18\, datapath_0|ALU_0|ShiftRight1~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~51\, datapath_0|ALU_0|ShiftRight1~51, microcontroller, 1
instance = comp, \controller_0|Selector59~0\, controller_0|Selector59~0, microcontroller, 1
instance = comp, \controller_0|Selector59~1\, controller_0|Selector59~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[18]\, controller_0|internal_immediate[18], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[18]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~26\, datapath_0|ALU_0|Add0~26, microcontroller, 1
instance = comp, \controller_0|Selector58~0\, controller_0|Selector58~0, microcontroller, 1
instance = comp, \controller_0|Selector58~1\, controller_0|Selector58~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[17]\, controller_0|internal_immediate[17], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[17]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~27\, datapath_0|ALU_0|Add0~27, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux14~0\, datapath_0|forward_mux_0|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[17]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux14~1\, datapath_0|forward_mux_0|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux14~2\, datapath_0|forward_mux_0|Mux14~2, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a215\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a215, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a183\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a183, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a151\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a151, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~115\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~115, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a247\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a247, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~116\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~116, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a55\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a55, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a87\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a87, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a23\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a23, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~117\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~117, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a119\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a119, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~118\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~118, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~119\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~119, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[23]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[23], microcontroller, 1
instance = comp, \controller_0|Selector89~0\, controller_0|Selector89~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_1[3]\, controller_0|internal_reg_file_read_address_1[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[16]\, datapath_0|register_file_0|reg_x22|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a214\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a214, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a182\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a182, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a150\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a150, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~110\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~110, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a246\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a246, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~111\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~111, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a54\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a54, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a86\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a86, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a22\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a22, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~112\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~112, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a118\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a118, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~113\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~113, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~114\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~114, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[22]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[22], microcontroller, 1
instance = comp, \controller_0|Selector88~0\, controller_0|Selector88~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_1[2]\, controller_0|internal_reg_file_read_address_1[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[16]\, datapath_0|register_file_0|reg_x18|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~0\, datapath_0|register_file_0|output_2_mux|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[16]\, datapath_0|register_file_0|reg_x30|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~1\, datapath_0|register_file_0|output_2_mux|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[16]\, datapath_0|register_file_0|reg_x21|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[16]\, datapath_0|register_file_0|reg_x25|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[16]\, datapath_0|register_file_0|reg_x17|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~2\, datapath_0|register_file_0|output_2_mux|Mux15~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[16]\, datapath_0|register_file_0|reg_x29|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~3\, datapath_0|register_file_0|output_2_mux|Mux15~3, microcontroller, 1
instance = comp, \controller_0|Selector86~0\, controller_0|Selector86~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_1[0]\, controller_0|internal_reg_file_read_address_1[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[16]\, datapath_0|register_file_0|reg_x20|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[16]\, datapath_0|register_file_0|reg_x24|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[16]\, datapath_0|register_file_0|reg_x16|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~4\, datapath_0|register_file_0|output_2_mux|Mux15~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[16]\, datapath_0|register_file_0|reg_x28|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~5\, datapath_0|register_file_0|output_2_mux|Mux15~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~6\, datapath_0|register_file_0|output_2_mux|Mux15~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[16]\, datapath_0|register_file_0|reg_x27|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[16]\, datapath_0|register_file_0|reg_x23|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[16]\, datapath_0|register_file_0|reg_x19|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~7\, datapath_0|register_file_0|output_2_mux|Mux15~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[16]\, datapath_0|register_file_0|reg_x31|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~8\, datapath_0|register_file_0|output_2_mux|Mux15~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~9\, datapath_0|register_file_0|output_2_mux|Mux15~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~0\, datapath_0|register_file_0|output_2_mux|Mux5~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[16]\, datapath_0|register_file_0|reg_x9|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[16]\, datapath_0|register_file_0|reg_x10|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[16]\, datapath_0|register_file_0|reg_x8|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~10\, datapath_0|register_file_0|output_2_mux|Mux15~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[16]\, datapath_0|register_file_0|reg_x11|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~11\, datapath_0|register_file_0|output_2_mux|Mux15~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~1\, datapath_0|register_file_0|output_2_mux|Mux5~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[16]\, datapath_0|register_file_0|reg_x2|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[16]\, datapath_0|register_file_0|reg_x3|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~2\, datapath_0|register_file_0|output_2_mux|Mux5~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[16]\, datapath_0|register_file_0|reg_x1|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[16]\, datapath_0|register_file_0|reg_x6|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[16]\, datapath_0|register_file_0|reg_x5|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[16]\, datapath_0|register_file_0|reg_x4|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~12\, datapath_0|register_file_0|output_2_mux|Mux15~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[16]\, datapath_0|register_file_0|reg_x7|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~13\, datapath_0|register_file_0|output_2_mux|Mux15~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~3\, datapath_0|register_file_0|output_2_mux|Mux5~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~4\, datapath_0|register_file_0|output_2_mux|Mux5~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~14\, datapath_0|register_file_0|output_2_mux|Mux15~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~15\, datapath_0|register_file_0|output_2_mux|Mux15~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~16\, datapath_0|register_file_0|output_2_mux|Mux15~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[16]\, datapath_0|register_file_0|reg_x14|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[16]\, datapath_0|register_file_0|reg_x13|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[16]\, datapath_0|register_file_0|reg_x12|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~17\, datapath_0|register_file_0|output_2_mux|Mux15~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[16]\, datapath_0|register_file_0|reg_x15|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~18\, datapath_0|register_file_0|output_2_mux|Mux15~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux15~19\, datapath_0|register_file_0|output_2_mux|Mux15~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[16]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux15~0\, datapath_0|forward_mux_1|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[16]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux15~1\, datapath_0|forward_mux_1|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux15~2\, datapath_0|forward_mux_1|Mux15~2, microcontroller, 1
instance = comp, \controller_0|Selector57~0\, controller_0|Selector57~0, microcontroller, 1
instance = comp, \controller_0|Selector57~1\, controller_0|Selector57~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[16]\, controller_0|internal_immediate[16], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[16]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~28\, datapath_0|ALU_0|Add0~28, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux15~0\, datapath_0|forward_mux_0|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux15~1\, datapath_0|forward_mux_0|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux15~2\, datapath_0|forward_mux_0|Mux15~2, microcontroller, 1
instance = comp, \controller_0|Selector56~0\, controller_0|Selector56~0, microcontroller, 1
instance = comp, \controller_0|Selector56~1\, controller_0|Selector56~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[15]\, controller_0|internal_immediate[15], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[15]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~29\, datapath_0|ALU_0|Add0~29, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux16~0\, datapath_0|forward_mux_0|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux16~1\, datapath_0|forward_mux_0|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux16~2\, datapath_0|forward_mux_0|Mux16~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux17~0\, datapath_0|forward_mux_0|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[14]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux17~1\, datapath_0|forward_mux_0|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux17~2\, datapath_0|forward_mux_0|Mux17~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[13]\, datapath_0|register_file_0|reg_x9|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[13]\, datapath_0|register_file_0|reg_x8|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~0\, datapath_0|register_file_0|output_2_mux|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[13]\, datapath_0|register_file_0|reg_x11|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~1\, datapath_0|register_file_0|output_2_mux|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[13]\, datapath_0|register_file_0|reg_x21|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[13]\, datapath_0|register_file_0|reg_x25|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[13]\, datapath_0|register_file_0|reg_x17|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~2\, datapath_0|register_file_0|output_2_mux|Mux18~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[13]\, datapath_0|register_file_0|reg_x29|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~3\, datapath_0|register_file_0|output_2_mux|Mux18~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[13]\, datapath_0|register_file_0|reg_x26|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[13]\, datapath_0|register_file_0|reg_x22|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[13]\, datapath_0|register_file_0|reg_x18|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~4\, datapath_0|register_file_0|output_2_mux|Mux18~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[13]\, datapath_0|register_file_0|reg_x30|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~5\, datapath_0|register_file_0|output_2_mux|Mux18~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[13]\, datapath_0|register_file_0|reg_x20|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[13]\, datapath_0|register_file_0|reg_x24|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[13]\, datapath_0|register_file_0|reg_x16|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~6\, datapath_0|register_file_0|output_2_mux|Mux18~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[13]\, datapath_0|register_file_0|reg_x28|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~7\, datapath_0|register_file_0|output_2_mux|Mux18~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~8\, datapath_0|register_file_0|output_2_mux|Mux18~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[13]\, datapath_0|register_file_0|reg_x27|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[13]\, datapath_0|register_file_0|reg_x23|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[13]\, datapath_0|register_file_0|reg_x19|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~9\, datapath_0|register_file_0|output_2_mux|Mux18~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[13]\, datapath_0|register_file_0|reg_x31|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~10\, datapath_0|register_file_0|output_2_mux|Mux18~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~11\, datapath_0|register_file_0|output_2_mux|Mux18~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[13]\, datapath_0|register_file_0|reg_x2|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[13]\, datapath_0|register_file_0|reg_x3|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[13]\, datapath_0|register_file_0|reg_x1|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[13]\, datapath_0|register_file_0|reg_x5|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[13]\, datapath_0|register_file_0|reg_x6|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[13]\, datapath_0|register_file_0|reg_x4|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~12\, datapath_0|register_file_0|output_2_mux|Mux18~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[13]\, datapath_0|register_file_0|reg_x7|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~13\, datapath_0|register_file_0|output_2_mux|Mux18~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~14\, datapath_0|register_file_0|output_2_mux|Mux18~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~15\, datapath_0|register_file_0|output_2_mux|Mux18~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~16\, datapath_0|register_file_0|output_2_mux|Mux18~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[13]\, datapath_0|register_file_0|reg_x13|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[13]\, datapath_0|register_file_0|reg_x14|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[13]\, datapath_0|register_file_0|reg_x12|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~17\, datapath_0|register_file_0|output_2_mux|Mux18~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[13]\, datapath_0|register_file_0|reg_x15|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~18\, datapath_0|register_file_0|output_2_mux|Mux18~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux18~19\, datapath_0|register_file_0|output_2_mux|Mux18~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[13]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux18~0\, datapath_0|forward_mux_1|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[13]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux18~1\, datapath_0|forward_mux_1|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux18~2\, datapath_0|forward_mux_1|Mux18~2, microcontroller, 1
instance = comp, \controller_0|Selector52~0\, controller_0|Selector52~0, microcontroller, 1
instance = comp, \controller_0|Selector52~1\, controller_0|Selector52~1, microcontroller, 1
instance = comp, \controller_0|Selector52~2\, controller_0|Selector52~2, microcontroller, 1
instance = comp, \controller_0|Selector52~3\, controller_0|Selector52~3, microcontroller, 1
instance = comp, \controller_0|Selector52\, controller_0|Selector52, microcontroller, 1
instance = comp, \controller_0|internal_immediate[13]\, controller_0|internal_immediate[13], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[13]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~31\, datapath_0|ALU_0|Add0~31, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux19~0\, datapath_0|forward_mux_0|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[12]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux19~1\, datapath_0|forward_mux_0|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux19~2\, datapath_0|forward_mux_0|Mux19~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux21~0\, datapath_0|forward_mux_0|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[10]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux21~1\, datapath_0|forward_mux_0|Mux21~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux21~2\, datapath_0|forward_mux_0|Mux21~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux22~0\, datapath_0|forward_mux_0|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[9]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux22~1\, datapath_0|forward_mux_0|Mux22~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux22~2\, datapath_0|forward_mux_0|Mux22~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux23~0\, datapath_0|forward_mux_0|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[8]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux23~1\, datapath_0|forward_mux_0|Mux23~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux23~2\, datapath_0|forward_mux_0|Mux23~2, microcontroller, 1
instance = comp, \controller_0|Selector35~2\, controller_0|Selector35~2, microcontroller, 1
instance = comp, \controller_0|Selector35~1\, controller_0|Selector35~1, microcontroller, 1
instance = comp, \controller_0|Selector37~0\, controller_0|Selector37~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a219\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a219, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a187\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a187, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a155\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a155, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~135\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~135, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a251\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a251, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~136\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~136, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a59\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a59, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a91\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a91, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a27\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a27, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~137\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~137, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a123\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a123, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~138\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~138, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~139\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~139, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[27]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a217\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a217, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a185\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a185, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a153\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a153, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~125\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~125, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a249\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a249, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~126\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~126, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a57\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a57, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a89\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a89, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a25\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a25, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~127\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~127, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a121\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a121, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~128\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~128, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~129\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~129, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[25]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[25], microcontroller, 1
instance = comp, \controller_0|Selector39~0\, controller_0|Selector39~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[7]\, controller_0|internal_immediate[7], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[7]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~37\, datapath_0|ALU_0|Add0~37, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux24~0\, datapath_0|forward_mux_0|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux24~1\, datapath_0|forward_mux_0|Mux24~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux24~2\, datapath_0|forward_mux_0|Mux24~2, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a218\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a218, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a186\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a186, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a154\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a154, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~130\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~130, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a250\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a250, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~131\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~131, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a58\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a58, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a90\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a90, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a26\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a26, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~132\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~132, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a122\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a122, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~133\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~133, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~134\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~134, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[26]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[26], microcontroller, 1
instance = comp, \controller_0|Selector37~1\, controller_0|Selector37~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[6]\, controller_0|internal_immediate[6], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[6]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~38\, datapath_0|ALU_0|Add0~38, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~30\, datapath_0|ALU_0|ShiftRight1~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~9\, datapath_0|ALU_0|ShiftRight1~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~31\, datapath_0|ALU_0|ShiftRight1~31, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~0\, datapath_0|ALU_0|Mux93~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~56\, datapath_0|ALU_0|ShiftRight1~56, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~45\, datapath_0|ALU_0|ShiftRight1~45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux29~0\, datapath_0|datamem_module_0|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[25]\, datapath_0|datamem_module_0|output_data[25], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[25]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~50\, datapath_0|ALU_0|ShiftRight1~50, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~81\, datapath_0|ALU_0|ShiftLeft0~81, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~2\, datapath_0|ALU_0|Mux79~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~84\, datapath_0|ALU_0|Add0~84, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~86\, datapath_0|ALU_0|Add0~86, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[4]~3\, datapath_0|ALU_0|result_temp[4]~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[19]~16\, datapath_0|ALU_0|result_temp[19]~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~3\, datapath_0|ALU_0|Mux79~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~15\, datapath_0|ALU_0|Mux79~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~59\, datapath_0|ALU_0|ShiftLeft0~59, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~64\, datapath_0|ALU_0|ShiftLeft0~64, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~65\, datapath_0|ALU_0|ShiftLeft0~65, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~75\, datapath_0|ALU_0|ShiftLeft0~75, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~78\, datapath_0|ALU_0|ShiftLeft0~78, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~79\, datapath_0|ALU_0|ShiftLeft0~79, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~80\, datapath_0|ALU_0|ShiftLeft0~80, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux27~0\, datapath_0|forward_mux_0|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[4]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux27~1\, datapath_0|forward_mux_0|Mux27~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux27~2\, datapath_0|forward_mux_0|Mux27~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~26\, datapath_0|ALU_0|ShiftLeft0~26, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux26~0\, datapath_0|forward_mux_0|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[5]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux26~1\, datapath_0|forward_mux_0|Mux26~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux26~2\, datapath_0|forward_mux_0|Mux26~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~30\, datapath_0|ALU_0|ShiftLeft0~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~31\, datapath_0|ALU_0|ShiftLeft0~31, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~41\, datapath_0|ALU_0|ShiftLeft0~41, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~45\, datapath_0|ALU_0|ShiftLeft0~45, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~46\, datapath_0|ALU_0|ShiftLeft0~46, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~47\, datapath_0|ALU_0|ShiftLeft0~47, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~5\, datapath_0|ALU_0|Mux96~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~5\, datapath_0|ALU_0|Mux79~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~11\, datapath_0|ALU_0|ShiftLeft0~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~16\, datapath_0|ALU_0|ShiftLeft0~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~12\, datapath_0|ALU_0|ShiftLeft0~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~17\, datapath_0|ALU_0|ShiftLeft0~17, microcontroller, 1
instance = comp, \controller_0|Selector60~0\, controller_0|Selector60~0, microcontroller, 1
instance = comp, \controller_0|Selector60~1\, controller_0|Selector60~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[19]\, controller_0|internal_immediate[19], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[19]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[19]~19\, datapath_0|mux_1|output_0[19]~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~53\, datapath_0|ALU_0|ShiftRight0~53, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~54\, datapath_0|ALU_0|ShiftRight0~54, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~55\, datapath_0|ALU_0|ShiftRight0~55, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~19\, datapath_0|ALU_0|ALU_output~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~6\, datapath_0|ALU_0|Mux79~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~9\, datapath_0|ALU_0|Mux79~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~10\, datapath_0|ALU_0|Mux79~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~7\, datapath_0|ALU_0|Mux79~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~8\, datapath_0|ALU_0|Mux79~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~11\, datapath_0|ALU_0|Mux79~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~12\, datapath_0|ALU_0|Mux79~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~13\, datapath_0|ALU_0|Mux79~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~14\, datapath_0|ALU_0|Mux79~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[19]\, datapath_0|ALU_0|ALU_output[19], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[19]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[19]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux12~0\, datapath_0|mux_0|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[19]~19\, datapath_0|JTU_0|internal_mux|output_0[19]~19, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[18]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux13~0\, datapath_0|mux_0|Mux13~0, microcontroller, 1
instance = comp, \controller_0|Selector54~0\, controller_0|Selector54~0, microcontroller, 1
instance = comp, \controller_0|Selector54~1\, controller_0|Selector54~1, microcontroller, 1
instance = comp, \controller_0|Selector54~2\, controller_0|Selector54~2, microcontroller, 1
instance = comp, \controller_0|internal_immediate[14]\, controller_0|internal_immediate[14], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[14]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[14], microcontroller, 1
instance = comp, \controller_0|Selector51~0\, controller_0|Selector51~0, microcontroller, 1
instance = comp, \controller_0|Selector51\, controller_0|Selector51, microcontroller, 1
instance = comp, \controller_0|internal_immediate[12]\, controller_0|internal_immediate[12], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[12]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[12], microcontroller, 1
instance = comp, \controller_0|Selector49~0\, controller_0|Selector49~0, microcontroller, 1
instance = comp, \controller_0|Selector49~1\, controller_0|Selector49~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[11]\, controller_0|internal_immediate[11], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[11]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[11], microcontroller, 1
instance = comp, \controller_0|Selector45~0\, controller_0|Selector45~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[10]\, controller_0|internal_immediate[10], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[10]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[10], microcontroller, 1
instance = comp, \controller_0|Selector43~0\, controller_0|Selector43~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[9]\, controller_0|internal_immediate[9], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[9]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[9], microcontroller, 1
instance = comp, \controller_0|Selector41~0\, controller_0|Selector41~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[8]\, controller_0|internal_immediate[8], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[8]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~4\, datapath_0|JTU_0|internal_adder|Add0~4, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~6\, datapath_0|JTU_0|internal_adder|Add0~6, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~8\, datapath_0|JTU_0|internal_adder|Add0~8, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~10\, datapath_0|JTU_0|internal_adder|Add0~10, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~12\, datapath_0|JTU_0|internal_adder|Add0~12, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~14\, datapath_0|JTU_0|internal_adder|Add0~14, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~16\, datapath_0|JTU_0|internal_adder|Add0~16, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~18\, datapath_0|JTU_0|internal_adder|Add0~18, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~20\, datapath_0|JTU_0|internal_adder|Add0~20, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~22\, datapath_0|JTU_0|internal_adder|Add0~22, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~24\, datapath_0|JTU_0|internal_adder|Add0~24, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~26\, datapath_0|JTU_0|internal_adder|Add0~26, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~28\, datapath_0|JTU_0|internal_adder|Add0~28, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~30\, datapath_0|JTU_0|internal_adder|Add0~30, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~32\, datapath_0|JTU_0|internal_adder|Add0~32, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~34\, datapath_0|JTU_0|internal_adder|Add0~34, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~36\, datapath_0|JTU_0|internal_adder|Add0~36, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[17]\, datapath_0|program_counter_0|internal_register|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[16]\, datapath_0|program_counter_0|internal_register|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[15]\, datapath_0|program_counter_0|internal_register|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[14]\, datapath_0|program_counter_0|internal_register|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[13]\, datapath_0|program_counter_0|internal_register|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[12]\, datapath_0|program_counter_0|internal_register|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[11]\, datapath_0|program_counter_0|internal_register|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[10]\, datapath_0|program_counter_0|internal_register|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[9]\, datapath_0|program_counter_0|internal_register|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[8]\, datapath_0|program_counter_0|internal_register|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[7]\, datapath_0|program_counter_0|internal_register|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[6]\, datapath_0|program_counter_0|internal_register|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[5]\, datapath_0|program_counter_0|internal_register|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[4]\, datapath_0|program_counter_0|internal_register|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[3]\, datapath_0|program_counter_0|internal_register|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[2]\, datapath_0|program_counter_0|internal_register|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|Add0~0\, datapath_0|Add0~0, microcontroller, 1
instance = comp, \datapath_0|Add0~3\, datapath_0|Add0~3, microcontroller, 1
instance = comp, \datapath_0|Add0~6\, datapath_0|Add0~6, microcontroller, 1
instance = comp, \datapath_0|Add0~9\, datapath_0|Add0~9, microcontroller, 1
instance = comp, \datapath_0|Add0~12\, datapath_0|Add0~12, microcontroller, 1
instance = comp, \datapath_0|Add0~15\, datapath_0|Add0~15, microcontroller, 1
instance = comp, \datapath_0|Add0~18\, datapath_0|Add0~18, microcontroller, 1
instance = comp, \datapath_0|Add0~21\, datapath_0|Add0~21, microcontroller, 1
instance = comp, \datapath_0|Add0~24\, datapath_0|Add0~24, microcontroller, 1
instance = comp, \datapath_0|Add0~27\, datapath_0|Add0~27, microcontroller, 1
instance = comp, \datapath_0|Add0~30\, datapath_0|Add0~30, microcontroller, 1
instance = comp, \datapath_0|Add0~33\, datapath_0|Add0~33, microcontroller, 1
instance = comp, \datapath_0|Add0~36\, datapath_0|Add0~36, microcontroller, 1
instance = comp, \datapath_0|Add0~39\, datapath_0|Add0~39, microcontroller, 1
instance = comp, \datapath_0|Add0~42\, datapath_0|Add0~42, microcontroller, 1
instance = comp, \datapath_0|Add0~45\, datapath_0|Add0~45, microcontroller, 1
instance = comp, \datapath_0|Add0~48\, datapath_0|Add0~48, microcontroller, 1
instance = comp, \datapath_0|Add0~50\, datapath_0|Add0~50, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[18]\, datapath_0|program_counter_0|internal_register|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[18]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[18]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[18]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[18]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[17]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[17]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[17]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[17]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[16]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[16]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[16]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[16]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[15]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[15]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[15]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[15]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[14]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[14]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[14]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[14]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[13]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[13]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[13]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[13]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[12]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[12]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[12]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[12]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[11]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[11]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[11]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[11]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[10]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[10]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[10]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[10]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[9]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[9]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[9]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[9]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[8]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[8]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[8]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[8]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[7]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[7]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[7]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[7]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[6]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[6]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[6]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[6]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[5]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[5]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[5]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[5]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[4]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[4]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[4]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[4]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[3]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[3]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[3]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[3]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[2]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[2]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[2]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[2]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|Add1~0\, datapath_0|Add1~0, microcontroller, 1
instance = comp, \datapath_0|Add1~2\, datapath_0|Add1~2, microcontroller, 1
instance = comp, \datapath_0|Add1~4\, datapath_0|Add1~4, microcontroller, 1
instance = comp, \datapath_0|Add1~6\, datapath_0|Add1~6, microcontroller, 1
instance = comp, \datapath_0|Add1~8\, datapath_0|Add1~8, microcontroller, 1
instance = comp, \datapath_0|Add1~10\, datapath_0|Add1~10, microcontroller, 1
instance = comp, \datapath_0|Add1~12\, datapath_0|Add1~12, microcontroller, 1
instance = comp, \datapath_0|Add1~14\, datapath_0|Add1~14, microcontroller, 1
instance = comp, \datapath_0|Add1~16\, datapath_0|Add1~16, microcontroller, 1
instance = comp, \datapath_0|Add1~18\, datapath_0|Add1~18, microcontroller, 1
instance = comp, \datapath_0|Add1~20\, datapath_0|Add1~20, microcontroller, 1
instance = comp, \datapath_0|Add1~22\, datapath_0|Add1~22, microcontroller, 1
instance = comp, \datapath_0|Add1~24\, datapath_0|Add1~24, microcontroller, 1
instance = comp, \datapath_0|Add1~26\, datapath_0|Add1~26, microcontroller, 1
instance = comp, \datapath_0|Add1~28\, datapath_0|Add1~28, microcontroller, 1
instance = comp, \datapath_0|Add1~30\, datapath_0|Add1~30, microcontroller, 1
instance = comp, \datapath_0|Add1~32\, datapath_0|Add1~32, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux13~1\, datapath_0|mux_0|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[18]\, datapath_0|register_file_0|reg_x26|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[18]\, datapath_0|register_file_0|reg_x22|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[18]\, datapath_0|register_file_0|reg_x18|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~0\, datapath_0|register_file_0|output_1_mux|Mux13~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[18]\, datapath_0|register_file_0|reg_x30|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~1\, datapath_0|register_file_0|output_1_mux|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[18]\, datapath_0|register_file_0|reg_x21|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[18]\, datapath_0|register_file_0|reg_x25|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[18]\, datapath_0|register_file_0|reg_x17|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~2\, datapath_0|register_file_0|output_1_mux|Mux13~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[18]\, datapath_0|register_file_0|reg_x29|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~3\, datapath_0|register_file_0|output_1_mux|Mux13~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[18]\, datapath_0|register_file_0|reg_x20|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[18]\, datapath_0|register_file_0|reg_x24|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[18]\, datapath_0|register_file_0|reg_x16|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~4\, datapath_0|register_file_0|output_1_mux|Mux13~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[18]\, datapath_0|register_file_0|reg_x28|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~5\, datapath_0|register_file_0|output_1_mux|Mux13~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~6\, datapath_0|register_file_0|output_1_mux|Mux13~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[18]\, datapath_0|register_file_0|reg_x27|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[18]\, datapath_0|register_file_0|reg_x23|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[18]\, datapath_0|register_file_0|reg_x19|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~7\, datapath_0|register_file_0|output_1_mux|Mux13~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[18]\, datapath_0|register_file_0|reg_x31|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~8\, datapath_0|register_file_0|output_1_mux|Mux13~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~9\, datapath_0|register_file_0|output_1_mux|Mux13~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[18]\, datapath_0|register_file_0|reg_x9|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[18]\, datapath_0|register_file_0|reg_x10|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[18]\, datapath_0|register_file_0|reg_x8|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~10\, datapath_0|register_file_0|output_1_mux|Mux13~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[18]\, datapath_0|register_file_0|reg_x11|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~11\, datapath_0|register_file_0|output_1_mux|Mux13~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[18]\, datapath_0|register_file_0|reg_x2|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[18]\, datapath_0|register_file_0|reg_x3|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[18]\, datapath_0|register_file_0|reg_x1|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[18]\, datapath_0|register_file_0|reg_x7|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[18]\, datapath_0|register_file_0|reg_x5|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[18]\, datapath_0|register_file_0|reg_x6|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[18]\, datapath_0|register_file_0|reg_x4|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~12\, datapath_0|register_file_0|output_1_mux|Mux13~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~13\, datapath_0|register_file_0|output_1_mux|Mux13~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~14\, datapath_0|register_file_0|output_1_mux|Mux13~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~15\, datapath_0|register_file_0|output_1_mux|Mux13~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~16\, datapath_0|register_file_0|output_1_mux|Mux13~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[18]\, datapath_0|register_file_0|reg_x14|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[18]\, datapath_0|register_file_0|reg_x13|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[18]\, datapath_0|register_file_0|reg_x12|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~17\, datapath_0|register_file_0|output_1_mux|Mux13~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[18]\, datapath_0|register_file_0|reg_x15|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~18\, datapath_0|register_file_0|output_1_mux|Mux13~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux13~19\, datapath_0|register_file_0|output_1_mux|Mux13~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[18]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[18]~18\, datapath_0|JTU_0|internal_mux|output_0[18]~18, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~38\, datapath_0|JTU_0|internal_adder|Add0~38, microcontroller, 1
instance = comp, \datapath_0|Add0~51\, datapath_0|Add0~51, microcontroller, 1
instance = comp, \datapath_0|Add0~53\, datapath_0|Add0~53, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[19]\, datapath_0|program_counter_0|internal_register|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[19]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[19]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[19]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[19]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|Add1~34\, datapath_0|Add1~34, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux12~1\, datapath_0|mux_0|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[19]\, datapath_0|register_file_0|reg_x10|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[19]\, datapath_0|register_file_0|reg_x9|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[19]\, datapath_0|register_file_0|reg_x8|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~0\, datapath_0|register_file_0|output_1_mux|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[19]\, datapath_0|register_file_0|reg_x11|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~1\, datapath_0|register_file_0|output_1_mux|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[19]\, datapath_0|register_file_0|reg_x21|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[19]\, datapath_0|register_file_0|reg_x25|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[19]\, datapath_0|register_file_0|reg_x17|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~2\, datapath_0|register_file_0|output_1_mux|Mux12~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[19]\, datapath_0|register_file_0|reg_x29|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~3\, datapath_0|register_file_0|output_1_mux|Mux12~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[19]\, datapath_0|register_file_0|reg_x26|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[19]\, datapath_0|register_file_0|reg_x22|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[19]\, datapath_0|register_file_0|reg_x18|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~4\, datapath_0|register_file_0|output_1_mux|Mux12~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[19]\, datapath_0|register_file_0|reg_x30|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~5\, datapath_0|register_file_0|output_1_mux|Mux12~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[19]\, datapath_0|register_file_0|reg_x20|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[19]\, datapath_0|register_file_0|reg_x24|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[19]\, datapath_0|register_file_0|reg_x16|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~6\, datapath_0|register_file_0|output_1_mux|Mux12~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[19]\, datapath_0|register_file_0|reg_x28|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~7\, datapath_0|register_file_0|output_1_mux|Mux12~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~8\, datapath_0|register_file_0|output_1_mux|Mux12~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[19]\, datapath_0|register_file_0|reg_x27|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[19]\, datapath_0|register_file_0|reg_x23|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[19]\, datapath_0|register_file_0|reg_x19|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~9\, datapath_0|register_file_0|output_1_mux|Mux12~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[19]\, datapath_0|register_file_0|reg_x31|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~10\, datapath_0|register_file_0|output_1_mux|Mux12~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~11\, datapath_0|register_file_0|output_1_mux|Mux12~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[19]\, datapath_0|register_file_0|reg_x2|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[19]\, datapath_0|register_file_0|reg_x3|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[19]\, datapath_0|register_file_0|reg_x1|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[19]\, datapath_0|register_file_0|reg_x5|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[19]\, datapath_0|register_file_0|reg_x6|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[19]\, datapath_0|register_file_0|reg_x4|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~12\, datapath_0|register_file_0|output_1_mux|Mux12~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[19]\, datapath_0|register_file_0|reg_x7|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~13\, datapath_0|register_file_0|output_1_mux|Mux12~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~14\, datapath_0|register_file_0|output_1_mux|Mux12~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~15\, datapath_0|register_file_0|output_1_mux|Mux12~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~16\, datapath_0|register_file_0|output_1_mux|Mux12~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[19]\, datapath_0|register_file_0|reg_x13|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[19]\, datapath_0|register_file_0|reg_x14|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[19]\, datapath_0|register_file_0|reg_x12|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~17\, datapath_0|register_file_0|output_1_mux|Mux12~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[19]\, datapath_0|register_file_0|reg_x15|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~18\, datapath_0|register_file_0|output_1_mux|Mux12~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux12~19\, datapath_0|register_file_0|output_1_mux|Mux12~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[19]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux12~0\, datapath_0|forward_mux_0|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux12~1\, datapath_0|forward_mux_0|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux12~2\, datapath_0|forward_mux_0|Mux12~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~23\, datapath_0|ALU_0|Add0~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~88\, datapath_0|ALU_0|Add0~88, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~90\, datapath_0|ALU_0|Add0~90, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[21]~18\, datapath_0|ALU_0|result_temp[21]~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~68\, datapath_0|ALU_0|ShiftLeft0~68, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~71\, datapath_0|ALU_0|ShiftLeft0~71, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~72\, datapath_0|ALU_0|ShiftLeft0~72, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~86\, datapath_0|ALU_0|ShiftLeft0~86, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~33\, datapath_0|ALU_0|ShiftLeft0~33, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~37\, datapath_0|ALU_0|ShiftLeft0~37, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~38\, datapath_0|ALU_0|ShiftLeft0~38, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~49\, datapath_0|ALU_0|ShiftLeft0~49, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~55\, datapath_0|ALU_0|ShiftLeft0~55, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~56\, datapath_0|ALU_0|ShiftLeft0~56, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~22\, datapath_0|ALU_0|ShiftLeft0~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~19\, datapath_0|ALU_0|ShiftLeft0~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~23\, datapath_0|ALU_0|ShiftLeft0~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~24\, datapath_0|ALU_0|ShiftLeft0~24, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~25\, datapath_0|ALU_0|ShiftLeft0~25, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux28~0\, datapath_0|datamem_module_0|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[24]\, datapath_0|datamem_module_0|output_data[24], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[24]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~13\, datapath_0|ALU_0|ShiftRight0~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~14\, datapath_0|ALU_0|ShiftRight0~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~15\, datapath_0|ALU_0|ShiftRight0~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~17\, datapath_0|ALU_0|ShiftRight0~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~71\, datapath_0|ALU_0|ShiftRight0~71, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~49\, datapath_0|ALU_0|ShiftRight1~49, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~50\, datapath_0|ALU_0|ShiftLeft0~50, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~69\, datapath_0|ALU_0|ShiftLeft0~69, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~70\, datapath_0|ALU_0|ShiftLeft0~70, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~14\, datapath_0|ALU_0|Mux72~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~82\, datapath_0|ALU_0|ShiftLeft0~82, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~4\, datapath_0|ALU_0|Mux72~4, microcontroller, 1
instance = comp, \controller_0|Selector65~0\, controller_0|Selector65~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[23]\, controller_0|internal_immediate[23], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[23]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~21\, datapath_0|ALU_0|Add0~21, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[22]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux60~2\, datapath_0|datamem_module_0|Mux60~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux60~4\, datapath_0|datamem_module_0|Mux60~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux60~3\, datapath_0|datamem_module_0|Mux60~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[6]\, datapath_0|datamem_module_0|memory_input_2[6], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~33\, datapath_0|datamem_module_0|datamem_2|RAM~33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a14\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a14, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1046w[3]\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1046w[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a6\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[0]\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[1]\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~81\, datapath_0|datamem_module_0|datamem_2|RAM~81, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1086w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1086w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a30\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1075w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1075w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a22\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a22, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~82\, datapath_0|datamem_module_0|datamem_2|RAM~82, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[2]\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|address_reg_b[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~83\, datapath_0|datamem_module_0|datamem_2|RAM~83, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1130w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1130w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a62\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1119w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1119w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a54\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~84\, datapath_0|datamem_module_0|datamem_2|RAM~84, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1108w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1108w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a46\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1097w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|rden_decode_b|w_anode1097w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a38\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~85\, datapath_0|datamem_module_0|datamem_2|RAM~85, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~86\, datapath_0|datamem_module_0|datamem_2|RAM~86, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~87\, datapath_0|datamem_module_0|datamem_2|RAM~87, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux26~0\, datapath_0|datamem_module_0|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[22]\, datapath_0|datamem_module_0|output_data[22], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[22]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[22]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux9~0\, datapath_0|mux_0|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[22]~22\, datapath_0|JTU_0|internal_mux|output_0[22]~22, microcontroller, 1
instance = comp, \controller_0|Selector64~0\, controller_0|Selector64~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[22]\, controller_0|internal_immediate[22], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[22]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[21]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux10~0\, datapath_0|mux_0|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[20]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux11~0\, datapath_0|mux_0|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~40\, datapath_0|JTU_0|internal_adder|Add0~40, microcontroller, 1
instance = comp, \datapath_0|Add0~54\, datapath_0|Add0~54, microcontroller, 1
instance = comp, \datapath_0|Add0~56\, datapath_0|Add0~56, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[20]\, datapath_0|program_counter_0|internal_register|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[20]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[20]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[20]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[20]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|Add1~36\, datapath_0|Add1~36, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux11~1\, datapath_0|mux_0|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[20]\, datapath_0|register_file_0|reg_x26|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[20]\, datapath_0|register_file_0|reg_x22|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[20]\, datapath_0|register_file_0|reg_x18|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~0\, datapath_0|register_file_0|output_1_mux|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[20]\, datapath_0|register_file_0|reg_x30|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~1\, datapath_0|register_file_0|output_1_mux|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[20]\, datapath_0|register_file_0|reg_x21|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[20]\, datapath_0|register_file_0|reg_x25|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[20]\, datapath_0|register_file_0|reg_x17|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~2\, datapath_0|register_file_0|output_1_mux|Mux11~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[20]\, datapath_0|register_file_0|reg_x29|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~3\, datapath_0|register_file_0|output_1_mux|Mux11~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[20]\, datapath_0|register_file_0|reg_x20|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[20]\, datapath_0|register_file_0|reg_x24|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[20]\, datapath_0|register_file_0|reg_x16|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~4\, datapath_0|register_file_0|output_1_mux|Mux11~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[20]\, datapath_0|register_file_0|reg_x28|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~5\, datapath_0|register_file_0|output_1_mux|Mux11~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~6\, datapath_0|register_file_0|output_1_mux|Mux11~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[20]\, datapath_0|register_file_0|reg_x27|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[20]\, datapath_0|register_file_0|reg_x23|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[20]\, datapath_0|register_file_0|reg_x19|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~7\, datapath_0|register_file_0|output_1_mux|Mux11~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[20]\, datapath_0|register_file_0|reg_x31|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~8\, datapath_0|register_file_0|output_1_mux|Mux11~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~9\, datapath_0|register_file_0|output_1_mux|Mux11~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[20]\, datapath_0|register_file_0|reg_x9|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[20]\, datapath_0|register_file_0|reg_x10|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[20]\, datapath_0|register_file_0|reg_x8|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~10\, datapath_0|register_file_0|output_1_mux|Mux11~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[20]\, datapath_0|register_file_0|reg_x11|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~11\, datapath_0|register_file_0|output_1_mux|Mux11~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[20]\, datapath_0|register_file_0|reg_x2|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[20]\, datapath_0|register_file_0|reg_x3|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[20]\, datapath_0|register_file_0|reg_x1|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[20]\, datapath_0|register_file_0|reg_x6|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[20]\, datapath_0|register_file_0|reg_x5|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[20]\, datapath_0|register_file_0|reg_x4|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~12\, datapath_0|register_file_0|output_1_mux|Mux11~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[20]\, datapath_0|register_file_0|reg_x7|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~13\, datapath_0|register_file_0|output_1_mux|Mux11~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~14\, datapath_0|register_file_0|output_1_mux|Mux11~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~15\, datapath_0|register_file_0|output_1_mux|Mux11~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~16\, datapath_0|register_file_0|output_1_mux|Mux11~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[20]\, datapath_0|register_file_0|reg_x14|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[20]\, datapath_0|register_file_0|reg_x13|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[20]\, datapath_0|register_file_0|reg_x12|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~17\, datapath_0|register_file_0|output_1_mux|Mux11~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[20]\, datapath_0|register_file_0|reg_x15|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~18\, datapath_0|register_file_0|output_1_mux|Mux11~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux11~19\, datapath_0|register_file_0|output_1_mux|Mux11~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[20]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[20]~20\, datapath_0|JTU_0|internal_mux|output_0[20]~20, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~42\, datapath_0|JTU_0|internal_adder|Add0~42, microcontroller, 1
instance = comp, \datapath_0|Add0~57\, datapath_0|Add0~57, microcontroller, 1
instance = comp, \datapath_0|Add0~59\, datapath_0|Add0~59, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[21]\, datapath_0|program_counter_0|internal_register|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[21]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[21]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[21]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[21]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|Add1~38\, datapath_0|Add1~38, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux10~1\, datapath_0|mux_0|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[21]\, datapath_0|register_file_0|reg_x10|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[21]\, datapath_0|register_file_0|reg_x9|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[21]\, datapath_0|register_file_0|reg_x8|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~0\, datapath_0|register_file_0|output_1_mux|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[21]\, datapath_0|register_file_0|reg_x11|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~1\, datapath_0|register_file_0|output_1_mux|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[21]\, datapath_0|register_file_0|reg_x21|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[21]\, datapath_0|register_file_0|reg_x25|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[21]\, datapath_0|register_file_0|reg_x17|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~2\, datapath_0|register_file_0|output_1_mux|Mux10~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[21]\, datapath_0|register_file_0|reg_x29|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~3\, datapath_0|register_file_0|output_1_mux|Mux10~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[21]\, datapath_0|register_file_0|reg_x26|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[21]\, datapath_0|register_file_0|reg_x22|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[21]\, datapath_0|register_file_0|reg_x18|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~4\, datapath_0|register_file_0|output_1_mux|Mux10~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[21]\, datapath_0|register_file_0|reg_x30|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~5\, datapath_0|register_file_0|output_1_mux|Mux10~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[21]\, datapath_0|register_file_0|reg_x20|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[21]\, datapath_0|register_file_0|reg_x24|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[21]\, datapath_0|register_file_0|reg_x16|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~6\, datapath_0|register_file_0|output_1_mux|Mux10~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[21]\, datapath_0|register_file_0|reg_x28|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~7\, datapath_0|register_file_0|output_1_mux|Mux10~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~8\, datapath_0|register_file_0|output_1_mux|Mux10~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[21]\, datapath_0|register_file_0|reg_x27|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[21]\, datapath_0|register_file_0|reg_x23|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[21]\, datapath_0|register_file_0|reg_x19|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~9\, datapath_0|register_file_0|output_1_mux|Mux10~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[21]\, datapath_0|register_file_0|reg_x31|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~10\, datapath_0|register_file_0|output_1_mux|Mux10~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~11\, datapath_0|register_file_0|output_1_mux|Mux10~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[21]\, datapath_0|register_file_0|reg_x2|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[21]\, datapath_0|register_file_0|reg_x3|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[21]\, datapath_0|register_file_0|reg_x1|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[21]\, datapath_0|register_file_0|reg_x5|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[21]\, datapath_0|register_file_0|reg_x6|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[21]\, datapath_0|register_file_0|reg_x4|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~12\, datapath_0|register_file_0|output_1_mux|Mux10~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[21]\, datapath_0|register_file_0|reg_x7|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~13\, datapath_0|register_file_0|output_1_mux|Mux10~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~14\, datapath_0|register_file_0|output_1_mux|Mux10~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~15\, datapath_0|register_file_0|output_1_mux|Mux10~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~16\, datapath_0|register_file_0|output_1_mux|Mux10~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[21]\, datapath_0|register_file_0|reg_x13|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[21]\, datapath_0|register_file_0|reg_x14|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[21]\, datapath_0|register_file_0|reg_x12|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~17\, datapath_0|register_file_0|output_1_mux|Mux10~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[21]\, datapath_0|register_file_0|reg_x15|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~18\, datapath_0|register_file_0|output_1_mux|Mux10~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux10~19\, datapath_0|register_file_0|output_1_mux|Mux10~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[21]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[21]~21\, datapath_0|JTU_0|internal_mux|output_0[21]~21, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~44\, datapath_0|JTU_0|internal_adder|Add0~44, microcontroller, 1
instance = comp, \datapath_0|Add0~60\, datapath_0|Add0~60, microcontroller, 1
instance = comp, \datapath_0|Add0~62\, datapath_0|Add0~62, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[22]\, datapath_0|program_counter_0|internal_register|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[22]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[22]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[22]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[22]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|Add1~40\, datapath_0|Add1~40, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux9~1\, datapath_0|mux_0|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[22]\, datapath_0|register_file_0|reg_x26|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[22]\, datapath_0|register_file_0|reg_x22|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[22]\, datapath_0|register_file_0|reg_x18|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~0\, datapath_0|register_file_0|output_1_mux|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[22]\, datapath_0|register_file_0|reg_x30|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~1\, datapath_0|register_file_0|output_1_mux|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[22]\, datapath_0|register_file_0|reg_x21|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[22]\, datapath_0|register_file_0|reg_x25|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[22]\, datapath_0|register_file_0|reg_x17|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~2\, datapath_0|register_file_0|output_1_mux|Mux9~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[22]\, datapath_0|register_file_0|reg_x29|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~3\, datapath_0|register_file_0|output_1_mux|Mux9~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[22]\, datapath_0|register_file_0|reg_x20|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[22]\, datapath_0|register_file_0|reg_x24|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[22]\, datapath_0|register_file_0|reg_x16|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~4\, datapath_0|register_file_0|output_1_mux|Mux9~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[22]\, datapath_0|register_file_0|reg_x28|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~5\, datapath_0|register_file_0|output_1_mux|Mux9~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~6\, datapath_0|register_file_0|output_1_mux|Mux9~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[22]\, datapath_0|register_file_0|reg_x27|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[22]\, datapath_0|register_file_0|reg_x23|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[22]\, datapath_0|register_file_0|reg_x19|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~7\, datapath_0|register_file_0|output_1_mux|Mux9~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[22]\, datapath_0|register_file_0|reg_x31|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~8\, datapath_0|register_file_0|output_1_mux|Mux9~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~9\, datapath_0|register_file_0|output_1_mux|Mux9~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[22]\, datapath_0|register_file_0|reg_x9|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[22]\, datapath_0|register_file_0|reg_x10|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[22]\, datapath_0|register_file_0|reg_x8|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~10\, datapath_0|register_file_0|output_1_mux|Mux9~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[22]\, datapath_0|register_file_0|reg_x11|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~11\, datapath_0|register_file_0|output_1_mux|Mux9~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[22]\, datapath_0|register_file_0|reg_x2|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[22]\, datapath_0|register_file_0|reg_x3|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[22]\, datapath_0|register_file_0|reg_x1|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[22]\, datapath_0|register_file_0|reg_x6|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[22]\, datapath_0|register_file_0|reg_x5|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[22]\, datapath_0|register_file_0|reg_x4|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~12\, datapath_0|register_file_0|output_1_mux|Mux9~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[22]\, datapath_0|register_file_0|reg_x7|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~13\, datapath_0|register_file_0|output_1_mux|Mux9~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~14\, datapath_0|register_file_0|output_1_mux|Mux9~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~15\, datapath_0|register_file_0|output_1_mux|Mux9~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~16\, datapath_0|register_file_0|output_1_mux|Mux9~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[22]\, datapath_0|register_file_0|reg_x14|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[22]\, datapath_0|register_file_0|reg_x13|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[22]\, datapath_0|register_file_0|reg_x12|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~17\, datapath_0|register_file_0|output_1_mux|Mux9~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[22]\, datapath_0|register_file_0|reg_x15|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~18\, datapath_0|register_file_0|output_1_mux|Mux9~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux9~19\, datapath_0|register_file_0|output_1_mux|Mux9~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[22]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux9~0\, datapath_0|forward_mux_0|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux9~1\, datapath_0|forward_mux_0|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux9~2\, datapath_0|forward_mux_0|Mux9~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~92\, datapath_0|ALU_0|Add0~92, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[22]~19\, datapath_0|ALU_0|result_temp[22]~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~76\, datapath_0|ALU_0|ShiftLeft0~76, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~88\, datapath_0|ALU_0|ShiftLeft0~88, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~89\, datapath_0|ALU_0|ShiftLeft0~89, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~42\, datapath_0|ALU_0|ShiftLeft0~42, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~61\, datapath_0|ALU_0|ShiftLeft0~61, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~13\, datapath_0|ALU_0|ShiftLeft0~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~14\, datapath_0|ALU_0|ShiftLeft0~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~27\, datapath_0|ALU_0|ShiftLeft0~27, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~28\, datapath_0|ALU_0|ShiftLeft0~28, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[22]~22\, datapath_0|mux_1|output_0[22]~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~64\, datapath_0|ALU_0|ShiftRight0~64, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~22\, datapath_0|ALU_0|ALU_output~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~0\, datapath_0|ALU_0|Mux76~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~1\, datapath_0|ALU_0|Mux76~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~2\, datapath_0|ALU_0|Mux76~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~3\, datapath_0|ALU_0|Mux76~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~4\, datapath_0|ALU_0|Mux76~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux76~5\, datapath_0|ALU_0|Mux76~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[22]\, datapath_0|ALU_0|ALU_output[22], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[22]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~0\, datapath_0|register_file_0|output_2_mux|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~1\, datapath_0|register_file_0|output_2_mux|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~2\, datapath_0|register_file_0|output_2_mux|Mux9~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~3\, datapath_0|register_file_0|output_2_mux|Mux9~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~4\, datapath_0|register_file_0|output_2_mux|Mux9~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~5\, datapath_0|register_file_0|output_2_mux|Mux9~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~6\, datapath_0|register_file_0|output_2_mux|Mux9~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~7\, datapath_0|register_file_0|output_2_mux|Mux9~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~8\, datapath_0|register_file_0|output_2_mux|Mux9~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~9\, datapath_0|register_file_0|output_2_mux|Mux9~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~10\, datapath_0|register_file_0|output_2_mux|Mux9~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~11\, datapath_0|register_file_0|output_2_mux|Mux9~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~12\, datapath_0|register_file_0|output_2_mux|Mux9~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~13\, datapath_0|register_file_0|output_2_mux|Mux9~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~14\, datapath_0|register_file_0|output_2_mux|Mux9~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~15\, datapath_0|register_file_0|output_2_mux|Mux9~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~16\, datapath_0|register_file_0|output_2_mux|Mux9~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~17\, datapath_0|register_file_0|output_2_mux|Mux9~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~18\, datapath_0|register_file_0|output_2_mux|Mux9~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux9~19\, datapath_0|register_file_0|output_2_mux|Mux9~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[22]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[22], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux9~0\, datapath_0|forward_mux_1|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux9~1\, datapath_0|forward_mux_1|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux9~2\, datapath_0|forward_mux_1|Mux9~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~22\, datapath_0|ALU_0|Add0~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~94\, datapath_0|ALU_0|Add0~94, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[23]~20\, datapath_0|ALU_0|result_temp[23]~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~92\, datapath_0|ALU_0|ShiftLeft0~92, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~66\, datapath_0|ALU_0|ShiftLeft0~66, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~29\, datapath_0|ALU_0|ShiftLeft0~29, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~32\, datapath_0|ALU_0|ShiftLeft0~32, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[23]~23\, datapath_0|mux_1|output_0[23]~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~67\, datapath_0|ALU_0|ShiftRight0~67, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~68\, datapath_0|ALU_0|ShiftRight0~68, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~69\, datapath_0|ALU_0|ShiftRight0~69, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~23\, datapath_0|ALU_0|ALU_output~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~0\, datapath_0|ALU_0|Mux75~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~1\, datapath_0|ALU_0|Mux75~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~2\, datapath_0|ALU_0|Mux75~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~3\, datapath_0|ALU_0|Mux75~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~4\, datapath_0|ALU_0|Mux75~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux75~5\, datapath_0|ALU_0|Mux75~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[23]\, datapath_0|ALU_0|ALU_output[23], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[23]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[23]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux8~0\, datapath_0|mux_0|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[23]\, datapath_0|register_file_0|reg_x9|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[23]\, datapath_0|register_file_0|reg_x8|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~0\, datapath_0|register_file_0|output_1_mux|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[23]\, datapath_0|register_file_0|reg_x11|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~1\, datapath_0|register_file_0|output_1_mux|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[23]\, datapath_0|register_file_0|reg_x21|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[23]\, datapath_0|register_file_0|reg_x25|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[23]\, datapath_0|register_file_0|reg_x17|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~2\, datapath_0|register_file_0|output_1_mux|Mux8~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[23]\, datapath_0|register_file_0|reg_x29|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~3\, datapath_0|register_file_0|output_1_mux|Mux8~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[23]\, datapath_0|register_file_0|reg_x30|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[23]\, datapath_0|register_file_0|reg_x22|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[23]\, datapath_0|register_file_0|reg_x26|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[23]\, datapath_0|register_file_0|reg_x18|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~4\, datapath_0|register_file_0|output_1_mux|Mux8~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~5\, datapath_0|register_file_0|output_1_mux|Mux8~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[23]\, datapath_0|register_file_0|reg_x20|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[23]\, datapath_0|register_file_0|reg_x24|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[23]\, datapath_0|register_file_0|reg_x16|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~6\, datapath_0|register_file_0|output_1_mux|Mux8~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[23]\, datapath_0|register_file_0|reg_x28|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~7\, datapath_0|register_file_0|output_1_mux|Mux8~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~8\, datapath_0|register_file_0|output_1_mux|Mux8~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[23]\, datapath_0|register_file_0|reg_x27|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[23]\, datapath_0|register_file_0|reg_x23|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[23]\, datapath_0|register_file_0|reg_x19|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~9\, datapath_0|register_file_0|output_1_mux|Mux8~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[23]\, datapath_0|register_file_0|reg_x31|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~10\, datapath_0|register_file_0|output_1_mux|Mux8~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~11\, datapath_0|register_file_0|output_1_mux|Mux8~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[23]\, datapath_0|register_file_0|reg_x2|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[23]\, datapath_0|register_file_0|reg_x3|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[23]\, datapath_0|register_file_0|reg_x1|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[23]\, datapath_0|register_file_0|reg_x5|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[23]\, datapath_0|register_file_0|reg_x6|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[23]\, datapath_0|register_file_0|reg_x4|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~12\, datapath_0|register_file_0|output_1_mux|Mux8~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[23]\, datapath_0|register_file_0|reg_x7|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~13\, datapath_0|register_file_0|output_1_mux|Mux8~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~14\, datapath_0|register_file_0|output_1_mux|Mux8~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~15\, datapath_0|register_file_0|output_1_mux|Mux8~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~16\, datapath_0|register_file_0|output_1_mux|Mux8~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[23]\, datapath_0|register_file_0|reg_x13|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[23]\, datapath_0|register_file_0|reg_x14|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[23]\, datapath_0|register_file_0|reg_x12|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~17\, datapath_0|register_file_0|output_1_mux|Mux8~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[23]\, datapath_0|register_file_0|reg_x15|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~18\, datapath_0|register_file_0|output_1_mux|Mux8~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux8~19\, datapath_0|register_file_0|output_1_mux|Mux8~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[23]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[23]~23\, datapath_0|JTU_0|internal_mux|output_0[23]~23, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~46\, datapath_0|JTU_0|internal_adder|Add0~46, microcontroller, 1
instance = comp, \datapath_0|Add0~63\, datapath_0|Add0~63, microcontroller, 1
instance = comp, \datapath_0|Add0~65\, datapath_0|Add0~65, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[23]\, datapath_0|program_counter_0|internal_register|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[23]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[23]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[23]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[23]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|Add1~42\, datapath_0|Add1~42, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux8~1\, datapath_0|mux_0|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[23]\, datapath_0|register_file_0|reg_x10|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~0\, datapath_0|register_file_0|output_2_mux|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~1\, datapath_0|register_file_0|output_2_mux|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~2\, datapath_0|register_file_0|output_2_mux|Mux8~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~3\, datapath_0|register_file_0|output_2_mux|Mux8~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~4\, datapath_0|register_file_0|output_2_mux|Mux8~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~5\, datapath_0|register_file_0|output_2_mux|Mux8~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~6\, datapath_0|register_file_0|output_2_mux|Mux8~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~7\, datapath_0|register_file_0|output_2_mux|Mux8~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~8\, datapath_0|register_file_0|output_2_mux|Mux8~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~9\, datapath_0|register_file_0|output_2_mux|Mux8~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~10\, datapath_0|register_file_0|output_2_mux|Mux8~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~11\, datapath_0|register_file_0|output_2_mux|Mux8~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~12\, datapath_0|register_file_0|output_2_mux|Mux8~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~13\, datapath_0|register_file_0|output_2_mux|Mux8~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~14\, datapath_0|register_file_0|output_2_mux|Mux8~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~15\, datapath_0|register_file_0|output_2_mux|Mux8~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~16\, datapath_0|register_file_0|output_2_mux|Mux8~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~17\, datapath_0|register_file_0|output_2_mux|Mux8~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~18\, datapath_0|register_file_0|output_2_mux|Mux8~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux8~19\, datapath_0|register_file_0|output_2_mux|Mux8~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[23]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux8~0\, datapath_0|forward_mux_1|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux8~1\, datapath_0|forward_mux_1|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux8~2\, datapath_0|forward_mux_1|Mux8~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[23]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux61~3\, datapath_0|datamem_module_0|Mux61~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux61~2\, datapath_0|datamem_module_0|Mux61~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[7]\, datapath_0|datamem_module_0|memory_input_2[7], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~34\, datapath_0|datamem_module_0|datamem_2|RAM~34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a15\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a15, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a7\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~88\, datapath_0|datamem_module_0|datamem_2|RAM~88, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a31\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a23\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a23, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~89\, datapath_0|datamem_module_0|datamem_2|RAM~89, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~90\, datapath_0|datamem_module_0|datamem_2|RAM~90, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a47\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a39\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~91\, datapath_0|datamem_module_0|datamem_2|RAM~91, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a63\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a55\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~92\, datapath_0|datamem_module_0|datamem_2|RAM~92, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~93\, datapath_0|datamem_module_0|datamem_2|RAM~93, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~94\, datapath_0|datamem_module_0|datamem_2|RAM~94, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux27~0\, datapath_0|datamem_module_0|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[23]\, datapath_0|datamem_module_0|output_data[23], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[23]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[23], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux8~0\, datapath_0|forward_mux_0|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux8~1\, datapath_0|forward_mux_0|Mux8~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux8~2\, datapath_0|forward_mux_0|Mux8~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~90\, datapath_0|ALU_0|ShiftLeft0~90, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~93\, datapath_0|ALU_0|ShiftLeft0~93, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~94\, datapath_0|ALU_0|ShiftLeft0~94, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~0\, datapath_0|ALU_0|Mux74~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~34\, datapath_0|ALU_0|ShiftLeft0~34, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~4\, datapath_0|ALU_0|Mux98~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~35\, datapath_0|ALU_0|ShiftLeft0~35, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~36\, datapath_0|ALU_0|ShiftLeft0~36, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~1\, datapath_0|ALU_0|Mux74~1, microcontroller, 1
instance = comp, \controller_0|Selector66~0\, controller_0|Selector66~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[24]\, controller_0|internal_immediate[24], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[24]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[24]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux7~0\, datapath_0|mux_0|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[24]\, datapath_0|register_file_0|reg_x22|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[24]\, datapath_0|register_file_0|reg_x18|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~0\, datapath_0|register_file_0|output_1_mux|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[24]\, datapath_0|register_file_0|reg_x30|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~1\, datapath_0|register_file_0|output_1_mux|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[24]\, datapath_0|register_file_0|reg_x21|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[24]\, datapath_0|register_file_0|reg_x25|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[24]\, datapath_0|register_file_0|reg_x17|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~2\, datapath_0|register_file_0|output_1_mux|Mux7~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[24]\, datapath_0|register_file_0|reg_x29|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~3\, datapath_0|register_file_0|output_1_mux|Mux7~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[24]\, datapath_0|register_file_0|reg_x20|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[24]\, datapath_0|register_file_0|reg_x24|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[24]\, datapath_0|register_file_0|reg_x16|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~4\, datapath_0|register_file_0|output_1_mux|Mux7~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[24]\, datapath_0|register_file_0|reg_x28|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~5\, datapath_0|register_file_0|output_1_mux|Mux7~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~6\, datapath_0|register_file_0|output_1_mux|Mux7~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[24]\, datapath_0|register_file_0|reg_x27|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[24]\, datapath_0|register_file_0|reg_x23|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[24]\, datapath_0|register_file_0|reg_x19|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~7\, datapath_0|register_file_0|output_1_mux|Mux7~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[24]\, datapath_0|register_file_0|reg_x31|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~8\, datapath_0|register_file_0|output_1_mux|Mux7~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~9\, datapath_0|register_file_0|output_1_mux|Mux7~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[24]\, datapath_0|register_file_0|reg_x9|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[24]\, datapath_0|register_file_0|reg_x10|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[24]\, datapath_0|register_file_0|reg_x8|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~10\, datapath_0|register_file_0|output_1_mux|Mux7~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[24]\, datapath_0|register_file_0|reg_x11|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~11\, datapath_0|register_file_0|output_1_mux|Mux7~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[24]\, datapath_0|register_file_0|reg_x2|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[24]\, datapath_0|register_file_0|reg_x3|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[24]\, datapath_0|register_file_0|reg_x1|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[24]\, datapath_0|register_file_0|reg_x6|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[24]\, datapath_0|register_file_0|reg_x5|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[24]\, datapath_0|register_file_0|reg_x4|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~12\, datapath_0|register_file_0|output_1_mux|Mux7~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[24]\, datapath_0|register_file_0|reg_x7|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~13\, datapath_0|register_file_0|output_1_mux|Mux7~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~14\, datapath_0|register_file_0|output_1_mux|Mux7~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~15\, datapath_0|register_file_0|output_1_mux|Mux7~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~16\, datapath_0|register_file_0|output_1_mux|Mux7~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[24]\, datapath_0|register_file_0|reg_x14|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[24]\, datapath_0|register_file_0|reg_x13|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[24]\, datapath_0|register_file_0|reg_x12|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~17\, datapath_0|register_file_0|output_1_mux|Mux7~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[24]\, datapath_0|register_file_0|reg_x15|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~18\, datapath_0|register_file_0|output_1_mux|Mux7~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux7~19\, datapath_0|register_file_0|output_1_mux|Mux7~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[24]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[24]~24\, datapath_0|JTU_0|internal_mux|output_0[24]~24, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~48\, datapath_0|JTU_0|internal_adder|Add0~48, microcontroller, 1
instance = comp, \datapath_0|Add0~66\, datapath_0|Add0~66, microcontroller, 1
instance = comp, \datapath_0|Add0~68\, datapath_0|Add0~68, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[24]\, datapath_0|program_counter_0|internal_register|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[24]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[24]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[24]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[24]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|Add1~44\, datapath_0|Add1~44, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux7~1\, datapath_0|mux_0|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[24]\, datapath_0|register_file_0|reg_x26|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~0\, datapath_0|register_file_0|output_2_mux|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~1\, datapath_0|register_file_0|output_2_mux|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~2\, datapath_0|register_file_0|output_2_mux|Mux7~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~3\, datapath_0|register_file_0|output_2_mux|Mux7~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~4\, datapath_0|register_file_0|output_2_mux|Mux7~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~5\, datapath_0|register_file_0|output_2_mux|Mux7~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~6\, datapath_0|register_file_0|output_2_mux|Mux7~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~7\, datapath_0|register_file_0|output_2_mux|Mux7~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~8\, datapath_0|register_file_0|output_2_mux|Mux7~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~9\, datapath_0|register_file_0|output_2_mux|Mux7~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~10\, datapath_0|register_file_0|output_2_mux|Mux7~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~11\, datapath_0|register_file_0|output_2_mux|Mux7~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~12\, datapath_0|register_file_0|output_2_mux|Mux7~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~13\, datapath_0|register_file_0|output_2_mux|Mux7~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~14\, datapath_0|register_file_0|output_2_mux|Mux7~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~15\, datapath_0|register_file_0|output_2_mux|Mux7~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~16\, datapath_0|register_file_0|output_2_mux|Mux7~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~17\, datapath_0|register_file_0|output_2_mux|Mux7~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~18\, datapath_0|register_file_0|output_2_mux|Mux7~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux7~19\, datapath_0|register_file_0|output_2_mux|Mux7~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[24]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux7~0\, datapath_0|forward_mux_1|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux7~1\, datapath_0|forward_mux_1|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux7~2\, datapath_0|forward_mux_1|Mux7~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[24]~24\, datapath_0|mux_1|output_0[24]~24, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~24\, datapath_0|ALU_0|ALU_output~24, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~2\, datapath_0|ALU_0|Mux74~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~3\, datapath_0|ALU_0|Mux74~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~5\, datapath_0|ALU_0|Mux72~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~6\, datapath_0|ALU_0|Mux72~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~4\, datapath_0|ALU_0|Mux74~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~5\, datapath_0|ALU_0|Mux74~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~20\, datapath_0|ALU_0|Add0~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~96\, datapath_0|ALU_0|Add0~96, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux74~6\, datapath_0|ALU_0|Mux74~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[24]\, datapath_0|ALU_0|ALU_output[24], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[24]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux7~0\, datapath_0|forward_mux_0|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux7~1\, datapath_0|forward_mux_0|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux7~2\, datapath_0|forward_mux_0|Mux7~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~11\, datapath_0|ALU_0|ShiftRight1~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~19\, datapath_0|ALU_0|ShiftRight0~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~42\, datapath_0|ALU_0|ShiftRight0~42, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~60\, datapath_0|ALU_0|ShiftRight0~60, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~38\, datapath_0|ALU_0|ShiftRight0~38, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~39\, datapath_0|ALU_0|ShiftRight0~39, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~61\, datapath_0|ALU_0|ShiftRight0~61, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~21\, datapath_0|ALU_0|ALU_output~21, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~0\, datapath_0|ALU_0|Mux77~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~1\, datapath_0|ALU_0|Mux77~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~2\, datapath_0|ALU_0|Mux77~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~3\, datapath_0|ALU_0|Mux77~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~4\, datapath_0|ALU_0|Mux77~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux77~5\, datapath_0|ALU_0|Mux77~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[21]\, datapath_0|ALU_0|ALU_output[21], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[21]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux10~0\, datapath_0|forward_mux_0|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux10~1\, datapath_0|forward_mux_0|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux10~2\, datapath_0|forward_mux_0|Mux10~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~84\, datapath_0|ALU_0|ShiftLeft0~84, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~85\, datapath_0|ALU_0|ShiftLeft0~85, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~73\, datapath_0|ALU_0|ShiftLeft0~73, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~95\, datapath_0|ALU_0|ShiftLeft0~95, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~96\, datapath_0|ALU_0|ShiftLeft0~96, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~0\, datapath_0|ALU_0|Mux73~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~39\, datapath_0|ALU_0|ShiftLeft0~39, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~40\, datapath_0|ALU_0|ShiftLeft0~40, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~1\, datapath_0|ALU_0|Mux73~1, microcontroller, 1
instance = comp, \controller_0|Selector67~0\, controller_0|Selector67~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[25]\, controller_0|internal_immediate[25], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[25]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[25]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux6~0\, datapath_0|mux_0|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[25]\, datapath_0|register_file_0|reg_x9|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[25]\, datapath_0|register_file_0|reg_x8|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~0\, datapath_0|register_file_0|output_1_mux|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[25]\, datapath_0|register_file_0|reg_x11|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~1\, datapath_0|register_file_0|output_1_mux|Mux6~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[25]\, datapath_0|register_file_0|reg_x21|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[25]\, datapath_0|register_file_0|reg_x25|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[25]\, datapath_0|register_file_0|reg_x17|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~2\, datapath_0|register_file_0|output_1_mux|Mux6~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[25]\, datapath_0|register_file_0|reg_x29|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~3\, datapath_0|register_file_0|output_1_mux|Mux6~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[25]\, datapath_0|register_file_0|reg_x26|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[25]\, datapath_0|register_file_0|reg_x22|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[25]\, datapath_0|register_file_0|reg_x18|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~4\, datapath_0|register_file_0|output_1_mux|Mux6~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[25]\, datapath_0|register_file_0|reg_x30|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~5\, datapath_0|register_file_0|output_1_mux|Mux6~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[25]\, datapath_0|register_file_0|reg_x28|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[25]\, datapath_0|register_file_0|reg_x24|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[25]\, datapath_0|register_file_0|reg_x20|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[25]\, datapath_0|register_file_0|reg_x16|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~6\, datapath_0|register_file_0|output_1_mux|Mux6~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~7\, datapath_0|register_file_0|output_1_mux|Mux6~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~8\, datapath_0|register_file_0|output_1_mux|Mux6~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[25]\, datapath_0|register_file_0|reg_x27|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[25]\, datapath_0|register_file_0|reg_x23|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[25]\, datapath_0|register_file_0|reg_x19|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~9\, datapath_0|register_file_0|output_1_mux|Mux6~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[25]\, datapath_0|register_file_0|reg_x31|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~10\, datapath_0|register_file_0|output_1_mux|Mux6~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~11\, datapath_0|register_file_0|output_1_mux|Mux6~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[25]\, datapath_0|register_file_0|reg_x2|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[25]\, datapath_0|register_file_0|reg_x3|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[25]\, datapath_0|register_file_0|reg_x1|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[25]\, datapath_0|register_file_0|reg_x5|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[25]\, datapath_0|register_file_0|reg_x6|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[25]\, datapath_0|register_file_0|reg_x4|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~12\, datapath_0|register_file_0|output_1_mux|Mux6~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[25]\, datapath_0|register_file_0|reg_x7|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~13\, datapath_0|register_file_0|output_1_mux|Mux6~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~14\, datapath_0|register_file_0|output_1_mux|Mux6~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~15\, datapath_0|register_file_0|output_1_mux|Mux6~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~16\, datapath_0|register_file_0|output_1_mux|Mux6~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[25]\, datapath_0|register_file_0|reg_x13|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[25]\, datapath_0|register_file_0|reg_x14|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[25]\, datapath_0|register_file_0|reg_x12|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~17\, datapath_0|register_file_0|output_1_mux|Mux6~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[25]\, datapath_0|register_file_0|reg_x15|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~18\, datapath_0|register_file_0|output_1_mux|Mux6~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux6~19\, datapath_0|register_file_0|output_1_mux|Mux6~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[25]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[25]~25\, datapath_0|JTU_0|internal_mux|output_0[25]~25, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~50\, datapath_0|JTU_0|internal_adder|Add0~50, microcontroller, 1
instance = comp, \datapath_0|Add0~69\, datapath_0|Add0~69, microcontroller, 1
instance = comp, \datapath_0|Add0~71\, datapath_0|Add0~71, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[25]\, datapath_0|program_counter_0|internal_register|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[25]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[25]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[25]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[25]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|Add1~46\, datapath_0|Add1~46, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux6~1\, datapath_0|mux_0|Mux6~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[25]\, datapath_0|register_file_0|reg_x10|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~0\, datapath_0|register_file_0|output_2_mux|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~1\, datapath_0|register_file_0|output_2_mux|Mux6~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~2\, datapath_0|register_file_0|output_2_mux|Mux6~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~3\, datapath_0|register_file_0|output_2_mux|Mux6~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~4\, datapath_0|register_file_0|output_2_mux|Mux6~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~5\, datapath_0|register_file_0|output_2_mux|Mux6~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~6\, datapath_0|register_file_0|output_2_mux|Mux6~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~7\, datapath_0|register_file_0|output_2_mux|Mux6~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~8\, datapath_0|register_file_0|output_2_mux|Mux6~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~9\, datapath_0|register_file_0|output_2_mux|Mux6~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~10\, datapath_0|register_file_0|output_2_mux|Mux6~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~11\, datapath_0|register_file_0|output_2_mux|Mux6~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~12\, datapath_0|register_file_0|output_2_mux|Mux6~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~13\, datapath_0|register_file_0|output_2_mux|Mux6~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~14\, datapath_0|register_file_0|output_2_mux|Mux6~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~15\, datapath_0|register_file_0|output_2_mux|Mux6~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~16\, datapath_0|register_file_0|output_2_mux|Mux6~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~17\, datapath_0|register_file_0|output_2_mux|Mux6~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~18\, datapath_0|register_file_0|output_2_mux|Mux6~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux6~19\, datapath_0|register_file_0|output_2_mux|Mux6~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[25]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux6~0\, datapath_0|forward_mux_1|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux6~1\, datapath_0|forward_mux_1|Mux6~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux6~2\, datapath_0|forward_mux_1|Mux6~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[25]~25\, datapath_0|mux_1|output_0[25]~25, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~72\, datapath_0|ALU_0|ShiftRight0~72, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~25\, datapath_0|ALU_0|ALU_output~25, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~2\, datapath_0|ALU_0|Mux73~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~3\, datapath_0|ALU_0|Mux73~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~4\, datapath_0|ALU_0|Mux73~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~5\, datapath_0|ALU_0|Mux73~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~19\, datapath_0|ALU_0|Add0~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~98\, datapath_0|ALU_0|Add0~98, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux73~6\, datapath_0|ALU_0|Mux73~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[25]\, datapath_0|ALU_0|ALU_output[25], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[25]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux6~0\, datapath_0|forward_mux_0|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux6~1\, datapath_0|forward_mux_0|Mux6~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux6~2\, datapath_0|forward_mux_0|Mux6~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~19\, datapath_0|ALU_0|ShiftRight1~19, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~20\, datapath_0|ALU_0|ShiftRight1~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~63\, datapath_0|ALU_0|ShiftRight0~63, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~46\, datapath_0|ALU_0|ShiftRight1~46, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[6]~6\, datapath_0|mux_1|output_0[6]~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~6\, datapath_0|ALU_0|ALU_output~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~1\, datapath_0|ALU_0|Mux96~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~0\, datapath_0|ALU_0|Mux92~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~1\, datapath_0|ALU_0|Mux92~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~4\, datapath_0|ALU_0|Mux96~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~6\, datapath_0|ALU_0|Mux96~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~2\, datapath_0|ALU_0|Mux92~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~3\, datapath_0|ALU_0|Mux92~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~1\, datapath_0|ALU_0|Mux93~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~24\, datapath_0|ALU_0|ShiftRight1~24, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~25\, datapath_0|ALU_0|ShiftRight1~25, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~26\, datapath_0|ALU_0|ShiftRight1~26, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~4\, datapath_0|ALU_0|Mux92~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~21\, datapath_0|ALU_0|ShiftRight1~21, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~22\, datapath_0|ALU_0|ShiftRight1~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~28\, datapath_0|ALU_0|ShiftRight1~28, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~8\, datapath_0|ALU_0|ShiftRight1~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~29\, datapath_0|ALU_0|ShiftRight1~29, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~65\, datapath_0|ALU_0|ShiftRight0~65, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~5\, datapath_0|ALU_0|Mux92~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~39\, datapath_0|ALU_0|Add0~39, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~40\, datapath_0|ALU_0|Add0~40, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~56\, datapath_0|ALU_0|Add0~56, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~58\, datapath_0|ALU_0|Add0~58, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~60\, datapath_0|ALU_0|Add0~60, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux92~6\, datapath_0|ALU_0|Mux92~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[6]\, datapath_0|ALU_0|ALU_output[6], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[6]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux25~0\, datapath_0|forward_mux_0|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[6]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux25~1\, datapath_0|forward_mux_0|Mux25~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux25~2\, datapath_0|forward_mux_0|Mux25~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~62\, datapath_0|ALU_0|Add0~62, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~64\, datapath_0|ALU_0|Add0~64, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[8]~5\, datapath_0|ALU_0|result_temp[8]~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~0\, datapath_0|ALU_0|Mux90~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~0\, datapath_0|ALU_0|ShiftRight0~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~1\, datapath_0|ALU_0|ShiftRight0~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~2\, datapath_0|ALU_0|ShiftRight0~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~6\, datapath_0|ALU_0|ShiftRight0~6, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[8]~8\, datapath_0|mux_1|output_0[8]~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~8\, datapath_0|ALU_0|ALU_output~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~1\, datapath_0|ALU_0|Mux90~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~2\, datapath_0|ALU_0|Mux90~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~3\, datapath_0|ALU_0|Mux90~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~4\, datapath_0|ALU_0|Mux90~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~5\, datapath_0|ALU_0|Mux90~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~20\, datapath_0|ALU_0|ShiftRight0~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~21\, datapath_0|ALU_0|ShiftRight0~21, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~22\, datapath_0|ALU_0|ShiftRight0~22, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~23\, datapath_0|ALU_0|ShiftRight0~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~24\, datapath_0|ALU_0|ShiftRight0~24, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~25\, datapath_0|ALU_0|ShiftRight0~25, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux90~6\, datapath_0|ALU_0|Mux90~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[8]\, datapath_0|ALU_0|ALU_output[8], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[8]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[8]\, datapath_0|register_file_0|reg_x22|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[8]\, datapath_0|register_file_0|reg_x18|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~0\, datapath_0|register_file_0|output_2_mux|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[8]\, datapath_0|register_file_0|reg_x30|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~1\, datapath_0|register_file_0|output_2_mux|Mux23~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[8]\, datapath_0|register_file_0|reg_x21|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[8]\, datapath_0|register_file_0|reg_x25|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[8]\, datapath_0|register_file_0|reg_x17|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~2\, datapath_0|register_file_0|output_2_mux|Mux23~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[8]\, datapath_0|register_file_0|reg_x29|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~3\, datapath_0|register_file_0|output_2_mux|Mux23~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[8]\, datapath_0|register_file_0|reg_x20|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[8]\, datapath_0|register_file_0|reg_x24|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[8]\, datapath_0|register_file_0|reg_x16|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~4\, datapath_0|register_file_0|output_2_mux|Mux23~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[8]\, datapath_0|register_file_0|reg_x28|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~5\, datapath_0|register_file_0|output_2_mux|Mux23~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~6\, datapath_0|register_file_0|output_2_mux|Mux23~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[8]\, datapath_0|register_file_0|reg_x27|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[8]\, datapath_0|register_file_0|reg_x23|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[8]\, datapath_0|register_file_0|reg_x19|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~7\, datapath_0|register_file_0|output_2_mux|Mux23~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[8]\, datapath_0|register_file_0|reg_x31|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~8\, datapath_0|register_file_0|output_2_mux|Mux23~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~9\, datapath_0|register_file_0|output_2_mux|Mux23~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[8]\, datapath_0|register_file_0|reg_x9|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[8]\, datapath_0|register_file_0|reg_x10|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[8]\, datapath_0|register_file_0|reg_x8|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~10\, datapath_0|register_file_0|output_2_mux|Mux23~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[8]\, datapath_0|register_file_0|reg_x11|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~11\, datapath_0|register_file_0|output_2_mux|Mux23~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[8]\, datapath_0|register_file_0|reg_x2|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[8]\, datapath_0|register_file_0|reg_x3|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[8]\, datapath_0|register_file_0|reg_x1|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[8]\, datapath_0|register_file_0|reg_x6|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[8]\, datapath_0|register_file_0|reg_x5|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[8]\, datapath_0|register_file_0|reg_x4|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~12\, datapath_0|register_file_0|output_2_mux|Mux23~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[8]\, datapath_0|register_file_0|reg_x7|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~13\, datapath_0|register_file_0|output_2_mux|Mux23~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~14\, datapath_0|register_file_0|output_2_mux|Mux23~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~15\, datapath_0|register_file_0|output_2_mux|Mux23~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~16\, datapath_0|register_file_0|output_2_mux|Mux23~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[8]\, datapath_0|register_file_0|reg_x14|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[8]\, datapath_0|register_file_0|reg_x13|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[8]\, datapath_0|register_file_0|reg_x12|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~17\, datapath_0|register_file_0|output_2_mux|Mux23~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[8]\, datapath_0|register_file_0|reg_x15|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~18\, datapath_0|register_file_0|output_2_mux|Mux23~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux23~19\, datapath_0|register_file_0|output_2_mux|Mux23~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[8]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux23~0\, datapath_0|forward_mux_1|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux23~1\, datapath_0|forward_mux_1|Mux23~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux23~2\, datapath_0|forward_mux_1|Mux23~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~36\, datapath_0|ALU_0|Add0~36, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~66\, datapath_0|ALU_0|Add0~66, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[9]~6\, datapath_0|ALU_0|result_temp[9]~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~34\, datapath_0|ALU_0|ShiftRight0~34, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~35\, datapath_0|ALU_0|ShiftRight0~35, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~36\, datapath_0|ALU_0|ShiftRight0~36, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[9]~9\, datapath_0|mux_1|output_0[9]~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~9\, datapath_0|ALU_0|ALU_output~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~0\, datapath_0|ALU_0|Mux89~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~1\, datapath_0|ALU_0|Mux89~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~2\, datapath_0|ALU_0|Mux89~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~3\, datapath_0|ALU_0|Mux89~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~4\, datapath_0|ALU_0|Mux89~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~44\, datapath_0|ALU_0|ShiftRight0~44, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux89~5\, datapath_0|ALU_0|Mux89~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[9]\, datapath_0|ALU_0|ALU_output[9], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[9]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[9]\, datapath_0|register_file_0|reg_x9|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[9]\, datapath_0|register_file_0|reg_x8|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~0\, datapath_0|register_file_0|output_2_mux|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[9]\, datapath_0|register_file_0|reg_x11|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~1\, datapath_0|register_file_0|output_2_mux|Mux22~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[9]\, datapath_0|register_file_0|reg_x21|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[9]\, datapath_0|register_file_0|reg_x25|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[9]\, datapath_0|register_file_0|reg_x17|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~2\, datapath_0|register_file_0|output_2_mux|Mux22~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[9]\, datapath_0|register_file_0|reg_x29|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~3\, datapath_0|register_file_0|output_2_mux|Mux22~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[9]\, datapath_0|register_file_0|reg_x26|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[9]\, datapath_0|register_file_0|reg_x22|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[9]\, datapath_0|register_file_0|reg_x18|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~4\, datapath_0|register_file_0|output_2_mux|Mux22~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[9]\, datapath_0|register_file_0|reg_x30|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~5\, datapath_0|register_file_0|output_2_mux|Mux22~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[9]\, datapath_0|register_file_0|reg_x20|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[9]\, datapath_0|register_file_0|reg_x24|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[9]\, datapath_0|register_file_0|reg_x16|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~6\, datapath_0|register_file_0|output_2_mux|Mux22~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[9]\, datapath_0|register_file_0|reg_x28|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~7\, datapath_0|register_file_0|output_2_mux|Mux22~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~8\, datapath_0|register_file_0|output_2_mux|Mux22~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[9]\, datapath_0|register_file_0|reg_x27|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[9]\, datapath_0|register_file_0|reg_x23|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[9]\, datapath_0|register_file_0|reg_x19|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~9\, datapath_0|register_file_0|output_2_mux|Mux22~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[9]\, datapath_0|register_file_0|reg_x31|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~10\, datapath_0|register_file_0|output_2_mux|Mux22~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~11\, datapath_0|register_file_0|output_2_mux|Mux22~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[9]\, datapath_0|register_file_0|reg_x2|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[9]\, datapath_0|register_file_0|reg_x3|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[9]\, datapath_0|register_file_0|reg_x1|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[9]\, datapath_0|register_file_0|reg_x5|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[9]\, datapath_0|register_file_0|reg_x6|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[9]\, datapath_0|register_file_0|reg_x4|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~12\, datapath_0|register_file_0|output_2_mux|Mux22~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[9]\, datapath_0|register_file_0|reg_x7|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~13\, datapath_0|register_file_0|output_2_mux|Mux22~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~14\, datapath_0|register_file_0|output_2_mux|Mux22~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~15\, datapath_0|register_file_0|output_2_mux|Mux22~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~16\, datapath_0|register_file_0|output_2_mux|Mux22~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[9]\, datapath_0|register_file_0|reg_x13|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[9]\, datapath_0|register_file_0|reg_x14|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[9]\, datapath_0|register_file_0|reg_x12|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~17\, datapath_0|register_file_0|output_2_mux|Mux22~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[9]\, datapath_0|register_file_0|reg_x15|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~18\, datapath_0|register_file_0|output_2_mux|Mux22~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux22~19\, datapath_0|register_file_0|output_2_mux|Mux22~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[9]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux22~0\, datapath_0|forward_mux_1|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux22~1\, datapath_0|forward_mux_1|Mux22~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux22~2\, datapath_0|forward_mux_1|Mux22~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~35\, datapath_0|ALU_0|Add0~35, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~68\, datapath_0|ALU_0|Add0~68, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[10]~7\, datapath_0|ALU_0|result_temp[10]~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~51\, datapath_0|ALU_0|ShiftRight0~51, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~43\, datapath_0|ALU_0|ShiftLeft0~43, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~44\, datapath_0|ALU_0|ShiftLeft0~44, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[10]~10\, datapath_0|mux_1|output_0[10]~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~73\, datapath_0|ALU_0|ShiftRight0~73, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~10\, datapath_0|ALU_0|ALU_output~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~0\, datapath_0|ALU_0|Mux88~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~1\, datapath_0|ALU_0|Mux88~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~2\, datapath_0|ALU_0|Mux88~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~3\, datapath_0|ALU_0|Mux88~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~4\, datapath_0|ALU_0|Mux88~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~48\, datapath_0|ALU_0|ShiftRight0~48, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux88~5\, datapath_0|ALU_0|Mux88~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[10]\, datapath_0|ALU_0|ALU_output[10], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[10]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[10]\, datapath_0|register_file_0|reg_x22|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[10]\, datapath_0|register_file_0|reg_x18|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~0\, datapath_0|register_file_0|output_2_mux|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[10]\, datapath_0|register_file_0|reg_x30|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~1\, datapath_0|register_file_0|output_2_mux|Mux21~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[10]\, datapath_0|register_file_0|reg_x21|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[10]\, datapath_0|register_file_0|reg_x25|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[10]\, datapath_0|register_file_0|reg_x17|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~2\, datapath_0|register_file_0|output_2_mux|Mux21~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[10]\, datapath_0|register_file_0|reg_x29|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~3\, datapath_0|register_file_0|output_2_mux|Mux21~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[10]\, datapath_0|register_file_0|reg_x20|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[10]\, datapath_0|register_file_0|reg_x24|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[10]\, datapath_0|register_file_0|reg_x16|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~4\, datapath_0|register_file_0|output_2_mux|Mux21~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[10]\, datapath_0|register_file_0|reg_x28|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~5\, datapath_0|register_file_0|output_2_mux|Mux21~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~6\, datapath_0|register_file_0|output_2_mux|Mux21~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[10]\, datapath_0|register_file_0|reg_x27|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[10]\, datapath_0|register_file_0|reg_x23|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[10]\, datapath_0|register_file_0|reg_x19|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~7\, datapath_0|register_file_0|output_2_mux|Mux21~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[10]\, datapath_0|register_file_0|reg_x31|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~8\, datapath_0|register_file_0|output_2_mux|Mux21~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~9\, datapath_0|register_file_0|output_2_mux|Mux21~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[10]\, datapath_0|register_file_0|reg_x9|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[10]\, datapath_0|register_file_0|reg_x10|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[10]\, datapath_0|register_file_0|reg_x8|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~10\, datapath_0|register_file_0|output_2_mux|Mux21~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[10]\, datapath_0|register_file_0|reg_x11|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~11\, datapath_0|register_file_0|output_2_mux|Mux21~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[10]\, datapath_0|register_file_0|reg_x2|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[10]\, datapath_0|register_file_0|reg_x3|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[10]\, datapath_0|register_file_0|reg_x1|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[10]\, datapath_0|register_file_0|reg_x6|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[10]\, datapath_0|register_file_0|reg_x5|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[10]\, datapath_0|register_file_0|reg_x4|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~12\, datapath_0|register_file_0|output_2_mux|Mux21~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[10]\, datapath_0|register_file_0|reg_x7|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~13\, datapath_0|register_file_0|output_2_mux|Mux21~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~14\, datapath_0|register_file_0|output_2_mux|Mux21~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~15\, datapath_0|register_file_0|output_2_mux|Mux21~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~16\, datapath_0|register_file_0|output_2_mux|Mux21~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[10]\, datapath_0|register_file_0|reg_x14|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[10]\, datapath_0|register_file_0|reg_x13|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[10]\, datapath_0|register_file_0|reg_x12|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~17\, datapath_0|register_file_0|output_2_mux|Mux21~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[10]\, datapath_0|register_file_0|reg_x15|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~18\, datapath_0|register_file_0|output_2_mux|Mux21~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux21~19\, datapath_0|register_file_0|output_2_mux|Mux21~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[10]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux21~0\, datapath_0|forward_mux_1|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux21~1\, datapath_0|forward_mux_1|Mux21~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux21~2\, datapath_0|forward_mux_1|Mux21~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~34\, datapath_0|ALU_0|Add0~34, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~70\, datapath_0|ALU_0|Add0~70, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~72\, datapath_0|ALU_0|Add0~72, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[12]~9\, datapath_0|ALU_0|result_temp[12]~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~59\, datapath_0|ALU_0|ShiftRight0~59, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~53\, datapath_0|ALU_0|ShiftRight1~53, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[12]~12\, datapath_0|mux_1|output_0[12]~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~75\, datapath_0|ALU_0|ShiftRight0~75, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~12\, datapath_0|ALU_0|ALU_output~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~0\, datapath_0|ALU_0|Mux86~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~1\, datapath_0|ALU_0|Mux86~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~2\, datapath_0|ALU_0|Mux86~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~3\, datapath_0|ALU_0|Mux86~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~4\, datapath_0|ALU_0|Mux86~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~57\, datapath_0|ALU_0|ShiftRight0~57, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux86~5\, datapath_0|ALU_0|Mux86~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[12]\, datapath_0|ALU_0|ALU_output[12], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[12]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[12]\, datapath_0|register_file_0|reg_x22|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[12]\, datapath_0|register_file_0|reg_x18|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~0\, datapath_0|register_file_0|output_2_mux|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[12]\, datapath_0|register_file_0|reg_x30|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~1\, datapath_0|register_file_0|output_2_mux|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[12]\, datapath_0|register_file_0|reg_x21|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[12]\, datapath_0|register_file_0|reg_x25|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[12]\, datapath_0|register_file_0|reg_x17|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~2\, datapath_0|register_file_0|output_2_mux|Mux19~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[12]\, datapath_0|register_file_0|reg_x29|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~3\, datapath_0|register_file_0|output_2_mux|Mux19~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[12]\, datapath_0|register_file_0|reg_x20|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[12]\, datapath_0|register_file_0|reg_x24|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[12]\, datapath_0|register_file_0|reg_x16|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~4\, datapath_0|register_file_0|output_2_mux|Mux19~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[12]\, datapath_0|register_file_0|reg_x28|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~5\, datapath_0|register_file_0|output_2_mux|Mux19~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~6\, datapath_0|register_file_0|output_2_mux|Mux19~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[12]\, datapath_0|register_file_0|reg_x27|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[12]\, datapath_0|register_file_0|reg_x23|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[12]\, datapath_0|register_file_0|reg_x19|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~7\, datapath_0|register_file_0|output_2_mux|Mux19~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[12]\, datapath_0|register_file_0|reg_x31|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~8\, datapath_0|register_file_0|output_2_mux|Mux19~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~9\, datapath_0|register_file_0|output_2_mux|Mux19~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[12]\, datapath_0|register_file_0|reg_x9|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[12]\, datapath_0|register_file_0|reg_x10|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[12]\, datapath_0|register_file_0|reg_x8|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~10\, datapath_0|register_file_0|output_2_mux|Mux19~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[12]\, datapath_0|register_file_0|reg_x11|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~11\, datapath_0|register_file_0|output_2_mux|Mux19~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[12]\, datapath_0|register_file_0|reg_x2|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[12]\, datapath_0|register_file_0|reg_x3|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[12]\, datapath_0|register_file_0|reg_x1|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[12]\, datapath_0|register_file_0|reg_x6|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[12]\, datapath_0|register_file_0|reg_x5|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[12]\, datapath_0|register_file_0|reg_x4|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~12\, datapath_0|register_file_0|output_2_mux|Mux19~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[12]\, datapath_0|register_file_0|reg_x7|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~13\, datapath_0|register_file_0|output_2_mux|Mux19~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~14\, datapath_0|register_file_0|output_2_mux|Mux19~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~15\, datapath_0|register_file_0|output_2_mux|Mux19~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~16\, datapath_0|register_file_0|output_2_mux|Mux19~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[12]\, datapath_0|register_file_0|reg_x14|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[12]\, datapath_0|register_file_0|reg_x13|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[12]\, datapath_0|register_file_0|reg_x12|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~17\, datapath_0|register_file_0|output_2_mux|Mux19~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[12]\, datapath_0|register_file_0|reg_x15|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~18\, datapath_0|register_file_0|output_2_mux|Mux19~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux19~19\, datapath_0|register_file_0|output_2_mux|Mux19~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[12]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux19~0\, datapath_0|forward_mux_1|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux19~1\, datapath_0|forward_mux_1|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux19~2\, datapath_0|forward_mux_1|Mux19~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~32\, datapath_0|ALU_0|Add0~32, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~74\, datapath_0|ALU_0|Add0~74, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~76\, datapath_0|ALU_0|Add0~76, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~78\, datapath_0|ALU_0|Add0~78, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~80\, datapath_0|ALU_0|Add0~80, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~82\, datapath_0|ALU_0|Add0~82, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[18]~15\, datapath_0|ALU_0|result_temp[18]~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~23\, datapath_0|ALU_0|ShiftRight1~23, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~15\, datapath_0|ALU_0|ShiftLeft0~15, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[18]~18\, datapath_0|mux_1|output_0[18]~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~49\, datapath_0|ALU_0|ShiftRight0~49, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~50\, datapath_0|ALU_0|ShiftRight0~50, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~18\, datapath_0|ALU_0|ALU_output~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~0\, datapath_0|ALU_0|Mux80~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~1\, datapath_0|ALU_0|Mux80~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~2\, datapath_0|ALU_0|Mux80~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~3\, datapath_0|ALU_0|Mux80~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~4\, datapath_0|ALU_0|Mux80~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux80~5\, datapath_0|ALU_0|Mux80~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[18]\, datapath_0|ALU_0|ALU_output[18], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[18]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~0\, datapath_0|register_file_0|output_2_mux|Mux13~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~1\, datapath_0|register_file_0|output_2_mux|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~2\, datapath_0|register_file_0|output_2_mux|Mux13~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~3\, datapath_0|register_file_0|output_2_mux|Mux13~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~4\, datapath_0|register_file_0|output_2_mux|Mux13~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~5\, datapath_0|register_file_0|output_2_mux|Mux13~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~6\, datapath_0|register_file_0|output_2_mux|Mux13~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~7\, datapath_0|register_file_0|output_2_mux|Mux13~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~8\, datapath_0|register_file_0|output_2_mux|Mux13~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~9\, datapath_0|register_file_0|output_2_mux|Mux13~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~10\, datapath_0|register_file_0|output_2_mux|Mux13~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~11\, datapath_0|register_file_0|output_2_mux|Mux13~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~12\, datapath_0|register_file_0|output_2_mux|Mux13~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~13\, datapath_0|register_file_0|output_2_mux|Mux13~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~14\, datapath_0|register_file_0|output_2_mux|Mux13~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~15\, datapath_0|register_file_0|output_2_mux|Mux13~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~16\, datapath_0|register_file_0|output_2_mux|Mux13~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~17\, datapath_0|register_file_0|output_2_mux|Mux13~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~18\, datapath_0|register_file_0|output_2_mux|Mux13~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux13~19\, datapath_0|register_file_0|output_2_mux|Mux13~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[18]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux13~0\, datapath_0|forward_mux_1|Mux13~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux13~1\, datapath_0|forward_mux_1|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux13~2\, datapath_0|forward_mux_1|Mux13~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[18]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux56~3\, datapath_0|datamem_module_0|Mux56~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux56~2\, datapath_0|datamem_module_0|Mux56~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[2]\, datapath_0|datamem_module_0|memory_input_2[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~29\, datapath_0|datamem_module_0|datamem_2|RAM~29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a10\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a10, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a2\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~53\, datapath_0|datamem_module_0|datamem_2|RAM~53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a26\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a18\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a18, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~54\, datapath_0|datamem_module_0|datamem_2|RAM~54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~55\, datapath_0|datamem_module_0|datamem_2|RAM~55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a58\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a50\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~56\, datapath_0|datamem_module_0|datamem_2|RAM~56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a42\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a34\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~57\, datapath_0|datamem_module_0|datamem_2|RAM~57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~58\, datapath_0|datamem_module_0|datamem_2|RAM~58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~59\, datapath_0|datamem_module_0|datamem_2|RAM~59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux22~0\, datapath_0|datamem_module_0|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[18]\, datapath_0|datamem_module_0|output_data[18], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[18]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[18], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux13~0\, datapath_0|forward_mux_0|Mux13~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux13~1\, datapath_0|forward_mux_0|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux13~2\, datapath_0|forward_mux_0|Mux13~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~12\, datapath_0|ALU_0|ShiftRight1~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~43\, datapath_0|ALU_0|ShiftRight0~43, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~62\, datapath_0|ALU_0|ShiftRight0~62, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[13]~10\, datapath_0|ALU_0|result_temp[13]~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~54\, datapath_0|ALU_0|ShiftRight1~54, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~53\, datapath_0|ALU_0|ShiftLeft0~53, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~57\, datapath_0|ALU_0|ShiftLeft0~57, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[13]~13\, datapath_0|mux_1|output_0[13]~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~76\, datapath_0|ALU_0|ShiftRight0~76, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~13\, datapath_0|ALU_0|ALU_output~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~0\, datapath_0|ALU_0|Mux85~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~1\, datapath_0|ALU_0|Mux85~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~2\, datapath_0|ALU_0|Mux85~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~3\, datapath_0|ALU_0|Mux85~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~4\, datapath_0|ALU_0|Mux85~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux85~5\, datapath_0|ALU_0|Mux85~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[13]\, datapath_0|ALU_0|ALU_output[13], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[13]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux18~0\, datapath_0|forward_mux_0|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux18~1\, datapath_0|forward_mux_0|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux18~2\, datapath_0|forward_mux_0|Mux18~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~54\, datapath_0|ALU_0|ShiftLeft0~54, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~60\, datapath_0|ALU_0|ShiftLeft0~60, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~77\, datapath_0|ALU_0|ShiftLeft0~77, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~97\, datapath_0|ALU_0|ShiftLeft0~97, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~98\, datapath_0|ALU_0|ShiftLeft0~98, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~99\, datapath_0|ALU_0|ShiftLeft0~99, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~7\, datapath_0|ALU_0|Mux72~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~8\, datapath_0|ALU_0|Mux72~8, microcontroller, 1
instance = comp, \controller_0|Selector68~0\, controller_0|Selector68~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[26]\, controller_0|internal_immediate[26], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[26]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[26]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux5~0\, datapath_0|mux_0|Mux5~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[26]\, datapath_0|register_file_0|reg_x22|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[26]\, datapath_0|register_file_0|reg_x18|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~0\, datapath_0|register_file_0|output_1_mux|Mux5~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[26]\, datapath_0|register_file_0|reg_x30|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~1\, datapath_0|register_file_0|output_1_mux|Mux5~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[26]\, datapath_0|register_file_0|reg_x21|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[26]\, datapath_0|register_file_0|reg_x25|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[26]\, datapath_0|register_file_0|reg_x17|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~2\, datapath_0|register_file_0|output_1_mux|Mux5~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[26]\, datapath_0|register_file_0|reg_x29|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~3\, datapath_0|register_file_0|output_1_mux|Mux5~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[26]\, datapath_0|register_file_0|reg_x20|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[26]\, datapath_0|register_file_0|reg_x24|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[26]\, datapath_0|register_file_0|reg_x16|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~4\, datapath_0|register_file_0|output_1_mux|Mux5~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[26]\, datapath_0|register_file_0|reg_x28|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~5\, datapath_0|register_file_0|output_1_mux|Mux5~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~6\, datapath_0|register_file_0|output_1_mux|Mux5~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[26]\, datapath_0|register_file_0|reg_x27|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[26]\, datapath_0|register_file_0|reg_x23|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[26]\, datapath_0|register_file_0|reg_x19|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~7\, datapath_0|register_file_0|output_1_mux|Mux5~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[26]\, datapath_0|register_file_0|reg_x31|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~8\, datapath_0|register_file_0|output_1_mux|Mux5~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~9\, datapath_0|register_file_0|output_1_mux|Mux5~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[26]\, datapath_0|register_file_0|reg_x9|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[26]\, datapath_0|register_file_0|reg_x10|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[26]\, datapath_0|register_file_0|reg_x8|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~10\, datapath_0|register_file_0|output_1_mux|Mux5~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[26]\, datapath_0|register_file_0|reg_x11|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~11\, datapath_0|register_file_0|output_1_mux|Mux5~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[26]\, datapath_0|register_file_0|reg_x2|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[26]\, datapath_0|register_file_0|reg_x3|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[26]\, datapath_0|register_file_0|reg_x1|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[26]\, datapath_0|register_file_0|reg_x6|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[26]\, datapath_0|register_file_0|reg_x5|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[26]\, datapath_0|register_file_0|reg_x4|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~12\, datapath_0|register_file_0|output_1_mux|Mux5~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[26]\, datapath_0|register_file_0|reg_x7|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~13\, datapath_0|register_file_0|output_1_mux|Mux5~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~14\, datapath_0|register_file_0|output_1_mux|Mux5~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~15\, datapath_0|register_file_0|output_1_mux|Mux5~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~16\, datapath_0|register_file_0|output_1_mux|Mux5~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[26]\, datapath_0|register_file_0|reg_x14|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[26]\, datapath_0|register_file_0|reg_x13|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[26]\, datapath_0|register_file_0|reg_x12|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~17\, datapath_0|register_file_0|output_1_mux|Mux5~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[26]\, datapath_0|register_file_0|reg_x15|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~18\, datapath_0|register_file_0|output_1_mux|Mux5~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux5~19\, datapath_0|register_file_0|output_1_mux|Mux5~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[26]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[26]~26\, datapath_0|JTU_0|internal_mux|output_0[26]~26, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~52\, datapath_0|JTU_0|internal_adder|Add0~52, microcontroller, 1
instance = comp, \datapath_0|Add0~72\, datapath_0|Add0~72, microcontroller, 1
instance = comp, \datapath_0|Add0~74\, datapath_0|Add0~74, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[26]\, datapath_0|program_counter_0|internal_register|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[26]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[26]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[26]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[26]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|Add1~48\, datapath_0|Add1~48, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux5~1\, datapath_0|mux_0|Mux5~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[26]\, datapath_0|register_file_0|reg_x26|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~5\, datapath_0|register_file_0|output_2_mux|Mux5~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~6\, datapath_0|register_file_0|output_2_mux|Mux5~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~7\, datapath_0|register_file_0|output_2_mux|Mux5~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~8\, datapath_0|register_file_0|output_2_mux|Mux5~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~9\, datapath_0|register_file_0|output_2_mux|Mux5~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~10\, datapath_0|register_file_0|output_2_mux|Mux5~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~11\, datapath_0|register_file_0|output_2_mux|Mux5~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~12\, datapath_0|register_file_0|output_2_mux|Mux5~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~13\, datapath_0|register_file_0|output_2_mux|Mux5~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~14\, datapath_0|register_file_0|output_2_mux|Mux5~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~15\, datapath_0|register_file_0|output_2_mux|Mux5~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~16\, datapath_0|register_file_0|output_2_mux|Mux5~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~17\, datapath_0|register_file_0|output_2_mux|Mux5~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~18\, datapath_0|register_file_0|output_2_mux|Mux5~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~19\, datapath_0|register_file_0|output_2_mux|Mux5~19, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~20\, datapath_0|register_file_0|output_2_mux|Mux5~20, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~21\, datapath_0|register_file_0|output_2_mux|Mux5~21, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~22\, datapath_0|register_file_0|output_2_mux|Mux5~22, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~23\, datapath_0|register_file_0|output_2_mux|Mux5~23, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux5~24\, datapath_0|register_file_0|output_2_mux|Mux5~24, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[26]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux5~0\, datapath_0|forward_mux_1|Mux5~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux5~1\, datapath_0|forward_mux_1|Mux5~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux5~2\, datapath_0|forward_mux_1|Mux5~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[26]~26\, datapath_0|mux_1|output_0[26]~26, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~26\, datapath_0|ALU_0|ALU_output~26, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~9\, datapath_0|ALU_0|Mux72~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~10\, datapath_0|ALU_0|Mux72~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~11\, datapath_0|ALU_0|Mux72~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~12\, datapath_0|ALU_0|Mux72~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~18\, datapath_0|ALU_0|Add0~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~100\, datapath_0|ALU_0|Add0~100, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux72~13\, datapath_0|ALU_0|Mux72~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[26]\, datapath_0|ALU_0|ALU_output[26], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[26]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux5~0\, datapath_0|forward_mux_0|Mux5~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux5~1\, datapath_0|forward_mux_0|Mux5~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux5~2\, datapath_0|forward_mux_0|Mux5~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~16\, datapath_0|ALU_0|ShiftRight0~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~35\, datapath_0|ALU_0|ShiftRight1~35, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~36\, datapath_0|ALU_0|ShiftRight1~36, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~52\, datapath_0|ALU_0|ShiftRight0~52, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~37\, datapath_0|ALU_0|ShiftRight1~37, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~3\, datapath_0|ALU_0|ALU_output~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~0\, datapath_0|ALU_0|Mux95~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~1\, datapath_0|ALU_0|Mux95~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~2\, datapath_0|ALU_0|Mux95~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~3\, datapath_0|ALU_0|Mux95~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~13\, datapath_0|ALU_0|Mux96~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~4\, datapath_0|ALU_0|Mux95~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~7\, datapath_0|ALU_0|ShiftRight1~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~15\, datapath_0|ALU_0|Mux96~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~4\, datapath_0|ALU_0|ShiftRight0~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~38\, datapath_0|ALU_0|ShiftRight1~38, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~6\, datapath_0|ALU_0|ShiftRight1~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~5\, datapath_0|ALU_0|Mux95~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~39\, datapath_0|ALU_0|ShiftRight1~39, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~40\, datapath_0|ALU_0|ShiftRight1~40, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~56\, datapath_0|ALU_0|ShiftRight0~56, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~6\, datapath_0|ALU_0|Mux95~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux95~7\, datapath_0|ALU_0|Mux95~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[3]\, datapath_0|ALU_0|ALU_output[3], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[3]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a13\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a13, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a5\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~74\, datapath_0|datamem_module_0|datamem_2|RAM~74, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a29\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a21\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a21, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~75\, datapath_0|datamem_module_0|datamem_2|RAM~75, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~76\, datapath_0|datamem_module_0|datamem_2|RAM~76, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a61\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a53\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~77\, datapath_0|datamem_module_0|datamem_2|RAM~77, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a45\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a37\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~78\, datapath_0|datamem_module_0|datamem_2|RAM~78, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~79\, datapath_0|datamem_module_0|datamem_2|RAM~79, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~80\, datapath_0|datamem_module_0|datamem_2|RAM~80, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux25~0\, datapath_0|datamem_module_0|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[21]\, datapath_0|datamem_module_0|output_data[21], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[21]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~0\, datapath_0|register_file_0|output_2_mux|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~1\, datapath_0|register_file_0|output_2_mux|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~2\, datapath_0|register_file_0|output_2_mux|Mux10~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~3\, datapath_0|register_file_0|output_2_mux|Mux10~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~4\, datapath_0|register_file_0|output_2_mux|Mux10~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~5\, datapath_0|register_file_0|output_2_mux|Mux10~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~6\, datapath_0|register_file_0|output_2_mux|Mux10~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~7\, datapath_0|register_file_0|output_2_mux|Mux10~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~8\, datapath_0|register_file_0|output_2_mux|Mux10~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~9\, datapath_0|register_file_0|output_2_mux|Mux10~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~10\, datapath_0|register_file_0|output_2_mux|Mux10~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~11\, datapath_0|register_file_0|output_2_mux|Mux10~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~12\, datapath_0|register_file_0|output_2_mux|Mux10~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~13\, datapath_0|register_file_0|output_2_mux|Mux10~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~14\, datapath_0|register_file_0|output_2_mux|Mux10~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~15\, datapath_0|register_file_0|output_2_mux|Mux10~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~16\, datapath_0|register_file_0|output_2_mux|Mux10~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~17\, datapath_0|register_file_0|output_2_mux|Mux10~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~18\, datapath_0|register_file_0|output_2_mux|Mux10~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux10~19\, datapath_0|register_file_0|output_2_mux|Mux10~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[21]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[21], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux10~0\, datapath_0|forward_mux_1|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux10~1\, datapath_0|forward_mux_1|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux10~2\, datapath_0|forward_mux_1|Mux10~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[21]~21\, datapath_0|mux_1|output_0[21]~21, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~7\, datapath_0|ALU_0|ShiftLeft0~7, microcontroller, 1
instance = comp, \controller_0|Selector69~0\, controller_0|Selector69~0, microcontroller, 1
instance = comp, \controller_0|internal_immediate[27]\, controller_0|internal_immediate[27], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[27]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[27]\, datapath_0|register_file_0|reg_x9|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[27]\, datapath_0|register_file_0|reg_x8|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~0\, datapath_0|register_file_0|output_2_mux|Mux4~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[27]\, datapath_0|register_file_0|reg_x11|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~1\, datapath_0|register_file_0|output_2_mux|Mux4~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[27]\, datapath_0|register_file_0|reg_x21|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[27]\, datapath_0|register_file_0|reg_x25|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[27]\, datapath_0|register_file_0|reg_x17|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~2\, datapath_0|register_file_0|output_2_mux|Mux4~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[27]\, datapath_0|register_file_0|reg_x29|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~3\, datapath_0|register_file_0|output_2_mux|Mux4~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[27]\, datapath_0|register_file_0|reg_x26|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[27]\, datapath_0|register_file_0|reg_x22|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[27]\, datapath_0|register_file_0|reg_x18|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~4\, datapath_0|register_file_0|output_2_mux|Mux4~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[27]\, datapath_0|register_file_0|reg_x30|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~5\, datapath_0|register_file_0|output_2_mux|Mux4~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[27]\, datapath_0|register_file_0|reg_x20|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[27]\, datapath_0|register_file_0|reg_x24|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[27]\, datapath_0|register_file_0|reg_x16|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~6\, datapath_0|register_file_0|output_2_mux|Mux4~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[27]\, datapath_0|register_file_0|reg_x28|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~7\, datapath_0|register_file_0|output_2_mux|Mux4~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~8\, datapath_0|register_file_0|output_2_mux|Mux4~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[27]\, datapath_0|register_file_0|reg_x27|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[27]\, datapath_0|register_file_0|reg_x23|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[27]\, datapath_0|register_file_0|reg_x19|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~9\, datapath_0|register_file_0|output_2_mux|Mux4~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[27]\, datapath_0|register_file_0|reg_x31|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~10\, datapath_0|register_file_0|output_2_mux|Mux4~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~11\, datapath_0|register_file_0|output_2_mux|Mux4~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[27]\, datapath_0|register_file_0|reg_x2|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[27]\, datapath_0|register_file_0|reg_x3|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[27]\, datapath_0|register_file_0|reg_x1|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[27]\, datapath_0|register_file_0|reg_x5|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[27]\, datapath_0|register_file_0|reg_x6|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[27]\, datapath_0|register_file_0|reg_x4|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~12\, datapath_0|register_file_0|output_2_mux|Mux4~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[27]\, datapath_0|register_file_0|reg_x7|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~13\, datapath_0|register_file_0|output_2_mux|Mux4~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~14\, datapath_0|register_file_0|output_2_mux|Mux4~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~15\, datapath_0|register_file_0|output_2_mux|Mux4~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~16\, datapath_0|register_file_0|output_2_mux|Mux4~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[27]\, datapath_0|register_file_0|reg_x13|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[27]\, datapath_0|register_file_0|reg_x14|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[27]\, datapath_0|register_file_0|reg_x12|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~17\, datapath_0|register_file_0|output_2_mux|Mux4~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[27]\, datapath_0|register_file_0|reg_x15|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~18\, datapath_0|register_file_0|output_2_mux|Mux4~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux4~19\, datapath_0|register_file_0|output_2_mux|Mux4~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[27]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux4~0\, datapath_0|forward_mux_1|Mux4~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux4~1\, datapath_0|forward_mux_1|Mux4~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux4~2\, datapath_0|forward_mux_1|Mux4~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[27]~27\, datapath_0|mux_1|output_0[27]~27, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[28]\, datapath_0|register_file_0|reg_x22|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[28]\, datapath_0|register_file_0|reg_x18|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~0\, datapath_0|register_file_0|output_2_mux|Mux3~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[28]\, datapath_0|register_file_0|reg_x30|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~1\, datapath_0|register_file_0|output_2_mux|Mux3~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[28]\, datapath_0|register_file_0|reg_x21|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[28]\, datapath_0|register_file_0|reg_x25|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[28]\, datapath_0|register_file_0|reg_x17|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~2\, datapath_0|register_file_0|output_2_mux|Mux3~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[28]\, datapath_0|register_file_0|reg_x29|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~3\, datapath_0|register_file_0|output_2_mux|Mux3~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[28]\, datapath_0|register_file_0|reg_x20|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[28]\, datapath_0|register_file_0|reg_x24|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[28]\, datapath_0|register_file_0|reg_x16|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~4\, datapath_0|register_file_0|output_2_mux|Mux3~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[28]\, datapath_0|register_file_0|reg_x28|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~5\, datapath_0|register_file_0|output_2_mux|Mux3~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~6\, datapath_0|register_file_0|output_2_mux|Mux3~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[28]\, datapath_0|register_file_0|reg_x27|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[28]\, datapath_0|register_file_0|reg_x23|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[28]\, datapath_0|register_file_0|reg_x19|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~7\, datapath_0|register_file_0|output_2_mux|Mux3~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[28]\, datapath_0|register_file_0|reg_x31|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~8\, datapath_0|register_file_0|output_2_mux|Mux3~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~9\, datapath_0|register_file_0|output_2_mux|Mux3~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[28]\, datapath_0|register_file_0|reg_x9|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[28]\, datapath_0|register_file_0|reg_x10|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[28]\, datapath_0|register_file_0|reg_x8|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~10\, datapath_0|register_file_0|output_2_mux|Mux3~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[28]\, datapath_0|register_file_0|reg_x11|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~11\, datapath_0|register_file_0|output_2_mux|Mux3~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[28]\, datapath_0|register_file_0|reg_x2|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[28]\, datapath_0|register_file_0|reg_x3|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[28]\, datapath_0|register_file_0|reg_x1|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[28]\, datapath_0|register_file_0|reg_x6|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[28]\, datapath_0|register_file_0|reg_x5|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[28]\, datapath_0|register_file_0|reg_x4|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~12\, datapath_0|register_file_0|output_2_mux|Mux3~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[28]\, datapath_0|register_file_0|reg_x7|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~13\, datapath_0|register_file_0|output_2_mux|Mux3~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~14\, datapath_0|register_file_0|output_2_mux|Mux3~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~15\, datapath_0|register_file_0|output_2_mux|Mux3~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~16\, datapath_0|register_file_0|output_2_mux|Mux3~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[28]\, datapath_0|register_file_0|reg_x14|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[28]\, datapath_0|register_file_0|reg_x13|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[28]\, datapath_0|register_file_0|reg_x12|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~17\, datapath_0|register_file_0|output_2_mux|Mux3~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[28]\, datapath_0|register_file_0|reg_x15|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~18\, datapath_0|register_file_0|output_2_mux|Mux3~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux3~19\, datapath_0|register_file_0|output_2_mux|Mux3~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[28]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux3~0\, datapath_0|forward_mux_1|Mux3~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux3~1\, datapath_0|forward_mux_1|Mux3~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux3~2\, datapath_0|forward_mux_1|Mux3~2, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[28]~28\, datapath_0|mux_1|output_0[28]~28, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~8\, datapath_0|ALU_0|ShiftLeft0~8, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[29]~29\, datapath_0|mux_1|output_0[29]~29, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[30]~30\, datapath_0|mux_1|output_0[30]~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~9\, datapath_0|ALU_0|ShiftLeft0~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~0\, datapath_0|ALU_0|Mux96~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~18\, datapath_0|ALU_0|ShiftRight0~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~81\, datapath_0|ALU_0|ShiftRight0~81, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[16]~16\, datapath_0|mux_1|output_0[16]~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~4\, datapath_0|ALU_0|Mux82~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~16\, datapath_0|ALU_0|ALU_output~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~5\, datapath_0|ALU_0|Mux82~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[16]~13\, datapath_0|ALU_0|result_temp[16]~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~6\, datapath_0|ALU_0|Mux82~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~7\, datapath_0|ALU_0|Mux82~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~8\, datapath_0|ALU_0|Mux82~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~9\, datapath_0|ALU_0|Mux82~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~10\, datapath_0|ALU_0|Mux82~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~11\, datapath_0|ALU_0|Mux82~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~12\, datapath_0|ALU_0|Mux82~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~10\, datapath_0|ALU_0|Mux98~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~26\, datapath_0|ALU_0|ShiftRight0~26, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~13\, datapath_0|ALU_0|Mux82~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~15\, datapath_0|ALU_0|Mux82~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux82~14\, datapath_0|ALU_0|Mux82~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[16]\, datapath_0|ALU_0|ALU_output[16], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[16]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a11\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a11, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a3\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~60\, datapath_0|datamem_module_0|datamem_2|RAM~60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a27\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a19\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a19, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~61\, datapath_0|datamem_module_0|datamem_2|RAM~61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~62\, datapath_0|datamem_module_0|datamem_2|RAM~62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a59\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a51\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~63\, datapath_0|datamem_module_0|datamem_2|RAM~63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a43\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a35\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a35, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~64\, datapath_0|datamem_module_0|datamem_2|RAM~64, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~65\, datapath_0|datamem_module_0|datamem_2|RAM~65, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~66\, datapath_0|datamem_module_0|datamem_2|RAM~66, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux23~0\, datapath_0|datamem_module_0|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[19]\, datapath_0|datamem_module_0|output_data[19], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[19]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~0\, datapath_0|register_file_0|output_2_mux|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~1\, datapath_0|register_file_0|output_2_mux|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~2\, datapath_0|register_file_0|output_2_mux|Mux12~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~3\, datapath_0|register_file_0|output_2_mux|Mux12~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~4\, datapath_0|register_file_0|output_2_mux|Mux12~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~5\, datapath_0|register_file_0|output_2_mux|Mux12~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~6\, datapath_0|register_file_0|output_2_mux|Mux12~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~7\, datapath_0|register_file_0|output_2_mux|Mux12~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~8\, datapath_0|register_file_0|output_2_mux|Mux12~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~9\, datapath_0|register_file_0|output_2_mux|Mux12~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~10\, datapath_0|register_file_0|output_2_mux|Mux12~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~11\, datapath_0|register_file_0|output_2_mux|Mux12~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~12\, datapath_0|register_file_0|output_2_mux|Mux12~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~13\, datapath_0|register_file_0|output_2_mux|Mux12~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~14\, datapath_0|register_file_0|output_2_mux|Mux12~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~15\, datapath_0|register_file_0|output_2_mux|Mux12~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~16\, datapath_0|register_file_0|output_2_mux|Mux12~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~17\, datapath_0|register_file_0|output_2_mux|Mux12~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~18\, datapath_0|register_file_0|output_2_mux|Mux12~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux12~19\, datapath_0|register_file_0|output_2_mux|Mux12~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[19]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[19], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux12~0\, datapath_0|forward_mux_1|Mux12~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux12~1\, datapath_0|forward_mux_1|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux12~2\, datapath_0|forward_mux_1|Mux12~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~25\, datapath_0|ALU_0|Add0~25, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[20]~17\, datapath_0|ALU_0|result_temp[20]~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~41\, datapath_0|ALU_0|ShiftRight1~41, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~42\, datapath_0|ALU_0|ShiftRight1~42, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~83\, datapath_0|ALU_0|ShiftLeft0~83, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~51\, datapath_0|ALU_0|ShiftLeft0~51, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~105\, datapath_0|ALU_0|ShiftLeft0~105, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[20]~20\, datapath_0|mux_1|output_0[20]~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~58\, datapath_0|ALU_0|ShiftRight0~58, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~20\, datapath_0|ALU_0|ALU_output~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~0\, datapath_0|ALU_0|Mux78~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~1\, datapath_0|ALU_0|Mux78~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~2\, datapath_0|ALU_0|Mux78~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~3\, datapath_0|ALU_0|Mux78~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~4\, datapath_0|ALU_0|Mux78~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux78~5\, datapath_0|ALU_0|Mux78~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[20]\, datapath_0|ALU_0|ALU_output[20], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[20]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~0\, datapath_0|register_file_0|output_2_mux|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~1\, datapath_0|register_file_0|output_2_mux|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~2\, datapath_0|register_file_0|output_2_mux|Mux11~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~3\, datapath_0|register_file_0|output_2_mux|Mux11~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~4\, datapath_0|register_file_0|output_2_mux|Mux11~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~5\, datapath_0|register_file_0|output_2_mux|Mux11~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~6\, datapath_0|register_file_0|output_2_mux|Mux11~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~7\, datapath_0|register_file_0|output_2_mux|Mux11~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~8\, datapath_0|register_file_0|output_2_mux|Mux11~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~9\, datapath_0|register_file_0|output_2_mux|Mux11~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~10\, datapath_0|register_file_0|output_2_mux|Mux11~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~11\, datapath_0|register_file_0|output_2_mux|Mux11~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~12\, datapath_0|register_file_0|output_2_mux|Mux11~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~13\, datapath_0|register_file_0|output_2_mux|Mux11~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~14\, datapath_0|register_file_0|output_2_mux|Mux11~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~15\, datapath_0|register_file_0|output_2_mux|Mux11~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~16\, datapath_0|register_file_0|output_2_mux|Mux11~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~17\, datapath_0|register_file_0|output_2_mux|Mux11~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~18\, datapath_0|register_file_0|output_2_mux|Mux11~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux11~19\, datapath_0|register_file_0|output_2_mux|Mux11~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[20]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux11~0\, datapath_0|forward_mux_1|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux11~1\, datapath_0|forward_mux_1|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux11~2\, datapath_0|forward_mux_1|Mux11~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[20]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux58~3\, datapath_0|datamem_module_0|Mux58~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux58~2\, datapath_0|datamem_module_0|Mux58~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[4]\, datapath_0|datamem_module_0|memory_input_2[4], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~31\, datapath_0|datamem_module_0|datamem_2|RAM~31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a12\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a12, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a4\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~67\, datapath_0|datamem_module_0|datamem_2|RAM~67, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a28\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a20\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a20, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~68\, datapath_0|datamem_module_0|datamem_2|RAM~68, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~69\, datapath_0|datamem_module_0|datamem_2|RAM~69, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a60\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a52\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~70\, datapath_0|datamem_module_0|datamem_2|RAM~70, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a44\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a36\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a36, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~71\, datapath_0|datamem_module_0|datamem_2|RAM~71, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~72\, datapath_0|datamem_module_0|datamem_2|RAM~72, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~73\, datapath_0|datamem_module_0|datamem_2|RAM~73, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux24~0\, datapath_0|datamem_module_0|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[20]\, datapath_0|datamem_module_0|output_data[20], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[20]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[20], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux11~0\, datapath_0|forward_mux_0|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux11~1\, datapath_0|forward_mux_0|Mux11~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux11~2\, datapath_0|forward_mux_0|Mux11~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~87\, datapath_0|ALU_0|ShiftLeft0~87, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~91\, datapath_0|ALU_0|ShiftLeft0~91, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~100\, datapath_0|ALU_0|ShiftLeft0~100, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~101\, datapath_0|ALU_0|ShiftLeft0~101, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~102\, datapath_0|ALU_0|ShiftLeft0~102, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~0\, datapath_0|ALU_0|Mux71~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~48\, datapath_0|ALU_0|ShiftLeft0~48, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~1\, datapath_0|ALU_0|Mux71~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~74\, datapath_0|ALU_0|ShiftRight0~74, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~27\, datapath_0|ALU_0|ALU_output~27, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~2\, datapath_0|ALU_0|Mux71~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~3\, datapath_0|ALU_0|Mux71~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~4\, datapath_0|ALU_0|Mux71~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~5\, datapath_0|ALU_0|Mux71~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~17\, datapath_0|ALU_0|Add0~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~102\, datapath_0|ALU_0|Add0~102, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux71~6\, datapath_0|ALU_0|Mux71~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[27]\, datapath_0|ALU_0|ALU_output[27], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[27]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[27]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux4~0\, datapath_0|mux_0|Mux4~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~54\, datapath_0|JTU_0|internal_adder|Add0~54, microcontroller, 1
instance = comp, \datapath_0|Add0~75\, datapath_0|Add0~75, microcontroller, 1
instance = comp, \datapath_0|Add0~77\, datapath_0|Add0~77, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[27]\, datapath_0|program_counter_0|internal_register|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[27]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[27]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[27]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[27]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|Add1~50\, datapath_0|Add1~50, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux4~1\, datapath_0|mux_0|Mux4~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[27]\, datapath_0|register_file_0|reg_x10|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~0\, datapath_0|register_file_0|output_1_mux|Mux4~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~1\, datapath_0|register_file_0|output_1_mux|Mux4~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~2\, datapath_0|register_file_0|output_1_mux|Mux4~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~3\, datapath_0|register_file_0|output_1_mux|Mux4~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~4\, datapath_0|register_file_0|output_1_mux|Mux4~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~5\, datapath_0|register_file_0|output_1_mux|Mux4~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~6\, datapath_0|register_file_0|output_1_mux|Mux4~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~7\, datapath_0|register_file_0|output_1_mux|Mux4~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~8\, datapath_0|register_file_0|output_1_mux|Mux4~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~9\, datapath_0|register_file_0|output_1_mux|Mux4~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~10\, datapath_0|register_file_0|output_1_mux|Mux4~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~11\, datapath_0|register_file_0|output_1_mux|Mux4~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~12\, datapath_0|register_file_0|output_1_mux|Mux4~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~13\, datapath_0|register_file_0|output_1_mux|Mux4~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~14\, datapath_0|register_file_0|output_1_mux|Mux4~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~15\, datapath_0|register_file_0|output_1_mux|Mux4~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~16\, datapath_0|register_file_0|output_1_mux|Mux4~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~17\, datapath_0|register_file_0|output_1_mux|Mux4~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~18\, datapath_0|register_file_0|output_1_mux|Mux4~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux4~19\, datapath_0|register_file_0|output_1_mux|Mux4~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[27]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[27]~27\, datapath_0|JTU_0|internal_mux|output_0[27]~27, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~56\, datapath_0|JTU_0|internal_adder|Add0~56, microcontroller, 1
instance = comp, \datapath_0|Add0~78\, datapath_0|Add0~78, microcontroller, 1
instance = comp, \datapath_0|Add0~80\, datapath_0|Add0~80, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[28]\, datapath_0|program_counter_0|internal_register|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[28]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[28]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[28]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[28]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|Add1~52\, datapath_0|Add1~52, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux3~1\, datapath_0|mux_0|Mux3~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[28]\, datapath_0|register_file_0|reg_x26|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~0\, datapath_0|register_file_0|output_1_mux|Mux3~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~1\, datapath_0|register_file_0|output_1_mux|Mux3~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~2\, datapath_0|register_file_0|output_1_mux|Mux3~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~3\, datapath_0|register_file_0|output_1_mux|Mux3~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~4\, datapath_0|register_file_0|output_1_mux|Mux3~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~5\, datapath_0|register_file_0|output_1_mux|Mux3~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~6\, datapath_0|register_file_0|output_1_mux|Mux3~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~7\, datapath_0|register_file_0|output_1_mux|Mux3~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~8\, datapath_0|register_file_0|output_1_mux|Mux3~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~9\, datapath_0|register_file_0|output_1_mux|Mux3~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~10\, datapath_0|register_file_0|output_1_mux|Mux3~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~11\, datapath_0|register_file_0|output_1_mux|Mux3~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~12\, datapath_0|register_file_0|output_1_mux|Mux3~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~13\, datapath_0|register_file_0|output_1_mux|Mux3~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~14\, datapath_0|register_file_0|output_1_mux|Mux3~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~15\, datapath_0|register_file_0|output_1_mux|Mux3~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~16\, datapath_0|register_file_0|output_1_mux|Mux3~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~17\, datapath_0|register_file_0|output_1_mux|Mux3~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~18\, datapath_0|register_file_0|output_1_mux|Mux3~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux3~19\, datapath_0|register_file_0|output_1_mux|Mux3~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[28]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[28]~28\, datapath_0|JTU_0|internal_mux|output_0[28]~28, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~58\, datapath_0|JTU_0|internal_adder|Add0~58, microcontroller, 1
instance = comp, \datapath_0|Add0~81\, datapath_0|Add0~81, microcontroller, 1
instance = comp, \datapath_0|Add0~83\, datapath_0|Add0~83, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[29]\, datapath_0|program_counter_0|internal_register|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[29]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[29]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[29]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[29]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|Add1~54\, datapath_0|Add1~54, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux2~1\, datapath_0|mux_0|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[29]\, datapath_0|register_file_0|reg_x10|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[29]\, datapath_0|register_file_0|reg_x9|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[29]\, datapath_0|register_file_0|reg_x8|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~0\, datapath_0|register_file_0|output_1_mux|Mux2~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[29]\, datapath_0|register_file_0|reg_x11|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~1\, datapath_0|register_file_0|output_1_mux|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[29]\, datapath_0|register_file_0|reg_x21|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[29]\, datapath_0|register_file_0|reg_x25|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[29]\, datapath_0|register_file_0|reg_x17|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~2\, datapath_0|register_file_0|output_1_mux|Mux2~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[29]\, datapath_0|register_file_0|reg_x29|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~3\, datapath_0|register_file_0|output_1_mux|Mux2~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[29]\, datapath_0|register_file_0|reg_x26|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[29]\, datapath_0|register_file_0|reg_x22|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[29]\, datapath_0|register_file_0|reg_x18|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~4\, datapath_0|register_file_0|output_1_mux|Mux2~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[29]\, datapath_0|register_file_0|reg_x30|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~5\, datapath_0|register_file_0|output_1_mux|Mux2~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[29]\, datapath_0|register_file_0|reg_x20|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[29]\, datapath_0|register_file_0|reg_x24|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[29]\, datapath_0|register_file_0|reg_x16|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~6\, datapath_0|register_file_0|output_1_mux|Mux2~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[29]\, datapath_0|register_file_0|reg_x28|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~7\, datapath_0|register_file_0|output_1_mux|Mux2~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~8\, datapath_0|register_file_0|output_1_mux|Mux2~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[29]\, datapath_0|register_file_0|reg_x27|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[29]\, datapath_0|register_file_0|reg_x23|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[29]\, datapath_0|register_file_0|reg_x19|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~9\, datapath_0|register_file_0|output_1_mux|Mux2~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[29]\, datapath_0|register_file_0|reg_x31|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~10\, datapath_0|register_file_0|output_1_mux|Mux2~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~11\, datapath_0|register_file_0|output_1_mux|Mux2~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[29]\, datapath_0|register_file_0|reg_x2|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[29]\, datapath_0|register_file_0|reg_x3|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[29]\, datapath_0|register_file_0|reg_x1|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[29]\, datapath_0|register_file_0|reg_x5|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[29]\, datapath_0|register_file_0|reg_x6|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[29]\, datapath_0|register_file_0|reg_x4|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~12\, datapath_0|register_file_0|output_1_mux|Mux2~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[29]\, datapath_0|register_file_0|reg_x7|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~13\, datapath_0|register_file_0|output_1_mux|Mux2~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~14\, datapath_0|register_file_0|output_1_mux|Mux2~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~15\, datapath_0|register_file_0|output_1_mux|Mux2~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~16\, datapath_0|register_file_0|output_1_mux|Mux2~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[29]\, datapath_0|register_file_0|reg_x13|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[29]\, datapath_0|register_file_0|reg_x14|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[29]\, datapath_0|register_file_0|reg_x12|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~17\, datapath_0|register_file_0|output_1_mux|Mux2~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[29]\, datapath_0|register_file_0|reg_x15|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~18\, datapath_0|register_file_0|output_1_mux|Mux2~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux2~19\, datapath_0|register_file_0|output_1_mux|Mux2~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[29]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux2~0\, datapath_0|forward_mux_0|Mux2~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux2~1\, datapath_0|forward_mux_0|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux2~2\, datapath_0|forward_mux_0|Mux2~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~16\, datapath_0|ALU_0|Add0~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~104\, datapath_0|ALU_0|Add0~104, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~106\, datapath_0|ALU_0|Add0~106, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~108\, datapath_0|ALU_0|Add0~108, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~110\, datapath_0|ALU_0|Add0~110, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~0\, datapath_0|ALU_0|Mux67~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~115\, datapath_0|ALU_0|Add0~115, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~104\, datapath_0|ALU_0|ShiftLeft0~104, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~116\, datapath_0|ALU_0|Add0~116, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~117\, datapath_0|ALU_0|Add0~117, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~118\, datapath_0|ALU_0|Add0~118, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~63\, datapath_0|ALU_0|ShiftLeft0~63, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~67\, datapath_0|ALU_0|ShiftLeft0~67, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~3\, datapath_0|ALU_0|Mux67~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~4\, datapath_0|ALU_0|Mux67~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~6\, datapath_0|ALU_0|Mux67~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~114\, datapath_0|ALU_0|Add0~114, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~28\, datapath_0|ALU_0|ShiftRight0~28, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~1\, datapath_0|ALU_0|Mux67~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~2\, datapath_0|ALU_0|Mux67~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~7\, datapath_0|ALU_0|Mux67~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux67~5\, datapath_0|ALU_0|Mux67~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[31]\, datapath_0|ALU_0|ALU_output[31], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[31]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[31]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux0~0\, datapath_0|mux_0|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[31]\, datapath_0|register_file_0|reg_x9|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[31]\, datapath_0|register_file_0|reg_x8|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~0\, datapath_0|register_file_0|output_1_mux|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[31]\, datapath_0|register_file_0|reg_x11|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~1\, datapath_0|register_file_0|output_1_mux|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[31]\, datapath_0|register_file_0|reg_x21|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[31]\, datapath_0|register_file_0|reg_x25|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[31]\, datapath_0|register_file_0|reg_x17|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~2\, datapath_0|register_file_0|output_1_mux|Mux0~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[31]\, datapath_0|register_file_0|reg_x29|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~3\, datapath_0|register_file_0|output_1_mux|Mux0~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[31]\, datapath_0|register_file_0|reg_x26|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[31]\, datapath_0|register_file_0|reg_x22|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[31]\, datapath_0|register_file_0|reg_x18|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~4\, datapath_0|register_file_0|output_1_mux|Mux0~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[31]\, datapath_0|register_file_0|reg_x30|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~5\, datapath_0|register_file_0|output_1_mux|Mux0~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[31]\, datapath_0|register_file_0|reg_x20|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[31]\, datapath_0|register_file_0|reg_x24|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[31]\, datapath_0|register_file_0|reg_x16|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~6\, datapath_0|register_file_0|output_1_mux|Mux0~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[31]\, datapath_0|register_file_0|reg_x28|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~7\, datapath_0|register_file_0|output_1_mux|Mux0~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~8\, datapath_0|register_file_0|output_1_mux|Mux0~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[31]\, datapath_0|register_file_0|reg_x27|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[31]\, datapath_0|register_file_0|reg_x23|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[31]\, datapath_0|register_file_0|reg_x19|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~9\, datapath_0|register_file_0|output_1_mux|Mux0~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[31]\, datapath_0|register_file_0|reg_x31|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~10\, datapath_0|register_file_0|output_1_mux|Mux0~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~11\, datapath_0|register_file_0|output_1_mux|Mux0~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[31]\, datapath_0|register_file_0|reg_x2|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[31]\, datapath_0|register_file_0|reg_x3|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[31]\, datapath_0|register_file_0|reg_x1|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[31]\, datapath_0|register_file_0|reg_x5|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[31]\, datapath_0|register_file_0|reg_x6|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[31]\, datapath_0|register_file_0|reg_x4|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~12\, datapath_0|register_file_0|output_1_mux|Mux0~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[31]\, datapath_0|register_file_0|reg_x7|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~13\, datapath_0|register_file_0|output_1_mux|Mux0~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~14\, datapath_0|register_file_0|output_1_mux|Mux0~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~15\, datapath_0|register_file_0|output_1_mux|Mux0~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~16\, datapath_0|register_file_0|output_1_mux|Mux0~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[31]\, datapath_0|register_file_0|reg_x13|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[31]\, datapath_0|register_file_0|reg_x14|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[31]\, datapath_0|register_file_0|reg_x12|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~17\, datapath_0|register_file_0|output_1_mux|Mux0~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[31]\, datapath_0|register_file_0|reg_x15|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~18\, datapath_0|register_file_0|output_1_mux|Mux0~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux0~19\, datapath_0|register_file_0|output_1_mux|Mux0~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[31]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[31]~31\, datapath_0|JTU_0|internal_mux|output_0[31]~31, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[30]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux1~0\, datapath_0|mux_0|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~60\, datapath_0|JTU_0|internal_adder|Add0~60, microcontroller, 1
instance = comp, \datapath_0|Add0~84\, datapath_0|Add0~84, microcontroller, 1
instance = comp, \datapath_0|Add0~86\, datapath_0|Add0~86, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[30]\, datapath_0|program_counter_0|internal_register|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[30]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[30]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[30]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[30]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|Add1~56\, datapath_0|Add1~56, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux1~1\, datapath_0|mux_0|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[30]\, datapath_0|register_file_0|reg_x26|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[30]\, datapath_0|register_file_0|reg_x22|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[30]\, datapath_0|register_file_0|reg_x18|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~0\, datapath_0|register_file_0|output_1_mux|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[30]\, datapath_0|register_file_0|reg_x30|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~1\, datapath_0|register_file_0|output_1_mux|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[30]\, datapath_0|register_file_0|reg_x21|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[30]\, datapath_0|register_file_0|reg_x25|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[30]\, datapath_0|register_file_0|reg_x17|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~2\, datapath_0|register_file_0|output_1_mux|Mux1~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[30]\, datapath_0|register_file_0|reg_x29|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~3\, datapath_0|register_file_0|output_1_mux|Mux1~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[30]\, datapath_0|register_file_0|reg_x20|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[30]\, datapath_0|register_file_0|reg_x24|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[30]\, datapath_0|register_file_0|reg_x16|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~4\, datapath_0|register_file_0|output_1_mux|Mux1~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[30]\, datapath_0|register_file_0|reg_x28|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~5\, datapath_0|register_file_0|output_1_mux|Mux1~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~6\, datapath_0|register_file_0|output_1_mux|Mux1~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[30]\, datapath_0|register_file_0|reg_x27|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[30]\, datapath_0|register_file_0|reg_x23|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[30]\, datapath_0|register_file_0|reg_x19|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~7\, datapath_0|register_file_0|output_1_mux|Mux1~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[30]\, datapath_0|register_file_0|reg_x31|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~8\, datapath_0|register_file_0|output_1_mux|Mux1~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~9\, datapath_0|register_file_0|output_1_mux|Mux1~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[30]\, datapath_0|register_file_0|reg_x9|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[30]\, datapath_0|register_file_0|reg_x10|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[30]\, datapath_0|register_file_0|reg_x8|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~10\, datapath_0|register_file_0|output_1_mux|Mux1~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[30]\, datapath_0|register_file_0|reg_x11|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~11\, datapath_0|register_file_0|output_1_mux|Mux1~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[30]\, datapath_0|register_file_0|reg_x2|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[30]\, datapath_0|register_file_0|reg_x3|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[30]\, datapath_0|register_file_0|reg_x1|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[30]\, datapath_0|register_file_0|reg_x6|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[30]\, datapath_0|register_file_0|reg_x5|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[30]\, datapath_0|register_file_0|reg_x4|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~12\, datapath_0|register_file_0|output_1_mux|Mux1~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[30]\, datapath_0|register_file_0|reg_x7|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~13\, datapath_0|register_file_0|output_1_mux|Mux1~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~14\, datapath_0|register_file_0|output_1_mux|Mux1~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~15\, datapath_0|register_file_0|output_1_mux|Mux1~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~16\, datapath_0|register_file_0|output_1_mux|Mux1~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[30]\, datapath_0|register_file_0|reg_x14|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[30]\, datapath_0|register_file_0|reg_x13|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[30]\, datapath_0|register_file_0|reg_x12|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~17\, datapath_0|register_file_0|output_1_mux|Mux1~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[30]\, datapath_0|register_file_0|reg_x15|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~18\, datapath_0|register_file_0|output_1_mux|Mux1~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux1~19\, datapath_0|register_file_0|output_1_mux|Mux1~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[30]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[30]~30\, datapath_0|JTU_0|internal_mux|output_0[30]~30, microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_adder|Add0~62\, datapath_0|JTU_0|internal_adder|Add0~62, microcontroller, 1
instance = comp, \datapath_0|Add0~87\, datapath_0|Add0~87, microcontroller, 1
instance = comp, \datapath_0|Add0~89\, datapath_0|Add0~89, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[31]\, datapath_0|program_counter_0|internal_register|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[31]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[31]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[31]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[31]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|Add1~58\, datapath_0|Add1~58, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux0~1\, datapath_0|mux_0|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[31]\, datapath_0|register_file_0|reg_x10|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~0\, datapath_0|register_file_0|output_2_mux|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~1\, datapath_0|register_file_0|output_2_mux|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~2\, datapath_0|register_file_0|output_2_mux|Mux0~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~3\, datapath_0|register_file_0|output_2_mux|Mux0~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~4\, datapath_0|register_file_0|output_2_mux|Mux0~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~5\, datapath_0|register_file_0|output_2_mux|Mux0~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~6\, datapath_0|register_file_0|output_2_mux|Mux0~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~7\, datapath_0|register_file_0|output_2_mux|Mux0~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~8\, datapath_0|register_file_0|output_2_mux|Mux0~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~9\, datapath_0|register_file_0|output_2_mux|Mux0~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~10\, datapath_0|register_file_0|output_2_mux|Mux0~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~11\, datapath_0|register_file_0|output_2_mux|Mux0~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~12\, datapath_0|register_file_0|output_2_mux|Mux0~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~13\, datapath_0|register_file_0|output_2_mux|Mux0~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~14\, datapath_0|register_file_0|output_2_mux|Mux0~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~15\, datapath_0|register_file_0|output_2_mux|Mux0~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~16\, datapath_0|register_file_0|output_2_mux|Mux0~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~17\, datapath_0|register_file_0|output_2_mux|Mux0~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~18\, datapath_0|register_file_0|output_2_mux|Mux0~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux0~19\, datapath_0|register_file_0|output_2_mux|Mux0~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[31]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux0~1\, datapath_0|forward_mux_1|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux0~2\, datapath_0|forward_mux_1|Mux0~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux0~3\, datapath_0|forward_mux_1|Mux0~3, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[31]~31\, datapath_0|mux_1|output_0[31]~31, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~2\, datapath_0|ALU_0|Add0~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~3\, datapath_0|ALU_0|Add0~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~119\, datapath_0|ALU_0|Add0~119, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~5\, datapath_0|ALU_0|Add0~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~6\, datapath_0|ALU_0|Add0~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~112\, datapath_0|ALU_0|Add0~112, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_branch_response~5\, datapath_0|ALU_0|ALU_branch_response~5, microcontroller, 1
instance = comp, \controller_0|Selector14~0\, controller_0|Selector14~0, microcontroller, 1
instance = comp, \controller_0|internal_ALU_branch_control[0]\, controller_0|internal_ALU_branch_control[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[0]\, datapath_0|ID_EX_PLR|ALU_branch_control_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~0\, datapath_0|ALU_0|Equal0~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~1\, datapath_0|ALU_0|Equal0~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~2\, datapath_0|ALU_0|Equal0~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~3\, datapath_0|ALU_0|Equal0~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~4\, datapath_0|ALU_0|Equal0~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~5\, datapath_0|ALU_0|Equal0~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~6\, datapath_0|ALU_0|Equal0~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~7\, datapath_0|ALU_0|Equal0~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~8\, datapath_0|ALU_0|Equal0~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~9\, datapath_0|ALU_0|Equal0~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Equal0~10\, datapath_0|ALU_0|Equal0~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_branch_response~2\, datapath_0|ALU_0|ALU_branch_response~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_branch_response~3\, datapath_0|ALU_0|ALU_branch_response~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_branch_response~4\, datapath_0|ALU_0|ALU_branch_response~4, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_branch_respose_reg|reg_out\, datapath_0|EX_MEM_PLR|ALU_branch_respose_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|comb~1\, datapath_0|comb~1, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[20]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[20], microcontroller, 1
instance = comp, \controller_0|Selector27~0\, controller_0|Selector27~0, microcontroller, 1
instance = comp, \controller_0|Selector27~1\, controller_0|Selector27~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[0]\, controller_0|internal_immediate[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[0]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[0]~0\, datapath_0|mux_1|output_0[0]~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~18\, datapath_0|ALU_0|ShiftLeft0~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~20\, datapath_0|ALU_0|ShiftLeft0~20, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~21\, datapath_0|ALU_0|ShiftLeft0~21, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~52\, datapath_0|ALU_0|ShiftLeft0~52, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~2\, datapath_0|ALU_0|Mux69~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~28\, datapath_0|ALU_0|ALU_output~28, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~0\, datapath_0|ALU_0|Mux70~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~1\, datapath_0|ALU_0|Mux70~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux79~4\, datapath_0|ALU_0|Mux79~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~103\, datapath_0|ALU_0|ShiftLeft0~103, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~2\, datapath_0|ALU_0|Mux70~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~3\, datapath_0|ALU_0|Mux70~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~4\, datapath_0|ALU_0|Mux70~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~5\, datapath_0|ALU_0|Mux70~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~3\, datapath_0|ALU_0|Mux69~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~6\, datapath_0|ALU_0|Mux70~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux70~7\, datapath_0|ALU_0|Mux70~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[28]\, datapath_0|ALU_0|ALU_output[28], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[28]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux3~0\, datapath_0|forward_mux_0|Mux3~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux3~1\, datapath_0|forward_mux_0|Mux3~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux3~2\, datapath_0|forward_mux_0|Mux3~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~10\, datapath_0|ALU_0|ShiftRight1~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~40\, datapath_0|ALU_0|ShiftRight0~40, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~14\, datapath_0|ALU_0|ShiftRight1~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~15\, datapath_0|ALU_0|ShiftRight1~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[17]~14\, datapath_0|ALU_0|result_temp[17]~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~74\, datapath_0|ALU_0|ShiftLeft0~74, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[17]~17\, datapath_0|mux_1|output_0[17]~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~41\, datapath_0|ALU_0|ShiftRight0~41, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~45\, datapath_0|ALU_0|ShiftRight0~45, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~17\, datapath_0|ALU_0|ALU_output~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~0\, datapath_0|ALU_0|Mux81~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~1\, datapath_0|ALU_0|Mux81~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~2\, datapath_0|ALU_0|Mux81~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~3\, datapath_0|ALU_0|Mux81~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~4\, datapath_0|ALU_0|Mux81~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux81~5\, datapath_0|ALU_0|Mux81~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[17]\, datapath_0|ALU_0|ALU_output[17], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[17]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[17]\, datapath_0|register_file_0|reg_x9|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[17]\, datapath_0|register_file_0|reg_x8|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~0\, datapath_0|register_file_0|output_2_mux|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[17]\, datapath_0|register_file_0|reg_x11|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~1\, datapath_0|register_file_0|output_2_mux|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[17]\, datapath_0|register_file_0|reg_x21|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[17]\, datapath_0|register_file_0|reg_x25|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[17]\, datapath_0|register_file_0|reg_x17|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~2\, datapath_0|register_file_0|output_2_mux|Mux14~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[17]\, datapath_0|register_file_0|reg_x29|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~3\, datapath_0|register_file_0|output_2_mux|Mux14~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[17]\, datapath_0|register_file_0|reg_x26|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[17]\, datapath_0|register_file_0|reg_x22|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[17]\, datapath_0|register_file_0|reg_x18|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~4\, datapath_0|register_file_0|output_2_mux|Mux14~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[17]\, datapath_0|register_file_0|reg_x30|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~5\, datapath_0|register_file_0|output_2_mux|Mux14~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[17]\, datapath_0|register_file_0|reg_x20|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[17]\, datapath_0|register_file_0|reg_x24|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[17]\, datapath_0|register_file_0|reg_x16|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~6\, datapath_0|register_file_0|output_2_mux|Mux14~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[17]\, datapath_0|register_file_0|reg_x28|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~7\, datapath_0|register_file_0|output_2_mux|Mux14~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~8\, datapath_0|register_file_0|output_2_mux|Mux14~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[17]\, datapath_0|register_file_0|reg_x27|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[17]\, datapath_0|register_file_0|reg_x23|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[17]\, datapath_0|register_file_0|reg_x19|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~9\, datapath_0|register_file_0|output_2_mux|Mux14~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[17]\, datapath_0|register_file_0|reg_x31|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~10\, datapath_0|register_file_0|output_2_mux|Mux14~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~11\, datapath_0|register_file_0|output_2_mux|Mux14~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[17]\, datapath_0|register_file_0|reg_x2|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[17]\, datapath_0|register_file_0|reg_x3|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[17]\, datapath_0|register_file_0|reg_x1|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[17]\, datapath_0|register_file_0|reg_x5|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[17]\, datapath_0|register_file_0|reg_x6|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[17]\, datapath_0|register_file_0|reg_x4|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~12\, datapath_0|register_file_0|output_2_mux|Mux14~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[17]\, datapath_0|register_file_0|reg_x7|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~13\, datapath_0|register_file_0|output_2_mux|Mux14~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~14\, datapath_0|register_file_0|output_2_mux|Mux14~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~15\, datapath_0|register_file_0|output_2_mux|Mux14~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~16\, datapath_0|register_file_0|output_2_mux|Mux14~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[17]\, datapath_0|register_file_0|reg_x13|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[17]\, datapath_0|register_file_0|reg_x14|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[17]\, datapath_0|register_file_0|reg_x12|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~17\, datapath_0|register_file_0|output_2_mux|Mux14~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[17]\, datapath_0|register_file_0|reg_x15|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~18\, datapath_0|register_file_0|output_2_mux|Mux14~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux14~19\, datapath_0|register_file_0|output_2_mux|Mux14~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[17]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux14~0\, datapath_0|forward_mux_1|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux14~1\, datapath_0|forward_mux_1|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux14~2\, datapath_0|forward_mux_1|Mux14~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[17]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux55~4\, datapath_0|datamem_module_0|Mux55~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux55~3\, datapath_0|datamem_module_0|Mux55~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[1]\, datapath_0|datamem_module_0|memory_input_2[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~28\, datapath_0|datamem_module_0|datamem_2|RAM~28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a9\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a1\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~46\, datapath_0|datamem_module_0|datamem_2|RAM~46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a25\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a25, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a17\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a17, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~47\, datapath_0|datamem_module_0|datamem_2|RAM~47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~48\, datapath_0|datamem_module_0|datamem_2|RAM~48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a41\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a33\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~49\, datapath_0|datamem_module_0|datamem_2|RAM~49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a57\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a49\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~50\, datapath_0|datamem_module_0|datamem_2|RAM~50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~51\, datapath_0|datamem_module_0|datamem_2|RAM~51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~52\, datapath_0|datamem_module_0|datamem_2|RAM~52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux21~0\, datapath_0|datamem_module_0|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[17]\, datapath_0|datamem_module_0|output_data[17], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[17]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux14~0\, datapath_0|mux_0|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux14~1\, datapath_0|mux_0|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[17]\, datapath_0|register_file_0|reg_x10|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~0\, datapath_0|register_file_0|output_1_mux|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~1\, datapath_0|register_file_0|output_1_mux|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~2\, datapath_0|register_file_0|output_1_mux|Mux14~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~3\, datapath_0|register_file_0|output_1_mux|Mux14~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~4\, datapath_0|register_file_0|output_1_mux|Mux14~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~5\, datapath_0|register_file_0|output_1_mux|Mux14~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~6\, datapath_0|register_file_0|output_1_mux|Mux14~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~7\, datapath_0|register_file_0|output_1_mux|Mux14~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~8\, datapath_0|register_file_0|output_1_mux|Mux14~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~9\, datapath_0|register_file_0|output_1_mux|Mux14~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~10\, datapath_0|register_file_0|output_1_mux|Mux14~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~11\, datapath_0|register_file_0|output_1_mux|Mux14~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~12\, datapath_0|register_file_0|output_1_mux|Mux14~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~13\, datapath_0|register_file_0|output_1_mux|Mux14~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~14\, datapath_0|register_file_0|output_1_mux|Mux14~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~15\, datapath_0|register_file_0|output_1_mux|Mux14~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~16\, datapath_0|register_file_0|output_1_mux|Mux14~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~17\, datapath_0|register_file_0|output_1_mux|Mux14~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~18\, datapath_0|register_file_0|output_1_mux|Mux14~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux14~19\, datapath_0|register_file_0|output_1_mux|Mux14~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[17]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[17], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[17]~17\, datapath_0|JTU_0|internal_mux|output_0[17]~17, microcontroller, 1
instance = comp, \datapath_0|Add0~47\, datapath_0|Add0~47, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1097w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1097w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a129\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a129, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~5\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~5, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a225\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a225, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~6\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~6, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a33\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a33, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a65\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a65, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a1\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a1, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~7\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~7, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a97\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a97, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~8\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~8, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~9\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~9, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[1]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a192\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a192, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a160\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a160, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a128\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a128, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a224\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a224, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~1\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~1, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a32\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a32, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a64\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a64, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~2\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~2, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a96\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a96, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~3\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~3, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~4\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~4, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[0]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[0], microcontroller, 1
instance = comp, \controller_0|Equal0~0\, controller_0|Equal0~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.BRANCH_1900\, controller_0|decoded_cluster.BRANCH_1900, microcontroller, 1
instance = comp, \controller_0|Selector32~0\, controller_0|Selector32~0, microcontroller, 1
instance = comp, \controller_0|Selector32~1\, controller_0|Selector32~1, microcontroller, 1
instance = comp, \controller_0|internal_immediate[4]\, controller_0|internal_immediate[4], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[4]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[4]~4\, datapath_0|mux_1|output_0[4]~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~78\, datapath_0|ALU_0|ShiftRight0~78, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~66\, datapath_0|ALU_0|ShiftRight0~66, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~70\, datapath_0|ALU_0|ShiftRight0~70, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~79\, datapath_0|ALU_0|ShiftRight0~79, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~80\, datapath_0|ALU_0|ShiftRight0~80, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[15]~15\, datapath_0|mux_1|output_0[15]~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~0\, datapath_0|ALU_0|Mux83~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~15\, datapath_0|ALU_0|ALU_output~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~1\, datapath_0|ALU_0|Mux83~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[15]~12\, datapath_0|ALU_0|result_temp[15]~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~2\, datapath_0|ALU_0|Mux83~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~3\, datapath_0|ALU_0|Mux83~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~4\, datapath_0|ALU_0|Mux83~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~5\, datapath_0|ALU_0|Mux83~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~6\, datapath_0|ALU_0|Mux83~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux83~7\, datapath_0|ALU_0|Mux83~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[15]\, datapath_0|ALU_0|ALU_output[15], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[15]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[15]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux16~0\, datapath_0|mux_0|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux16~1\, datapath_0|mux_0|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[15]\, datapath_0|register_file_0|reg_x10|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[15]\, datapath_0|register_file_0|reg_x9|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[15]\, datapath_0|register_file_0|reg_x8|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~0\, datapath_0|register_file_0|output_1_mux|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[15]\, datapath_0|register_file_0|reg_x11|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~1\, datapath_0|register_file_0|output_1_mux|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[15]\, datapath_0|register_file_0|reg_x21|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[15]\, datapath_0|register_file_0|reg_x25|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[15]\, datapath_0|register_file_0|reg_x17|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~2\, datapath_0|register_file_0|output_1_mux|Mux16~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[15]\, datapath_0|register_file_0|reg_x29|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~3\, datapath_0|register_file_0|output_1_mux|Mux16~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[15]\, datapath_0|register_file_0|reg_x26|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[15]\, datapath_0|register_file_0|reg_x22|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[15]\, datapath_0|register_file_0|reg_x18|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~4\, datapath_0|register_file_0|output_1_mux|Mux16~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[15]\, datapath_0|register_file_0|reg_x30|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~5\, datapath_0|register_file_0|output_1_mux|Mux16~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[15]\, datapath_0|register_file_0|reg_x20|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[15]\, datapath_0|register_file_0|reg_x24|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[15]\, datapath_0|register_file_0|reg_x16|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~6\, datapath_0|register_file_0|output_1_mux|Mux16~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[15]\, datapath_0|register_file_0|reg_x28|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~7\, datapath_0|register_file_0|output_1_mux|Mux16~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~8\, datapath_0|register_file_0|output_1_mux|Mux16~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[15]\, datapath_0|register_file_0|reg_x27|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[15]\, datapath_0|register_file_0|reg_x23|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[15]\, datapath_0|register_file_0|reg_x19|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~9\, datapath_0|register_file_0|output_1_mux|Mux16~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[15]\, datapath_0|register_file_0|reg_x31|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~10\, datapath_0|register_file_0|output_1_mux|Mux16~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~11\, datapath_0|register_file_0|output_1_mux|Mux16~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[15]\, datapath_0|register_file_0|reg_x2|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[15]\, datapath_0|register_file_0|reg_x3|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[15]\, datapath_0|register_file_0|reg_x1|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[15]\, datapath_0|register_file_0|reg_x5|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[15]\, datapath_0|register_file_0|reg_x6|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[15]\, datapath_0|register_file_0|reg_x4|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~12\, datapath_0|register_file_0|output_1_mux|Mux16~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[15]\, datapath_0|register_file_0|reg_x7|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~13\, datapath_0|register_file_0|output_1_mux|Mux16~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~14\, datapath_0|register_file_0|output_1_mux|Mux16~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~15\, datapath_0|register_file_0|output_1_mux|Mux16~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~16\, datapath_0|register_file_0|output_1_mux|Mux16~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[15]\, datapath_0|register_file_0|reg_x13|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[15]\, datapath_0|register_file_0|reg_x14|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[15]\, datapath_0|register_file_0|reg_x12|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~17\, datapath_0|register_file_0|output_1_mux|Mux16~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[15]\, datapath_0|register_file_0|reg_x15|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~18\, datapath_0|register_file_0|output_1_mux|Mux16~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux16~19\, datapath_0|register_file_0|output_1_mux|Mux16~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[15]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[15]~15\, datapath_0|JTU_0|internal_mux|output_0[15]~15, microcontroller, 1
instance = comp, \datapath_0|Add0~41\, datapath_0|Add0~41, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1108w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1108w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a175\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a175, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a143\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a143, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~75\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~75, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a239\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a239, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~76\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~76, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a47\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a47, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a79\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a79, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a15\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a15, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~77\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~77, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a111\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a111, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~78\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~78, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~79\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~79, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[15]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[15], microcontroller, 1
instance = comp, \controller_0|Selector92~0\, controller_0|Selector92~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_0[0]\, controller_0|internal_reg_file_read_address_0[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[0]\, datapath_0|ID_EX_PLR|register_file_read_address_0_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal6~0\, datapath_0|FU_0|Equal6~0, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal6~1\, datapath_0|FU_0|Equal6~1, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_0~4\, datapath_0|FU_0|forward_0~4, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_0_control[1]~0\, datapath_0|FU_0|forward_mux_0_control[1]~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux1~0\, datapath_0|forward_mux_0|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux1~1\, datapath_0|forward_mux_0|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux1~2\, datapath_0|forward_mux_0|Mux1~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~5\, datapath_0|ALU_0|ShiftRight1~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~82\, datapath_0|ALU_0|ShiftRight0~82, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~0\, datapath_0|ALU_0|Mux68~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~30\, datapath_0|ALU_0|ALU_output~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~1\, datapath_0|ALU_0|Mux68~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~58\, datapath_0|ALU_0|ShiftLeft0~58, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~62\, datapath_0|ALU_0|ShiftLeft0~62, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~2\, datapath_0|ALU_0|Mux68~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~3\, datapath_0|ALU_0|Mux68~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~4\, datapath_0|ALU_0|Mux68~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~5\, datapath_0|ALU_0|Mux68~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~6\, datapath_0|ALU_0|Mux68~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~7\, datapath_0|ALU_0|Mux68~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~8\, datapath_0|ALU_0|Mux68~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~9\, datapath_0|ALU_0|Mux68~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~55\, datapath_0|ALU_0|ShiftRight1~55, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~10\, datapath_0|ALU_0|Mux68~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~11\, datapath_0|ALU_0|Mux68~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux68~12\, datapath_0|ALU_0|Mux68~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[30]\, datapath_0|ALU_0|ALU_output[30], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[30]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~0\, datapath_0|register_file_0|output_2_mux|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~1\, datapath_0|register_file_0|output_2_mux|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~2\, datapath_0|register_file_0|output_2_mux|Mux1~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~3\, datapath_0|register_file_0|output_2_mux|Mux1~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~4\, datapath_0|register_file_0|output_2_mux|Mux1~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~5\, datapath_0|register_file_0|output_2_mux|Mux1~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~6\, datapath_0|register_file_0|output_2_mux|Mux1~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~7\, datapath_0|register_file_0|output_2_mux|Mux1~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~8\, datapath_0|register_file_0|output_2_mux|Mux1~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~9\, datapath_0|register_file_0|output_2_mux|Mux1~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~10\, datapath_0|register_file_0|output_2_mux|Mux1~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~11\, datapath_0|register_file_0|output_2_mux|Mux1~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~12\, datapath_0|register_file_0|output_2_mux|Mux1~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~13\, datapath_0|register_file_0|output_2_mux|Mux1~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~14\, datapath_0|register_file_0|output_2_mux|Mux1~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~15\, datapath_0|register_file_0|output_2_mux|Mux1~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~16\, datapath_0|register_file_0|output_2_mux|Mux1~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~17\, datapath_0|register_file_0|output_2_mux|Mux1~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~18\, datapath_0|register_file_0|output_2_mux|Mux1~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux1~19\, datapath_0|register_file_0|output_2_mux|Mux1~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[30]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux1~0\, datapath_0|forward_mux_1|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux1~1\, datapath_0|forward_mux_1|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux1~2\, datapath_0|forward_mux_1|Mux1~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[30]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[30], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[14]\, datapath_0|register_file_0|reg_x22|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[14]\, datapath_0|register_file_0|reg_x18|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~0\, datapath_0|register_file_0|output_2_mux|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[14]\, datapath_0|register_file_0|reg_x30|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~1\, datapath_0|register_file_0|output_2_mux|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[14]\, datapath_0|register_file_0|reg_x21|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[14]\, datapath_0|register_file_0|reg_x25|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[14]\, datapath_0|register_file_0|reg_x17|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~2\, datapath_0|register_file_0|output_2_mux|Mux17~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[14]\, datapath_0|register_file_0|reg_x29|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~3\, datapath_0|register_file_0|output_2_mux|Mux17~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[14]\, datapath_0|register_file_0|reg_x20|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[14]\, datapath_0|register_file_0|reg_x24|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[14]\, datapath_0|register_file_0|reg_x16|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~4\, datapath_0|register_file_0|output_2_mux|Mux17~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[14]\, datapath_0|register_file_0|reg_x28|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~5\, datapath_0|register_file_0|output_2_mux|Mux17~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~6\, datapath_0|register_file_0|output_2_mux|Mux17~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[14]\, datapath_0|register_file_0|reg_x27|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[14]\, datapath_0|register_file_0|reg_x23|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[14]\, datapath_0|register_file_0|reg_x19|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~7\, datapath_0|register_file_0|output_2_mux|Mux17~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[14]\, datapath_0|register_file_0|reg_x31|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~8\, datapath_0|register_file_0|output_2_mux|Mux17~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~9\, datapath_0|register_file_0|output_2_mux|Mux17~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[14]\, datapath_0|register_file_0|reg_x9|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[14]\, datapath_0|register_file_0|reg_x10|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[14]\, datapath_0|register_file_0|reg_x8|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~10\, datapath_0|register_file_0|output_2_mux|Mux17~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[14]\, datapath_0|register_file_0|reg_x11|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~11\, datapath_0|register_file_0|output_2_mux|Mux17~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[14]\, datapath_0|register_file_0|reg_x2|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[14]\, datapath_0|register_file_0|reg_x3|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[14]\, datapath_0|register_file_0|reg_x1|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[14]\, datapath_0|register_file_0|reg_x6|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[14]\, datapath_0|register_file_0|reg_x5|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[14]\, datapath_0|register_file_0|reg_x4|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~12\, datapath_0|register_file_0|output_2_mux|Mux17~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[14]\, datapath_0|register_file_0|reg_x7|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~13\, datapath_0|register_file_0|output_2_mux|Mux17~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~14\, datapath_0|register_file_0|output_2_mux|Mux17~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~15\, datapath_0|register_file_0|output_2_mux|Mux17~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~16\, datapath_0|register_file_0|output_2_mux|Mux17~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[14]\, datapath_0|register_file_0|reg_x14|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[14]\, datapath_0|register_file_0|reg_x13|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[14]\, datapath_0|register_file_0|reg_x12|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~17\, datapath_0|register_file_0|output_2_mux|Mux17~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[14]\, datapath_0|register_file_0|reg_x15|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~18\, datapath_0|register_file_0|output_2_mux|Mux17~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux17~19\, datapath_0|register_file_0|output_2_mux|Mux17~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[14]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux17~0\, datapath_0|forward_mux_1|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux17~1\, datapath_0|forward_mux_1|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux17~2\, datapath_0|forward_mux_1|Mux17~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[14]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux68~0\, datapath_0|datamem_module_0|Mux68~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux68~1\, datapath_0|datamem_module_0|Mux68~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[6]\, datapath_0|datamem_module_0|memory_input_3[6], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~2\, datapath_0|datamem_module_0|Mux8~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[3]~6\, datapath_0|datamem_module_0|internal_load[3]~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~94\, datapath_0|datamem_module_0|datamem_3|RAM~94, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~93\, datapath_0|datamem_module_0|datamem_3|RAM~93, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~33\, datapath_0|datamem_module_0|datamem_3|RAM~33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~26\, datapath_0|datamem_module_0|datamem_3|RAM~26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[3]~7\, datapath_0|datamem_module_0|internal_load[3]~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a14\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a14, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a6\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[0]\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[1]\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~79\, datapath_0|datamem_module_0|datamem_3|RAM~79, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a30\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a22\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a22, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~80\, datapath_0|datamem_module_0|datamem_3|RAM~80, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[2]\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|address_reg_b[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~81\, datapath_0|datamem_module_0|datamem_3|RAM~81, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a46\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a38\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~82\, datapath_0|datamem_module_0|datamem_3|RAM~82, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a62\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a54\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~83\, datapath_0|datamem_module_0|datamem_3|RAM~83, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~84\, datapath_0|datamem_module_0|datamem_3|RAM~84, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~85\, datapath_0|datamem_module_0|datamem_3|RAM~85, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux18~0\, datapath_0|datamem_module_0|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux16~0\, datapath_0|datamem_module_0|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux18~1\, datapath_0|datamem_module_0|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[14]\, datapath_0|datamem_module_0|output_data[14], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[14]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux17~0\, datapath_0|mux_0|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux17~1\, datapath_0|mux_0|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[14]\, datapath_0|register_file_0|reg_x26|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~0\, datapath_0|register_file_0|output_1_mux|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~1\, datapath_0|register_file_0|output_1_mux|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~2\, datapath_0|register_file_0|output_1_mux|Mux17~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~3\, datapath_0|register_file_0|output_1_mux|Mux17~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~4\, datapath_0|register_file_0|output_1_mux|Mux17~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~5\, datapath_0|register_file_0|output_1_mux|Mux17~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~6\, datapath_0|register_file_0|output_1_mux|Mux17~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~7\, datapath_0|register_file_0|output_1_mux|Mux17~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~8\, datapath_0|register_file_0|output_1_mux|Mux17~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~9\, datapath_0|register_file_0|output_1_mux|Mux17~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~10\, datapath_0|register_file_0|output_1_mux|Mux17~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~11\, datapath_0|register_file_0|output_1_mux|Mux17~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~12\, datapath_0|register_file_0|output_1_mux|Mux17~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~13\, datapath_0|register_file_0|output_1_mux|Mux17~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~14\, datapath_0|register_file_0|output_1_mux|Mux17~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~15\, datapath_0|register_file_0|output_1_mux|Mux17~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~16\, datapath_0|register_file_0|output_1_mux|Mux17~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~17\, datapath_0|register_file_0|output_1_mux|Mux17~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~18\, datapath_0|register_file_0|output_1_mux|Mux17~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux17~19\, datapath_0|register_file_0|output_1_mux|Mux17~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[14]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[14]~14\, datapath_0|JTU_0|internal_mux|output_0[14]~14, microcontroller, 1
instance = comp, \datapath_0|Add0~38\, datapath_0|Add0~38, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a222\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a222, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a190\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a190, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a158\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a158, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~150\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~150, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a254\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a254, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~151\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~151, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a62\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a62, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a94\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a94, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a30\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a30, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~152\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~152, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a126\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a126, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~153\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~153, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~154\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~154, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[30]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[30], microcontroller, 1
instance = comp, \controller_0|Selector25~0\, controller_0|Selector25~0, microcontroller, 1
instance = comp, \controller_0|Selector25~1\, controller_0|Selector25~1, microcontroller, 1
instance = comp, \controller_0|internal_ALU_operation[3]\, controller_0|internal_ALU_operation[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[3]\, datapath_0|ID_EX_PLR|ALU_operation_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~12\, datapath_0|ALU_0|Mux69~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~29\, datapath_0|ALU_0|ALU_output~29, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~4\, datapath_0|ALU_0|Mux69~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~5\, datapath_0|ALU_0|Mux69~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~6\, datapath_0|ALU_0|Mux69~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~7\, datapath_0|ALU_0|Mux69~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~8\, datapath_0|ALU_0|Mux69~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~9\, datapath_0|ALU_0|Mux69~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~10\, datapath_0|ALU_0|Mux69~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux69~11\, datapath_0|ALU_0|Mux69~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[29]\, datapath_0|ALU_0|ALU_output[29], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[29]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~0\, datapath_0|register_file_0|output_2_mux|Mux2~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~1\, datapath_0|register_file_0|output_2_mux|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~2\, datapath_0|register_file_0|output_2_mux|Mux2~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~3\, datapath_0|register_file_0|output_2_mux|Mux2~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~4\, datapath_0|register_file_0|output_2_mux|Mux2~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~5\, datapath_0|register_file_0|output_2_mux|Mux2~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~6\, datapath_0|register_file_0|output_2_mux|Mux2~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~7\, datapath_0|register_file_0|output_2_mux|Mux2~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~8\, datapath_0|register_file_0|output_2_mux|Mux2~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~9\, datapath_0|register_file_0|output_2_mux|Mux2~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~10\, datapath_0|register_file_0|output_2_mux|Mux2~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~11\, datapath_0|register_file_0|output_2_mux|Mux2~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~12\, datapath_0|register_file_0|output_2_mux|Mux2~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~13\, datapath_0|register_file_0|output_2_mux|Mux2~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~14\, datapath_0|register_file_0|output_2_mux|Mux2~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~15\, datapath_0|register_file_0|output_2_mux|Mux2~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~16\, datapath_0|register_file_0|output_2_mux|Mux2~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~17\, datapath_0|register_file_0|output_2_mux|Mux2~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~18\, datapath_0|register_file_0|output_2_mux|Mux2~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux2~19\, datapath_0|register_file_0|output_2_mux|Mux2~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[29]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux2~0\, datapath_0|forward_mux_1|Mux2~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux2~1\, datapath_0|forward_mux_1|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux2~2\, datapath_0|forward_mux_1|Mux2~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[29]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[29], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[13]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux67~0\, datapath_0|datamem_module_0|Mux67~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux67~1\, datapath_0|datamem_module_0|Mux67~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[5]\, datapath_0|datamem_module_0|memory_input_3[5], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~32\, datapath_0|datamem_module_0|datamem_3|RAM~32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a13\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a13, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a5\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~72\, datapath_0|datamem_module_0|datamem_3|RAM~72, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a29\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a21\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a21, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~73\, datapath_0|datamem_module_0|datamem_3|RAM~73, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~74\, datapath_0|datamem_module_0|datamem_3|RAM~74, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a45\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a37\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~75\, datapath_0|datamem_module_0|datamem_3|RAM~75, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a61\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a53\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~76\, datapath_0|datamem_module_0|datamem_3|RAM~76, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~77\, datapath_0|datamem_module_0|datamem_3|RAM~77, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~78\, datapath_0|datamem_module_0|datamem_3|RAM~78, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux17~0\, datapath_0|datamem_module_0|Mux17~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux51~0\, datapath_0|datamem_module_0|Mux51~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[5]\, datapath_0|datamem_module_0|memory_input_1[5], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[1]~2\, datapath_0|datamem_module_0|internal_load[1]~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[1]~3\, datapath_0|datamem_module_0|internal_load[1]~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~91\, datapath_0|datamem_module_0|datamem_1|RAM~91, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~32\, datapath_0|datamem_module_0|datamem_1|RAM~32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~26\, datapath_0|datamem_module_0|datamem_1|RAM~26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a13\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a13, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a5\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[0]\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[1]\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~70\, datapath_0|datamem_module_0|datamem_1|RAM~70, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a29\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a21\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a21, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~71\, datapath_0|datamem_module_0|datamem_1|RAM~71, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[2]\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|address_reg_b[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~72\, datapath_0|datamem_module_0|datamem_1|RAM~72, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a45\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a37\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~73\, datapath_0|datamem_module_0|datamem_1|RAM~73, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a61\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a53\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~74\, datapath_0|datamem_module_0|datamem_1|RAM~74, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~75\, datapath_0|datamem_module_0|datamem_1|RAM~75, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~76\, datapath_0|datamem_module_0|datamem_1|RAM~76, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux17~1\, datapath_0|datamem_module_0|Mux17~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[13]\, datapath_0|datamem_module_0|output_data[13], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[13]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux18~0\, datapath_0|mux_0|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux18~1\, datapath_0|mux_0|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[13]\, datapath_0|register_file_0|reg_x10|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~0\, datapath_0|register_file_0|output_1_mux|Mux18~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~1\, datapath_0|register_file_0|output_1_mux|Mux18~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~2\, datapath_0|register_file_0|output_1_mux|Mux18~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~3\, datapath_0|register_file_0|output_1_mux|Mux18~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~4\, datapath_0|register_file_0|output_1_mux|Mux18~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~5\, datapath_0|register_file_0|output_1_mux|Mux18~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~6\, datapath_0|register_file_0|output_1_mux|Mux18~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~7\, datapath_0|register_file_0|output_1_mux|Mux18~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~8\, datapath_0|register_file_0|output_1_mux|Mux18~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~9\, datapath_0|register_file_0|output_1_mux|Mux18~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~10\, datapath_0|register_file_0|output_1_mux|Mux18~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~11\, datapath_0|register_file_0|output_1_mux|Mux18~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~12\, datapath_0|register_file_0|output_1_mux|Mux18~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~13\, datapath_0|register_file_0|output_1_mux|Mux18~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~14\, datapath_0|register_file_0|output_1_mux|Mux18~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~15\, datapath_0|register_file_0|output_1_mux|Mux18~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~16\, datapath_0|register_file_0|output_1_mux|Mux18~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~17\, datapath_0|register_file_0|output_1_mux|Mux18~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~18\, datapath_0|register_file_0|output_1_mux|Mux18~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux18~19\, datapath_0|register_file_0|output_1_mux|Mux18~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[13]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[13], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[13]~13\, datapath_0|JTU_0|internal_mux|output_0[13]~13, microcontroller, 1
instance = comp, \datapath_0|Add0~35\, datapath_0|Add0~35, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a195\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a195, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a163\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a163, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a131\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a131, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~15\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~15, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a227\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a227, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~16\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~16, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a35\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a35, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a67\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a67, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a3\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a3, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~17\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~17, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a99\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a99, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~18\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~18, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~19\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~19, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[3]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[3], microcontroller, 1
instance = comp, \controller_0|Mux31~0\, controller_0|Mux31~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.JAL_1846\, controller_0|decoded_cluster.JAL_1846, microcontroller, 1
instance = comp, \controller_0|internal_immediate~0\, controller_0|internal_immediate~0, microcontroller, 1
instance = comp, \controller_0|internal_mux0_sel[1]\, controller_0|internal_mux0_sel[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|mux0_sel_reg|internal_value[1]\, datapath_0|ID_EX_PLR|mux0_sel_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|mux0_sel_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|mux0_sel_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~0\, datapath_0|FU_0|forward_1~0, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[1]\, datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[0]\, datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal7~0\, datapath_0|FU_0|Equal7~0, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[3]\, datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[2]\, datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal7~1\, datapath_0|FU_0|Equal7~1, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal7~2\, datapath_0|FU_0|Equal7~2, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~6\, datapath_0|FU_0|forward_1~6, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_1_control[0]~1\, datapath_0|FU_0|forward_mux_1_control[0]~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[11]\, datapath_0|register_file_0|reg_x9|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[11]\, datapath_0|register_file_0|reg_x8|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~0\, datapath_0|register_file_0|output_2_mux|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[11]\, datapath_0|register_file_0|reg_x11|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~1\, datapath_0|register_file_0|output_2_mux|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[11]\, datapath_0|register_file_0|reg_x21|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[11]\, datapath_0|register_file_0|reg_x25|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[11]\, datapath_0|register_file_0|reg_x17|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~2\, datapath_0|register_file_0|output_2_mux|Mux20~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[11]\, datapath_0|register_file_0|reg_x29|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~3\, datapath_0|register_file_0|output_2_mux|Mux20~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[11]\, datapath_0|register_file_0|reg_x26|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[11]\, datapath_0|register_file_0|reg_x22|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[11]\, datapath_0|register_file_0|reg_x18|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~4\, datapath_0|register_file_0|output_2_mux|Mux20~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[11]\, datapath_0|register_file_0|reg_x30|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~5\, datapath_0|register_file_0|output_2_mux|Mux20~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[11]\, datapath_0|register_file_0|reg_x20|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[11]\, datapath_0|register_file_0|reg_x24|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[11]\, datapath_0|register_file_0|reg_x16|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~6\, datapath_0|register_file_0|output_2_mux|Mux20~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[11]\, datapath_0|register_file_0|reg_x28|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~7\, datapath_0|register_file_0|output_2_mux|Mux20~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~8\, datapath_0|register_file_0|output_2_mux|Mux20~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[11]\, datapath_0|register_file_0|reg_x27|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[11]\, datapath_0|register_file_0|reg_x23|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[11]\, datapath_0|register_file_0|reg_x19|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~9\, datapath_0|register_file_0|output_2_mux|Mux20~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[11]\, datapath_0|register_file_0|reg_x31|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~10\, datapath_0|register_file_0|output_2_mux|Mux20~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~11\, datapath_0|register_file_0|output_2_mux|Mux20~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[11]\, datapath_0|register_file_0|reg_x2|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[11]\, datapath_0|register_file_0|reg_x3|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[11]\, datapath_0|register_file_0|reg_x1|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[11]\, datapath_0|register_file_0|reg_x5|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[11]\, datapath_0|register_file_0|reg_x6|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[11]\, datapath_0|register_file_0|reg_x4|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~12\, datapath_0|register_file_0|output_2_mux|Mux20~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[11]\, datapath_0|register_file_0|reg_x7|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~13\, datapath_0|register_file_0|output_2_mux|Mux20~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~14\, datapath_0|register_file_0|output_2_mux|Mux20~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~15\, datapath_0|register_file_0|output_2_mux|Mux20~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~16\, datapath_0|register_file_0|output_2_mux|Mux20~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[11]\, datapath_0|register_file_0|reg_x13|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[11]\, datapath_0|register_file_0|reg_x14|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[11]\, datapath_0|register_file_0|reg_x12|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~17\, datapath_0|register_file_0|output_2_mux|Mux20~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[11]\, datapath_0|register_file_0|reg_x15|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~18\, datapath_0|register_file_0|output_2_mux|Mux20~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux20~19\, datapath_0|register_file_0|output_2_mux|Mux20~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[11]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux20~0\, datapath_0|forward_mux_1|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[11]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux20~1\, datapath_0|forward_mux_1|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux20~2\, datapath_0|forward_mux_1|Mux20~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~33\, datapath_0|ALU_0|Add0~33, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[11]~8\, datapath_0|ALU_0|result_temp[11]~8, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[11]~11\, datapath_0|mux_1|output_0[11]~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~11\, datapath_0|ALU_0|ALU_output~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~0\, datapath_0|ALU_0|Mux87~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~1\, datapath_0|ALU_0|Mux87~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~2\, datapath_0|ALU_0|Mux87~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~3\, datapath_0|ALU_0|Mux87~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~4\, datapath_0|ALU_0|Mux87~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux87~5\, datapath_0|ALU_0|Mux87~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[11]\, datapath_0|ALU_0|ALU_output[11], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[11]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux20~0\, datapath_0|forward_mux_0|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux20~1\, datapath_0|forward_mux_0|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux20~2\, datapath_0|forward_mux_0|Mux20~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~3\, datapath_0|ALU_0|ShiftRight0~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~5\, datapath_0|ALU_0|ShiftRight0~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~4\, datapath_0|ALU_0|ALU_output~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~0\, datapath_0|ALU_0|Mux94~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~1\, datapath_0|ALU_0|Mux94~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~2\, datapath_0|ALU_0|Mux94~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~3\, datapath_0|ALU_0|Mux94~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~7\, datapath_0|ALU_0|ShiftRight0~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~4\, datapath_0|ALU_0|ShiftRight1~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~8\, datapath_0|ALU_0|ShiftRight0~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~4\, datapath_0|ALU_0|Mux94~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~5\, datapath_0|ALU_0|Mux94~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux94~6\, datapath_0|ALU_0|Mux94~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[4]\, datapath_0|ALU_0|ALU_output[4], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[4]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[4]\, datapath_0|register_file_0|reg_x22|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[4]\, datapath_0|register_file_0|reg_x18|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~0\, datapath_0|register_file_0|output_2_mux|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[4]\, datapath_0|register_file_0|reg_x30|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~1\, datapath_0|register_file_0|output_2_mux|Mux27~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[4]\, datapath_0|register_file_0|reg_x21|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[4]\, datapath_0|register_file_0|reg_x25|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[4]\, datapath_0|register_file_0|reg_x17|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~2\, datapath_0|register_file_0|output_2_mux|Mux27~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[4]\, datapath_0|register_file_0|reg_x29|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~3\, datapath_0|register_file_0|output_2_mux|Mux27~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[4]\, datapath_0|register_file_0|reg_x20|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[4]\, datapath_0|register_file_0|reg_x24|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[4]\, datapath_0|register_file_0|reg_x16|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~4\, datapath_0|register_file_0|output_2_mux|Mux27~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[4]\, datapath_0|register_file_0|reg_x28|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~5\, datapath_0|register_file_0|output_2_mux|Mux27~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~6\, datapath_0|register_file_0|output_2_mux|Mux27~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[4]\, datapath_0|register_file_0|reg_x27|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[4]\, datapath_0|register_file_0|reg_x23|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[4]\, datapath_0|register_file_0|reg_x19|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~7\, datapath_0|register_file_0|output_2_mux|Mux27~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[4]\, datapath_0|register_file_0|reg_x31|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~8\, datapath_0|register_file_0|output_2_mux|Mux27~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~9\, datapath_0|register_file_0|output_2_mux|Mux27~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[4]\, datapath_0|register_file_0|reg_x9|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[4]\, datapath_0|register_file_0|reg_x10|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[4]\, datapath_0|register_file_0|reg_x8|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~10\, datapath_0|register_file_0|output_2_mux|Mux27~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[4]\, datapath_0|register_file_0|reg_x11|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~11\, datapath_0|register_file_0|output_2_mux|Mux27~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[4]\, datapath_0|register_file_0|reg_x2|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[4]\, datapath_0|register_file_0|reg_x3|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[4]\, datapath_0|register_file_0|reg_x1|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[4]\, datapath_0|register_file_0|reg_x6|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[4]\, datapath_0|register_file_0|reg_x5|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[4]\, datapath_0|register_file_0|reg_x4|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~12\, datapath_0|register_file_0|output_2_mux|Mux27~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[4]\, datapath_0|register_file_0|reg_x7|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~13\, datapath_0|register_file_0|output_2_mux|Mux27~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~14\, datapath_0|register_file_0|output_2_mux|Mux27~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~15\, datapath_0|register_file_0|output_2_mux|Mux27~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~16\, datapath_0|register_file_0|output_2_mux|Mux27~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[4]\, datapath_0|register_file_0|reg_x14|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[4]\, datapath_0|register_file_0|reg_x13|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[4]\, datapath_0|register_file_0|reg_x12|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~17\, datapath_0|register_file_0|output_2_mux|Mux27~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[4]\, datapath_0|register_file_0|reg_x15|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~18\, datapath_0|register_file_0|output_2_mux|Mux27~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux27~19\, datapath_0|register_file_0|output_2_mux|Mux27~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[4]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux27~0\, datapath_0|forward_mux_1|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux27~1\, datapath_0|forward_mux_1|Mux27~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux27~2\, datapath_0|forward_mux_1|Mux27~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[4]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[28]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[28], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[12]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux66~0\, datapath_0|datamem_module_0|Mux66~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux66~1\, datapath_0|datamem_module_0|Mux66~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[4]\, datapath_0|datamem_module_0|memory_input_3[4], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~31\, datapath_0|datamem_module_0|datamem_3|RAM~31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a12\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a12, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a4\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~65\, datapath_0|datamem_module_0|datamem_3|RAM~65, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a28\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a20\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a20, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~66\, datapath_0|datamem_module_0|datamem_3|RAM~66, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~67\, datapath_0|datamem_module_0|datamem_3|RAM~67, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a60\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a52\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~68\, datapath_0|datamem_module_0|datamem_3|RAM~68, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a44\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a36\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a36, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~69\, datapath_0|datamem_module_0|datamem_3|RAM~69, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~70\, datapath_0|datamem_module_0|datamem_3|RAM~70, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~71\, datapath_0|datamem_module_0|datamem_3|RAM~71, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux16~1\, datapath_0|datamem_module_0|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux16~2\, datapath_0|datamem_module_0|Mux16~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[12]\, datapath_0|datamem_module_0|output_data[12], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[12]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux19~0\, datapath_0|mux_0|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux19~1\, datapath_0|mux_0|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[12]\, datapath_0|register_file_0|reg_x26|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~0\, datapath_0|register_file_0|output_1_mux|Mux19~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~1\, datapath_0|register_file_0|output_1_mux|Mux19~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~2\, datapath_0|register_file_0|output_1_mux|Mux19~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~3\, datapath_0|register_file_0|output_1_mux|Mux19~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~4\, datapath_0|register_file_0|output_1_mux|Mux19~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~5\, datapath_0|register_file_0|output_1_mux|Mux19~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~6\, datapath_0|register_file_0|output_1_mux|Mux19~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~7\, datapath_0|register_file_0|output_1_mux|Mux19~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~8\, datapath_0|register_file_0|output_1_mux|Mux19~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~9\, datapath_0|register_file_0|output_1_mux|Mux19~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~10\, datapath_0|register_file_0|output_1_mux|Mux19~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~11\, datapath_0|register_file_0|output_1_mux|Mux19~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~12\, datapath_0|register_file_0|output_1_mux|Mux19~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~13\, datapath_0|register_file_0|output_1_mux|Mux19~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~14\, datapath_0|register_file_0|output_1_mux|Mux19~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~15\, datapath_0|register_file_0|output_1_mux|Mux19~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~16\, datapath_0|register_file_0|output_1_mux|Mux19~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~17\, datapath_0|register_file_0|output_1_mux|Mux19~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~18\, datapath_0|register_file_0|output_1_mux|Mux19~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux19~19\, datapath_0|register_file_0|output_1_mux|Mux19~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[12]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[12], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[12]~12\, datapath_0|JTU_0|internal_mux|output_0[12]~12, microcontroller, 1
instance = comp, \datapath_0|Add0~32\, datapath_0|Add0~32, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a213\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a213, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a181\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a181, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a149\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a149, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~105\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~105, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a245\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a245, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~106\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~106, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a53\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a53, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a85\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a85, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a21\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a21, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~107\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~107, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a117\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a117, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~108\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~108, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~109\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~109, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[21]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[21], microcontroller, 1
instance = comp, \controller_0|Selector87~0\, controller_0|Selector87~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_1[1]\, controller_0|internal_reg_file_read_address_1[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[3]\, datapath_0|register_file_0|reg_x9|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[3]\, datapath_0|register_file_0|reg_x8|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~0\, datapath_0|register_file_0|output_2_mux|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[3]\, datapath_0|register_file_0|reg_x11|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~1\, datapath_0|register_file_0|output_2_mux|Mux28~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[3]\, datapath_0|register_file_0|reg_x21|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[3]\, datapath_0|register_file_0|reg_x25|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[3]\, datapath_0|register_file_0|reg_x17|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~2\, datapath_0|register_file_0|output_2_mux|Mux28~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[3]\, datapath_0|register_file_0|reg_x29|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~3\, datapath_0|register_file_0|output_2_mux|Mux28~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[3]\, datapath_0|register_file_0|reg_x26|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[3]\, datapath_0|register_file_0|reg_x22|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[3]\, datapath_0|register_file_0|reg_x18|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~4\, datapath_0|register_file_0|output_2_mux|Mux28~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[3]\, datapath_0|register_file_0|reg_x30|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~5\, datapath_0|register_file_0|output_2_mux|Mux28~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[3]\, datapath_0|register_file_0|reg_x20|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[3]\, datapath_0|register_file_0|reg_x24|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[3]\, datapath_0|register_file_0|reg_x16|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~6\, datapath_0|register_file_0|output_2_mux|Mux28~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[3]\, datapath_0|register_file_0|reg_x28|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~7\, datapath_0|register_file_0|output_2_mux|Mux28~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~8\, datapath_0|register_file_0|output_2_mux|Mux28~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[3]\, datapath_0|register_file_0|reg_x27|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[3]\, datapath_0|register_file_0|reg_x23|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[3]\, datapath_0|register_file_0|reg_x19|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~9\, datapath_0|register_file_0|output_2_mux|Mux28~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[3]\, datapath_0|register_file_0|reg_x31|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~10\, datapath_0|register_file_0|output_2_mux|Mux28~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~11\, datapath_0|register_file_0|output_2_mux|Mux28~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[3]\, datapath_0|register_file_0|reg_x2|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[3]\, datapath_0|register_file_0|reg_x3|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[3]\, datapath_0|register_file_0|reg_x1|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[3]\, datapath_0|register_file_0|reg_x5|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[3]\, datapath_0|register_file_0|reg_x6|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[3]\, datapath_0|register_file_0|reg_x4|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~12\, datapath_0|register_file_0|output_2_mux|Mux28~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[3]\, datapath_0|register_file_0|reg_x7|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~13\, datapath_0|register_file_0|output_2_mux|Mux28~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~14\, datapath_0|register_file_0|output_2_mux|Mux28~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~15\, datapath_0|register_file_0|output_2_mux|Mux28~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~16\, datapath_0|register_file_0|output_2_mux|Mux28~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[3]\, datapath_0|register_file_0|reg_x13|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[3]\, datapath_0|register_file_0|reg_x14|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[3]\, datapath_0|register_file_0|reg_x12|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~17\, datapath_0|register_file_0|output_2_mux|Mux28~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[3]\, datapath_0|register_file_0|reg_x15|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~18\, datapath_0|register_file_0|output_2_mux|Mux28~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux28~19\, datapath_0|register_file_0|output_2_mux|Mux28~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[3]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux28~0\, datapath_0|forward_mux_1|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux28~1\, datapath_0|forward_mux_1|Mux28~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux28~2\, datapath_0|forward_mux_1|Mux28~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[3]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[27]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[27], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[11]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux65~0\, datapath_0|datamem_module_0|Mux65~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux65~1\, datapath_0|datamem_module_0|Mux65~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[3]\, datapath_0|datamem_module_0|memory_input_3[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~30\, datapath_0|datamem_module_0|datamem_3|RAM~30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a11\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a11, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a3\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~58\, datapath_0|datamem_module_0|datamem_3|RAM~58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a27\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a19\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a19, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~59\, datapath_0|datamem_module_0|datamem_3|RAM~59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~60\, datapath_0|datamem_module_0|datamem_3|RAM~60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a43\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a35\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a35, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~61\, datapath_0|datamem_module_0|datamem_3|RAM~61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a59\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a51\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~62\, datapath_0|datamem_module_0|datamem_3|RAM~62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~63\, datapath_0|datamem_module_0|datamem_3|RAM~63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~64\, datapath_0|datamem_module_0|datamem_3|RAM~64, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux15~0\, datapath_0|datamem_module_0|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux49~0\, datapath_0|datamem_module_0|Mux49~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[3]\, datapath_0|datamem_module_0|memory_input_1[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~30\, datapath_0|datamem_module_0|datamem_1|RAM~30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a11\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a11, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a3\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~56\, datapath_0|datamem_module_0|datamem_1|RAM~56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a27\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a19\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a19, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~57\, datapath_0|datamem_module_0|datamem_1|RAM~57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~58\, datapath_0|datamem_module_0|datamem_1|RAM~58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a43\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a35\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a35, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~59\, datapath_0|datamem_module_0|datamem_1|RAM~59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a59\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a51\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~60\, datapath_0|datamem_module_0|datamem_1|RAM~60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~61\, datapath_0|datamem_module_0|datamem_1|RAM~61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~62\, datapath_0|datamem_module_0|datamem_1|RAM~62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux15~1\, datapath_0|datamem_module_0|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[11]\, datapath_0|datamem_module_0|output_data[11], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[11]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux20~0\, datapath_0|mux_0|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux20~1\, datapath_0|mux_0|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[11]\, datapath_0|register_file_0|reg_x10|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~0\, datapath_0|register_file_0|output_1_mux|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~1\, datapath_0|register_file_0|output_1_mux|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~2\, datapath_0|register_file_0|output_1_mux|Mux20~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~3\, datapath_0|register_file_0|output_1_mux|Mux20~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~4\, datapath_0|register_file_0|output_1_mux|Mux20~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~5\, datapath_0|register_file_0|output_1_mux|Mux20~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~6\, datapath_0|register_file_0|output_1_mux|Mux20~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~7\, datapath_0|register_file_0|output_1_mux|Mux20~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~8\, datapath_0|register_file_0|output_1_mux|Mux20~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~9\, datapath_0|register_file_0|output_1_mux|Mux20~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~10\, datapath_0|register_file_0|output_1_mux|Mux20~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~11\, datapath_0|register_file_0|output_1_mux|Mux20~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~12\, datapath_0|register_file_0|output_1_mux|Mux20~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~13\, datapath_0|register_file_0|output_1_mux|Mux20~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~14\, datapath_0|register_file_0|output_1_mux|Mux20~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~15\, datapath_0|register_file_0|output_1_mux|Mux20~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~16\, datapath_0|register_file_0|output_1_mux|Mux20~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~17\, datapath_0|register_file_0|output_1_mux|Mux20~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~18\, datapath_0|register_file_0|output_1_mux|Mux20~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux20~19\, datapath_0|register_file_0|output_1_mux|Mux20~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[11]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[11], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[11]~11\, datapath_0|JTU_0|internal_mux|output_0[11]~11, microcontroller, 1
instance = comp, \datapath_0|Add0~29\, datapath_0|Add0~29, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a199\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a199, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a167\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a167, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a135\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a135, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~35\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~35, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a231\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a231, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~36\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~36, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a39\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a39, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a71\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a71, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a7\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a7, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~37\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~37, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a103\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a103, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~38\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~38, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~39\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~39, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[7]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[7], microcontroller, 1
instance = comp, \controller_0|Selector30~0\, controller_0|Selector30~0, microcontroller, 1
instance = comp, \controller_0|Selector30~1\, controller_0|Selector30~1, microcontroller, 1
instance = comp, \controller_0|Selector30~2\, controller_0|Selector30~2, microcontroller, 1
instance = comp, \controller_0|internal_immediate[2]\, controller_0|internal_immediate[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[2]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~42\, datapath_0|ALU_0|Add0~42, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~2\, datapath_0|ALU_0|ALU_output~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~2\, datapath_0|ALU_0|Mux96~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~3\, datapath_0|ALU_0|Mux96~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~7\, datapath_0|ALU_0|Mux96~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~8\, datapath_0|ALU_0|Mux96~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~14\, datapath_0|ALU_0|Mux96~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~27\, datapath_0|ALU_0|ShiftRight1~27, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~16\, datapath_0|ALU_0|Mux96~16, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~17\, datapath_0|ALU_0|Mux96~17, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux96~18\, datapath_0|ALU_0|Mux96~18, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[2]\, datapath_0|ALU_0|ALU_output[2], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[2]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[2]\, datapath_0|register_file_0|reg_x22|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[2]\, datapath_0|register_file_0|reg_x18|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~0\, datapath_0|register_file_0|output_2_mux|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[2]\, datapath_0|register_file_0|reg_x30|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~1\, datapath_0|register_file_0|output_2_mux|Mux29~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[2]\, datapath_0|register_file_0|reg_x21|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[2]\, datapath_0|register_file_0|reg_x25|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[2]\, datapath_0|register_file_0|reg_x17|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~2\, datapath_0|register_file_0|output_2_mux|Mux29~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[2]\, datapath_0|register_file_0|reg_x29|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~3\, datapath_0|register_file_0|output_2_mux|Mux29~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[2]\, datapath_0|register_file_0|reg_x20|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[2]\, datapath_0|register_file_0|reg_x24|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[2]\, datapath_0|register_file_0|reg_x16|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~4\, datapath_0|register_file_0|output_2_mux|Mux29~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[2]\, datapath_0|register_file_0|reg_x28|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~5\, datapath_0|register_file_0|output_2_mux|Mux29~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~6\, datapath_0|register_file_0|output_2_mux|Mux29~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[2]\, datapath_0|register_file_0|reg_x27|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[2]\, datapath_0|register_file_0|reg_x23|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[2]\, datapath_0|register_file_0|reg_x19|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~7\, datapath_0|register_file_0|output_2_mux|Mux29~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[2]\, datapath_0|register_file_0|reg_x31|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~8\, datapath_0|register_file_0|output_2_mux|Mux29~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~9\, datapath_0|register_file_0|output_2_mux|Mux29~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[2]\, datapath_0|register_file_0|reg_x9|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[2]\, datapath_0|register_file_0|reg_x10|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[2]\, datapath_0|register_file_0|reg_x8|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~10\, datapath_0|register_file_0|output_2_mux|Mux29~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[2]\, datapath_0|register_file_0|reg_x11|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~11\, datapath_0|register_file_0|output_2_mux|Mux29~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[2]\, datapath_0|register_file_0|reg_x2|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[2]\, datapath_0|register_file_0|reg_x3|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[2]\, datapath_0|register_file_0|reg_x1|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[2]\, datapath_0|register_file_0|reg_x6|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[2]\, datapath_0|register_file_0|reg_x5|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[2]\, datapath_0|register_file_0|reg_x4|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~12\, datapath_0|register_file_0|output_2_mux|Mux29~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[2]\, datapath_0|register_file_0|reg_x7|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~13\, datapath_0|register_file_0|output_2_mux|Mux29~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~14\, datapath_0|register_file_0|output_2_mux|Mux29~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~15\, datapath_0|register_file_0|output_2_mux|Mux29~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~16\, datapath_0|register_file_0|output_2_mux|Mux29~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[2]\, datapath_0|register_file_0|reg_x14|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[2]\, datapath_0|register_file_0|reg_x13|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[2]\, datapath_0|register_file_0|reg_x12|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~17\, datapath_0|register_file_0|output_2_mux|Mux29~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[2]\, datapath_0|register_file_0|reg_x15|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~18\, datapath_0|register_file_0|output_2_mux|Mux29~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux29~19\, datapath_0|register_file_0|output_2_mux|Mux29~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[2]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[2]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux29~0\, datapath_0|forward_mux_1|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux29~1\, datapath_0|forward_mux_1|Mux29~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux29~2\, datapath_0|forward_mux_1|Mux29~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[2]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[26]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[26], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[10]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux64~0\, datapath_0|datamem_module_0|Mux64~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux64~1\, datapath_0|datamem_module_0|Mux64~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[2]\, datapath_0|datamem_module_0|memory_input_3[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~29\, datapath_0|datamem_module_0|datamem_3|RAM~29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a10\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a10, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a2\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~51\, datapath_0|datamem_module_0|datamem_3|RAM~51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a26\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a18\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a18, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~52\, datapath_0|datamem_module_0|datamem_3|RAM~52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~53\, datapath_0|datamem_module_0|datamem_3|RAM~53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a58\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a50\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~54\, datapath_0|datamem_module_0|datamem_3|RAM~54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a42\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a34\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~55\, datapath_0|datamem_module_0|datamem_3|RAM~55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~56\, datapath_0|datamem_module_0|datamem_3|RAM~56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~57\, datapath_0|datamem_module_0|datamem_3|RAM~57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux14~0\, datapath_0|datamem_module_0|Mux14~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux48~0\, datapath_0|datamem_module_0|Mux48~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[2]\, datapath_0|datamem_module_0|memory_input_1[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~29\, datapath_0|datamem_module_0|datamem_1|RAM~29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a10\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a10, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a2\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~49\, datapath_0|datamem_module_0|datamem_1|RAM~49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a26\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a18\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a18, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~50\, datapath_0|datamem_module_0|datamem_1|RAM~50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~51\, datapath_0|datamem_module_0|datamem_1|RAM~51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a58\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a50\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~52\, datapath_0|datamem_module_0|datamem_1|RAM~52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a42\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a34\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~53\, datapath_0|datamem_module_0|datamem_1|RAM~53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~54\, datapath_0|datamem_module_0|datamem_1|RAM~54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~55\, datapath_0|datamem_module_0|datamem_1|RAM~55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux14~1\, datapath_0|datamem_module_0|Mux14~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[10]\, datapath_0|datamem_module_0|output_data[10], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[10]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux21~0\, datapath_0|mux_0|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux21~1\, datapath_0|mux_0|Mux21~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[10]\, datapath_0|register_file_0|reg_x26|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~0\, datapath_0|register_file_0|output_1_mux|Mux21~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~1\, datapath_0|register_file_0|output_1_mux|Mux21~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~2\, datapath_0|register_file_0|output_1_mux|Mux21~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~3\, datapath_0|register_file_0|output_1_mux|Mux21~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~4\, datapath_0|register_file_0|output_1_mux|Mux21~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~5\, datapath_0|register_file_0|output_1_mux|Mux21~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~6\, datapath_0|register_file_0|output_1_mux|Mux21~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~7\, datapath_0|register_file_0|output_1_mux|Mux21~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~8\, datapath_0|register_file_0|output_1_mux|Mux21~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~9\, datapath_0|register_file_0|output_1_mux|Mux21~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~10\, datapath_0|register_file_0|output_1_mux|Mux21~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~11\, datapath_0|register_file_0|output_1_mux|Mux21~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~12\, datapath_0|register_file_0|output_1_mux|Mux21~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~13\, datapath_0|register_file_0|output_1_mux|Mux21~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~14\, datapath_0|register_file_0|output_1_mux|Mux21~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~15\, datapath_0|register_file_0|output_1_mux|Mux21~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~16\, datapath_0|register_file_0|output_1_mux|Mux21~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~17\, datapath_0|register_file_0|output_1_mux|Mux21~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~18\, datapath_0|register_file_0|output_1_mux|Mux21~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux21~19\, datapath_0|register_file_0|output_1_mux|Mux21~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[10]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[10], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[10]~10\, datapath_0|JTU_0|internal_mux|output_0[10]~10, microcontroller, 1
instance = comp, \datapath_0|Add0~26\, datapath_0|Add0~26, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a194\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a194, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a162\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a162, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a130\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a130, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~10\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~10, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a226\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a226, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~11\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~11, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a34\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a34, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a66\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a66, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a2\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a2, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~12\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~12, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a98\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a98, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~13\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~13, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~14\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~14, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[2]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[2], microcontroller, 1
instance = comp, \controller_0|Mux27~0\, controller_0|Mux27~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.LUI_1810\, controller_0|decoded_cluster.LUI_1810, microcontroller, 1
instance = comp, \controller_0|WideOr29~0\, controller_0|WideOr29~0, microcontroller, 1
instance = comp, \controller_0|internal_mux1_sel\, controller_0|internal_mux1_sel, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|mux1_sel_reg|reg_out\, datapath_0|ID_EX_PLR|mux1_sel_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Add0~30\, datapath_0|ALU_0|Add0~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[14]~11\, datapath_0|ALU_0|result_temp[14]~11, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[14]~14\, datapath_0|mux_1|output_0[14]~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~77\, datapath_0|ALU_0|ShiftRight0~77, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~14\, datapath_0|ALU_0|ALU_output~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~0\, datapath_0|ALU_0|Mux84~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~1\, datapath_0|ALU_0|Mux84~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~2\, datapath_0|ALU_0|Mux84~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~3\, datapath_0|ALU_0|Mux84~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~4\, datapath_0|ALU_0|Mux84~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux84~5\, datapath_0|ALU_0|Mux84~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[14]\, datapath_0|ALU_0|ALU_output[14], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[14]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[14], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~44\, datapath_0|datamem_module_0|datamem_0|RAM~44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~45\, datapath_0|datamem_module_0|datamem_0|RAM~45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~46\, datapath_0|datamem_module_0|datamem_0|RAM~46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~47\, datapath_0|datamem_module_0|datamem_0|RAM~47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~48\, datapath_0|datamem_module_0|datamem_0|RAM~48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~50\, datapath_0|datamem_module_0|datamem_0|RAM~50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~49\, datapath_0|datamem_module_0|datamem_0|RAM~49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~28\, datapath_0|datamem_module_0|datamem_0|RAM~28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~0\, datapath_0|datamem_module_0|Mux8~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~4\, datapath_0|datamem_module_0|Mux8~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~5\, datapath_0|datamem_module_0|Mux8~5, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[9]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux47~0\, datapath_0|datamem_module_0|Mux47~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[1]\, datapath_0|datamem_module_0|memory_input_1[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~28\, datapath_0|datamem_module_0|datamem_1|RAM~28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a9\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a1\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~42\, datapath_0|datamem_module_0|datamem_1|RAM~42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a25\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a25, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a17\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a17, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~43\, datapath_0|datamem_module_0|datamem_1|RAM~43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~44\, datapath_0|datamem_module_0|datamem_1|RAM~44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a41\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a33\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~45\, datapath_0|datamem_module_0|datamem_1|RAM~45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a57\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a49\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~46\, datapath_0|datamem_module_0|datamem_1|RAM~46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~47\, datapath_0|datamem_module_0|datamem_1|RAM~47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~48\, datapath_0|datamem_module_0|datamem_1|RAM~48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~0\, datapath_0|datamem_module_0|Mux1~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~1\, datapath_0|datamem_module_0|Mux1~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|internal_load[0]\, datapath_0|datamem_module_0|internal_load[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode595w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a9\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode578w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a1\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[0]\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[1]\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~2\, datapath_0|datamem_module_0|Mux1~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode615w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a25\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a25, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode605w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a17\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a17, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~3\, datapath_0|datamem_module_0|Mux1~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[2]\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|address_reg_b[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~4\, datapath_0|datamem_module_0|Mux1~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode635w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a41\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode625w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a33\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~5\, datapath_0|datamem_module_0|Mux1~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode655w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a57\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|decode2|w_anode645w[3]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a49\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~6\, datapath_0|datamem_module_0|Mux1~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~7\, datapath_0|datamem_module_0|Mux1~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux1~8\, datapath_0|datamem_module_0|Mux1~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[1]\, datapath_0|datamem_module_0|output_data[1], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[1]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~0\, datapath_0|register_file_0|output_2_mux|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~1\, datapath_0|register_file_0|output_2_mux|Mux30~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~2\, datapath_0|register_file_0|output_2_mux|Mux30~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~3\, datapath_0|register_file_0|output_2_mux|Mux30~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~4\, datapath_0|register_file_0|output_2_mux|Mux30~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~5\, datapath_0|register_file_0|output_2_mux|Mux30~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~6\, datapath_0|register_file_0|output_2_mux|Mux30~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~7\, datapath_0|register_file_0|output_2_mux|Mux30~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~8\, datapath_0|register_file_0|output_2_mux|Mux30~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~9\, datapath_0|register_file_0|output_2_mux|Mux30~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~10\, datapath_0|register_file_0|output_2_mux|Mux30~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~11\, datapath_0|register_file_0|output_2_mux|Mux30~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~12\, datapath_0|register_file_0|output_2_mux|Mux30~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~13\, datapath_0|register_file_0|output_2_mux|Mux30~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~14\, datapath_0|register_file_0|output_2_mux|Mux30~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~15\, datapath_0|register_file_0|output_2_mux|Mux30~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~16\, datapath_0|register_file_0|output_2_mux|Mux30~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~17\, datapath_0|register_file_0|output_2_mux|Mux30~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~18\, datapath_0|register_file_0|output_2_mux|Mux30~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux30~19\, datapath_0|register_file_0|output_2_mux|Mux30~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[1]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux30~0\, datapath_0|forward_mux_1|Mux30~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux30~1\, datapath_0|forward_mux_1|Mux30~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux30~2\, datapath_0|forward_mux_1|Mux30~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[25]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[25], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux63~0\, datapath_0|datamem_module_0|Mux63~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux63~1\, datapath_0|datamem_module_0|Mux63~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[1]\, datapath_0|datamem_module_0|memory_input_3[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~28\, datapath_0|datamem_module_0|datamem_3|RAM~28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a9\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a1\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~44\, datapath_0|datamem_module_0|datamem_3|RAM~44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a25\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a25, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a17\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a17, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~45\, datapath_0|datamem_module_0|datamem_3|RAM~45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~46\, datapath_0|datamem_module_0|datamem_3|RAM~46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a41\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a33\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~47\, datapath_0|datamem_module_0|datamem_3|RAM~47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a57\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a57, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a49\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~48\, datapath_0|datamem_module_0|datamem_3|RAM~48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~49\, datapath_0|datamem_module_0|datamem_3|RAM~49, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~50\, datapath_0|datamem_module_0|datamem_3|RAM~50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux13~0\, datapath_0|datamem_module_0|Mux13~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux13~1\, datapath_0|datamem_module_0|Mux13~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[9]\, datapath_0|datamem_module_0|output_data[9], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[9]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux22~0\, datapath_0|mux_0|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux22~1\, datapath_0|mux_0|Mux22~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[9]\, datapath_0|register_file_0|reg_x10|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~0\, datapath_0|register_file_0|output_1_mux|Mux22~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~1\, datapath_0|register_file_0|output_1_mux|Mux22~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~2\, datapath_0|register_file_0|output_1_mux|Mux22~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~3\, datapath_0|register_file_0|output_1_mux|Mux22~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~4\, datapath_0|register_file_0|output_1_mux|Mux22~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~5\, datapath_0|register_file_0|output_1_mux|Mux22~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~6\, datapath_0|register_file_0|output_1_mux|Mux22~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~7\, datapath_0|register_file_0|output_1_mux|Mux22~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~8\, datapath_0|register_file_0|output_1_mux|Mux22~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~9\, datapath_0|register_file_0|output_1_mux|Mux22~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~10\, datapath_0|register_file_0|output_1_mux|Mux22~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~11\, datapath_0|register_file_0|output_1_mux|Mux22~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~12\, datapath_0|register_file_0|output_1_mux|Mux22~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~13\, datapath_0|register_file_0|output_1_mux|Mux22~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~14\, datapath_0|register_file_0|output_1_mux|Mux22~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~15\, datapath_0|register_file_0|output_1_mux|Mux22~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~16\, datapath_0|register_file_0|output_1_mux|Mux22~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~17\, datapath_0|register_file_0|output_1_mux|Mux22~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~18\, datapath_0|register_file_0|output_1_mux|Mux22~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux22~19\, datapath_0|register_file_0|output_1_mux|Mux22~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[9]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[9], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[9]~9\, datapath_0|JTU_0|internal_mux|output_0[9]~9, microcontroller, 1
instance = comp, \datapath_0|Add0~23\, datapath_0|Add0~23, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a198\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a198, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a166\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a166, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a134\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a134, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~30\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~30, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a230\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a230, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~31\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~31, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a38\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a38, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a70\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a70, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a6\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a6, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~32\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~32, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a102\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a102, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~33\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~33, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~34\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~34, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[6]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[6], microcontroller, 1
instance = comp, \controller_0|Mux25~0\, controller_0|Mux25~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.JALR_1876\, controller_0|decoded_cluster.JALR_1876, microcontroller, 1
instance = comp, \controller_0|Selector76~0\, controller_0|Selector76~0, microcontroller, 1
instance = comp, \controller_0|WideNor1~0\, controller_0|WideNor1~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_write\, controller_0|internal_reg_file_write, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|reg_file_write_reg|reg_out\, datapath_0|ID_EX_PLR|reg_file_write_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|reg_file_write_reg|reg_out\, datapath_0|EX_MEM_PLR|reg_file_write_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|reg_file_write_reg|reg_out\, datapath_0|MEM_WB_PLR|reg_file_write_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~1\, datapath_0|FU_0|forward_1~1, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~2\, datapath_0|FU_0|forward_1~2, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~3\, datapath_0|FU_0|forward_1~3, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~4\, datapath_0|FU_0|forward_1~4, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux0~0\, datapath_0|forward_mux_1|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[0]\, datapath_0|register_file_0|reg_x22|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[0]\, datapath_0|register_file_0|reg_x18|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~0\, datapath_0|register_file_0|output_2_mux|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[0]\, datapath_0|register_file_0|reg_x30|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~1\, datapath_0|register_file_0|output_2_mux|Mux31~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[0]\, datapath_0|register_file_0|reg_x21|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[0]\, datapath_0|register_file_0|reg_x25|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[0]\, datapath_0|register_file_0|reg_x17|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~2\, datapath_0|register_file_0|output_2_mux|Mux31~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[0]\, datapath_0|register_file_0|reg_x29|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~3\, datapath_0|register_file_0|output_2_mux|Mux31~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[0]\, datapath_0|register_file_0|reg_x24|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[0]\, datapath_0|register_file_0|reg_x20|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[0]\, datapath_0|register_file_0|reg_x16|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~4\, datapath_0|register_file_0|output_2_mux|Mux31~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[0]\, datapath_0|register_file_0|reg_x28|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~5\, datapath_0|register_file_0|output_2_mux|Mux31~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~6\, datapath_0|register_file_0|output_2_mux|Mux31~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[0]\, datapath_0|register_file_0|reg_x27|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[0]\, datapath_0|register_file_0|reg_x23|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[0]\, datapath_0|register_file_0|reg_x19|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~7\, datapath_0|register_file_0|output_2_mux|Mux31~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[0]\, datapath_0|register_file_0|reg_x31|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~8\, datapath_0|register_file_0|output_2_mux|Mux31~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~9\, datapath_0|register_file_0|output_2_mux|Mux31~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[0]\, datapath_0|register_file_0|reg_x9|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[0]\, datapath_0|register_file_0|reg_x10|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[0]\, datapath_0|register_file_0|reg_x8|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~10\, datapath_0|register_file_0|output_2_mux|Mux31~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[0]\, datapath_0|register_file_0|reg_x11|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~11\, datapath_0|register_file_0|output_2_mux|Mux31~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[0]\, datapath_0|register_file_0|reg_x2|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[0]\, datapath_0|register_file_0|reg_x3|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[0]\, datapath_0|register_file_0|reg_x1|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[0]\, datapath_0|register_file_0|reg_x6|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[0]\, datapath_0|register_file_0|reg_x5|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[0]\, datapath_0|register_file_0|reg_x4|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~12\, datapath_0|register_file_0|output_2_mux|Mux31~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[0]\, datapath_0|register_file_0|reg_x7|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~13\, datapath_0|register_file_0|output_2_mux|Mux31~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~14\, datapath_0|register_file_0|output_2_mux|Mux31~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~15\, datapath_0|register_file_0|output_2_mux|Mux31~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~16\, datapath_0|register_file_0|output_2_mux|Mux31~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[0]\, datapath_0|register_file_0|reg_x14|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[0]\, datapath_0|register_file_0|reg_x13|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[0]\, datapath_0|register_file_0|reg_x12|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~17\, datapath_0|register_file_0|output_2_mux|Mux31~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[0]\, datapath_0|register_file_0|reg_x15|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~18\, datapath_0|register_file_0|output_2_mux|Mux31~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux31~19\, datapath_0|register_file_0|output_2_mux|Mux31~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[0]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux31~0\, datapath_0|forward_mux_1|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux31~1\, datapath_0|forward_mux_1|Mux31~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux31~2\, datapath_0|forward_mux_1|Mux31~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[24]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[24], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[8]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux62~2\, datapath_0|datamem_module_0|Mux62~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux62~3\, datapath_0|datamem_module_0|Mux62~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[0]\, datapath_0|datamem_module_0|memory_input_3[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~27\, datapath_0|datamem_module_0|datamem_3|RAM~27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a8\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a0\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~37\, datapath_0|datamem_module_0|datamem_3|RAM~37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a24\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a24, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a16\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a16, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~38\, datapath_0|datamem_module_0|datamem_3|RAM~38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~39\, datapath_0|datamem_module_0|datamem_3|RAM~39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a40\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a32\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~40\, datapath_0|datamem_module_0|datamem_3|RAM~40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a56\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a48\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~41\, datapath_0|datamem_module_0|datamem_3|RAM~41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~42\, datapath_0|datamem_module_0|datamem_3|RAM~42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~43\, datapath_0|datamem_module_0|datamem_3|RAM~43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux12~1\, datapath_0|datamem_module_0|Mux12~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux46~1\, datapath_0|datamem_module_0|Mux46~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[0]\, datapath_0|datamem_module_0|memory_input_1[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~27\, datapath_0|datamem_module_0|datamem_1|RAM~27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a8\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a0\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~35\, datapath_0|datamem_module_0|datamem_1|RAM~35, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a24\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a24, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a16\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a16, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~36\, datapath_0|datamem_module_0|datamem_1|RAM~36, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~37\, datapath_0|datamem_module_0|datamem_1|RAM~37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a56\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a48\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~38\, datapath_0|datamem_module_0|datamem_1|RAM~38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a40\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a32\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~39\, datapath_0|datamem_module_0|datamem_1|RAM~39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~40\, datapath_0|datamem_module_0|datamem_1|RAM~40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~41\, datapath_0|datamem_module_0|datamem_1|RAM~41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux12~2\, datapath_0|datamem_module_0|Mux12~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[8]\, datapath_0|datamem_module_0|output_data[8], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[8]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux23~0\, datapath_0|mux_0|Mux23~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux23~1\, datapath_0|mux_0|Mux23~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[8]\, datapath_0|register_file_0|reg_x26|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~5\, datapath_0|register_file_0|output_1_mux|Mux23~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~6\, datapath_0|register_file_0|output_1_mux|Mux23~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~7\, datapath_0|register_file_0|output_1_mux|Mux23~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~8\, datapath_0|register_file_0|output_1_mux|Mux23~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~9\, datapath_0|register_file_0|output_1_mux|Mux23~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~10\, datapath_0|register_file_0|output_1_mux|Mux23~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~11\, datapath_0|register_file_0|output_1_mux|Mux23~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~12\, datapath_0|register_file_0|output_1_mux|Mux23~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~13\, datapath_0|register_file_0|output_1_mux|Mux23~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~14\, datapath_0|register_file_0|output_1_mux|Mux23~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~15\, datapath_0|register_file_0|output_1_mux|Mux23~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~16\, datapath_0|register_file_0|output_1_mux|Mux23~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~17\, datapath_0|register_file_0|output_1_mux|Mux23~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~18\, datapath_0|register_file_0|output_1_mux|Mux23~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~19\, datapath_0|register_file_0|output_1_mux|Mux23~19, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~20\, datapath_0|register_file_0|output_1_mux|Mux23~20, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~21\, datapath_0|register_file_0|output_1_mux|Mux23~21, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~22\, datapath_0|register_file_0|output_1_mux|Mux23~22, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~23\, datapath_0|register_file_0|output_1_mux|Mux23~23, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux23~24\, datapath_0|register_file_0|output_1_mux|Mux23~24, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[8]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[8], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[8]~8\, datapath_0|JTU_0|internal_mux|output_0[8]~8, microcontroller, 1
instance = comp, \datapath_0|Add0~20\, datapath_0|Add0~20, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a200\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a200, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a168\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a168, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a136\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a136, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~40\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~40, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a232\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a232, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~41\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~41, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a40\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a40, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a72\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a72, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a8\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a8, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~42\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~42, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a104\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a104, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~43\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~43, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~44\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~44, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[8]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[8], microcontroller, 1
instance = comp, \controller_0|Selector31~0\, controller_0|Selector31~0, microcontroller, 1
instance = comp, \controller_0|Selector31~1\, controller_0|Selector31~1, microcontroller, 1
instance = comp, \controller_0|Selector31~2\, controller_0|Selector31~2, microcontroller, 1
instance = comp, \controller_0|internal_immediate[3]\, controller_0|internal_immediate[3], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[3]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~47\, datapath_0|ALU_0|ShiftRight1~47, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~48\, datapath_0|ALU_0|ShiftRight1~48, microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[7]~7\, datapath_0|mux_1|output_0[7]~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~7\, datapath_0|ALU_0|ALU_output~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~0\, datapath_0|ALU_0|Mux91~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~1\, datapath_0|ALU_0|Mux91~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~2\, datapath_0|ALU_0|Mux91~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~3\, datapath_0|ALU_0|Mux91~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~4\, datapath_0|ALU_0|Mux91~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~5\, datapath_0|ALU_0|Mux91~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux91~6\, datapath_0|ALU_0|Mux91~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[7]\, datapath_0|ALU_0|ALU_output[7], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[7]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[7]\, datapath_0|MEM_WB_PLR|ALU_output_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux24~0\, datapath_0|mux_0|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux24~1\, datapath_0|mux_0|Mux24~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[7]\, datapath_0|register_file_0|reg_x10|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[7]\, datapath_0|register_file_0|reg_x9|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[7]\, datapath_0|register_file_0|reg_x8|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~0\, datapath_0|register_file_0|output_1_mux|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[7]\, datapath_0|register_file_0|reg_x11|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~1\, datapath_0|register_file_0|output_1_mux|Mux24~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[7]\, datapath_0|register_file_0|reg_x21|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[7]\, datapath_0|register_file_0|reg_x25|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[7]\, datapath_0|register_file_0|reg_x17|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~2\, datapath_0|register_file_0|output_1_mux|Mux24~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[7]\, datapath_0|register_file_0|reg_x29|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~3\, datapath_0|register_file_0|output_1_mux|Mux24~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[7]\, datapath_0|register_file_0|reg_x26|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[7]\, datapath_0|register_file_0|reg_x22|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[7]\, datapath_0|register_file_0|reg_x18|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~4\, datapath_0|register_file_0|output_1_mux|Mux24~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[7]\, datapath_0|register_file_0|reg_x30|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~5\, datapath_0|register_file_0|output_1_mux|Mux24~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[7]\, datapath_0|register_file_0|reg_x20|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[7]\, datapath_0|register_file_0|reg_x24|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[7]\, datapath_0|register_file_0|reg_x16|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~6\, datapath_0|register_file_0|output_1_mux|Mux24~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[7]\, datapath_0|register_file_0|reg_x28|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~7\, datapath_0|register_file_0|output_1_mux|Mux24~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~8\, datapath_0|register_file_0|output_1_mux|Mux24~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[7]\, datapath_0|register_file_0|reg_x27|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[7]\, datapath_0|register_file_0|reg_x23|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[7]\, datapath_0|register_file_0|reg_x19|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~9\, datapath_0|register_file_0|output_1_mux|Mux24~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[7]\, datapath_0|register_file_0|reg_x31|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~10\, datapath_0|register_file_0|output_1_mux|Mux24~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~11\, datapath_0|register_file_0|output_1_mux|Mux24~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[7]\, datapath_0|register_file_0|reg_x2|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[7]\, datapath_0|register_file_0|reg_x3|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[7]\, datapath_0|register_file_0|reg_x1|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[7]\, datapath_0|register_file_0|reg_x5|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[7]\, datapath_0|register_file_0|reg_x6|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[7]\, datapath_0|register_file_0|reg_x4|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~12\, datapath_0|register_file_0|output_1_mux|Mux24~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[7]\, datapath_0|register_file_0|reg_x7|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~13\, datapath_0|register_file_0|output_1_mux|Mux24~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~14\, datapath_0|register_file_0|output_1_mux|Mux24~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~15\, datapath_0|register_file_0|output_1_mux|Mux24~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~16\, datapath_0|register_file_0|output_1_mux|Mux24~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[7]\, datapath_0|register_file_0|reg_x13|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[7]\, datapath_0|register_file_0|reg_x14|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[7]\, datapath_0|register_file_0|reg_x12|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~17\, datapath_0|register_file_0|output_1_mux|Mux24~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[7]\, datapath_0|register_file_0|reg_x15|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~18\, datapath_0|register_file_0|output_1_mux|Mux24~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux24~19\, datapath_0|register_file_0|output_1_mux|Mux24~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[7]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[7]~7\, datapath_0|JTU_0|internal_mux|output_0[7]~7, microcontroller, 1
instance = comp, \datapath_0|Add0~17\, datapath_0|Add0~17, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a216\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a216, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a184\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a184, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a152\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a152, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~120\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~120, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a248\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a248, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~121\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~121, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a56\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a56, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a88\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a88, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a24\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a24, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~122\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~122, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a120\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a120, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~123\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~123, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~124\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~124, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[24]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[24], microcontroller, 1
instance = comp, \controller_0|Selector90~0\, controller_0|Selector90~0, microcontroller, 1
instance = comp, \controller_0|internal_reg_file_read_address_1[4]\, controller_0|internal_reg_file_read_address_1[4], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[4]\, datapath_0|ID_EX_PLR|register_file_read_address_1_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal9~0\, datapath_0|FU_0|Equal9~0, microcontroller, 1
instance = comp, \datapath_0|FU_0|Equal9~1\, datapath_0|FU_0|Equal9~1, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_1~5\, datapath_0|FU_0|forward_1~5, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_1_control[1]~0\, datapath_0|FU_0|forward_mux_1_control[1]~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[6]\, datapath_0|register_file_0|reg_x22|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[6]\, datapath_0|register_file_0|reg_x18|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~0\, datapath_0|register_file_0|output_2_mux|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[6]\, datapath_0|register_file_0|reg_x30|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~1\, datapath_0|register_file_0|output_2_mux|Mux25~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[6]\, datapath_0|register_file_0|reg_x21|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[6]\, datapath_0|register_file_0|reg_x25|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[6]\, datapath_0|register_file_0|reg_x17|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~2\, datapath_0|register_file_0|output_2_mux|Mux25~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[6]\, datapath_0|register_file_0|reg_x29|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~3\, datapath_0|register_file_0|output_2_mux|Mux25~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[6]\, datapath_0|register_file_0|reg_x20|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[6]\, datapath_0|register_file_0|reg_x24|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[6]\, datapath_0|register_file_0|reg_x16|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~4\, datapath_0|register_file_0|output_2_mux|Mux25~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[6]\, datapath_0|register_file_0|reg_x28|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~5\, datapath_0|register_file_0|output_2_mux|Mux25~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~6\, datapath_0|register_file_0|output_2_mux|Mux25~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[6]\, datapath_0|register_file_0|reg_x27|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[6]\, datapath_0|register_file_0|reg_x23|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[6]\, datapath_0|register_file_0|reg_x19|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~7\, datapath_0|register_file_0|output_2_mux|Mux25~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[6]\, datapath_0|register_file_0|reg_x31|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~8\, datapath_0|register_file_0|output_2_mux|Mux25~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~9\, datapath_0|register_file_0|output_2_mux|Mux25~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[6]\, datapath_0|register_file_0|reg_x9|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[6]\, datapath_0|register_file_0|reg_x10|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[6]\, datapath_0|register_file_0|reg_x8|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~10\, datapath_0|register_file_0|output_2_mux|Mux25~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[6]\, datapath_0|register_file_0|reg_x11|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~11\, datapath_0|register_file_0|output_2_mux|Mux25~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[6]\, datapath_0|register_file_0|reg_x2|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[6]\, datapath_0|register_file_0|reg_x3|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[6]\, datapath_0|register_file_0|reg_x1|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[6]\, datapath_0|register_file_0|reg_x6|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[6]\, datapath_0|register_file_0|reg_x5|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[6]\, datapath_0|register_file_0|reg_x4|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~12\, datapath_0|register_file_0|output_2_mux|Mux25~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[6]\, datapath_0|register_file_0|reg_x7|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~13\, datapath_0|register_file_0|output_2_mux|Mux25~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~14\, datapath_0|register_file_0|output_2_mux|Mux25~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~15\, datapath_0|register_file_0|output_2_mux|Mux25~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~16\, datapath_0|register_file_0|output_2_mux|Mux25~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[6]\, datapath_0|register_file_0|reg_x14|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[6]\, datapath_0|register_file_0|reg_x13|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[6]\, datapath_0|register_file_0|reg_x12|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~17\, datapath_0|register_file_0|output_2_mux|Mux25~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[6]\, datapath_0|register_file_0|reg_x15|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~18\, datapath_0|register_file_0|output_2_mux|Mux25~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux25~19\, datapath_0|register_file_0|output_2_mux|Mux25~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[6]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux25~0\, datapath_0|forward_mux_1|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux25~1\, datapath_0|forward_mux_1|Mux25~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux25~2\, datapath_0|forward_mux_1|Mux25~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[6]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux52~0\, datapath_0|datamem_module_0|Mux52~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[6]\, datapath_0|datamem_module_0|memory_input_1[6], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~33\, datapath_0|datamem_module_0|datamem_1|RAM~33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a14\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a14, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a6\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~77\, datapath_0|datamem_module_0|datamem_1|RAM~77, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a30\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a22\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a22, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~78\, datapath_0|datamem_module_0|datamem_1|RAM~78, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~79\, datapath_0|datamem_module_0|datamem_1|RAM~79, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a46\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a38\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~80\, datapath_0|datamem_module_0|datamem_1|RAM~80, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a62\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a54\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~81\, datapath_0|datamem_module_0|datamem_1|RAM~81, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~82\, datapath_0|datamem_module_0|datamem_1|RAM~82, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~83\, datapath_0|datamem_module_0|datamem_1|RAM~83, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux44~0\, datapath_0|datamem_module_0|Mux44~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[6]\, datapath_0|datamem_module_0|memory_input_0[6], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~33\, datapath_0|datamem_module_0|datamem_0|RAM~33, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~1\, datapath_0|datamem_module_0|Mux10~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~2\, datapath_0|datamem_module_0|Mux10~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a14\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a14, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a6\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~3\, datapath_0|datamem_module_0|Mux10~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a30\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a22\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a22, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~4\, datapath_0|datamem_module_0|Mux10~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~5\, datapath_0|datamem_module_0|Mux10~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a46\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a46, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a38\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~6\, datapath_0|datamem_module_0|Mux10~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a62\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a62, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a54\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a54, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~7\, datapath_0|datamem_module_0|Mux10~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~8\, datapath_0|datamem_module_0|Mux10~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~9\, datapath_0|datamem_module_0|Mux10~9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[6]\, datapath_0|datamem_module_0|output_data[6], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[6]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux25~0\, datapath_0|mux_0|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux25~1\, datapath_0|mux_0|Mux25~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[6]\, datapath_0|register_file_0|reg_x26|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~0\, datapath_0|register_file_0|output_1_mux|Mux25~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~1\, datapath_0|register_file_0|output_1_mux|Mux25~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~2\, datapath_0|register_file_0|output_1_mux|Mux25~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~3\, datapath_0|register_file_0|output_1_mux|Mux25~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~4\, datapath_0|register_file_0|output_1_mux|Mux25~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~5\, datapath_0|register_file_0|output_1_mux|Mux25~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~6\, datapath_0|register_file_0|output_1_mux|Mux25~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~7\, datapath_0|register_file_0|output_1_mux|Mux25~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~8\, datapath_0|register_file_0|output_1_mux|Mux25~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~9\, datapath_0|register_file_0|output_1_mux|Mux25~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~10\, datapath_0|register_file_0|output_1_mux|Mux25~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~11\, datapath_0|register_file_0|output_1_mux|Mux25~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~12\, datapath_0|register_file_0|output_1_mux|Mux25~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~13\, datapath_0|register_file_0|output_1_mux|Mux25~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~14\, datapath_0|register_file_0|output_1_mux|Mux25~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~15\, datapath_0|register_file_0|output_1_mux|Mux25~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~16\, datapath_0|register_file_0|output_1_mux|Mux25~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~17\, datapath_0|register_file_0|output_1_mux|Mux25~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~18\, datapath_0|register_file_0|output_1_mux|Mux25~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux25~19\, datapath_0|register_file_0|output_1_mux|Mux25~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[6]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[6], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[6]~6\, datapath_0|JTU_0|internal_mux|output_0[6]~6, microcontroller, 1
instance = comp, \datapath_0|Add0~14\, datapath_0|Add0~14, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a196\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a196, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a164\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a164, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a132\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a132, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~20\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~20, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a228\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a228, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~21\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~21, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a36\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a36, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a68\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a68, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a4\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a4, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~22\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~22, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a100\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a100, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~23\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~23, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~24\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~24, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[4]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[4], microcontroller, 1
instance = comp, \controller_0|Mux23~5\, controller_0|Mux23~5, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.STORE_1912\, controller_0|decoded_cluster.STORE_1912, microcontroller, 1
instance = comp, \controller_0|internal_datamem_write\, controller_0|internal_datamem_write, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|datamem_write_reg|reg_out\, datapath_0|ID_EX_PLR|datamem_write_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|datamem_write_reg|reg_out\, datapath_0|EX_MEM_PLR|datamem_write_reg|reg_out, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[15]\, datapath_0|datamem_module_0|output_data[15], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[15]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~0\, datapath_0|register_file_0|output_2_mux|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~1\, datapath_0|register_file_0|output_2_mux|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~2\, datapath_0|register_file_0|output_2_mux|Mux16~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~3\, datapath_0|register_file_0|output_2_mux|Mux16~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~4\, datapath_0|register_file_0|output_2_mux|Mux16~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~5\, datapath_0|register_file_0|output_2_mux|Mux16~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~6\, datapath_0|register_file_0|output_2_mux|Mux16~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~7\, datapath_0|register_file_0|output_2_mux|Mux16~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~8\, datapath_0|register_file_0|output_2_mux|Mux16~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~9\, datapath_0|register_file_0|output_2_mux|Mux16~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~10\, datapath_0|register_file_0|output_2_mux|Mux16~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~11\, datapath_0|register_file_0|output_2_mux|Mux16~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~12\, datapath_0|register_file_0|output_2_mux|Mux16~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~13\, datapath_0|register_file_0|output_2_mux|Mux16~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~14\, datapath_0|register_file_0|output_2_mux|Mux16~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~15\, datapath_0|register_file_0|output_2_mux|Mux16~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~16\, datapath_0|register_file_0|output_2_mux|Mux16~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~17\, datapath_0|register_file_0|output_2_mux|Mux16~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~18\, datapath_0|register_file_0|output_2_mux|Mux16~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux16~19\, datapath_0|register_file_0|output_2_mux|Mux16~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[15]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux16~0\, datapath_0|forward_mux_1|Mux16~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux16~1\, datapath_0|forward_mux_1|Mux16~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux16~2\, datapath_0|forward_mux_1|Mux16~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[15]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[15], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux53~4\, datapath_0|datamem_module_0|Mux53~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[7]\, datapath_0|datamem_module_0|memory_input_1[7], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~34\, datapath_0|datamem_module_0|datamem_1|RAM~34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a15\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a15, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a7\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~84\, datapath_0|datamem_module_0|datamem_1|RAM~84, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a31\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a23\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a23, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~85\, datapath_0|datamem_module_0|datamem_1|RAM~85, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~86\, datapath_0|datamem_module_0|datamem_1|RAM~86, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a47\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a39\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~87\, datapath_0|datamem_module_0|datamem_1|RAM~87, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a63\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a55\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~88\, datapath_0|datamem_module_0|datamem_1|RAM~88, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~89\, datapath_0|datamem_module_0|datamem_1|RAM~89, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~90\, datapath_0|datamem_module_0|datamem_1|RAM~90, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux45~0\, datapath_0|datamem_module_0|Mux45~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[7]\, datapath_0|datamem_module_0|memory_input_0[7], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~34\, datapath_0|datamem_module_0|datamem_0|RAM~34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a15\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a15, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a7\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~37\, datapath_0|datamem_module_0|datamem_0|RAM~37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a31\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a23\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a23, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~38\, datapath_0|datamem_module_0|datamem_0|RAM~38, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~39\, datapath_0|datamem_module_0|datamem_0|RAM~39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a47\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a39\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~40\, datapath_0|datamem_module_0|datamem_0|RAM~40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a63\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a55\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~41\, datapath_0|datamem_module_0|datamem_0|RAM~41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~42\, datapath_0|datamem_module_0|datamem_0|RAM~42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~43\, datapath_0|datamem_module_0|datamem_0|RAM~43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[31]~1\, datapath_0|datamem_module_0|output_data[31]~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[31]~2\, datapath_0|datamem_module_0|output_data[31]~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux11~2\, datapath_0|datamem_module_0|Mux11~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux11~3\, datapath_0|datamem_module_0|Mux11~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux11~4\, datapath_0|datamem_module_0|Mux11~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[7]\, datapath_0|datamem_module_0|output_data[7], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[7]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~0\, datapath_0|register_file_0|output_2_mux|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~1\, datapath_0|register_file_0|output_2_mux|Mux24~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~2\, datapath_0|register_file_0|output_2_mux|Mux24~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~3\, datapath_0|register_file_0|output_2_mux|Mux24~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~4\, datapath_0|register_file_0|output_2_mux|Mux24~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~5\, datapath_0|register_file_0|output_2_mux|Mux24~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~6\, datapath_0|register_file_0|output_2_mux|Mux24~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~7\, datapath_0|register_file_0|output_2_mux|Mux24~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~8\, datapath_0|register_file_0|output_2_mux|Mux24~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~9\, datapath_0|register_file_0|output_2_mux|Mux24~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~10\, datapath_0|register_file_0|output_2_mux|Mux24~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~11\, datapath_0|register_file_0|output_2_mux|Mux24~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~12\, datapath_0|register_file_0|output_2_mux|Mux24~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~13\, datapath_0|register_file_0|output_2_mux|Mux24~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~14\, datapath_0|register_file_0|output_2_mux|Mux24~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~15\, datapath_0|register_file_0|output_2_mux|Mux24~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~16\, datapath_0|register_file_0|output_2_mux|Mux24~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~17\, datapath_0|register_file_0|output_2_mux|Mux24~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~18\, datapath_0|register_file_0|output_2_mux|Mux24~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux24~19\, datapath_0|register_file_0|output_2_mux|Mux24~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[7]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux24~0\, datapath_0|forward_mux_1|Mux24~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux24~1\, datapath_0|forward_mux_1|Mux24~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux24~2\, datapath_0|forward_mux_1|Mux24~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[7]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[7], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[31]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux69~1\, datapath_0|datamem_module_0|Mux69~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux69~2\, datapath_0|datamem_module_0|Mux69~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_3[7]\, datapath_0|datamem_module_0|memory_input_3[7], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~34\, datapath_0|datamem_module_0|datamem_3|RAM~34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a15\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a15, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a7\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~86\, datapath_0|datamem_module_0|datamem_3|RAM~86, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a31\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a23\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a23, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~87\, datapath_0|datamem_module_0|datamem_3|RAM~87, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~88\, datapath_0|datamem_module_0|datamem_3|RAM~88, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a47\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a47, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a39\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~89\, datapath_0|datamem_module_0|datamem_3|RAM~89, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a63\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a55\, datapath_0|datamem_module_0|datamem_3|RAM_rtl_0|auto_generated|ram_block1a55, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~90\, datapath_0|datamem_module_0|datamem_3|RAM~90, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~91\, datapath_0|datamem_module_0|datamem_3|RAM~91, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_3|RAM~92\, datapath_0|datamem_module_0|datamem_3|RAM~92, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux35~0\, datapath_0|datamem_module_0|Mux35~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[31]\, datapath_0|datamem_module_0|output_data[31], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[31]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[31], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux0~1\, datapath_0|forward_mux_0|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux0~2\, datapath_0|forward_mux_0|Mux0~2, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux0~3\, datapath_0|forward_mux_0|Mux0~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~43\, datapath_0|ALU_0|ShiftRight1~43, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight1~44\, datapath_0|ALU_0|ShiftRight1~44, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~5\, datapath_0|ALU_0|ALU_output~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~2\, datapath_0|ALU_0|Mux93~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~3\, datapath_0|ALU_0|Mux93~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~4\, datapath_0|ALU_0|Mux93~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~5\, datapath_0|ALU_0|Mux93~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~31\, datapath_0|ALU_0|ShiftRight0~31, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~32\, datapath_0|ALU_0|ShiftRight0~32, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~6\, datapath_0|ALU_0|Mux93~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~7\, datapath_0|ALU_0|Mux93~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux93~8\, datapath_0|ALU_0|Mux93~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[5]\, datapath_0|ALU_0|ALU_output[5], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[5]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x9|internal_value[5]\, datapath_0|register_file_0|reg_x9|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x8|internal_value[5]\, datapath_0|register_file_0|reg_x8|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~0\, datapath_0|register_file_0|output_2_mux|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x11|internal_value[5]\, datapath_0|register_file_0|reg_x11|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~1\, datapath_0|register_file_0|output_2_mux|Mux26~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x21|internal_value[5]\, datapath_0|register_file_0|reg_x21|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x25|internal_value[5]\, datapath_0|register_file_0|reg_x25|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x17|internal_value[5]\, datapath_0|register_file_0|reg_x17|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~2\, datapath_0|register_file_0|output_2_mux|Mux26~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x29|internal_value[5]\, datapath_0|register_file_0|reg_x29|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~3\, datapath_0|register_file_0|output_2_mux|Mux26~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[5]\, datapath_0|register_file_0|reg_x26|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x22|internal_value[5]\, datapath_0|register_file_0|reg_x22|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x18|internal_value[5]\, datapath_0|register_file_0|reg_x18|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~4\, datapath_0|register_file_0|output_2_mux|Mux26~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x30|internal_value[5]\, datapath_0|register_file_0|reg_x30|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~5\, datapath_0|register_file_0|output_2_mux|Mux26~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x20|internal_value[5]\, datapath_0|register_file_0|reg_x20|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x24|internal_value[5]\, datapath_0|register_file_0|reg_x24|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x16|internal_value[5]\, datapath_0|register_file_0|reg_x16|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~6\, datapath_0|register_file_0|output_2_mux|Mux26~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x28|internal_value[5]\, datapath_0|register_file_0|reg_x28|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~7\, datapath_0|register_file_0|output_2_mux|Mux26~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~8\, datapath_0|register_file_0|output_2_mux|Mux26~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x27|internal_value[5]\, datapath_0|register_file_0|reg_x27|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x23|internal_value[5]\, datapath_0|register_file_0|reg_x23|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x19|internal_value[5]\, datapath_0|register_file_0|reg_x19|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~9\, datapath_0|register_file_0|output_2_mux|Mux26~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x31|internal_value[5]\, datapath_0|register_file_0|reg_x31|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~10\, datapath_0|register_file_0|output_2_mux|Mux26~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~11\, datapath_0|register_file_0|output_2_mux|Mux26~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x2|internal_value[5]\, datapath_0|register_file_0|reg_x2|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x3|internal_value[5]\, datapath_0|register_file_0|reg_x3|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x1|internal_value[5]\, datapath_0|register_file_0|reg_x1|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x5|internal_value[5]\, datapath_0|register_file_0|reg_x5|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x6|internal_value[5]\, datapath_0|register_file_0|reg_x6|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x4|internal_value[5]\, datapath_0|register_file_0|reg_x4|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~12\, datapath_0|register_file_0|output_2_mux|Mux26~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x7|internal_value[5]\, datapath_0|register_file_0|reg_x7|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~13\, datapath_0|register_file_0|output_2_mux|Mux26~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~14\, datapath_0|register_file_0|output_2_mux|Mux26~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~15\, datapath_0|register_file_0|output_2_mux|Mux26~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~16\, datapath_0|register_file_0|output_2_mux|Mux26~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x13|internal_value[5]\, datapath_0|register_file_0|reg_x13|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x14|internal_value[5]\, datapath_0|register_file_0|reg_x14|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x12|internal_value[5]\, datapath_0|register_file_0|reg_x12|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~17\, datapath_0|register_file_0|output_2_mux|Mux26~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x15|internal_value[5]\, datapath_0|register_file_0|reg_x15|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~18\, datapath_0|register_file_0|output_2_mux|Mux26~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_2_mux|Mux26~19\, datapath_0|register_file_0|output_2_mux|Mux26~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[5]\, datapath_0|ID_EX_PLR|register_file_output_1_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux26~0\, datapath_0|forward_mux_1|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux26~1\, datapath_0|forward_mux_1|Mux26~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_1|Mux26~2\, datapath_0|forward_mux_1|Mux26~2, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[5]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux43~0\, datapath_0|datamem_module_0|Mux43~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[5]\, datapath_0|datamem_module_0|memory_input_0[5], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~32\, datapath_0|datamem_module_0|datamem_0|RAM~32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~0\, datapath_0|datamem_module_0|Mux9~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~1\, datapath_0|datamem_module_0|Mux9~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a13\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a13, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a5\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~2\, datapath_0|datamem_module_0|Mux9~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a29\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a21\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a21, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~3\, datapath_0|datamem_module_0|Mux9~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~4\, datapath_0|datamem_module_0|Mux9~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a45\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a37\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a37, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~5\, datapath_0|datamem_module_0|Mux9~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a61\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a61, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a53\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a53, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~6\, datapath_0|datamem_module_0|Mux9~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~7\, datapath_0|datamem_module_0|Mux9~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux9~8\, datapath_0|datamem_module_0|Mux9~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[5]\, datapath_0|datamem_module_0|output_data[5], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[5]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux26~0\, datapath_0|mux_0|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux26~1\, datapath_0|mux_0|Mux26~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[5]\, datapath_0|register_file_0|reg_x10|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~0\, datapath_0|register_file_0|output_1_mux|Mux26~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~1\, datapath_0|register_file_0|output_1_mux|Mux26~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~2\, datapath_0|register_file_0|output_1_mux|Mux26~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~3\, datapath_0|register_file_0|output_1_mux|Mux26~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~4\, datapath_0|register_file_0|output_1_mux|Mux26~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~5\, datapath_0|register_file_0|output_1_mux|Mux26~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~6\, datapath_0|register_file_0|output_1_mux|Mux26~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~7\, datapath_0|register_file_0|output_1_mux|Mux26~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~8\, datapath_0|register_file_0|output_1_mux|Mux26~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~9\, datapath_0|register_file_0|output_1_mux|Mux26~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~10\, datapath_0|register_file_0|output_1_mux|Mux26~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~11\, datapath_0|register_file_0|output_1_mux|Mux26~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~12\, datapath_0|register_file_0|output_1_mux|Mux26~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~13\, datapath_0|register_file_0|output_1_mux|Mux26~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~14\, datapath_0|register_file_0|output_1_mux|Mux26~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~15\, datapath_0|register_file_0|output_1_mux|Mux26~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~16\, datapath_0|register_file_0|output_1_mux|Mux26~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~17\, datapath_0|register_file_0|output_1_mux|Mux26~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~18\, datapath_0|register_file_0|output_1_mux|Mux26~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux26~19\, datapath_0|register_file_0|output_1_mux|Mux26~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[5]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[5]~5\, datapath_0|JTU_0|internal_mux|output_0[5]~5, microcontroller, 1
instance = comp, \datapath_0|Add0~11\, datapath_0|Add0~11, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a197\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a197, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a165\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a165, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a133\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a133, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~25\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~25, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a229\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a229, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~26\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~26, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a37\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a37, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a69\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a69, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a5\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a5, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~27\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~27, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a101\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a101, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~28\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~28, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~29\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~29, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[5]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[5], microcontroller, 1
instance = comp, \controller_0|Mux30~0\, controller_0|Mux30~0, microcontroller, 1
instance = comp, \controller_0|decoded_cluster.LOAD_1918\, controller_0|decoded_cluster.LOAD_1918, microcontroller, 1
instance = comp, \controller_0|internal_mux0_sel[0]\, controller_0|internal_mux0_sel[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|mux0_sel_reg|internal_value[0]\, datapath_0|ID_EX_PLR|mux0_sel_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|mux0_sel_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|mux0_sel_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|mux0_sel_reg|internal_value[0]\, datapath_0|MEM_WB_PLR|mux0_sel_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux0~0\, datapath_0|forward_mux_0|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux29~0\, datapath_0|forward_mux_0|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux29~1\, datapath_0|forward_mux_0|Mux29~1, microcontroller, 1
instance = comp, \datapath_0|forward_mux_0|Mux29~2\, datapath_0|forward_mux_0|Mux29~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~29\, datapath_0|ALU_0|ShiftRight0~29, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~30\, datapath_0|ALU_0|ShiftRight0~30, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~33\, datapath_0|ALU_0|ShiftRight0~33, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~37\, datapath_0|ALU_0|ShiftRight0~37, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~46\, datapath_0|ALU_0|ShiftRight0~46, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~0\, datapath_0|ALU_0|Mux97~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~1\, datapath_0|ALU_0|ALU_output~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~1\, datapath_0|ALU_0|Mux97~1, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[1]~4\, datapath_0|ALU_0|result_temp[1]~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~2\, datapath_0|ALU_0|Mux97~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~14\, datapath_0|ALU_0|Mux98~14, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~3\, datapath_0|ALU_0|Mux97~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~4\, datapath_0|ALU_0|Mux97~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~11\, datapath_0|ALU_0|Mux98~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~5\, datapath_0|ALU_0|Mux97~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~6\, datapath_0|ALU_0|Mux97~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux97~7\, datapath_0|ALU_0|Mux97~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[1]\, datapath_0|ALU_0|ALU_output[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux6~0\, datapath_0|datamem_module_0|Mux6~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux53~5\, datapath_0|datamem_module_0|Mux53~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux50~0\, datapath_0|datamem_module_0|Mux50~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_1[4]\, datapath_0|datamem_module_0|memory_input_1[4], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~31\, datapath_0|datamem_module_0|datamem_1|RAM~31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a12\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a12, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a4\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~63\, datapath_0|datamem_module_0|datamem_1|RAM~63, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a28\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a20\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a20, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~64\, datapath_0|datamem_module_0|datamem_1|RAM~64, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~65\, datapath_0|datamem_module_0|datamem_1|RAM~65, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a44\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a36\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a36, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~66\, datapath_0|datamem_module_0|datamem_1|RAM~66, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a60\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a52\, datapath_0|datamem_module_0|datamem_1|RAM_rtl_0|auto_generated|ram_block1a52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~67\, datapath_0|datamem_module_0|datamem_1|RAM~67, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~68\, datapath_0|datamem_module_0|datamem_1|RAM~68, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_1|RAM~69\, datapath_0|datamem_module_0|datamem_1|RAM~69, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux42~0\, datapath_0|datamem_module_0|Mux42~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[4]\, datapath_0|datamem_module_0|memory_input_0[4], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~31\, datapath_0|datamem_module_0|datamem_0|RAM~31, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~7\, datapath_0|datamem_module_0|Mux8~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~8\, datapath_0|datamem_module_0|Mux8~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a12\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a12, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a4\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~9\, datapath_0|datamem_module_0|Mux8~9, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a28\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a28, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a20\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a20, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~10\, datapath_0|datamem_module_0|Mux8~10, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~11\, datapath_0|datamem_module_0|Mux8~11, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a44\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a36\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a36, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~12\, datapath_0|datamem_module_0|Mux8~12, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a60\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a60, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a52\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a52, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~13\, datapath_0|datamem_module_0|Mux8~13, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~14\, datapath_0|datamem_module_0|Mux8~14, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~15\, datapath_0|datamem_module_0|Mux8~15, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[4]\, datapath_0|datamem_module_0|output_data[4], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[4]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux27~0\, datapath_0|mux_0|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux27~1\, datapath_0|mux_0|Mux27~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[4]\, datapath_0|register_file_0|reg_x26|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~0\, datapath_0|register_file_0|output_1_mux|Mux27~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~1\, datapath_0|register_file_0|output_1_mux|Mux27~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~2\, datapath_0|register_file_0|output_1_mux|Mux27~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~3\, datapath_0|register_file_0|output_1_mux|Mux27~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~4\, datapath_0|register_file_0|output_1_mux|Mux27~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~5\, datapath_0|register_file_0|output_1_mux|Mux27~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~6\, datapath_0|register_file_0|output_1_mux|Mux27~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~7\, datapath_0|register_file_0|output_1_mux|Mux27~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~8\, datapath_0|register_file_0|output_1_mux|Mux27~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~9\, datapath_0|register_file_0|output_1_mux|Mux27~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~10\, datapath_0|register_file_0|output_1_mux|Mux27~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~11\, datapath_0|register_file_0|output_1_mux|Mux27~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~12\, datapath_0|register_file_0|output_1_mux|Mux27~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~13\, datapath_0|register_file_0|output_1_mux|Mux27~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~14\, datapath_0|register_file_0|output_1_mux|Mux27~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~15\, datapath_0|register_file_0|output_1_mux|Mux27~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~16\, datapath_0|register_file_0|output_1_mux|Mux27~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~17\, datapath_0|register_file_0|output_1_mux|Mux27~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~18\, datapath_0|register_file_0|output_1_mux|Mux27~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux27~19\, datapath_0|register_file_0|output_1_mux|Mux27~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[4]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[4], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[4]~4\, datapath_0|JTU_0|internal_mux|output_0[4]~4, microcontroller, 1
instance = comp, \datapath_0|Add0~8\, datapath_0|Add0~8, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a206\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a206, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a174\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a174, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a142\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a142, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~70\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~70, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a238\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a238, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~71\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~71, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a46\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a46, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a78\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a78, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a14\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a14, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~72\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~72, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a110\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a110, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~73\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~73, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~74\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~74, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[14]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[14], microcontroller, 1
instance = comp, \controller_0|Selector10~0\, controller_0|Selector10~0, microcontroller, 1
instance = comp, \controller_0|internal_data_format[2]\, controller_0|internal_data_format[2], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|data_format_reg|internal_value[2]\, datapath_0|ID_EX_PLR|data_format_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|data_format_reg|internal_value[2]\, datapath_0|EX_MEM_PLR|data_format_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~3\, datapath_0|datamem_module_0|Mux8~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux10~0\, datapath_0|datamem_module_0|Mux10~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux41~0\, datapath_0|datamem_module_0|Mux41~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[3]\, datapath_0|datamem_module_0|memory_input_0[3], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~30\, datapath_0|datamem_module_0|datamem_0|RAM~30, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~0\, datapath_0|datamem_module_0|Mux7~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~1\, datapath_0|datamem_module_0|Mux7~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a11\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a11, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a3\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~2\, datapath_0|datamem_module_0|Mux7~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a27\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a19\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a19, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~3\, datapath_0|datamem_module_0|Mux7~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~4\, datapath_0|datamem_module_0|Mux7~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a43\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a35\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a35, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~5\, datapath_0|datamem_module_0|Mux7~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a59\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a59, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a51\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a51, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~6\, datapath_0|datamem_module_0|Mux7~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~7\, datapath_0|datamem_module_0|Mux7~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux7~8\, datapath_0|datamem_module_0|Mux7~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[3]\, datapath_0|datamem_module_0|output_data[3], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[3]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux28~0\, datapath_0|mux_0|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux28~1\, datapath_0|mux_0|Mux28~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x10|internal_value[3]\, datapath_0|register_file_0|reg_x10|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~0\, datapath_0|register_file_0|output_1_mux|Mux28~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~1\, datapath_0|register_file_0|output_1_mux|Mux28~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~2\, datapath_0|register_file_0|output_1_mux|Mux28~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~3\, datapath_0|register_file_0|output_1_mux|Mux28~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~4\, datapath_0|register_file_0|output_1_mux|Mux28~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~5\, datapath_0|register_file_0|output_1_mux|Mux28~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~6\, datapath_0|register_file_0|output_1_mux|Mux28~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~7\, datapath_0|register_file_0|output_1_mux|Mux28~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~8\, datapath_0|register_file_0|output_1_mux|Mux28~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~9\, datapath_0|register_file_0|output_1_mux|Mux28~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~10\, datapath_0|register_file_0|output_1_mux|Mux28~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~11\, datapath_0|register_file_0|output_1_mux|Mux28~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~12\, datapath_0|register_file_0|output_1_mux|Mux28~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~13\, datapath_0|register_file_0|output_1_mux|Mux28~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~14\, datapath_0|register_file_0|output_1_mux|Mux28~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~15\, datapath_0|register_file_0|output_1_mux|Mux28~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~16\, datapath_0|register_file_0|output_1_mux|Mux28~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~17\, datapath_0|register_file_0|output_1_mux|Mux28~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~18\, datapath_0|register_file_0|output_1_mux|Mux28~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux28~19\, datapath_0|register_file_0|output_1_mux|Mux28~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[3]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[3], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[3]~3\, datapath_0|JTU_0|internal_mux|output_0[3]~3, microcontroller, 1
instance = comp, \datapath_0|Add0~5\, datapath_0|Add0~5, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a205\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a205, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a173\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a173, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a141\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a141, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~65\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~65, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a237\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a237, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~66\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~66, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a45\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a45, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a77\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a77, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a13\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a13, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~67\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~67, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a109\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a109, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~68\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~68, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~69\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~69, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[13]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[13], microcontroller, 1
instance = comp, \controller_0|Selector9~0\, controller_0|Selector9~0, microcontroller, 1
instance = comp, \controller_0|internal_data_format[1]\, controller_0|internal_data_format[1], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|data_format_reg|internal_value[1]\, datapath_0|ID_EX_PLR|data_format_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|data_format_reg|internal_value[1]\, datapath_0|EX_MEM_PLR|data_format_reg|internal_value[1], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux11~0\, datapath_0|datamem_module_0|Mux11~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux8~6\, datapath_0|datamem_module_0|Mux8~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux40~0\, datapath_0|datamem_module_0|Mux40~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[2]\, datapath_0|datamem_module_0|memory_input_0[2], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~29\, datapath_0|datamem_module_0|datamem_0|RAM~29, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~0\, datapath_0|datamem_module_0|Mux0~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~1\, datapath_0|datamem_module_0|Mux0~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a10\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a10, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a2\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~2\, datapath_0|datamem_module_0|Mux0~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a26\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a26, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a18\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a18, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~3\, datapath_0|datamem_module_0|Mux0~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~4\, datapath_0|datamem_module_0|Mux0~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a42\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a34\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a34, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~5\, datapath_0|datamem_module_0|Mux0~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a58\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a58, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a50\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a50, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~6\, datapath_0|datamem_module_0|Mux0~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~7\, datapath_0|datamem_module_0|Mux0~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux0~8\, datapath_0|datamem_module_0|Mux0~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[2]\, datapath_0|datamem_module_0|output_data[2], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[2]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux29~0\, datapath_0|mux_0|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux29~1\, datapath_0|mux_0|Mux29~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[2]\, datapath_0|register_file_0|reg_x26|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~0\, datapath_0|register_file_0|output_1_mux|Mux29~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~1\, datapath_0|register_file_0|output_1_mux|Mux29~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~2\, datapath_0|register_file_0|output_1_mux|Mux29~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~3\, datapath_0|register_file_0|output_1_mux|Mux29~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~4\, datapath_0|register_file_0|output_1_mux|Mux29~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~5\, datapath_0|register_file_0|output_1_mux|Mux29~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~6\, datapath_0|register_file_0|output_1_mux|Mux29~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~7\, datapath_0|register_file_0|output_1_mux|Mux29~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~8\, datapath_0|register_file_0|output_1_mux|Mux29~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~9\, datapath_0|register_file_0|output_1_mux|Mux29~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~10\, datapath_0|register_file_0|output_1_mux|Mux29~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~11\, datapath_0|register_file_0|output_1_mux|Mux29~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~12\, datapath_0|register_file_0|output_1_mux|Mux29~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~13\, datapath_0|register_file_0|output_1_mux|Mux29~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~14\, datapath_0|register_file_0|output_1_mux|Mux29~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~15\, datapath_0|register_file_0|output_1_mux|Mux29~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~16\, datapath_0|register_file_0|output_1_mux|Mux29~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~17\, datapath_0|register_file_0|output_1_mux|Mux29~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~18\, datapath_0|register_file_0|output_1_mux|Mux29~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux29~19\, datapath_0|register_file_0|output_1_mux|Mux29~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[2]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[2], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[2]~2\, datapath_0|JTU_0|internal_mux|output_0[2]~2, microcontroller, 1
instance = comp, \datapath_0|Add0~2\, datapath_0|Add0~2, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a204\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a204, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a172\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a172, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a140\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a140, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~60\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~60, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a236\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a236, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~61\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~61, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a44\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a44, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a76\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a76, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a12\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a12, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~62\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~62, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a108\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a108, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~63\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~63, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~64\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~64, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[12]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[12], microcontroller, 1
instance = comp, \controller_0|Selector0~0\, controller_0|Selector0~0, microcontroller, 1
instance = comp, \controller_0|internal_data_format[0]\, controller_0|internal_data_format[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|data_format_reg|internal_value[0]\, datapath_0|ID_EX_PLR|data_format_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|data_format_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|data_format_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux20~0\, datapath_0|datamem_module_0|Mux20~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux20~1\, datapath_0|datamem_module_0|Mux20~1, microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[16]\, datapath_0|EX_MEM_PLR|register_file_output_1_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux54~4\, datapath_0|datamem_module_0|Mux54~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux54~3\, datapath_0|datamem_module_0|Mux54~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_2[0]\, datapath_0|datamem_module_0|memory_input_2[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~27\, datapath_0|datamem_module_0|datamem_2|RAM~27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a8\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a0\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~39\, datapath_0|datamem_module_0|datamem_2|RAM~39, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a24\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a24, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a16\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a16, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~40\, datapath_0|datamem_module_0|datamem_2|RAM~40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~41\, datapath_0|datamem_module_0|datamem_2|RAM~41, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a40\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a32\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~42\, datapath_0|datamem_module_0|datamem_2|RAM~42, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a56\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a48\, datapath_0|datamem_module_0|datamem_2|RAM_rtl_0|auto_generated|ram_block1a48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~43\, datapath_0|datamem_module_0|datamem_2|RAM~43, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~44\, datapath_0|datamem_module_0|datamem_2|RAM~44, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_2|RAM~45\, datapath_0|datamem_module_0|datamem_2|RAM~45, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux20~3\, datapath_0|datamem_module_0|Mux20~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[16]\, datapath_0|datamem_module_0|output_data[16], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[16]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux15~0\, datapath_0|mux_0|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux15~1\, datapath_0|mux_0|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[16]\, datapath_0|register_file_0|reg_x26|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~0\, datapath_0|register_file_0|output_1_mux|Mux15~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~1\, datapath_0|register_file_0|output_1_mux|Mux15~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~2\, datapath_0|register_file_0|output_1_mux|Mux15~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~3\, datapath_0|register_file_0|output_1_mux|Mux15~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~4\, datapath_0|register_file_0|output_1_mux|Mux15~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~5\, datapath_0|register_file_0|output_1_mux|Mux15~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~6\, datapath_0|register_file_0|output_1_mux|Mux15~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~7\, datapath_0|register_file_0|output_1_mux|Mux15~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~8\, datapath_0|register_file_0|output_1_mux|Mux15~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~9\, datapath_0|register_file_0|output_1_mux|Mux15~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~10\, datapath_0|register_file_0|output_1_mux|Mux15~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~11\, datapath_0|register_file_0|output_1_mux|Mux15~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~12\, datapath_0|register_file_0|output_1_mux|Mux15~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~13\, datapath_0|register_file_0|output_1_mux|Mux15~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~14\, datapath_0|register_file_0|output_1_mux|Mux15~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~15\, datapath_0|register_file_0|output_1_mux|Mux15~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~16\, datapath_0|register_file_0|output_1_mux|Mux15~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~17\, datapath_0|register_file_0|output_1_mux|Mux15~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~18\, datapath_0|register_file_0|output_1_mux|Mux15~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux15~19\, datapath_0|register_file_0|output_1_mux|Mux15~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[16]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[16], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[16]~16\, datapath_0|JTU_0|internal_mux|output_0[16]~16, microcontroller, 1
instance = comp, \datapath_0|Add0~44\, datapath_0|Add0~44, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1119w[3]~0\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|rden_decode|w_anode1119w[3]~0, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a202\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a202, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a170\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a170, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a138\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a138, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~50\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~50, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a234\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a234, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~51\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~51, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a42\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a42, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a74\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a74, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a10\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a10, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~52\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~52, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a106\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|ram_block1a106, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~53\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~53, microcontroller, 1
instance = comp, \datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~54\, datapath_0|progmem_module_0|progmem_0|altsyncram_component|auto_generated|mux2|_~54, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[10]\, datapath_0|IF_ID_PLR|instruction_data_reg|internal_value[10], microcontroller, 1
instance = comp, \controller_0|Selector35~3\, controller_0|Selector35~3, microcontroller, 1
instance = comp, \controller_0|internal_immediate[5]\, controller_0|internal_immediate[5], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|immediate_reg|internal_value[5]\, datapath_0|ID_EX_PLR|immediate_reg|internal_value[5], microcontroller, 1
instance = comp, \datapath_0|mux_1|output_0[5]~5\, datapath_0|mux_1|output_0[5]~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~2\, datapath_0|ALU_0|ShiftLeft0~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~3\, datapath_0|ALU_0|ShiftLeft0~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~4\, datapath_0|ALU_0|ShiftLeft0~4, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~5\, datapath_0|ALU_0|ShiftLeft0~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~6\, datapath_0|ALU_0|ShiftLeft0~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftLeft0~10\, datapath_0|ALU_0|ShiftLeft0~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~9\, datapath_0|ALU_0|ShiftRight0~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~10\, datapath_0|ALU_0|ShiftRight0~10, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~11\, datapath_0|ALU_0|ShiftRight0~11, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~12\, datapath_0|ALU_0|ShiftRight0~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ShiftRight0~27\, datapath_0|ALU_0|ShiftRight0~27, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~2\, datapath_0|ALU_0|Mux98~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output~0\, datapath_0|ALU_0|ALU_output~0, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~3\, datapath_0|ALU_0|Mux98~3, microcontroller, 1
instance = comp, \datapath_0|ALU_0|result_temp[0]~2\, datapath_0|ALU_0|result_temp[0]~2, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~5\, datapath_0|ALU_0|Mux98~5, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~6\, datapath_0|ALU_0|Mux98~6, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~7\, datapath_0|ALU_0|Mux98~7, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~8\, datapath_0|ALU_0|Mux98~8, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~15\, datapath_0|ALU_0|Mux98~15, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~9\, datapath_0|ALU_0|Mux98~9, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~12\, datapath_0|ALU_0|Mux98~12, microcontroller, 1
instance = comp, \datapath_0|ALU_0|Mux98~13\, datapath_0|ALU_0|Mux98~13, microcontroller, 1
instance = comp, \datapath_0|ALU_0|ALU_output[0]\, datapath_0|ALU_0|ALU_output[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|ALU_output_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[31]~0\, datapath_0|datamem_module_0|output_data[31]~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux37~0\, datapath_0|datamem_module_0|Mux37~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|memory_input_0[0]\, datapath_0|datamem_module_0|memory_input_0[0], microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM~27\, datapath_0|datamem_module_0|datamem_0|RAM~27, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~0\, datapath_0|datamem_module_0|Mux2~0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~1\, datapath_0|datamem_module_0|Mux2~1, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a8\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a0\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a0, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~2\, datapath_0|datamem_module_0|Mux2~2, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a24\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a24, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a16\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a16, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~3\, datapath_0|datamem_module_0|Mux2~3, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~4\, datapath_0|datamem_module_0|Mux2~4, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a40\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a40, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a32\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a32, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~5\, datapath_0|datamem_module_0|Mux2~5, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a56\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a56, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a48\, datapath_0|datamem_module_0|datamem_0|RAM_rtl_0|auto_generated|ram_block1a48, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~6\, datapath_0|datamem_module_0|Mux2~6, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~7\, datapath_0|datamem_module_0|Mux2~7, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|Mux2~8\, datapath_0|datamem_module_0|Mux2~8, microcontroller, 1
instance = comp, \datapath_0|datamem_module_0|output_data[0]\, datapath_0|datamem_module_0|output_data[0], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[0]\, datapath_0|MEM_WB_PLR|datamem_output_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux31~0\, datapath_0|mux_0|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[0]\, datapath_0|IF_ID_PLR|instruction_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[0]\, datapath_0|ID_EX_PLR|instruction_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[0]\, datapath_0|EX_MEM_PLR|instruction_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[0]\, datapath_0|MEM_WB_PLR|instruction_address_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|mux_0|Mux31~1\, datapath_0|mux_0|Mux31~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|reg_x26|internal_value[0]\, datapath_0|register_file_0|reg_x26|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~0\, datapath_0|register_file_0|output_1_mux|Mux31~0, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~1\, datapath_0|register_file_0|output_1_mux|Mux31~1, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~2\, datapath_0|register_file_0|output_1_mux|Mux31~2, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~3\, datapath_0|register_file_0|output_1_mux|Mux31~3, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~4\, datapath_0|register_file_0|output_1_mux|Mux31~4, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~5\, datapath_0|register_file_0|output_1_mux|Mux31~5, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~6\, datapath_0|register_file_0|output_1_mux|Mux31~6, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~7\, datapath_0|register_file_0|output_1_mux|Mux31~7, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~8\, datapath_0|register_file_0|output_1_mux|Mux31~8, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~9\, datapath_0|register_file_0|output_1_mux|Mux31~9, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~10\, datapath_0|register_file_0|output_1_mux|Mux31~10, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~11\, datapath_0|register_file_0|output_1_mux|Mux31~11, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~12\, datapath_0|register_file_0|output_1_mux|Mux31~12, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~13\, datapath_0|register_file_0|output_1_mux|Mux31~13, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~14\, datapath_0|register_file_0|output_1_mux|Mux31~14, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~15\, datapath_0|register_file_0|output_1_mux|Mux31~15, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~16\, datapath_0|register_file_0|output_1_mux|Mux31~16, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~17\, datapath_0|register_file_0|output_1_mux|Mux31~17, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~18\, datapath_0|register_file_0|output_1_mux|Mux31~18, microcontroller, 1
instance = comp, \datapath_0|register_file_0|output_1_mux|Mux31~19\, datapath_0|register_file_0|output_1_mux|Mux31~19, microcontroller, 1
instance = comp, \datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[0]\, datapath_0|ID_EX_PLR|register_file_output_0_reg|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|JTU_0|internal_mux|output_0[0]~0\, datapath_0|JTU_0|internal_mux|output_0[0]~0, microcontroller, 1
instance = comp, \datapath_0|program_counter_0|internal_register|internal_value[0]\, datapath_0|program_counter_0|internal_register|internal_value[0], microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_0_control[2]~2\, datapath_0|FU_0|forward_mux_0_control[2]~2, microcontroller, 1
instance = comp, \datapath_0|FU_0|forward_mux_1_control[2]~2\, datapath_0|FU_0|forward_mux_1_control[2]~2, microcontroller, 1
