read_verilog -sv /eda/processor_ci/rtl/rsd.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/BasicMacros.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/BasicTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Controller.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ControllerIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Core.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Main.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/MicroArchConf.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ResetController.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/SynthesisMacros.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheFlushManager.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheFlushManagerIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheSystemIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/CacheSystemTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/DCache.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/DCacheIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/ICache.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Cache/MemoryAccessController.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/Debug.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/DebugIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/DebugTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/PerformanceCounter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Debug/PerformanceCounterIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/DecodedBranchResolver.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/Decoder.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/MicroOp.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Decoder/OpFormat.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/BitCounter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/DividerUnit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/IntALU.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/MultiplierUnit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/PipelinedRefDivider.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/ExecUnit/Shifter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/Bimodal.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/BranchPredictor.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/FetchUnitTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FetchUnit/Gshare.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32DivSqrter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32PipelinedAdder.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32PipelinedFMA.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32PipelinedMultiplier.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FP32PipelinedOther.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FPDivSqrtUnit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FPDivSqrtUnitIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/FloatingPointUnit/FPUTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/IO/IO_Unit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/IO/IO_UnitIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/IO/IO_UnitTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadStoreUnit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadStoreUnitIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/LoadStoreUnitTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/StoreCommitter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/LoadStoreUnit/StoreQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteControlMemoryIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteControlRegister.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteControlRegisterIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4LiteMemory.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4Memory.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Axi4MemoryIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/ControlQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/Memory.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryLatencySimulator.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryMapTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryReadReqQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Memory/MemoryWriteDataQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/MulDivUnit/MulDivUnit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/MulDivUnit/MulDivUnitIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/CommitStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/CommitStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/DecodeStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/DecodeStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/DispatchStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/DispatchStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/PipelineTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/PreDecodeStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/PreDecodeStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/RenameStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/RenameStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ScheduleStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ScheduleStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerExecutionStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerExecutionStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerIssueStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerIssueStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerRegisterReadStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/ComplexIntegerBackEnd/ComplexIntegerRegisterReadStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPExecutionStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPExecutionStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPIssueStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPIssueStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPRegisterReadStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FPBackEnd/FPRegisterReadStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FetchStage/FetchStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FetchStage/FetchStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FetchStage/NextPCStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FetchStage/NextPCStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/FetchStage/PC.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerExecutionStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerExecutionStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerIssueStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerIssueStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerRegisterReadStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/IntegerBackEnd/IntegerRegisterReadStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryAccessStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryAccessStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryExecutionStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryExecutionStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryIssueStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryIssueStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryRegisterReadStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryRegisterReadStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryTagAccessStage.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Pipeline/MemoryBackEnd/MemoryTagAccessStageIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/Divider.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/FlipFlop.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/FreeList.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/LRU_Counter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/Multiplier.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/Picker.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/Queue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/RAM.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/RAM_Synplify.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Primitives/RAM_Vivado.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Privileged/CSR_Unit.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Privileged/CSR_UnitIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Privileged/CSR_UnitTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Privileged/InterruptController.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Recovery/RecoveryManager.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Recovery/RecoveryManagerIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/BypassController.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/BypassNetwork.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/BypassNetworkIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/BypassTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/RegisterFile.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RegisterFile/RegisterFileIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/ActiveList.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/ActiveListIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/ActiveListIndexTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RMT.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RenameLogic.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RenameLogicCommitter.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RenameLogicIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RenameLogicTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/RenameLogic/RetirementRMT.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/DestinationRAM.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/IssueQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/MemoryDependencyPredictor.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/ProducerMatrix.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/ReadyBitTable.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/ReplayQueue.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/Scheduler.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/SchedulerIF.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/SchedulerTypes.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/SelectLogic.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/SourceCAM.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/WakeupLogic.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/WakeupPipelineRegister.sv
read_verilog -sv /var/jenkins_home/workspace/rsd/rsd/Processor/Src/Scheduler/WakeupSelectIF.sv
read_verilog -sv /eda/processor-ci-controller/modules/uart.sv
read_verilog /eda/processor-ci-controller/modules/UART/rtl/uart_rx.v
read_verilog /eda/processor-ci-controller/modules/UART/rtl/uart_tx.v

#read_verilog -sv /eda/processor-ci-controller/modules/spi.sv;
#read_verilog -sv /eda/processor-ci-controller/modules/SPI-Slave/rtl/spi_slave.sv;

read_verilog -sv /eda/processor_ci/internal/ahblite_to_wishbone.sv
read_verilog -sv /eda/processor_ci/internal/axi4_to_wishbone.sv
read_verilog -sv /eda/processor_ci/internal/axi4lite_to_wishbone.sv
read_verilog -sv /eda/processor-ci-controller/rtl/fifo.sv
read_verilog -sv /eda/processor-ci-controller/rtl/reset.sv
read_verilog -sv /eda/processor-ci-controller/rtl/clk_divider.sv
read_verilog -sv /eda/processor-ci-controller/rtl/memory.sv
read_verilog -sv /eda/processor-ci-controller/rtl/interpreter.sv
read_verilog -sv /eda/processor-ci-controller/rtl/controller.sv
read_verilog -sv /eda/processor-ci-controller/rtl/timer.sv
read_verilog -sv /eda/processor_ci/internal/fpga_top.sv

set_param general.maxThreads 16

read_xdc "/eda/processor_ci/constraints/digilent_arty_a7_100t.xdc"
set_property PROCESSING_ORDER EARLY [get_files /eda/processor_ci/constraints/digilent_arty_a7_100t.xdc]

# synth
synth_design -top "fpga_top" -part "xc7a100tcsg324-1"

# place and route
opt_design
place_design

report_utilization -hierarchical -file digilent_arty_a7_utilization_hierarchical_place.rpt
report_utilization               -file digilent_arty_a7_utilization_place.rpt
report_io                        -file digilent_arty_a7_io.rpt
report_control_sets -verbose     -file digilent_arty_a7_control_sets.rpt
report_clock_utilization         -file digilent_arty_a7_clock_utilization.rpt


route_design

report_timing_summary -no_header -no_detailed_paths
report_route_status                            -file digilent_arty_a7_route_status.rpt
report_drc                                     -file digilent_arty_a7_drc.rpt
report_timing_summary -datasheet -max_paths 10 -file digilent_arty_a7_timing.rpt
report_power                                   -file digilent_arty_a7_power.rpt


# write bitstream
write_bitstream -force "digilent_arty_a7_100t.bit"

exit