// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version   : 0.4.5
// timestamp : Thu May 20 05:54:26 2021 GMT
// usage     : riscv_ctg \
//                  --cgf /scratch/git-repo/github/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /scratch/git-repo/github/riscv-ctg/sample_cgfs/rv32i_k.cgf \
//                  --base-isa rv32i \
//                  --randomize
// -----------
//
// -----------
// Copyright (c) 2021. Indian Institute of Technology Madras. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the unshfli instruction of the RISC-V  extension for the unzip covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32I")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*K.*);def TEST_CASE_1=True;",unzip)

RVTEST_CASE(1,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*ZKs.*);def TEST_CASE_1=True;",unzip)

RVTEST_CASE(2,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*ZKn.*);def TEST_CASE_1=True;",unzip)

RVTEST_CASE(3,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*ZKb.*);def TEST_CASE_1=True;",unzip)

RVTEST_SIGBASE( x14,signature_x14_1)

inst_0:
// rs1 != rd, rs1==x13, rd==x6, rs1_val == 0xFFFFFFFF 
// opcode: unshfli ; op1:x13; dest:x6; op1val:0xffffffff;
li x13, 0xffffffff
unshfli x6, x13, 15
sw x6, 0(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x6, 0x00000000)

inst_1:
// rs1 == rd, rs1==x2, rd==x2, rs1_val == 0x00000000 
// opcode: unshfli ; op1:x2; dest:x2; op1val:0x0;
li x2, 0x0
unshfli x2, x2, 15
sw x2, 4(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x2, 0x00000000)

inst_2:
// rs1==x27, rd==x29, rs1_val == 0x80000000 
// opcode: unshfli ; op1:x27; dest:x29; op1val:0x80000000;
li x27, 0x80000000
unshfli x29, x27, 15
sw x29, 8(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x29, 0x00000000)

inst_3:
// rs1==x24, rd==x1, rs1_val == 0x40000000 
// opcode: unshfli ; op1:x24; dest:x1; op1val:0x40000000;
li x24, 0x40000000
unshfli x1, x24, 15
sw x1, 12(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x1, 0x00000000)

inst_4:
// rs1==x28, rd==x10, rs1_val == 0xA0000000 
// opcode: unshfli ; op1:x28; dest:x10; op1val:0xa0000000;
li x28, 0xa0000000
unshfli x10, x28, 15
sw x10, 16(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x10, 0x00000000)

inst_5:
// rs1==x30, rd==x3, rs1_val == 0x90000000 
// opcode: unshfli ; op1:x30; dest:x3; op1val:0x90000000;
li x30, 0x90000000
unshfli x3, x30, 15
sw x3, 20(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x3, 0x00000000)

inst_6:
// rs1==x25, rd==x12, rs1_val == 0xC8000000 
// opcode: unshfli ; op1:x25; dest:x12; op1val:0xc8000000;
li x25, 0xc8000000
unshfli x12, x25, 15
sw x12, 24(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x12, 0x00000000)

inst_7:
// rs1==x26, rd==x15, rs1_val == 0x2C000000 
// opcode: unshfli ; op1:x26; dest:x15; op1val:0x2c000000;
li x26, 0x2c000000
unshfli x15, x26, 15
sw x15, 28(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x15, 0x00000000)

inst_8:
// rs1==x8, rd==x31, rs1_val == 0xAE000000 
// opcode: unshfli ; op1:x8; dest:x31; op1val:0xae000000;
li x8, 0xae000000
unshfli x31, x8, 15
sw x31, 32(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x31, 0x00000000)

inst_9:
// rs1==x18, rd==x16, rs1_val == 0x43000000 
// opcode: unshfli ; op1:x18; dest:x16; op1val:0x43000000;
li x18, 0x43000000
unshfli x16, x18, 15
sw x16, 36(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x16, 0x00000000)

inst_10:
// rs1==x10, rd==x9, rs1_val == 0xF1800000 
// opcode: unshfli ; op1:x10; dest:x9; op1val:0xf1800000;
li x10, 0xf1800000
unshfli x9, x10, 15
sw x9, 40(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x9, 0x00000000)

inst_11:
// rs1==x6, rd==x26, rs1_val == 0xAEC00000 
// opcode: unshfli ; op1:x6; dest:x26; op1val:0xaec00000;
li x6, 0xaec00000
unshfli x26, x6, 15
sw x26, 44(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x26, 0x00000000)

inst_12:
// rs1==x15, rd==x11, rs1_val == 0x99200000 
// opcode: unshfli ; op1:x15; dest:x11; op1val:0x99200000;
li x15, 0x99200000
unshfli x11, x15, 15
sw x11, 48(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x11, 0x00000000)

inst_13:
// rs1==x21, rd==x24, rs1_val == 0xB0700000 
// opcode: unshfli ; op1:x21; dest:x24; op1val:0xb0700000;
li x21, 0xb0700000
unshfli x24, x21, 15
sw x24, 52(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x24, 0x00000000)

inst_14:
// rs1==x3, rd==x17, rs1_val == 0x35880000 
// opcode: unshfli ; op1:x3; dest:x17; op1val:0x35880000;
li x3, 0x35880000
unshfli x17, x3, 15
sw x17, 56(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x17, 0x00000000)

inst_15:
// rs1==x31, rd==x7, rs1_val == 0x5ACC0000 
// opcode: unshfli ; op1:x31; dest:x7; op1val:0x5acc0000;
li x31, 0x5acc0000
unshfli x7, x31, 15
sw x7, 60(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x7, 0x00000000)

inst_16:
// rs1==x0, rd==x4, rs1_val == 0x5E3A0000 
// opcode: unshfli ; op1:x0; dest:x4; op1val:0x0;
li x0, 0x0
unshfli x4, x0, 15
sw x4, 64(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x4, 0x00000000)

inst_17:
// rs1==x7, rd==x28, rs1_val == 0xAE1D0000 
// opcode: unshfli ; op1:x7; dest:x28; op1val:0xae1d0000;
li x7, 0xae1d0000
unshfli x28, x7, 15
sw x28, 68(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x28, 0x00000000)

inst_18:
// rs1==x19, rd==x5, rs1_val == 0x6EB38000 
// opcode: unshfli ; op1:x19; dest:x5; op1val:0x6eb38000;
li x19, 0x6eb38000
unshfli x5, x19, 15
sw x5, 72(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x20, x5, 0x00000000)

inst_19:
// rs1==x22, rd==x0, rs1_val == 0xBE164000 
// opcode: unshfli ; op1:x22; dest:x0; op1val:0xbe164000;
li x22, 0xbe164000
unshfli x0, x22, 15
sw x0, 76(x14)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x0, 0x00000000)
RVTEST_SIGBASE( x2,signature_x2_0)

inst_20:
// rs1==x1, rd==x27, rs1_val == 0xCDF1A000 
// opcode: unshfli ; op1:x1; dest:x27; op1val:0xcdf1a000;
li x1, 0xcdf1a000
unshfli x27, x1, 15
sw x27, 0(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x27, 0x00000000)

inst_21:
// rs1==x11, rd==x21, rs1_val == 0x804DD000 
// opcode: unshfli ; op1:x11; dest:x21; op1val:0x804dd000;
li x11, 0x804dd000
unshfli x21, x11, 15
sw x21, 4(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x21, 0x00000000)

inst_22:
// rs1==x4, rd==x30, rs1_val == 0x3D4F1800 
// opcode: unshfli ; op1:x4; dest:x30; op1val:0x3d4f1800;
li x4, 0x3d4f1800
unshfli x30, x4, 15
sw x30, 8(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x30, 0x00000000)

inst_23:
// rs1==x29, rd==x13, rs1_val == 0xBFA44C00 
// opcode: unshfli ; op1:x29; dest:x13; op1val:0xbfa44c00;
li x29, 0xbfa44c00
unshfli x13, x29, 15
sw x13, 12(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x13, 0x00000000)

inst_24:
// rs1==x14, rd==x22, rs1_val == 0x4544FA00 
// opcode: unshfli ; op1:x14; dest:x22; op1val:0x4544fa00;
li x14, 0x4544fa00
unshfli x22, x14, 15
sw x22, 16(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x22, 0x00000000)

inst_25:
// rs1==x5, rd==x8, rs1_val == 0xC7BFF300 
// opcode: unshfli ; op1:x5; dest:x8; op1val:0xc7bff300;
li x5, 0xc7bff300
unshfli x8, x5, 15
sw x8, 20(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x8, 0x00000000)

inst_26:
// rs1==x17, rd==x19, rs1_val == 0xD99D0080 
// opcode: unshfli ; op1:x17; dest:x19; op1val:0xd99d0080;
li x17, 0xd99d0080
unshfli x19, x17, 15
sw x19, 24(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x19, 0x00000000)

inst_27:
// rs1==x23, rd==x20, rs1_val == 0x205D39C0 
// opcode: unshfli ; op1:x23; dest:x20; op1val:0x205d39c0;
li x23, 0x205d39c0
unshfli x20, x23, 15
sw x20, 28(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x20, 0x00000000)

inst_28:
// rs1==x12, rd==x18, rs1_val == 0x31711BA0 
// opcode: unshfli ; op1:x12; dest:x18; op1val:0x31711ba0;
li x12, 0x31711ba0
unshfli x18, x12, 15
sw x18, 32(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x18, 0x00000000)

inst_29:
// rs1==x9, rd==x14, rs1_val == 0xA99E07B0 
// opcode: unshfli ; op1:x9; dest:x14; op1val:0xa99e07b0;
li x9, 0xa99e07b0
unshfli x14, x9, 15
sw x14, 36(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x14, 0x00000000)

inst_30:
// rs1==x16, rd==x23, rs1_val == 0x3BA8EA68 
// opcode: unshfli ; op1:x16; dest:x23; op1val:0x3ba8ea68;
li x16, 0x3ba8ea68
unshfli x23, x16, 15
sw x23, 40(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x23, 0x00000000)

inst_31:
// rs1==x20, rd==x25, rs1_val == 0xA14078B4 
// opcode: unshfli ; op1:x20; dest:x25; op1val:0xa14078b4;
li x20, 0xa14078b4
unshfli x25, x20, 15
sw x25, 44(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x25, 0x00000000)

inst_32:
// rs1_val == 0x89B9B4D6 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x89b9b4d6;
li x10, 0x89b9b4d6
unshfli x11, x10, 15
sw x11, 48(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_33:
// rs1_val == 0x797D76DF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x797d76df;
li x10, 0x797d76df
unshfli x11, x10, 15
sw x11, 52(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_34:
// rs1_val == 0x03B1D74C 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x3b1d74c;
li x10, 0x3b1d74c
unshfli x11, x10, 15
sw x11, 56(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_35:
// rs1_val == 0xFF7D5EC1 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xff7d5ec1;
li x10, 0xff7d5ec1
unshfli x11, x10, 15
sw x11, 60(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_36:
// rs1_val == 0x9BC03E23 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x9bc03e23;
li x10, 0x9bc03e23
unshfli x11, x10, 15
sw x11, 64(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_37:
// rs1_val == 0xAF2529C7 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xaf2529c7;
li x10, 0xaf2529c7
unshfli x11, x10, 15
sw x11, 68(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_38:
// rs1_val == 0xD670A82F 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xd670a82f;
li x10, 0xd670a82f
unshfli x11, x10, 15
sw x11, 72(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_39:
// rs1_val == 0x2054FA9F 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2054fa9f;
li x10, 0x2054fa9f
unshfli x11, x10, 15
sw x11, 76(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_40:
// rs1_val == 0x6E7C0C3F 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x6e7c0c3f;
li x10, 0x6e7c0c3f
unshfli x11, x10, 15
sw x11, 80(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_41:
// rs1_val == 0x07AC5F7F 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x7ac5f7f;
li x10, 0x7ac5f7f
unshfli x11, x10, 15
sw x11, 84(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_42:
// rs1_val == 0x4B6EA0FF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x4b6ea0ff;
li x10, 0x4b6ea0ff
unshfli x11, x10, 15
sw x11, 88(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_43:
// rs1_val == 0xBEA425FF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xbea425ff;
li x10, 0xbea425ff
unshfli x11, x10, 15
sw x11, 92(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_44:
// rs1_val == 0x36C2A3FF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x36c2a3ff;
li x10, 0x36c2a3ff
unshfli x11, x10, 15
sw x11, 96(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_45:
// rs1_val == 0xD885B7FF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xd885b7ff;
li x10, 0xd885b7ff
unshfli x11, x10, 15
sw x11, 100(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_46:
// rs1_val == 0x88042FFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x88042fff;
li x10, 0x88042fff
unshfli x11, x10, 15
sw x11, 104(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_47:
// rs1_val == 0x12219FFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x12219fff;
li x10, 0x12219fff
unshfli x11, x10, 15
sw x11, 108(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_48:
// rs1_val == 0x2155BFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2155bfff;
li x10, 0x2155bfff
unshfli x11, x10, 15
sw x11, 112(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_49:
// rs1_val == 0x2FF77FFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2ff77fff;
li x10, 0x2ff77fff
unshfli x11, x10, 15
sw x11, 116(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_50:
// rs1_val == 0xBBE8FFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xbbe8ffff;
li x10, 0xbbe8ffff
unshfli x11, x10, 15
sw x11, 120(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_51:
// rs1_val == 0xA415FFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xa415ffff;
li x10, 0xa415ffff
unshfli x11, x10, 15
sw x11, 124(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_52:
// rs1_val == 0x39A3FFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x39a3ffff;
li x10, 0x39a3ffff
unshfli x11, x10, 15
sw x11, 128(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_53:
// rs1_val == 0xDE87FFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xde87ffff;
li x10, 0xde87ffff
unshfli x11, x10, 15
sw x11, 132(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_54:
// rs1_val == 0x25AFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x25afffff;
li x10, 0x25afffff
unshfli x11, x10, 15
sw x11, 136(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_55:
// rs1_val == 0xAA9FFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xaa9fffff;
li x10, 0xaa9fffff
unshfli x11, x10, 15
sw x11, 140(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_56:
// rs1_val == 0x3B3FFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x3b3fffff;
li x10, 0x3b3fffff
unshfli x11, x10, 15
sw x11, 144(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_57:
// rs1_val == 0xA67FFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xa67fffff;
li x10, 0xa67fffff
unshfli x11, x10, 15
sw x11, 148(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_58:
// rs1_val == 0x2EFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2effffff;
li x10, 0x2effffff
unshfli x11, x10, 15
sw x11, 152(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_59:
// rs1_val == 0xE1FFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xe1ffffff;
li x10, 0xe1ffffff
unshfli x11, x10, 15
sw x11, 156(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_60:
// rs1_val == 0xDBFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xdbffffff;
li x10, 0xdbffffff
unshfli x11, x10, 15
sw x11, 160(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_61:
// rs1_val == 0xC7FFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xc7ffffff;
li x10, 0xc7ffffff
unshfli x11, x10, 15
sw x11, 164(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_62:
// rs1_val == 0xAFFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xafffffff;
li x10, 0xafffffff
unshfli x11, x10, 15
sw x11, 168(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_63:
// rs1_val == 0xDFFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xdfffffff;
li x10, 0xdfffffff
unshfli x11, x10, 15
sw x11, 172(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_64:
// rs1_val == 0xBFFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xbfffffff;
li x10, 0xbfffffff
unshfli x11, x10, 15
sw x11, 176(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_65:
// rs1_val == 0x7FFFFFFF 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x7fffffff;
li x10, 0x7fffffff
unshfli x11, x10, 15
sw x11, 180(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_66:
// rs1_val == 0xFB710735 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfb710735;
li x10, 0xfb710735
unshfli x11, x10, 15
sw x11, 184(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_67:
// rs1_val == 0x586E86CC 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x586e86cc;
li x10, 0x586e86cc
unshfli x11, x10, 15
sw x11, 188(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_68:
// rs1_val == 0x2AB8AB68 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2ab8ab68;
li x10, 0x2ab8ab68
unshfli x11, x10, 15
sw x11, 192(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_69:
// rs1_val == 0x126B7F63 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x126b7f63;
li x10, 0x126b7f63
unshfli x11, x10, 15
sw x11, 196(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_70:
// rs1_val == 0x09852F28 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x9852f28;
li x10, 0x9852f28
unshfli x11, x10, 15
sw x11, 200(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_71:
// rs1_val == 0x07EFF9C1 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x7eff9c1;
li x10, 0x7eff9c1
unshfli x11, x10, 15
sw x11, 204(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_72:
// rs1_val == 0x0344DD40 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x344dd40;
li x10, 0x344dd40
unshfli x11, x10, 15
sw x11, 208(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_73:
// rs1_val == 0x01E7D160 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x1e7d160;
li x10, 0x1e7d160
unshfli x11, x10, 15
sw x11, 212(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_74:
// rs1_val == 0x00B62F26 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xb62f26;
li x10, 0xb62f26
unshfli x11, x10, 15
sw x11, 216(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_75:
// rs1_val == 0x004CAF9D 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x4caf9d;
li x10, 0x4caf9d
unshfli x11, x10, 15
sw x11, 220(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_76:
// rs1_val == 0x002BB482 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2bb482;
li x10, 0x2bb482
unshfli x11, x10, 15
sw x11, 224(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_77:
// rs1_val == 0x0013EDC7 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x13edc7;
li x10, 0x13edc7
unshfli x11, x10, 15
sw x11, 228(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_78:
// rs1_val == 0x00087994 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x87994;
li x10, 0x87994
unshfli x11, x10, 15
sw x11, 232(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_79:
// rs1_val == 0x00051426 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x51426;
li x10, 0x51426
unshfli x11, x10, 15
sw x11, 236(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_80:
// rs1_val == 0x00028854 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x28854;
li x10, 0x28854
unshfli x11, x10, 15
sw x11, 240(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_81:
// rs1_val == 0x000167EE 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x167ee;
li x10, 0x167ee
unshfli x11, x10, 15
sw x11, 244(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_82:
// rs1_val == 0x0000FE7A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfe7a;
li x10, 0xfe7a
unshfli x11, x10, 15
sw x11, 248(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_83:
// rs1_val == 0x00005E87 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x5e87;
li x10, 0x5e87
unshfli x11, x10, 15
sw x11, 252(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_84:
// rs1_val == 0x000031C3 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x31c3;
li x10, 0x31c3
unshfli x11, x10, 15
sw x11, 256(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_85:
// rs1_val == 0x0000192A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x192a;
li x10, 0x192a
unshfli x11, x10, 15
sw x11, 260(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_86:
// rs1_val == 0x00000E79 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xe79;
li x10, 0xe79
unshfli x11, x10, 15
sw x11, 264(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_87:
// rs1_val == 0x0000077A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x77a;
li x10, 0x77a
unshfli x11, x10, 15
sw x11, 268(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_88:
// rs1_val == 0x00000233 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x233;
li x10, 0x233
unshfli x11, x10, 15
sw x11, 272(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_89:
// rs1_val == 0x00000151 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x151;
li x10, 0x151
unshfli x11, x10, 15
sw x11, 276(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_90:
// rs1_val == 0x000000BE 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xbe;
li x10, 0xbe
unshfli x11, x10, 15
sw x11, 280(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_91:
// rs1_val == 0x00000077 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x77;
li x10, 0x77
unshfli x11, x10, 15
sw x11, 284(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_92:
// rs1_val == 0x00000022 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x22;
li x10, 0x22
unshfli x11, x10, 15
sw x11, 288(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_93:
// rs1_val == 0x00000016 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x16;
li x10, 0x16
unshfli x11, x10, 15
sw x11, 292(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_94:
// rs1_val == 0x0000000E 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xe;
li x10, 0xe
unshfli x11, x10, 15
sw x11, 296(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_95:
// rs1_val == 0x00000004 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x4;
li x10, 0x4
unshfli x11, x10, 15
sw x11, 300(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_96:
// rs1_val == 0x00000002 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x2;
li x10, 0x2
unshfli x11, x10, 15
sw x11, 304(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_97:
// rs1_val == 0x00000001 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x1;
li x10, 0x1
unshfli x11, x10, 15
sw x11, 308(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_98:
// rs1_val == 0x61B0EE0A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x61b0ee0a;
li x10, 0x61b0ee0a
unshfli x11, x10, 15
sw x11, 312(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_99:
// rs1_val == 0x9AE6A229 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x9ae6a229;
li x10, 0x9ae6a229
unshfli x11, x10, 15
sw x11, 316(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_100:
// rs1_val == 0xDA6AB32A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xda6ab32a;
li x10, 0xda6ab32a
unshfli x11, x10, 15
sw x11, 320(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_101:
// rs1_val == 0xE38123E6 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xe38123e6;
li x10, 0xe38123e6
unshfli x11, x10, 15
sw x11, 324(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_102:
// rs1_val == 0xF4338384 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xf4338384;
li x10, 0xf4338384
unshfli x11, x10, 15
sw x11, 328(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_103:
// rs1_val == 0xFB9F15C5 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfb9f15c5;
li x10, 0xfb9f15c5
unshfli x11, x10, 15
sw x11, 332(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_104:
// rs1_val == 0xFD680C1D 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfd680c1d;
li x10, 0xfd680c1d
unshfli x11, x10, 15
sw x11, 336(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_105:
// rs1_val == 0xFE74E45F 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfe74e45f;
li x10, 0xfe74e45f
unshfli x11, x10, 15
sw x11, 340(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_106:
// rs1_val == 0xFF1E5BF0 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xff1e5bf0;
li x10, 0xff1e5bf0
unshfli x11, x10, 15
sw x11, 344(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_107:
// rs1_val == 0xFF9C25E7 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xff9c25e7;
li x10, 0xff9c25e7
unshfli x11, x10, 15
sw x11, 348(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_108:
// rs1_val == 0xFFCBCF13 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffcbcf13;
li x10, 0xffcbcf13
unshfli x11, x10, 15
sw x11, 352(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_109:
// rs1_val == 0xFFE06F87 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffe06f87;
li x10, 0xffe06f87
unshfli x11, x10, 15
sw x11, 356(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_110:
// rs1_val == 0xFFF7C831 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfff7c831;
li x10, 0xfff7c831
unshfli x11, x10, 15
sw x11, 360(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_111:
// rs1_val == 0xFFFA9778 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffa9778;
li x10, 0xfffa9778
unshfli x11, x10, 15
sw x11, 364(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_112:
// rs1_val == 0xFFFCEB44 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffceb44;
li x10, 0xfffceb44
unshfli x11, x10, 15
sw x11, 368(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_113:
// rs1_val == 0xFFFE3FBA 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffe3fba;
li x10, 0xfffe3fba
unshfli x11, x10, 15
sw x11, 372(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_114:
// rs1_val == 0xFFFF1658 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffff1658;
li x10, 0xffff1658
unshfli x11, x10, 15
sw x11, 376(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_115:
// rs1_val == 0xFFFFAC3A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffac3a;
li x10, 0xffffac3a
unshfli x11, x10, 15
sw x11, 380(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_116:
// rs1_val == 0xFFFFCDF0 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffcdf0;
li x10, 0xffffcdf0
unshfli x11, x10, 15
sw x11, 384(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_117:
// rs1_val == 0xFFFFE684 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffe684;
li x10, 0xffffe684
unshfli x11, x10, 15
sw x11, 388(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_118:
// rs1_val == 0xFFFFF1C6 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffff1c6;
li x10, 0xfffff1c6
unshfli x11, x10, 15
sw x11, 392(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_119:
// rs1_val == 0xFFFFF806 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffff806;
li x10, 0xfffff806
unshfli x11, x10, 15
sw x11, 396(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_120:
// rs1_val == 0xFFFFFC78 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffc78;
li x10, 0xfffffc78
unshfli x11, x10, 15
sw x11, 400(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_121:
// rs1_val == 0xFFFFFE3B 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffe3b;
li x10, 0xfffffe3b
unshfli x11, x10, 15
sw x11, 404(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_122:
// rs1_val == 0xFFFFFF5A 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffff5a;
li x10, 0xffffff5a
unshfli x11, x10, 15
sw x11, 408(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_123:
// rs1_val == 0xFFFFFF88 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffff88;
li x10, 0xffffff88
unshfli x11, x10, 15
sw x11, 412(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_124:
// rs1_val == 0xFFFFFFC1 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffffc1;
li x10, 0xffffffc1
unshfli x11, x10, 15
sw x11, 416(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_125:
// rs1_val == 0xFFFFFFE8 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xffffffe8;
li x10, 0xffffffe8
unshfli x11, x10, 15
sw x11, 420(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_126:
// rs1_val == 0xFFFFFFF1 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffff1;
li x10, 0xfffffff1
unshfli x11, x10, 15
sw x11, 424(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_127:
// rs1_val == 0xFFFFFFF9 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffff9;
li x10, 0xfffffff9
unshfli x11, x10, 15
sw x11, 428(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_128:
// rs1_val == 0xFFFFFFFD 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffffd;
li x10, 0xfffffffd
unshfli x11, x10, 15
sw x11, 432(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_129:
// rs1_val == 0xFFFFFFFE 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xfffffffe;
li x10, 0xfffffffe
unshfli x11, x10, 15
sw x11, 436(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_130:
// rs1_val == 0x5E3A0000 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0x5e3a0000;
li x10, 0x5e3a0000
unshfli x11, x10, 15
sw x11, 440(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)

inst_131:
// rs1_val == 0xBE164000 
// opcode: unshfli ; op1:x10; dest:x11; op1val:0xbe164000;
li x10, 0xbe164000
unshfli x11, x10, 15
sw x11, 444(x2)
RVMODEL_IO_ASSERT_GPR_EQ(x3, x11, 0x00000000)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
RVTEST_DATA_END

RVMODEL_DATA_BEGIN


signature_x14_0:
    .fill 0*(XLEN/32),4,0xdeadbeef


signature_x14_1:
    .fill 20*(XLEN/32),4,0xdeadbeef


signature_x2_0:
    .fill 112*(XLEN/32),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*(XLEN/32),4,0xdeadbeef

#endif

RVMODEL_DATA_END
