ecall:
  config: 
    - check ISA:=regex(.*I.*); def rvtest_mtrap_routine=True 
  opcode: 
    ecall: 0

ebreak:
  config: 
    - check ISA:=regex(.*I.*); def rvtest_mtrap_routine=True 
  opcode: 
    ebreak: 0

misalign-lh:
  cond: check ISA:=regex(.*I.*Zicsr.*)
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  opcode:
    lh: 0
  val_comb:
    'ea_align == 1': 0

misalign-lhu:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*I.*Zicsr.*)
  opcode:
    lhu: 0
  val_comb:
    'ea_align == 1': 0

misalign-lwu:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*64.*I.*Zicsr.*)
  opcode:
    lwu: 0
  val_comb:
    'ea_align == 1': 0
    'ea_align == 2': 0
    'ea_align == 3': 0

misalign-sd:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*64.*I.*Zicsr.*)
  opcode:
    sd: 0
  val_comb:
    'ea_align == 1': 0
    'ea_align == 2': 0
    'ea_align == 3': 0
    'ea_align == 4': 0
    'ea_align == 5': 0
    'ea_align == 6': 0
    'ea_align == 7': 0

misalign-ld:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*64.*I.*)
  opcode:
    ld: 0
  val_comb:
    'ea_align == 1': 0
    'ea_align == 2': 0
    'ea_align == 3': 0
    'ea_align == 4': 0
    'ea_align == 5': 0
    'ea_align == 6': 0
    'ea_align == 7': 0

misalign-lw:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*I.*Zicsr.*)
  opcode:
    lw: 0
  val_comb:
    'ea_align == 1': 0
    'ea_align == 2': 0
    'ea_align == 3': 0

misalign-sh:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*I.*Zicsr.*)
  opcode:
    sh: 0
  val_comb:
    'ea_align == 1': 0

misalign-sw:
  config:
    - check ISA:=regex(.*I.*); check hw_data_misaligned_support:=True; def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
  cond: check ISA:=regex(.*I.*Zicsr.*)
  opcode:
    sw: 0
  val_comb:
    'ea_align == 1': 0
    'ea_align == 2': 0
    'ea_align == 3': 0

misalign2-jalr:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    jalr: 0
  val_comb:
    'ea_align == 2': 0

misalign1-jalr:
  config: 
    - check ISA:=regex(.*I.*); def rvtest_mtrap_routine=True
  opcode:
    jalr: 0
  val_comb:
    'ea_align == 1': 0

misalign-jal:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    jal: 0
  val_comb:
    'ea_align == 2': 0

misalign-bge:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    bge: 0
  val_comb:
    ' rs1_val>rs2_val and ea_align == 2': 0

misalign-bgeu:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    bgeu: 0
  val_comb:
    ' rs1_val>rs2_val and ea_align == 2': 0

misalign-blt:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    blt: 0
  val_comb:
    ' rs1_val<rs2_val and ea_align == 2': 0

misalign-bltu:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    bltu: 0
  val_comb:
    ' rs1_val<rs2_val and ea_align == 2': 0

misalign-bne:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    bne: 0
  val_comb:
    ' rs1_val!=rs2_val and ea_align == 2': 0

misalign-beq:
  config:
    - check ISA:=regex(.*I.*C.*); def rvtest_mtrap_routine=True
    - check ISA:=regex(.*I.*Zicsr.*); check ISA:=regex(^[^C]+$); def rvtest_mtrap_routine=True 
  cond: check ISA:=regex(.*I.*)
  opcode:
    beq: 0
  val_comb:
    ' rs1_val==rs2_val and ea_align == 2': 0


